JP5340103B2 - Solar cell - Google Patents

Description

  The present invention relates to a solar cell, and more particularly to a solar cell having a novel structure capable of achieving high photoelectric conversion efficiency by improving the light confinement effect.

  In recent years, in order to reduce carbon dioxide emissions, solar cells that can generate power without using fossil fuels have attracted much attention. However, the power generation cost is higher than when using fossil fuels such as oil or nuclear power, and further cost reduction is required. In order to reduce the power generation cost of a solar cell, it is important to improve the absorption rate of light incident on the element itself, that is, to improve the light confinement effect, together with the development of a material having high photoelectric conversion efficiency.

In conventional solar cells, in order to improve the light confinement effect, an antireflection layer made of SiO ₂ or SiN or the like is provided on the light receiving surface to reduce the reflectance of sunlight, and unevenness is provided on the light receiving surface. By adopting a texture structure, sunlight is efficiently absorbed in the element.

  For example, in the invention described in Patent Document 1, the surface of a silicon substrate that constitutes a photoelectric conversion layer is etched in a honeycomb shape so that unevenness is provided on the surface of the solar cell to reduce surface reflection loss. In the present invention, in order to etch the silicon substrate surface in a honeycomb shape, an etching mask is formed by providing fine holes in the photoresist layer with a laser beam, and chemical etching is performed using this mask. However, it is difficult to control anisotropic etching with the method of chemical etching, and therefore it is impossible to perform fine uneven processing. Actually, in the solar cell of Patent Document 1, the width of one hole is as large as about 15 μm. In addition, the manufacturing process becomes complicated, such as using a laser beam that requires a complicated optical system in order to provide fine holes in the photoresist layer.

  In the invention described in Patent Document 2, fine honeycomb-like irregularities having a constant period are provided on the surface of the solar cell to improve the light confinement effect. In this invention, in order to provide fine irregularities on the surface of the solar cell, an aluminum substrate is anodized in a phosphoric acid aqueous solution to form porous aluminum oxide on the substrate, and the formed aluminum oxide is removed. Thus, honeycomb-shaped irregularities are provided on the aluminum substrate. Thereafter, a back electrode layer, a photoelectric conversion layer, a transparent conductive film, and an upper electrode are formed on the substrate to complete a solar cell. Therefore, in the solar cell described in Patent Document 2, in order to form irregularities on the solar cell substrate, the irregularities on the surface of the completed solar cell are relaxed for the formation of the intermediate layer, and the aspect ratio of the irregularities is reduced. Accordingly, the light confinement effect decreases. Furthermore, complicated operations such as anodizing treatment of the aluminum substrate are required, and the manufacturing cost of the solar cell is increased.

  On the other hand, in Patent Document 3, after forming a first electrode film, a photoelectric conversion layer, and a second electrode film on a substrate, a partially missing portion having an opening diameter smaller than the wavelength of incident light in the second electrode film, That is, a technique for improving the light confinement effect by providing a large number of fine holes is disclosed. In the present invention, the refractive index of the entire transparent conductive film forming layer is reduced by providing a large number of micropores having openings smaller than the wavelength of incident light in the second electrode film, that is, the transparent conductive film. The reflectance of light on the solar cell surface is lowered. Therefore, according to the present invention, since the surface treatment is performed after the transparent conductive film is formed on the photoelectric conversion layer, the process is relatively simple, but a large number of fine holes are provided in the transparent conductive film. Has the disadvantage that its electrical properties are impaired. Moreover, since the unevenness | corrugation is not formed in the surface itself of a transparent conductive film, the light confinement effect by irregular reflection of incident light cannot be expected.

JP 2008-227070 A JP 2009-158915 A JP 2004-79934 A

  As described above, no solar cell that has already been proposed has a simple manufacturing method and exhibits a large light confinement effect. The present invention has been made with respect to this point, and it is an object of the present invention to provide a solar cell having a novel structure that has a large light confinement effect and can be manufactured by a simple method and at a low cost. .

  In order to solve the above problems, a solar cell of the present invention is formed on a back electrode layer formed on a substrate, a photoelectric conversion layer formed on the back electrode layer, and an upper surface of the photoelectric conversion layer. An upper electrode layer made of a transparent conductive film, and the photoelectric conversion layer is regularly formed with a large number of fine holes from the upper surface thereof into the layer, and the holes are the upper part thereof. The first hole is formed by a first hole and a lower second hole, and the first hole has a vertically long cylindrical shape, and the maximum width of the second hole is the first hole. It has a curved shape wider than the opening width.

  In the above solar cell, the opening width of the first hole is 1 μm to 15 μm, the interval between adjacent holes is 2 to 20 μm, and the total depth of the first and second holes is 1. It may be ˜20 μm.

  Further, the first hole of the hole may be formed by anisotropic etching using plasma, and the second hole may be formed by isotropic etching using plasma.

When the photoelectric conversion layer is formed using silicon as a material, the gas for anisotropic etching is HF ₆ / O ₂ / SiF ₄ gas, and the gas for isotropic etching is HBr / O. ₂ gas may be used.

  The photoelectric conversion layer may be formed of single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

  Furthermore, the photoelectric conversion layer may have a pin junction structure.

  Further, the second hole portion may reach the i layer.

  According to the solar cell of the present invention, the photoelectric conversion layer has a large number of fine etching holes extending from the surface to the inside of the photoelectric conversion layer, and each etching hole has a shape in which the lower part is expanded in a spherical shape. . As a result, the light incident into each etching hole is multiple-reflected by the inner wall of the lower spherical portion, and most of the light is absorbed in the photoelectric conversion layer without being reflected to the outside.

  As a result, in the solar cell according to the present invention, the light confinement effect is enhanced and high photoelectric conversion efficiency can be expected. As a manufacturing method therefor, anisotropic plasma etching and isotropic plasma etching are sequentially performed on the photoelectric conversion layer on which a junction for photoelectric conversion is formed. It is possible to easily form a fine etching hole of a special shape having a high light confinement effect simply by exchanging. Therefore, a solar cell that has high photoelectric conversion efficiency and can be manufactured at low cost can be provided.

It is sectional drawing which shows schematic structure of the photovoltaic cell manufactured by the method which concerns on one Embodiment of this invention. The top view of the solar cell material in 1 process of manufacturing the photovoltaic cell shown in FIG. 1 is shown. It is a figure for demonstrating the light confinement effect of the photovoltaic cell shown in FIG. It is a figure explaining some processes of the manufacturing method concerning one embodiment of the present invention. It is a figure explaining the process of the next step of the manufacturing process shown in FIG. It is a figure explaining the process of the next step of the manufacturing process shown in FIG. It is sectional drawing which shows schematic structure of the photovoltaic cell which concerns on other embodiment of this invention. It is a figure which shows schematic structure of a plasma etching apparatus.

  Embodiments of the present invention will be described below with reference to the drawings. Note that, in the following drawings, the same reference numerals indicate the same or similar components, and thus redundant description will not be given.

  FIG. 1 is a schematic cross-sectional view showing the structure of a solar cell formed by a manufacturing method according to an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a solar cell substrate, which is made of a metal plate such as glass, plastic or aluminum. Reference numeral 2 denotes a back electrode formed by sputtering aluminum on the substrate 1. A photoelectric conversion layer 3 has a junction such as pn or pin, and is made of, for example, single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

The photoelectric conversion layer 3 of the illustrated embodiment is made of polycrystalline silicon, and has a p-i-n junction composed of a p-type semiconductor layer 3a, an intrinsic semiconductor layer (i layer) 3b, and an n-type semiconductor layer 3c. ing. The junction type of the photoelectric conversion layer 3 may be any type as long as the present element operates as a solar cell, and is not limited to the pin junction. For example, a p ⁺ -pn junction or an n ⁺ -np junction may be used. Also, the material of the photoelectric conversion layer 3 is not limited to silicon, and may be composed of, for example, a Ge semiconductor, a III-V group compound semiconductor such as GaAs, a CIS semiconductor having a chalcopyrite structure, or an organic compound semiconductor. It is.

  5, 5 ... are etching holes formed in the layer from the surface of the photoelectric conversion layer 3, for example, by plasma etching, and a portion formed by isotropic etching and a portion 5a formed by anisotropic etching 5b. Reference numeral 4 denotes a transparent conductive film made of indium tin oxide (ITO) or the like, and constitutes an upper surface electrode with respect to the rear electrode 2. The transparent conductive film 4 is formed by depositing ITO or the like on the photoelectric conversion layer 3 in which the etching holes 5 are formed, for example, by a plasma CVD method. At this time, ITO is embedded in the etching hole 5.

  FIG. 2 is a top view of the photoelectric conversion layer 3 in which the etching holes 5 are formed. As shown in the figure, on the photoelectric conversion layer 3, a large number of etching holes 5 having a constant opening diameter B are regularly arranged at a constant interval A. In addition, it is not a requirement of this invention to form the etching hole 5 regularly in the photoelectric converting layer surface. The etching holes 5 can be randomly formed on the surface of the photoelectric conversion layer.

  In FIG. 1, reference numeral 6 denotes an antireflection film formed on the transparent conductive film 4, which is a silicon oxide film, a silicon nitride film or the like formed by a plasma CVD method. The antireflection film 6 is not always necessary. Further, the transparent conductive film 4 may be provided with an extraction electrode, but its structure is not shown in FIG. 1 because it is not the gist of the present invention.

  Below, the film thickness and size of each part of the photovoltaic cell shown in FIGS. 1 and 2 are shown. This size is one example and does not limit the present invention. In this case, the photoelectric conversion layer is formed of amorphous silicon or polycrystalline silicon.

Film thickness of aluminum back electrode 2: 2 μm
Film thickness of the p-type semiconductor layer 3a: 4 μm
Film thickness of i-type semiconductor layer 3b: 16 μm
Film thickness of n-type semiconductor layer 3c: 4 μm
Pitch A of etching holes 5: 12 μm
Opening diameter B of anisotropic etched portion 5a: 5 μm, depth: 2 μm
Depth of isotropic etching part 5b: 10 μm
The maximum opening width of the isotropic etched portion 5b is 10 μm.
Film thickness of transparent conductive film 4: 2 μm
Film thickness of antireflection layer 6: 1 μm
Total cell thickness: 29 μm

  When polycrystalline silicon is used as the material for the photoelectric conversion layer, the total film thickness of the solar battery cell is generally about 10 μm to 100 μm.

  On the other hand, when the photoelectric conversion layer is formed of single crystal silicon, the film thickness and size of each part of the solar battery cell are as follows.

Film thickness of aluminum back electrode 2: 2 μm
Film thickness of photoelectric conversion layer 3: 200 μm
Pitch A of etching holes 5: 15 μm
Opening diameter B of anisotropic etched portion 5a: 5 μm, depth: 2 μm
Depth of isotropic etching part 5b: 10 μm
The maximum opening width of the isotropic etched portion 5b is 10 μm.
Film thickness of transparent conductive film 4: 2 μm
Film thickness of antireflection layer 6: 1 μm
Total cell thickness: 205 μm

  Including the case where the photoelectric conversion layer is formed of thin film silicon, the opening diameter B of the etching holes 5 can be 1 μm to 5 μm, the pitch A can be 2 μm to 20 μm, and the total etching depth can be 1 μm to 20 μm. In particular, it is preferable that the diameter of the etching hole, that is, the width of the light entrance is larger than the wavelength of the incident light. In addition, in the embodiment described in FIGS. 1 to 3, particularly FIG. 2, the etching holes 5 are regularly arranged. However, as described above, the present invention is not limited to this configuration. That is, it is apparent that the effects of the present invention can be obtained even when the etching holes 5 are arranged randomly on the surface of the photoelectric conversion layer.

  FIG. 3 is a diagram for explaining the light confinement effect of the solar cell having the structure shown in FIG. As shown in the drawing, a part of the light R incident from above the transparent conductive film 4 that is the light receiving surface of the solar cell is reflected by the inner wall of the etching hole 5, and the other part enters the photoelectric conversion layer 3. . The reflected light causes multiple reflection in the isotropic etching portion 5b because the inner wall of the isotropic etching portion 5b is curved in a spherical shape, and a part of the reflected light enters the photoelectric conversion layer 3 for each reflection. It is absorbed (indicated by dotted arrows in the figure). Therefore, most of the light incident on the etching hole is finally absorbed in the photoelectric conversion layer 3, and a high light confinement effect is exhibited. As a result, the photoelectric conversion efficiency of the present solar cell is improved.

  In addition, if the side surface of the etching holes 5a and 5b is considered as the incident surface of the solar cell, the cell surface area of the solar cell is 1.2 to 2 times the actual surface area. Therefore, in order to obtain the same photoelectric conversion output, it is only 50% to 80% of the conventional one. For example, if the cell area of the solar battery is halved, the installation area of the solar battery device is about half that of the conventional one. A power generation device can be provided.

  On the other hand, as shown in Patent Document 1, in the case where a hemispherical hole is provided in the photoelectric conversion layer, the photoelectric conversion is performed as compared with the solar cell of the present invention in which a spherical hole (space) following the anisotropic etching part is provided. The effective surface area of the layer is reduced.

  Further, since the isotropic etching is performed after the anisotropic etching portion 5a is provided, the bottom of the etching hole reaches the intrinsic semiconductor layer 3b, and as a result, the light incident on the etching hole directly enters the intrinsic semiconductor layer 3b. The probability of being absorbed increases. Since photoelectric conversion in the photoelectric conversion layer 3 mainly occurs in the intrinsic semiconductor layer 3b, the photoelectric conversion efficiency of the solar cell can be further improved by making incident light directly incident on the intrinsic semiconductor layer 3b.

  Below, with reference to FIGS. 4-6, the manufacturing method of the polycrystalline-silicon solar cell shown in FIG. 1 is demonstrated.

  As shown in FIG. 4A, first, the substrate 1 is prepared. The substrate 1 is a flat plate such as glass, plastic, or metal plate. A back electrode 2 is formed on the substrate 1 by sputtering a metal such as aluminum. The back electrode 2 preferably has a high reflectance so that light incident on the photoelectric conversion layer 3 does not leak outside through the substrate 1. Examples of such a material include W, Pt, and Au.

  On the back electrode 2, the photoelectric conversion layer 3 is formed by plasma CVD, for example. In order to form p-type amorphous silicon as the p-type semiconductor layer 3a, plasma CVD is performed by introducing silane gas and diborane gas into the plasma CVD apparatus. In order to form the intrinsic semiconductor layer 3b of amorphous silicon, silane gas is introduced into the plasma CVD apparatus and plasma CVD is performed. In order to form the n-type semiconductor layer 3c of amorphous silicon, plasma CVD is performed by introducing silane gas and phosphine gas into the plasma CVD apparatus. In addition, the film-forming method of the photoelectric converting layer 3 should just use a known method, and since it is not the characterizing part of this invention, the detailed description is not performed.

  When the structure 10 having the photoelectric conversion layer 3 is formed on the substrate 1 and the back electrode 2 as shown in FIG. 4A as described above, the structure 10 is formed in the next step (b). As a pattern film, a photosensitive resist film 7 is applied by, for example, spin coating on the surface of the film, and then the resist film 7 is subjected to pattern exposure using a photomask (not shown) to thereby form the resist shown in FIG. A pattern 7a is formed. The resist pattern 7a is provided with an opening 7b for forming the etching hole 5 shown in FIG. Accordingly, the arrangement pattern of the openings 7b is the same as the arrangement pattern of the etching holes 5 shown in FIG. 2, and the interval and the opening diameter of the adjacent openings 7b are also set to the pitch A (12 μm) and the opening diameter B (5 μm) of the etching holes 5. The same.

FIG. 5 shows a step of forming the etching hole 5 in the structure 10 by plasma etching using the resist pattern 7a formed in the step shown in FIG. First, as shown in FIG. 5A, anisotropic etching using plasma is performed to form a cylindrical space extending in the depth direction of the photoelectric conversion layer 3, that is, a hole 5a. The depth of the hole 5a is about 2 μm. For anisotropic etching by plasma, HF ₆ / O ₂ / SiF ₄ gas is used as a processing gas, and etching is performed by a high density plasma TCP (Transfer Coupled Plasma) type plasma apparatus. In FIG. 5A, 12 conceptually shows plasma of the processing gas.

  Below, an example is shown about the processing conditions of the anisotropic etching for forming the hole 5a.

[Anisotropic plasma etching]
Etching device: High-density plasma TCP type plasma device Plasma generation conditions Processing gas (etching gas): HF ₆ / O ₂ / SiF ₄
Processing pressure: 60 Pa (450 mTorr)
Gas flow rate: HF ₆ / O ₂ / SiF ₄ = 200/160/250 SCCM
RF frequency: 40 MHz (upper electrode) 13.56 MHz (lower electrode)
High frequency power: 2200W (upper electrode) 100W (lower electrode)
Temperature: Lower electrode / Upper electrode / Wall = −10 / 40/40 ° C.

When a space having a predetermined depth, that is, a hole 5a is formed in the photoelectric conversion layer 3 by anisotropic plasma etching, next, as shown in FIG. Is changed to HBr / O ₂ to generate plasma 14 and isotropic etching is performed. By this isotropic etching, a spherical second space, that is, a hole 5b, is formed on the extension of the hole 5a, at least a part of the side surface of which expands in the direction of the hole, which is an adjacent space. . The depth of the hole 5b is about 10 μm, and the width of the widest part is also about 10 μm. An example of processing conditions for this isotropic plasma etching is shown below.

[Isotropic plasma etching]
Etching apparatus: high-density plasma TCP type plasma apparatus (the same apparatus as isotropic etching can be used)
Plasma generation conditions Processing gas (etching gas): HBr / O ₂
Processing pressure: 2.66 Pa (20 mTorr)
Gas flow rate: HBr / O ₂ = 400/1 SCCM
RF frequency: 40 MHz (upper electrode) 13.56 MHz (lower electrode)
High frequency power: 200W (upper electrode) 100W (lower electrode)
Temperature: Lower electrode / Upper electrode / Wall = −10 / 40/40 ° C.

In addition to the above gases, anisotropic etching gases include CF ₄ , NF ₃ , NF ₃ HF, HBr, CCl ₄ , CF ₂ Cl ₂ , CFCl ₂ , CFCl ₃ , Br ₂ , Cl ₂ , I ₂ , HCl, ClF ₃ , BCl ₃ , SF ₆ , CS ₂ , C ₃ S ₂ , S ₃ F ₄ , SF ₄ , S ₂ F ₁₀ , S ₂ Cl ₂ , S ₃ Cl ₂ , SCl ₂ , S ₂ Br ₂ , S ₃ Br ₂ , SBr ₂ , IF, IF ₃ , BrF ₃ , BrF, ClF, SOBr ₂ (thionyl bromide) / SF ₆ , COS (carbonyl sulfide) / SF ₆ , NOCl (nitrile chloride) / SF ₆ , COO ₂ (carbonyl chloride) / SF _{6 and the} like, and combinations with at least one of them.

In addition to the above, the isotropic etching gas includes CF ₄ , CH ₂ F ₂ , SCH ₃ F, F ₆ C ₄ F ₆ , NF ₃ , CF ₄ / CHF ₃ / Ar, etc. There is a combination with at least one.

When the etching hole having the curved hole 5b is formed in the photoelectric conversion layer 3 as described above, ashing with O ₂ plasma is then performed to remove the photoresist pattern 7a. FIG. 6A shows the structure 10 with the photoresist pattern 7a removed. A known method may be used for ashing.

  Next, as shown in FIG. 6B, indium tin oxide (ITO), which is a transparent conductive film, is formed on the photoelectric conversion layer 3 in which the holes 5 (5a and 5b) are formed by, for example, plasma CVD. A second (upper) electrode layer 4 is formed. At this time, ITO is embedded in the hole 5. The film thickness of the electrode layer 4 is about 2 μm. An antireflection film 6 is formed on the electrode layer 4. The antireflection film 6 is formed by forming a thin film such as silicon oxide or silicon nitride by, for example, a plasma CVD method.

  It should be noted that various processing steps such as formation of extraction electrodes may be subsequently performed on the solar cell formed as described above by conventional methods, but these are the main parts of the present invention. This is not detailed here.

  7 (a) and 7 (b) are cross-sectional views showing the structure of a solar battery cell according to another embodiment of the present invention. In the embodiment of FIG. 7, the introduction of impurities for forming the photoelectric conversion layers 3 </ b> A and 3 </ b> B is performed by ion implantation under predetermined optimum conditions.

FIG. 7A shows an example in which the photoelectric conversion layer 3 ′ is made of polycrystalline silicon. In the drawing, 3a ′ represents a p-type polycrystalline silicon layer, 3b ′ represents an intrinsic (i-type) polycrystalline silicon layer, and 3c ′ represents an n-type polycrystalline silicon layer. This solar battery cell is formed as follows. First, after forming the back electrode layer 2 on the substrate 1, in order to form the photoelectric conversion layer 3 ′, an amorphous silicon layer containing a p-type impurity is formed on the back electrode layer 3 ′. This film formation is performed by, for example, thermal decomposition at about 600 ° C. using diborane gas and monosilane (SiH ₄ ) gas or plasma CVD at about 250 ° C. Thereafter, the same treatment is performed using only monosilane gas to form an i-type amorphous silicon layer. Thereafter, these amorphous silicon layers are crystallized by laser annealing under a predetermined optimum condition to form a p-type polycrystalline silicon layer 3a ′ and an i-type polycrystalline silicon layer 3b ′. Next, an n-type impurity is introduced from the surface of the i-type polycrystalline silicon layer 3b ′ by ion implantation under a predetermined optimum condition to form an n-type polycrystalline silicon layer 3c ′.

  When the polycrystalline silicon photoelectric conversion layer 3 ′ having the p-i-n junction is formed in this manner, for example, the steps shown in FIGS. 4B to 6B are performed. A solar battery cell having holes 5a and 5b is formed.

  The solar cell shown in FIG. 7B shows an example in which the photoelectric conversion layer 3 ″ is formed of single crystal silicon. This solar cell is manufactured, for example, as follows. First, on the substrate 1 After forming the back electrode 2, a thin amorphous silicon layer 8a is formed on the back electrode 2. This film formation is performed by, for example, CVD using monosilane gas or plasma CVD, and then on the amorphous silicon layer 8a, for example, For example, a p-type silicon single crystal plate 9a having a thickness of 50 μm to 200 μm is pasted, and then n-type impurities are introduced by ion implantation under predetermined optimum conditions to form an n-type layer 9b. A silicon single crystal plate is usually cut from an ingot, and its surface is mirror-polished by a predetermined process. The Rufus silicon layer 8b may be formed.

  When the photoelectric conversion layer 3 ″ of single crystal silicon having a pn junction is formed in this manner, for example, as in the embodiment shown in FIG. 7A, for example, FIG. 4B to FIG. The solar cell having the holes 5a and 5b is formed by performing the process shown in b).

  As shown in FIG. 7C, the amorphous silicon layer 8b may be formed after the holes 5a and 5b are formed in the silicon single crystal plate 9a. In this case, the surfaces of the holes 5a and 5b are also covered with the amorphous silicon layer 8b '.

  FIG. 8 shows an example of a high-density plasma TCP type plasma apparatus for performing anisotropic etching and isotropic etching in each of the above embodiments. Since such an apparatus is known (for example, refer to Japanese Patent Application Laid-Open Nos. 2006-344998 and 2008-91625), the configuration and a plasma etching method using the apparatus will be briefly described here.

  A plasma etching apparatus 100 shown in FIG. 8 is configured as a capacitively coupled parallel plate plasma etching apparatus that performs etching on a substrate G that is an object to be processed. The plasma etching apparatus 100 includes a chamber 200 as a processing container that accommodates a substrate G, a processing gas supply mechanism 300 that supplies a processing gas into the chamber 200, an exhaust means 400 that exhausts the inside of the chamber 200, an upper electrode, and a lower part. Plasma generation mechanisms 500 and 501 are provided that generate plasma of the processing gas supplied into the chamber 200 by the processing gas supply mechanism 300 by supplying high-frequency power to the electrodes.

  The chamber 200 is made of, for example, aluminum whose surface is anodized (anodized), and is formed in a rectangular tube shape corresponding to the shape of the substrate G. A susceptor 20 that functions as a lower electrode and serves as a mounting table on which the substrate G is mounted is provided on the bottom wall of the chamber 200. The susceptor 20 has a square or columnar shape corresponding to the shape of the substrate G, and includes a base material 20a made of a conductive material such as a metal, for example, aluminum, an insulating member 20b that covers the periphery of the base material 20a, and a base material 20a. An insulating member 20c such as alumina that insulates the chamber 200 is disposed. The base material 20a incorporates an electrostatic adsorption mechanism for adsorbing the placed substrate G and a temperature adjusting mechanism for adjusting the temperature of the placed substrate G (both not shown). ) This temperature adjustment mechanism allows He gas or the like to flow between the base material 20a and the substrate G to efficiently transfer heat therebetween, thereby adjusting the temperature of the substrate G to a desired temperature.

  A loading / unloading port 21 for loading and unloading the substrate G is formed on the side wall of the chamber 200, and a gate valve 22 for opening and closing the loading / unloading port 21 is provided. When the loading / unloading port 21 is opened, the substrate G is loaded into and unloaded from the chamber 200 by a transfer mechanism (not shown).

  In the bottom wall of the chamber 200 and the susceptor 20, a plurality of insertion holes 23 penetrating therethrough are formed, for example, at a peripheral edge position of the susceptor 20 with a gap. In each insertion hole 23, a lifter pin 24 that supports and lifts the substrate G from below is inserted so as to protrude and retract with respect to the substrate placement surface of the susceptor 20. A flange 25 is formed below each lifter pin 24, and one end (lower end) of an extendable bellows 26 provided so as to surround the lifter pin 24 is connected to each flange 25. The other end (upper end) of the bellows 26 is connected to the bottom wall of the chamber 200. Thereby, the bellows 26 expands and contracts following the lifting and lowering of the lifter pin 24 and seals the gap between the insertion hole 23 and the lifter pin 24.

  A shower head 27 that functions as an upper electrode for discharging a processing gas supplied by a processing gas supply mechanism 300 (to be described later) into the chamber 200 and generating plasma in the chamber is provided above the chamber 200. It is provided so as to face. On the upper surface of the shower head 27, an antenna 27b for supplying a high frequency is disposed. The shower head 27 is further connected to a high frequency power source 53a via a power supply line 51a and a matching unit 52a. The shower head 27 is insulated from the chamber 200 by an insulating member 27a such as alumina. The chamber 200 and the high frequency power source 53a are grounded. Further, a gas diffusion space 28 for diffusing the processing gas is formed inside the shower head 27, and a plurality of discharge holes for discharging the processing gas diffused in the gas diffusion space 28 on the lower surface or the surface facing the susceptor 20. 29 is formed.

  The exhaust means 400 includes an exhaust pipe 41 as an exhaust path connected to, for example, the bottom wall of the chamber 200, an exhaust device 42 connected to the exhaust pipe 41 and exhausting the inside of the chamber 2 through the exhaust pipe 41, A pressure adjusting valve 43 for adjusting the pressure in the chamber 2 is provided upstream of the connection portion of the pipe 41 with the exhaust device 42. The exhaust device 42 has a vacuum pump such as a turbo molecular pump, and is configured to be able to evacuate the chamber 2 to a predetermined reduced pressure atmosphere. A plurality of exhaust pipes 41 are provided at intervals in the circumferential direction of the chamber 2, and a plurality of exhaust devices 42 and pressure adjustment valves 43 are provided corresponding to the respective exhaust pipes 41.

  The plasma generation mechanism 500 includes a power supply line 51 for supplying high-frequency power connected to the base material 20 a of the susceptor 20, and a matching unit 52 and a high-frequency power supply 53 connected to the power supply line 51. For example, high frequency power of 13.56 MHz is supplied from the high frequency power supply 53 to the susceptor 20, whereby the susceptor 20 functions as a lower electrode and is configured to form a pair of parallel plate electrodes together with the shower head 27. The susceptor 20 and the shower head 27 constitute part of the plasma generation mechanisms 500 and 501.

  As described above, the plasma generation mechanism 501 includes the shower head 27 that functions as the upper electrode, the antenna 27b, the feeder line 51a, the matching unit 52a, and the high-frequency power source 53a. For example, high frequency power of 40 MHz is supplied to the shower head 27, which is the upper electrode, by the high frequency power source 53a. By appropriately supplying high-frequency power between the upper electrode and the lower electrode, a high frequency is generated in the chamber 200, the processing gas is excited by this high frequency, and plasma is generated.

The processing gas supply mechanism 300 includes processing gas supply sources 30, 31 and 32 for supplying processing gases such as SF ₆ gas, O ₂ gas and SiF ₄ gas gas into the chamber 200, and processing from these gas supply sources. A plurality of, for example, two processing gas tanks 33 and 34 for temporarily storing or filling the gas, and a processing gas from each gas supply source 32 are fed into the processing gas tanks 33 and 34 and the chamber 200, and the processing gas tank 33 is supplied. , 34, and a processing gas flow member 35 made of piping or the like for feeding the processing gas stored in the chamber 200 into the chamber 200. The processing gas flow member 35 corresponds to the first processing gas flow path 36 connected to the gas supply source 30, the gas supply source 31, the gas supply source 32, and the chamber 200, and the two processing gas tanks 33 and 34. As described above, each has a second processing gas flow path 37, 38 branched from the first processing gas flow path 36 and connected to the processing gas tanks 33, 34.

  The first processing gas flow path 36 is divided into three so as to correspond to the three processing gas supply sources 30, 31, 32, and supply source connection flow paths 36a, 36b connected to the respective processing gas supply sources, 36 c is provided on one side or upstream side, and the other end or downstream end is connected to the upper surface of the shower head 27 so as to communicate with the gas diffusion space 28. The first processing gas channel 36 is provided with mass flow controllers 36d, 36e, 36f and valves 36g, 36h, 36i for adjusting the flow rate of the processing gas in the supply source connection channels 36a, 36b, 36c, respectively. Valves 36s and 36t are also provided at, for example, one end and the other end on the other side of the branching portion with the second process gas flow paths 37 and 38, respectively.

  The second process gas channels 37 and 38 are branched from the supply source connection channels 36 a, 36 b and 36 c of the first process gas channel 36 from the downstream side, and are connected to the gas diffusion space 28. Connected to the upper surface of the head 27, process gas tanks 33 and 34 are connected to the middle part. As a result, the second process gas flow paths 37 and 38 are respectively used to send process gas into the process gas tanks 33 and 34, and to send process gas from the process gas tanks 33 and 34, respectively. The delivery channels 37b and 38b are separately provided. Valves 37c and 38c and valves 37d and 38d are provided in the inflow channels 37a and 38a and the outflow channels 37b and 38b, respectively, and the processing gas tanks 33 and 34 are pressure gauges for measuring the internal pressure, respectively. 33a and 34a are provided.

  A bypass flow path 39 such as a pipe is connected to the processing gas flow member 35, for example, the first processing gas flow path 36 and a part, for example, one of the plurality of exhaust pipes 41, and the processing gas The processing gas in the flow member 35 can be exhausted by the exhaust means 4 through the bypass channel 39. The bypass passage 39 is connected between the pressure adjustment valve 43 of the exhaust pipe 41 and the exhaust device 42, and the processing gas discharged from the bypass passage 39 is exhausted by closing the pressure adjustment valve 43. It is configured so that it can be prevented from flowing into the chamber 2 via 41.

  Each component of the plasma etching apparatus 100 is controlled by a process controller 90 including a microprocessor (computer). The process controller 90 includes a user interface 91 including a keyboard for a process manager to input commands to manage the plasma etching apparatus 1, a display for visualizing and displaying the operating status of the plasma etching apparatus 100, and the like. A storage unit 92 storing a recipe in which a control program for realizing the processing executed by the plasma etching apparatus 1 under the control of the process controller 90 and processing condition data is stored is connected. If necessary, an arbitrary recipe is called from the storage unit 92 by an instruction from the user interface 91 and is executed by the process controller 90, so that the process in the plasma etching apparatus 100 can be performed under the control of the process controller 90. Done. The recipe may be stored in a computer-readable storage medium such as a CD ROM, hard disk, or flash memory, or may be transmitted from another device as needed via a dedicated line, for example. It is also possible to use it.

  More specifically, each valve 36g, 36h, 36i, 36s, 36t, 37c, 37d, 38c, 38d, 39a of the processing gas supply mechanism 3 is a unit controller 93 (control unit) connected to the process controller 90. It is the structure controlled by. Then, if necessary, the process controller 90 calls an arbitrary recipe from the storage unit 92 and controls the unit controller 93 in accordance with an instruction from the user interface 91 or the like.

  In the plasma etching apparatus 100 configured as described above, the substrate G is illustrated in a state where the loading / unloading port 21 is opened by the gate valve 22 while the inside of the chamber 200 is maintained at a predetermined degree of vacuum by the exhaust unit 400. When the transfer mechanism 21 does not carry it in from the loading / unloading port 21, each lifter pin 24 is raised, and the substrate G is received and supported by each lifter pin 24 from the transfer mechanism. When the transfer mechanism exits from the loading / unloading port 21 to the outside of the chamber 2, the loading / unloading port 21 is closed by the gate valve 22, and each lifter pin 24 is lowered to be immersed in the substrate mounting surface of the susceptor 20. To be placed.

  Next, the processing gas is supplied into the chamber 200 by the processing gas supply mechanism 300. The processing gas is supplied by opening the valve 37d and releasing the gas used for anisotropic etching or isotropic etching, which has been filled in the processing gas tank 33 from the gas supply sources 30, 31, and 32 in advance. By doing.

  Since the inside of the chamber 200 is exhausted by the exhaust means 400, the pressure in the chamber 200 decreases with time if only the processing gas filled in the processing gas tank 33 is supplied. Therefore, at the time of supplying the processing gas filled in the processing gas tank 33 or immediately after the supply, the valves 36s, 36t, 36g, 36h, 36i are opened, and various gases from the gas supply sources 30, 31, 32 are supplied to the mass flow controllers 36d, 36e. 36f, the flow rate is adjusted and supplied into the chamber 200, and the pressure inside the chamber 200 is maintained at a set pressure, for example, 60 Pa (450 mTorr) by the pressure control valve 43. Thereby, the set pressure in the chamber 200 can be quickly maintained. In addition, the processing gas flow member 35 is branched from the first processing gas flow path 36 connected to the gas supply sources 30, 31 and 32 and the chamber 200, and the first processing gas flow path 36, and the processing gas tank Since the second processing gas flow paths 37 and 38 are connected to the first and second processing gas flow paths 37 and 38, respectively, various gases from the gas supply sources 30, 31 and 32 are passed through the first processing gas flow path 36 to form a large space. Thus, the gas can be supplied into the chamber 200 in a short time without passing through the processing gas tanks 33, 34, which makes it possible to further speed up the pressure holding in the chamber 200.

  When the pressure in the chamber 200 is maintained at a predetermined value as described above, a DC voltage is applied to the electrostatic adsorption mechanism built in the susceptor 20 to adsorb the substrate G to the susceptor 20 and The temperature of the substrate G is adjusted by a built-in temperature control mechanism. Then, high-frequency power is applied from the high-frequency power source 53 to the susceptor 20 through the matching unit 52, and a high-frequency electric field is generated between the susceptor 20 as the lower electrode and the shower head 27 as the upper electrode, thereby processing in the chamber 200. The gas is turned into plasma. The substrate G is etched by the processing gas plasma. As for the plasma etching process conditions, the conditions shown in the above sections [Anisotropic Plasma Etching] and [Isotropic Plasma Etching] are applied.

1 Substrate 2 Back electrode (first electrode)
3 photoelectric conversion layer 3a p-type semiconductor layer 3b i-type semiconductor layer 3c n-type semiconductor layer 4 transparent conductive film (second electrode)
DESCRIPTION OF SYMBOLS 5 Etching hole 5a 1st hole 5b 2nd hole 6 Antireflection film

Claims (7)

A back electrode layer formed on the substrate;
A photoelectric conversion layer formed on the back electrode layer;
An upper electrode layer made of a transparent conductive film formed on the upper surface of the photoelectric conversion layer,
The photoelectric conversion layer is regularly formed with a large number of fine holes from the upper surface thereof into the layer, and the hole parts include a first hole part at the upper part and a second hole at the lower part. The first hole has a vertically long cylindrical shape, and the second hole has a curved shape whose maximum width is wider than the opening width of the first hole , In addition, the first hole portion has an opening width that is equal to or larger than the wavelength of incident light . 2. The solar cell according to claim 1 , wherein the opening width of the first hole is 1 to 15 μm, the interval between adjacent holes is 2 to 20 μm, and the total depth of the first and second holes. Is a solar cell, characterized by being 1 to 20 μm. 3. The solar cell according to claim 1, wherein the first hole of the hole is formed by anisotropic etching using plasma, and the second hole is formed by isotropic etching using plasma. Solar cells that are things. 4. The solar cell according to claim 3 , wherein when the photoelectric conversion layer is formed of silicon as a material, the gas for the anisotropic etching is HF ₆ / O ₂ / SiF ₄ gas, and the isotropic property. A solar cell, wherein an etching gas is HBr / O ₂ gas. In the solar cell according to any one of claims 1 to 3, the photoelectric conversion layer is characterized by being formed of single crystal silicon, polycrystalline silicon, amorphous silicon or microcrystalline silicon solar cell. In the solar cell according to any one of claims 1 to 5, wherein the photoelectric conversion layer is characterized by having a p-i-n junction structure, the solar cell. The solar cell according to claim 6 , wherein the second hole portion reaches the i layer.

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