JP2010503142A5 - - Google Patents

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Publication number
JP2010503142A5
JP2010503142A5 JP2009527598A JP2009527598A JP2010503142A5 JP 2010503142 A5 JP2010503142 A5 JP 2010503142A5 JP 2009527598 A JP2009527598 A JP 2009527598A JP 2009527598 A JP2009527598 A JP 2009527598A JP 2010503142 A5 JP2010503142 A5 JP 2010503142A5
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JP
Japan
Prior art keywords
code
flash memory
user data
memory chip
pages
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009527598A
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English (en)
Japanese (ja)
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JP2010503142A (ja
JP4778585B2 (ja
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Publication date
Priority claimed from US11/530,392 external-priority patent/US7734861B2/en
Priority claimed from US11/530,399 external-priority patent/US7606966B2/en
Application filed filed Critical
Priority claimed from PCT/US2007/077940 external-priority patent/WO2008031074A1/en
Priority claimed from US11/852,229 external-priority patent/US7885112B2/en
Publication of JP2010503142A publication Critical patent/JP2010503142A/ja
Publication of JP2010503142A5 publication Critical patent/JP2010503142A5/ja
Application granted granted Critical
Publication of JP4778585B2 publication Critical patent/JP4778585B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2009527598A 2006-09-08 2007-09-07 フラッシュメモリにおけるサイクル効果の擬似ランダムおよびコマンド主導型ビット補償とその方法 Expired - Fee Related JP4778585B2 (ja)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US11/530,392 US7734861B2 (en) 2006-09-08 2006-09-08 Pseudo random and command driven bit compensation for the cycling effects in flash memory
US11/530,399 US7606966B2 (en) 2006-09-08 2006-09-08 Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory
US11/530,392 2006-09-08
US11/530,399 2006-09-08
PCT/US2007/077940 WO2008031074A1 (en) 2006-09-08 2007-09-07 Pseudo random and command driven bit compensation for the cycling effects in flash memory and methods therefor
US11/852,229 2007-09-07
US11/852,229 US7885112B2 (en) 2007-09-07 2007-09-07 Nonvolatile memory and method for on-chip pseudo-randomization of data within a page and between pages

Publications (3)

Publication Number Publication Date
JP2010503142A JP2010503142A (ja) 2010-01-28
JP2010503142A5 true JP2010503142A5 (enExample) 2010-10-14
JP4778585B2 JP4778585B2 (ja) 2011-09-21

Family

ID=38941921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009527598A Expired - Fee Related JP4778585B2 (ja) 2006-09-08 2007-09-07 フラッシュメモリにおけるサイクル効果の擬似ランダムおよびコマンド主導型ビット補償とその方法

Country Status (4)

Country Link
EP (1) EP2070090B1 (enExample)
JP (1) JP4778585B2 (enExample)
KR (1) KR101615773B1 (enExample)
WO (1) WO2008031074A1 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7606966B2 (en) 2006-09-08 2009-10-20 Sandisk Corporation Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory
US7885112B2 (en) * 2007-09-07 2011-02-08 Sandisk Corporation Nonvolatile memory and method for on-chip pseudo-randomization of data within a page and between pages
US7734861B2 (en) 2006-09-08 2010-06-08 Sandisk Corporation Pseudo random and command driven bit compensation for the cycling effects in flash memory
CN102132348B (zh) * 2008-07-01 2015-06-17 Lsi公司 用于闪存存储器中写入端单元间干扰减轻的方法和装置
WO2010030701A1 (en) * 2008-09-12 2010-03-18 Sandisk Corporation Built in on-chip data scrambler for non-volatile memory
US8145855B2 (en) 2008-09-12 2012-03-27 Sandisk Technologies Inc. Built in on-chip data scrambler for non-volatile memory
US8429330B2 (en) 2008-09-12 2013-04-23 Sandisk Technologies Inc. Method for scrambling data in which scrambling data and scrambled data are stored in corresponding non-volatile memory locations
KR20100099961A (ko) * 2009-03-04 2010-09-15 삼성전자주식회사 불휘발성 메모리 장치 및 그 동작 방법
KR101504338B1 (ko) * 2009-03-04 2015-03-23 삼성전자주식회사 불휘발성 메모리 장치의 동작 방법
US8843693B2 (en) 2011-05-17 2014-09-23 SanDisk Technologies, Inc. Non-volatile memory and method with improved data scrambling
US9292428B2 (en) 2012-09-05 2016-03-22 Kabushiki Kaisha Toshiba Memory system
KR20160127525A (ko) 2015-04-27 2016-11-04 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
FR3095547B1 (fr) * 2019-04-26 2024-07-19 St Microelectronics Rousset Bus de données de mémoire non-volatile
KR20210115524A (ko) 2020-03-13 2021-09-27 삼성전자주식회사 반도체 메모리 장치 및 이의 제조 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07240098A (ja) * 1994-02-25 1995-09-12 Sony Corp 半導体不揮発性記憶装置
KR0172366B1 (ko) * 1995-11-10 1999-03-30 김광호 불휘발성 반도체 메모리 장치의 독출 및 프로그램 방법과 그 회로
JP3881869B2 (ja) * 2001-11-05 2007-02-14 株式会社ルネサステクノロジ 半導体記憶装置
US7274596B2 (en) * 2004-06-30 2007-09-25 Micron Technology, Inc. Reduction of adjacent floating gate data pattern sensitivity
US7120051B2 (en) 2004-12-14 2006-10-10 Sandisk Corporation Pipelined programming of non-volatile memories using early data
EP1686592A3 (en) * 2005-01-19 2007-04-25 Saifun Semiconductors Ltd. Partial erase verify

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