JP2010098098A - Method of manufacturing electronic apparatus - Google Patents

Method of manufacturing electronic apparatus Download PDF

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JP2010098098A
JP2010098098A JP2008267233A JP2008267233A JP2010098098A JP 2010098098 A JP2010098098 A JP 2010098098A JP 2008267233 A JP2008267233 A JP 2008267233A JP 2008267233 A JP2008267233 A JP 2008267233A JP 2010098098 A JP2010098098 A JP 2010098098A
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post
solder
chip
sharp
electronic device
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JP5056718B2 (en
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Norimasa Handa
宣正 半田
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Denso Corp
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Denso Corp
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an electronic apparatus having one surface of an IC chip and one surface of a substrate bonded to each other by solder, which performs proper soldering without making solder into a special shape or mixing a flux component into solder and without using flux in the case of the existence of an oxide film. <P>SOLUTION: A conductive post 11 which protrudes from one surface of an IC chip 10 and is provided in a sharp portion 12 having a sharp shape in a front end surface thereof is formed on a portion to be soldered of the one surface of the IC chip 10, and solder 30 is disposed on a portion to be soldered of one surface of a substrate 20, and next, the one surface of the IC chip 10 and the one surface of the substrate 20 are disposed so as to face each other, and the IC chip 10 is pressed to the substrate 20 to break through an oxide film located on the surface of solder 30 by the sharp portion 12 of the post 11, and in this state, the solder 30 is reflowed. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、ＩＣチップと基板とをはんだ接合してなる電子装置の製造方法に関する。   The present invention relates to a method for manufacturing an electronic device formed by soldering an IC chip and a substrate.

近年、携帯電話を始めとして、電子部品の高機能化及び小型化がとりわけすすんでいる。これは自動車電子部品も同様で、ＥＣＵ（Ｅｌｅｃｔｒｏｎｉｃ Ｃｏｎｔｒｏｌ Ｕｎｉｔ）の更なる小型化、高機能化が求められている。   In recent years, particularly high-functionality and downsizing of electronic components such as mobile phones have been promoted. The same applies to automobile electronic components, and further miniaturization and higher functionality of an ECU (Electronic Control Unit) are required.

この種の一般的な電子装置の製造方法としては、たとえば、鉛フリーはんだを用いたフリップチップ接続が知られている。このものは、ＩＣチップの一面と基板の一面との間にはんだを介在させた状態で、当該両一面間を対向させ、はんだ接合するものである。   As a method for manufacturing this type of general electronic device, for example, flip chip connection using lead-free solder is known. In this case, solder is interposed between one surface of the IC chip and one surface of the substrate, and the two surfaces are opposed to each other and soldered together.

通常、この場合、ＩＣチップを基板上へマウントする前に、フラックスを供給する。そして、このフラックスによって、はんだ表面に存在する酸化膜を除去した後、ＩＣチップのマウント、はんだリフローを行い、接続信頼性を満足するようにしていた。   Usually, in this case, flux is supplied before the IC chip is mounted on the substrate. Then, the oxide film present on the solder surface is removed by this flux, and then the IC chip is mounted and solder reflowed to satisfy the connection reliability.

しかしながら、この方法では、はんだリフロー後にフラックス残渣が残るため、洗浄工程が必須となり、工程が煩雑化するといった問題があった。また、昨今のＩＣチップの狭ピッチ化により、洗浄液が充分に進入できないことがあり、その結果、フラックス残渣が充分に洗浄しきれないという不具合があった。   However, this method has a problem in that a flux residue remains after solder reflow, which necessitates a cleaning process and complicates the process. Further, due to the recent narrowing of the pitch of the IC chip, there is a case where the cleaning liquid cannot sufficiently enter, and as a result, the flux residue cannot be sufficiently cleaned.

この対策として、従来では、特許文献１に記載されているように、２層のはんだ突起を用いて加圧することにより、第２のはんだ突起が溶融し接続されるようにした方法が提案されている。
特開平１０−３０８４１５号公報 As a countermeasure, conventionally, as described in Patent Document 1, a method has been proposed in which the second solder protrusion is melted and connected by applying pressure using two layers of solder protrusions. Yes.
JP-A-10-308415

しかしながら、上記特許文献１に記載の方法では、はんだに突起を設けた特別な形状であるため、たとえば、複数のＩＣチップや他の電子部品を一括して実装する場合には、手間がかかるなど、好ましくない。また、はんだ自身にフラックス成分を混入させて、酸化膜の発生を防止することも考えられるが、これも、汎用性に劣る。   However, since the method described in Patent Document 1 has a special shape in which a protrusion is provided on the solder, for example, when a plurality of IC chips and other electronic components are mounted together, it takes time and so on. Is not preferable. In addition, it may be possible to prevent the generation of an oxide film by mixing a flux component in the solder itself, but this is also inferior in versatility.

本発明は、上記問題に鑑みてなされたものであり、ＩＣチップの一面と基板の一面との間を、はんだによってはんだ接合してなる電子装置の製造方法において、はんだを特別な形状としたり、はんだにフラックス成分を混入させたりすることなく、酸化膜が存在してもフラックスを用いずに、適切にはんだ接合を行うことを目的とする。   The present invention has been made in view of the above problems, and in a method for manufacturing an electronic device in which one surface of an IC chip and one surface of a substrate are solder-bonded by solder, the solder has a special shape, It is an object of the present invention to appropriately perform solder joining without using flux in the presence of an oxide film without mixing flux components into the solder.

上記目的を達成するため、請求項１に記載の発明においては、ＩＣチップ（１０）の一面のうちはんだ接合される部位に、当該一面より突出しその先端面に鋭利形状をなす鋭利部（１２）が設けられた導電性のポスト（１１）を形成するポスト形成工程と、基板（２０）の一面のうちはんだ接合される部位に、はんだ（３０）を配置するはんだ配置工程と、次に、ＩＣチップ（１０）と基板（２０）とを互いの一面同士にて対向させ、ＩＣチップ（１０）を基板（２０）側に押し付けてポスト（１１）の鋭利部（１２）ではんだ（３０）の表面に位置する酸化膜（３１）を突き破り、この状態ではんだ（３０）をリフローさせるはんだ接合工程と、を備えることを特徴とする。   In order to achieve the above object, in the invention described in claim 1, a sharp portion (12) that protrudes from one surface of the surface of the IC chip (10) and has a sharp shape at the tip surface thereof. A post forming step of forming a conductive post (11) provided with solder, a solder placement step of placing solder (30) in a portion to be soldered on one surface of the substrate (20), and then an IC The chip (10) and the substrate (20) are made to face each other, the IC chip (10) is pressed against the substrate (20) side, and the sharp portion (12) of the post (11) is used for the solder (30). A solder bonding step of breaking through the oxide film (31) located on the surface and reflowing the solder (30) in this state.

それによれば、はんだ（３０）の表面に存在する酸化膜（３１）を、鋭利部（１２）で突き破ることによって、内部のはんだ成分とポスト（１１）とが接し、この状態ではんだ付けがなされるので、はんだを特別な形状としたり、はんだにフラックス成分を混入させたりすることなく、酸化膜が存在してもフラックスを用いずに、適切にはんだ接合を行うことができる。   According to this, the internal solder component and the post (11) are in contact with each other by breaking through the oxide film (31) existing on the surface of the solder (30) with the sharp part (12), and soldering is performed in this state. Therefore, it is possible to appropriately perform solder joint without using a flux even if an oxide film exists without making the solder into a special shape or mixing a flux component into the solder.

ここで、請求項２に記載の発明のように、ポスト形成工程では、ポスト（１１）をメッキにより形成するものにできる。   Here, as in the invention described in claim 2, in the post forming step, the post (11) can be formed by plating.

さらに、この場合、請求項３に記載の発明のように、ポスト（１１）の最表面を金メッキ（１１ｂ）により形成することが好ましい。それによれば、ポスト（１１）の最表面が金メッキ（１１ｂ）により構成されるので、ポスト（１１）のはんだ濡れ性が向上し、好ましい。   Further, in this case, it is preferable that the outermost surface of the post (11) is formed by gold plating (11b) as in the invention described in claim 3. According to this, since the outermost surface of the post (11) is constituted by the gold plating (11b), the solder wettability of the post (11) is improved, which is preferable.

また、請求項４に記載の発明のように、ポスト形成工程では、ポスト（１１）の先端面をエッチングすることにより、鋭利部（１２）を形成するようにすれば、適切に鋭利部（１２）を形成できる。   Further, as in the invention according to claim 4, in the post forming step, if the sharp portion (12) is formed by etching the tip surface of the post (11), the sharp portion (12) is appropriately formed. ) Can be formed.

また、請求項５に記載の発明のように、ポスト形成工程では、ポスト（１１）の先端面に粗化メッキを施すか、もしくは当該先端面をエッチングすることにより、当該先端面を、鋭利部（１２）としての複数の針状突起を有する粗化された面とすれば、適切に鋭利部（１２）を形成できる。   Further, as in the invention described in claim 5, in the post forming step, the tip surface of the post (11) is roughened or etched by etching the tip surface. If it is set as the roughened surface which has several acicular protrusion as (12), a sharp part (12) can be formed appropriately.

また、請求項６に記載の発明のように、ポスト形成工程では、ＩＣチップ（１０）の一面のうちポスト（１１）が形成される部位に凹凸（１７）を設け、その上にメッキを行うことによって、先端面が前記凹凸（１７）を継承した形状の凹凸面となっているとともに当該凹凸面の凸部が鋭利部（１２）として構成されているポスト（１１）を形成してもよい。   Further, as in the sixth aspect of the present invention, in the post forming step, the unevenness (17) is provided on the portion of the one surface of the IC chip (10) where the post (11) is formed, and plating is performed thereon. Thus, the post surface (11) in which the tip surface is an uneven surface having a shape inheriting the unevenness (17) and the convex portion of the uneven surface is configured as a sharp portion (12) may be formed. .

それによれば、メッキにより形成されるポスト（１１）では、その突出方向に沿った断面が下地の凹凸（１７）を継承するから、適切に鋭利部（１２）を形成できる。   According to this, in the post (11) formed by plating, since the cross section along the protruding direction inherits the unevenness (17) of the base, the sharp portion (12) can be appropriately formed.

さらに、この場合、請求項７に記載の発明のように、凹凸面の凸部をエッチングして、さらに鋭利な形状に加工すれば、鋭利部（１２）をより鋭利な形状にすることができ、はんだ（３０）の突き破りが容易になる。   Further, in this case, the sharp part (12) can be made to be a sharper shape by etching the convex part of the concavo-convex surface and processing it into a sharper shape as in the invention described in claim 7. The solder (30) can be easily broken through.

また、請求項８に記載の発明のように、ポスト形成工程では、ＩＣチップ（１０）の一面のうちポスト（１１）が形成される部位に針（１８）を立て、その後、針（１８）の根元部分にメッキを行い、先端面から突出する針（１８）の先端が鋭利部（１２）として構成されているポスト（１１）を形成するようにしてもよく、それによれば、適切に鋭利部（１２）を形成できる。   Further, as in the invention according to claim 8, in the post forming step, the needle (18) is set up at a portion of the one surface of the IC chip (10) where the post (11) is formed, and then the needle (18) The base portion of the needle may be plated to form a post (11) in which the tip of the needle (18) protruding from the tip surface is configured as a sharp portion (12). A part (12) can be formed.

なお、特許請求の範囲およびこの欄で記載した各手段の括弧内の符号は、後述する実施形態に記載の具体的手段との対応関係を示す一例である。   In addition, the code | symbol in the bracket | parenthesis of each means described in the claim and this column is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

以下、本発明の実施形態について図に基づいて説明する。なお、以下の各実施形態相互において、互いに同一もしくは均等である部分には、説明の簡略化を図るべく、図中、同一符号を付してある。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are given the same reference numerals in the drawings in order to simplify the description.

（第１実施形態）
図１は、本発明の第１実施形態に係るＩＣチップ１０の概略断面構成を示す図である。また、図２において（ａ）は、基板２０に搭載する前のＩＣチップ１０におけるポスト１１部分の拡大断面図、（ｂ）は、基板２０に搭載した後のＩＣチップ１０におけるポスト１１部分の拡大断面図である。 (First embodiment)
FIG. 1 is a diagram showing a schematic cross-sectional configuration of an IC chip 10 according to the first embodiment of the present invention. 2A is an enlarged sectional view of the post 11 portion of the IC chip 10 before being mounted on the substrate 20, and FIG. 2B is an enlarged view of the post 11 portion of the IC chip 10 after being mounted on the substrate 20. It is sectional drawing.

本実施形態の電子装置は、大きくは、ＩＣチップ１０と、基板２０とを備え、これらＩＣチップ１０の一面と基板２０の一面とを対向して配置し、当該両一面の間を、はんだ３０を介して、はんだ接合してなるものである。   The electronic device of the present embodiment is roughly provided with an IC chip 10 and a substrate 20, one surface of the IC chip 10 and one surface of the substrate 20 are arranged facing each other, and a solder 30 is provided between the two surfaces. It is formed through soldering.

ＩＣチップ１０は、一般的な半導体プロセスにより形成されるシリコン半導体などよりなる半導体チップであり、具体的には、トランジスタ素子、マイコン、周辺ＩＣなどが挙げられる。   The IC chip 10 is a semiconductor chip made of a silicon semiconductor formed by a general semiconductor process, and specifically includes a transistor element, a microcomputer, a peripheral IC, and the like.

ＩＣチップ１０の一面には、複数の導電性を有するポスト１１が設けられている。このポスト１１は、ＩＣチップ１０の一面のうちはんだ接合される部位にて、当該一面より突出したものである。このポスト１１は、具体的には柱状であればよく、円柱状でも角柱状でもよい。   A plurality of conductive posts 11 are provided on one surface of the IC chip 10. This post 11 protrudes from the one surface of the IC chip 10 at a portion to be soldered. Specifically, the post 11 may be a columnar shape, and may be a columnar shape or a prismatic shape.

そして、ポスト１１の先端面には、鋭利形状をなす鋭利部１２が設けられている。ここでは、鋭利部１２は、当該先端面の中央部が最も突出する頂部となっており、この頂部から当該先端面の周辺部に向かって突出方向にて低くなった形状とされている。具体的には、本実施形態のポスト１１の先端面は円錐もしくは角錐形状とされている。   A sharp portion 12 having a sharp shape is provided on the tip surface of the post 11. Here, the sharp portion 12 is a top portion at which the central portion of the tip surface protrudes most, and has a shape that is lowered in the protruding direction from the top portion toward the peripheral portion of the tip surface. Specifically, the tip surface of the post 11 of the present embodiment has a conical or pyramidal shape.

ＩＣチップ１０の一面には、ＩＣチップ１０の電極としてのアルミニウムや銅などよりなるパッド１３が設けられている。また、ＩＣチップ１０の一面には、当該一面を被覆して保護する窒化膜などよりなる保護膜１４が設けられている。そして、保護膜１４に設けられた開口部からパッド１３が露出している。   On one surface of the IC chip 10, a pad 13 made of aluminum, copper, or the like is provided as an electrode of the IC chip 10. A protective film 14 made of a nitride film or the like that covers and protects the one surface is provided on one surface of the IC chip 10. The pad 13 is exposed from the opening provided in the protective film 14.

そして、ポスト１１は、このパッド１３に設けられている。ここでは、ポスト１１とパッド１３との間には、スパッタや蒸着されたクロム、銅、チタンなどよりなるアンダーバンプメタル１５が介在している。このアンダーバンプメタル１５は、はんだ３０中のＳｎ成分が、たとえばアルミよりなるパッド１３を侵食するのを防止する機能を有するが、場合によっては、省略してもよい。   The post 11 is provided on the pad 13. Here, an under bump metal 15 made of sputtered or vapor-deposited chromium, copper, titanium, or the like is interposed between the post 11 and the pad 13. The under bump metal 15 has a function of preventing the Sn component in the solder 30 from eroding the pad 13 made of, for example, aluminum, but may be omitted depending on circumstances.

そして、ポスト１１は、当該ポストの本体をなす本体部１１ａと、その本体部１１ａの表面に設けられた金メッキ１１ｂとにより構成されている。本体部１１ａは、銅などのメッキを当該ポストの突出方向に積層させることで形成されるもので、メッキとしては、電気メッキにより形成される。   The post 11 includes a main body portion 11a that forms the main body of the post, and a gold plating 11b provided on the surface of the main body portion 11a. The main body 11a is formed by laminating plating such as copper in the protruding direction of the post, and the plating is formed by electroplating.

また、金メッキ１１ｂは、無電解メッキなどにより形成されるが、通常は、本体部１１ａ上に図示しないニッケルメッキを施し、その上に形成されるものである。もちろん、当該ニッケルメッキは、場合によっては省略してもよい。   In addition, the gold plating 11b is formed by electroless plating or the like, but usually, nickel plating (not shown) is applied to the main body portion 11a and is formed thereon. Of course, the nickel plating may be omitted in some cases.

なお、金メッキ１１ｂを省略して、ポスト１１を本体部１１ａのみより構成してもよいが、金メッキ１１ｂを設け、ポスト１１の最表面を金メッキ１１ｂにて構成すれば、はんだ濡れ性が向上するという利点がある。   The post 11 may be configured by only the main body 11a without the gold plating 11b. However, if the gold plating 11b is provided and the outermost surface of the post 11 is configured by the gold plating 11b, the solder wettability is improved. There are advantages.

また、図２に示される基板２０は、プリント基板やセラミック基板などの一般的な配線基板、回路基板である。この基板２０の一面には、銅などよりなる配線２１が設けられており、この配線２１とＩＣチップ１０側のポスト１１とが、はんだ３０を介して接触し、はんだ接合されて、機械的・電気的に接続されている。   A substrate 20 shown in FIG. 2 is a general wiring substrate such as a printed circuit board or a ceramic substrate, or a circuit substrate. A wiring 21 made of copper or the like is provided on one surface of the substrate 20, and the wiring 21 and the post 11 on the IC chip 10 side are brought into contact with each other via a solder 30, and are soldered. Electrically connected.

このはんだ３０は、鉛フリーはんだや共晶はんだなどの一般的なものであり、印刷、インクジェットなどにより配置され、リフロー・固化により接合をするものである。ここでは、図２に示されるように、ポスト１１の先端面に設けられた鋭利部１２が、はんだ３０の内部に食い込んだ形となっており、この状態ではんだ接合されている。   The solder 30 is a general one such as a lead-free solder or a eutectic solder, and is disposed by printing, inkjet, or the like, and joined by reflow / solidification. Here, as shown in FIG. 2, the sharp portion 12 provided on the front end surface of the post 11 has a shape that bites into the solder 30, and is soldered in this state.

こうして、本実施形態では、図２（ｂ）に示されるように、ＩＣチップ１０の一面と基板２０の一面との間を、はんだ３０によってはんだ接合してなる電子装置が構成されている。   Thus, in the present embodiment, as shown in FIG. 2B, an electronic device is configured in which one surface of the IC chip 10 and one surface of the substrate 20 are soldered together with the solder 30.

次に、図３、図４を参照して、本実施形態の電子装置の製造方法について述べる。図３（ａ）〜（ｃ）は本製造方法におけるポスト形成工程を示す工程図、図４（ａ）〜（ｃ）は図３に続くポスト形成工程を示す工程図であり、これら図３、図４ともに工程途中におけるワークの断面構成を示している。   Next, with reference to FIG. 3 and FIG. 4, a method for manufacturing the electronic device of this embodiment will be described. 3 (a) to 3 (c) are process diagrams showing a post forming process in the present manufacturing method, and FIGS. 4 (a) to 4 (c) are process diagrams showing a post forming process following FIG. FIG. 4 shows a cross-sectional configuration of the workpiece during the process.

図３（ａ）に示されるように、まず、通常の半導体プロセスにより、一面にパッド１３、保護膜１４、アンダーバンプメタル１５が設けられたＩＣチップ１０を形成する。ここでは、アンダーバンプメタル１５は、保護膜１４および保護膜１４の開口部から露出するパッド１３の上に形成される。   As shown in FIG. 3A, first, the IC chip 10 provided with the pad 13, the protective film 14, and the under bump metal 15 on one surface is formed by a normal semiconductor process. Here, the under bump metal 15 is formed on the protective film 14 and the pad 13 exposed from the opening of the protective film 14.

その後、図３（ｂ）に示されるように、フォトリソグラフ法などにより、レジストＲをＩＣチップ１０の一面の全面に塗布し、フォトエッチングを行い、パッド１３上にてレジストＲを除去し、パッド１３上のアンダーバンプメタル１５を露出させる。   Thereafter, as shown in FIG. 3B, a resist R is applied to the entire surface of one surface of the IC chip 10 by photolithography, etc., and photoetching is performed to remove the resist R on the pad 13, and the pad Under bump metal 15 on 13 is exposed.

次に、図３（ｃ）に示されるように、レジストＲから露出するパッド１３上に、メッキによりポスト１１の本体部１１ａを形成する。その後は、一般的なエッチングなどの方法によりレジストＲの除去、および、本体部１１ａ以外の部分のアンダーバンプメタル１５の除去を行う。これにより、図３（ｄ）に示されるワークができあがる。   Next, as shown in FIG. 3C, the body 11a of the post 11 is formed on the pad 13 exposed from the resist R by plating. After that, the resist R is removed by a general method such as etching, and the under bump metal 15 other than the main body 11a is removed. As a result, the work shown in FIG. 3D is completed.

次に、図４（ａ）に示されるように、本体部１１ａの先端面を、たとえばエッチング液Ｋに浸してエッチングすることにより、上記鋭利部１２を形成する。このエッチングとしては、一般的なリードフレームのエッチングに用いられるウェットエッチングや、ドライエッチングなどが適用される。   Next, as shown in FIG. 4A, the sharp portion 12 is formed by immersing and etching the front end surface of the main body portion 11a in, for example, an etching solution K. As this etching, wet etching, dry etching, or the like used for general lead frame etching is applied.

その後、図４（ｂ）に示されるように、鋭利部１２が形成された本体部１１ａの表面に、無電解メッキにより上記金メッキ１１ｂを形成する。これにより、ＩＣチップ１０の一面のうちはんだ接合される部位に上記ポスト１１が形成され、当該ポスト１１を備える本実施形態のＩＣチップ１０ができあがる。   Thereafter, as shown in FIG. 4B, the gold plating 11b is formed by electroless plating on the surface of the main body 11a on which the sharp portion 12 is formed. As a result, the post 11 is formed on a portion of one surface of the IC chip 10 to be soldered, and the IC chip 10 according to this embodiment including the post 11 is completed.

続いて、図４（ｃ）に示されるように、このＩＣチップ１０を基板２０に搭載するが、その前に、基板２０の一面のうちはんだ接合される部位である配線２１上に、はんだ３０を配置しておく（はんだ配置工程）。このはんだ３０の配置は、印刷、メッキ、インクジェットなどの方法により行われる。   Subsequently, as shown in FIG. 4C, the IC chip 10 is mounted on the substrate 20. Before that, the solder 30 is placed on the wiring 21 which is a part to be soldered on one surface of the substrate 20. Is placed (solder placement step). The placement of the solder 30 is performed by a method such as printing, plating, or inkjet.

次に、はんだ接合工程を行う。ＩＣチップ１０におけるポスト１１が形成された一面と、基板２０における上記配線２１が形成された一面とを、対向させるとともに、ポスト１１と配線２１とが、はんだ３０を介して対向するように位置あわせする。   Next, a solder joining process is performed. The one surface of the IC chip 10 on which the post 11 is formed and the one surface of the substrate 20 on which the wiring 21 is formed are opposed to each other, and the post 11 and the wiring 21 are aligned so as to oppose each other via the solder 30. To do.

そして、図４（ｃ）に示されるように、ＩＣチップ１０を基板２０に向かって押し付けていき、ポスト１１の鋭利部１２を、はんだ３０の内部に食い込ませる。ここで、はんだ３０の表面には、はんだ成分が酸化してなる酸化膜３１が形成されているので、鋭利部１２ではんだ３０の表面に位置する酸化膜３１が突き破られる。   Then, as shown in FIG. 4C, the IC chip 10 is pressed toward the substrate 20, and the sharp portion 12 of the post 11 is digged into the solder 30. Here, since the oxide film 31 formed by oxidizing the solder component is formed on the surface of the solder 30, the oxide film 31 positioned on the surface of the solder 30 is pierced by the sharp portion 12.

そして、鋭利部１２は、酸化膜３１だけではなく、酸化膜３１の内部に位置するはんだ成分まで到達し、当該はんだ成分に接触する。この接触状態を維持したまま、オーブンなどで加熱して、はんだ３０をリフローさせる。その後、溶融したはんだ３０を固化させれば、はんだ接合が完了し、上記した本実施形態の電子装置ができあがる。   The sharp portion 12 reaches not only the oxide film 31 but also a solder component located inside the oxide film 31 and contacts the solder component. While maintaining this contact state, the solder 30 is reflowed by heating in an oven or the like. Thereafter, if the molten solder 30 is solidified, the solder joint is completed, and the electronic device of the present embodiment described above is completed.

ところで、本実施形態によれば、はんだ３０の表面に存在する酸化膜３１を、鋭利部１２で突き破ることによって、内部の酸化されていないはんだ成分とポスト１１とが接し、この状態ではんだ付けがなされる。   By the way, according to the present embodiment, the oxide film 31 present on the surface of the solder 30 is pierced by the sharp portion 12, so that the solder component that is not oxidized inside contacts the post 11, and soldering is performed in this state. Made.

ここで、鋭利部１２は、本実施形態のように尖った角を持つ形状であって、ＩＣチップ１０を基板２０に押し付けたときに、その角が、ポスト１１の中でも最初にはんだ３０に接触する形状となっているものが好ましい。より好ましくは、当該角は鋭角であることが望ましい。   Here, the sharp portion 12 has a sharp corner as in the present embodiment, and when the IC chip 10 is pressed against the substrate 20, the corner first contacts the solder 30 in the post 11. What has become the shape to do is preferable. More preferably, the angle is an acute angle.

そして、本実施形態によれば、はんだを上記従来のような特別な形状としたり、はんだにフラックス成分を混入させたりすることなく、はんだ３０の表面に酸化膜３１が存在してもフラックスを用いずに、適切にはんだ接合を行うことができる。   According to the present embodiment, the flux is used even if the oxide film 31 is present on the surface of the solder 30 without making the solder into a special shape as described above or mixing the flux component into the solder. And soldering can be performed appropriately.

また、従来では、フラックスを使用したがゆえに、その残渣を洗浄する工程が必要であったが、本実施形態では、フラックスを全く使用せずに良好な接続が得られるので、フラックス洗浄の工程が不要となる。   Further, conventionally, since the flux was used, a process for cleaning the residue was required, but in this embodiment, a good connection can be obtained without using the flux at all. It becomes unnecessary.

（第２実施形態）
図５（ａ）、（ｂ）は、本発明の第２実施形態に係る電子装置の製造方法の要部を示す工程図である。この図５では、本製造方法におけるポスト形成工程の要部を示しており、工程途中におけるワークの断面構成を示している。 (Second Embodiment)
FIGS. 5A and 5B are process diagrams showing the main part of the method for manufacturing an electronic device according to the second embodiment of the present invention. FIG. 5 shows a main part of the post forming step in the manufacturing method, and shows a cross-sectional configuration of the workpiece in the middle of the step.

なお、図５（ｂ）に示されるポスト１１は、実際には、本体部１１ａの表面に上記同様の金メッキ１１ｂが施され、この金メッキ１１ｂがポスト１１の最表面を構成するものであるが、図５（ｂ）では、金メッキ１１ｂは省略してある。   The post 11 shown in FIG. 5 (b) is actually the same gold plating 11b as described above on the surface of the main body 11a, and this gold plating 11b constitutes the outermost surface of the post 11. In FIG. 5B, the gold plating 11b is omitted.

上記第１実施形態では、ポスト形成工程にて、ポスト１１の先端面をエッチングすることにより、鋭利部１２を形成したが、本実施形態では、ポスト形成工程にて、ポスト１１の先端面に粗化メッキを施すか、もしくは当該先端面をエッチングすることにより、当該先端面に鋭利部１２を形成するところが相違する。この相違点を中心に述べる。   In the first embodiment, the sharp portion 12 is formed by etching the front end surface of the post 11 in the post forming step. However, in this embodiment, the front end surface of the post 11 is roughened in the post forming step. A difference is that the sharpened portion 12 is formed on the tip surface by applying galvanizing or etching the tip surface. This difference will be mainly described.

図５（ａ）に示されるように、上記同様の手順によって、一面にパッド１３、保護膜１４、アンダーバンプメタル１５が設けられたＩＣチップ１０を形成し、パッド１３上に、ポスト１１の本体部１１ａを形成し、レジストＲおよびアンダーバンプメタル１５の除去を行う。   As shown in FIG. 5 (a), the IC chip 10 provided with the pad 13, the protective film 14, and the under bump metal 15 is formed on one surface by the same procedure as described above, and the body of the post 11 is formed on the pad 13. The part 11a is formed, and the resist R and the under bump metal 15 are removed.

次に、本実施形態では、この本体部１１ａの表面に、一般的なＮｉ粗化メッキを施して当該本体部１１ａの表面に粗化されたＮｉメッキ層（図示せず）を形成し、その上に、さらに上記同様の無電解メッキなどにより金メッキ１１ｂ（図示せず）を形成する。   Next, in the present embodiment, a general Ni roughening plating is performed on the surface of the main body portion 11a to form a roughened Ni plating layer (not shown) on the surface of the main body portion 11a. Further, a gold plating 11b (not shown) is further formed by electroless plating similar to the above.

この工程において、Ｎｉ粗化メッキにより、図５（ｂ）に示されるように、ポスト１１の先端面を含む表面は、複数の針状突起を有する粗化された面となり、そのうちの先端面における複数の針状突起により鋭利部１２が構成される。以上が本実施形態のポスト形成工程である。   In this step, as shown in FIG. 5 (b), the surface including the tip surface of the post 11 becomes a roughened surface having a plurality of needle-like protrusions, and the tip surface of the post 11 is roughened by Ni roughening plating. The sharp portion 12 is constituted by a plurality of needle-like protrusions. The above is the post forming process of this embodiment.

また、このような粗化された面の形成は、上記Ｎｉ粗化メッキ以外の方法でもよい。具体的には、図５（ａ）の状態から、ポスト１１の本体部１１ａの先端面に対して、黒化処理やマルチボンドなどのエッチング処理を施せば、当該先端面を、鋭利部１２としての複数の針状突起を有する粗化された面とすることができる。その後は、上記第１実施形態と同様に、ニッケルメッキ、金メッキを施せば、図５（ｂ）に示される本実施形態のポスト１１ができあがる。   Further, the roughened surface may be formed by a method other than the Ni rough plating. Specifically, from the state of FIG. 5A, if the tip surface of the main body portion 11a of the post 11 is subjected to an etching process such as blackening or multi-bonding, the tip surface becomes the sharp portion 12. A roughened surface having a plurality of needle-like protrusions. Thereafter, in the same manner as in the first embodiment, if the nickel plating and the gold plating are performed, the post 11 of this embodiment shown in FIG. 5B is completed.

なお、このドライエッチングによって針状突起としての鋭利部１２を形成する場合、ポスト１１のはんだ濡れ性が確保されるならば、ニッケルメッキおよび金メッキを行わずに、先端面が鋭利部１２として粗化された面となっている本体部１１ａ自身をポスト１１としてもよい。   When the sharp portion 12 as the needle-like protrusion is formed by this dry etching, if the solder wettability of the post 11 is ensured, the tip surface is roughened as the sharp portion 12 without performing nickel plating and gold plating. The main body 11a itself that is the surface that is formed may be the post 11.

こうして、本実施形態においても、鋭利部１２が形成されたポスト１１を備えるＩＣチップ１０ができあがる。その後は、上記実施形態と同様に、はんだ配置工程、はんだ接合工程を行い、本実施形態の電子装置が完成する。   Thus, also in this embodiment, the IC chip 10 including the post 11 in which the sharp portion 12 is formed is completed. Thereafter, similarly to the above-described embodiment, a solder placement process and a solder bonding process are performed, and the electronic device of this embodiment is completed.

本実施形態によっても、上記実施形態と同様に、はんだ３０の表面に存在する酸化膜３１を、鋭利部１２で突き破った状態ではんだ付けがなされるため、はんだを上記従来のような特別な形状としたり、はんだにフラックス成分を混入させたりすることなく、はんだ３０の表面に酸化膜３１が存在してもフラックスを用いずに、適切にはんだ接合を行うことができる。   Also in this embodiment, similar to the above embodiment, the soldering is performed in a state where the oxide film 31 existing on the surface of the solder 30 is pierced by the sharp portion 12, so that the solder has a special shape as described above. Even if the oxide film 31 exists on the surface of the solder 30 without using a flux, soldering can be performed appropriately without using flux.

また、本実施形態によれば、微細な針状形状がはんだ３０の酸化膜３１を突き破り易くなるのと同時に、はんだ３０の濡れ性が、毛細管現象により向上し、より接続信頼性を向上させた構造を得ることができる。   Further, according to the present embodiment, the fine needle-like shape easily breaks through the oxide film 31 of the solder 30, and at the same time, the wettability of the solder 30 is improved by the capillary phenomenon, and the connection reliability is further improved. A structure can be obtained.

（第３実施形態）
図６（ａ）〜（ｄ）は、本発明の第３実施形態に係る電子装置の製造方法の要部を示す工程図である。この図６では、本製造方法におけるポスト形成工程の要部を示しており、工程途中におけるワークの断面構成を示している。また、ここでも、図６（ｄ）に示されるポスト１１の最終形態は、本体部１１ａの表面に上記同様の金メッキ１１ｂが施されたものであるが、図６（ｄ）では、当該金メッキは省略してある。 (Third embodiment)
6A to 6D are process diagrams showing the main part of the method for manufacturing an electronic device according to the third embodiment of the present invention. FIG. 6 shows the main part of the post forming step in the manufacturing method, and shows the cross-sectional configuration of the workpiece in the middle of the step. Also in this case, the final form of the post 11 shown in FIG. 6 (d) is that the same gold plating 11b is applied to the surface of the main body 11a. In FIG. 6 (d), the gold plating is It is omitted.

本実施形態では、ポスト形成工程にて、ＩＣチップ１０の一面のうちポスト１１が形成される部位に凹凸１７を設け、その上にメッキを行い、突出方向に沿った断面が下地の凹凸１７を継承しているポスト１１を形成することにより、ポスト１１の先端面に鋭利部１２を形成するところが、上記第１実施形態と相違するところであり、この相違点を中心に述べる。   In the present embodiment, in the post forming step, unevenness 17 is provided on a portion of one surface of the IC chip 10 where the post 11 is formed, plating is performed thereon, and the cross section along the protruding direction has the underlying unevenness 17. The formation of the inherited post 11 to form the sharp portion 12 on the front end surface of the post 11 is different from the first embodiment, and this difference will be mainly described.

図６（ａ）に示されるように、上記同様の手順によって、一面にパッド１３、保護膜１４が設けられたＩＣチップ１０を形成する。次に、図６（ｂ）に示されるように、ポスト１１が形成される部位であるパッド１３に対して、図示しない針などの治具で押したりすることで、凹み１７を形成する。結果、この凹み１７により当該パッド１３には凹凸が構成される。   As shown in FIG. 6A, the IC chip 10 provided with the pad 13 and the protective film 14 on one surface is formed by the same procedure as described above. Next, as shown in FIG. 6B, the depressions 17 are formed by pressing the pad 13, which is a part where the post 11 is formed, with a jig such as a needle (not shown). As a result, the recesses 17 form irregularities on the pad 13.

その後、この凹み１７を含むパッド１３上に、上記同様に、アンダーバンプメタル１５を形成する。その上に、上記同様、メッキによってポスト１１の本体部１１ａを形成し、レジストＲおよびアンダーバンプメタル１５の除去を行う。   Thereafter, an under bump metal 15 is formed on the pad 13 including the recess 17 in the same manner as described above. On top of this, the main body 11a of the post 11 is formed by plating in the same manner as described above, and the resist R and the under bump metal 15 are removed.

これにより、図６（ｃ）に示されるように、できあがった本体部１１ａは、その先端面が凹み１７による凹凸を継承した形状の凹凸面となり、当該凹凸面の凸部が鋭利部１２として構成されたものとなる。その後は、上記第１実施形態と同様に、必要に応じて、ニッケルメッキ、金メッキを行えば、本実施形態においても、鋭利部１２が形成されたポスト１１を備えるＩＣチップ１０ができあがる。   As a result, as shown in FIG. 6C, the completed main body 11 a has a concavo-convex surface whose shape is inherited from the concavo-convex shape of the dent 17, and the convex portion of the concavo-convex surface is configured as a sharp portion 12. Will be. Thereafter, in the same manner as in the first embodiment, if nickel plating or gold plating is performed as necessary, the IC chip 10 including the post 11 in which the sharp portion 12 is formed is completed also in this embodiment.

ここでは、上記第１実施形態とは反対に、ポスト１１の先端面は、中央部が最もくぼんだ形状、具体的には円錐状の凹みが形成された形状となる。そして、当該先端面において中央部よりも突出する周辺部が鋭利部１２として構成されている。以上が本実施形態のポスト形成工程である。   Here, contrary to the first embodiment, the front end surface of the post 11 has a shape in which the central portion is most recessed, specifically a shape in which a conical recess is formed. And the peripheral part which protrudes rather than the center part in the said front end surface is comprised as the sharp part 12. FIG. The above is the post forming process of this embodiment.

その後は、上記実施形態と同様に、はんだ配置工程、はんだ接合工程を行う。ここで、図６（ｄ）は、本実施形態のはんだ接合工程において、鋭利部１２がはんだ３０の酸化膜３１を突き破っている状態を示している。そして、はんだ接合の完了に伴い、本実施形態の電子装置が完成する。   Thereafter, similarly to the above embodiment, a solder placement process and a solder joining process are performed. Here, FIG. 6D shows a state in which the sharp portion 12 breaks through the oxide film 31 of the solder 30 in the solder joining process of the present embodiment. And the electronic device of this embodiment is completed with completion of solder joining.

本実施形態によっても、上記実施形態と同様に、はんだ３０の表面に存在する酸化膜３１を、鋭利部１２で突き破った状態ではんだ付けがなされるため、はんだを上記従来のような特別な形状としたり、はんだにフラックス成分を混入させたりすることなく、はんだ３０の表面に酸化膜３１が存在してもフラックスを用いずに、適切にはんだ接合を行うことができる。   Also in this embodiment, similar to the above embodiment, the soldering is performed in a state where the oxide film 31 existing on the surface of the solder 30 is pierced by the sharp portion 12, so that the solder has a special shape as described above. Even if the oxide film 31 exists on the surface of the solder 30 without using a flux, soldering can be performed appropriately without using flux.

また、本実施形態では、図７に示されるように、本体部１１ａの先端面としての凹凸面における鋭利部１２としての凸部をエッチングして、さらに鋭利な形状に加工してもよい。この他の例について具体的な方法を図７（ａ）、（ｂ）に示す。   Further, in the present embodiment, as shown in FIG. 7, the convex portion as the sharp portion 12 on the concave-convex surface as the tip surface of the main body portion 11a may be etched to be processed into a sharper shape. A specific method for this other example is shown in FIGS.

図７（ａ）に示されるように、上記図６（ｃ）に示されるワークを用意する。そして、図７（ｂ）に示されるように、このワークにおける本体部１１ａの先端面を、上記第１実施形態にて鋭利部１２を形成するためのものと同様のエッチング液Ｋに浸漬させて、エッチングを行う。   As shown in FIG. 7A, the workpiece shown in FIG. 6C is prepared. And as FIG.7 (b) shows, the front end surface of the main-body part 11a in this workpiece | work is immersed in the etching liquid K similar to the thing for forming the sharp part 12 in the said 1st Embodiment. Etching is performed.

これにより、図７（ｃ）に示されるように、本体部１１ａにおける鋭利部１２としての凸部が、より鋭角になり、さらに鋭利な形状になるので、はんだ３０の酸化膜３１の突き破りが一層容易になるという利点がある。なお、この図７（ｃ）から、さらに必要に応じて、上記同様のニッケルメッキ、金メッキを行ってもよいことはもちろんである。   Thereby, as shown in FIG. 7C, the convex portion as the sharp portion 12 in the main body portion 11a has a sharper angle and a sharper shape, so that the oxide film 31 of the solder 30 is further broken through. There is an advantage that it becomes easy. Of course, from FIG. 7C, the same nickel plating and gold plating as described above may be performed as necessary.

また、本実施形態において、ＩＣチップ１０の一面のうちポスト１１が形成される部位であるパッド１３に対して、上記凹み１７を形成する場合には、チップ検査時の検査針を用いてもよい。   Further, in the present embodiment, when the dent 17 is formed on the pad 13 which is a portion where the post 11 is formed on one surface of the IC chip 10, an inspection needle at the time of chip inspection may be used. .

（第４実施形態）
図８（ａ）〜（ｅ）は、本発明の第４実施形態に係る電子装置の製造方法の要部を示す工程図である。この図８では、本製造方法におけるポスト形成工程の要部を示しており、（ａ）、（ｂ）は工程途中におけるワークの平面構成を示し、（ｃ）〜（ｅ）はワークの断面構成を示している。 (Fourth embodiment)
8A to 8E are process diagrams showing the main part of the method for manufacturing an electronic device according to the fourth embodiment of the present invention. In FIG. 8, the main part of the post formation process in the present manufacturing method is shown, (a) and (b) show the planar configuration of the workpiece in the middle of the process, and (c) to (e) show the sectional configuration of the workpiece. Is shown.

本実施形態も、上記第３実施形態と同様に、ポスト形成工程にて、ＩＣチップ１０の一面のうちポスト１１が形成される部位に凹凸を設け、その上にメッキを行い、突出方向に沿った断面が下地の凹凸を継承しているポスト１１を形成することにより、ポスト１１の先端面に鋭利部１２を形成するものである。   Similarly to the third embodiment, in the present embodiment, in the post forming step, unevenness is provided on a portion of the one surface of the IC chip 10 where the post 11 is formed, and plating is performed thereon, along the protruding direction. The sharp section 12 is formed on the tip surface of the post 11 by forming the post 11 whose cross section inherits the unevenness of the base.

ここで、上記第３実施形態との相違点を述べると、上記第３実施形態では、ポスト１１が形成される部位であるパッド１３に、治具を押し込むことで凹ませて凹凸を形成したが、本実施形態では、図８に示されるように、パッド１３を２層１３ａ、１３ｂ構成とすることで、当該パッド１３に凹凸を形成するものである。   Here, the difference from the third embodiment will be described. In the third embodiment, a recess is formed by pressing a jig into the pad 13 which is a part where the post 11 is formed. In this embodiment, as shown in FIG. 8, the pad 13 has a two-layered structure 13a, 13b, thereby forming irregularities on the pad 13.

具体的には、図８（ａ）、（ｂ）、（ｃ）に示されるように、１層目のパッド１３ａは平坦な層であり、その上の２層目のパッド１３ｂは、部分的に設けることで、２層目のパッド１３ｂが設けられた部位を凸、設けられていない部位を凹として凹凸を形成している。   Specifically, as shown in FIGS. 8A, 8B, and 8C, the first layer pad 13a is a flat layer, and the second layer pad 13b is partially As a result, the portion where the second layer pad 13b is provided is convex, and the portion where the pad 13b is not provided is concave.

ここでは、２層目のパッド１３ｂはストライプ状に形成されている。つまり、ここでは、パッド１３の凹凸は、ストライプ状の凸の間が凹となっている凹凸形状として構成されている。このような２層のパッド１３は、半導体プロセスによるエッチングなどにより容易に形成される。   Here, the second layer pad 13b is formed in a stripe shape. That is, here, the unevenness of the pad 13 is configured as an uneven shape in which the space between the stripe-shaped protrusions is concave. Such a two-layer pad 13 is easily formed by etching using a semiconductor process.

このパッド１３を形成した後、本実施形態においても、上記同様に保護膜１４、アンダーバンプメタル１５を形成する。こうして、図８（ｃ）に示されるように、凹凸を有するパッド１３、保護膜１４およびアンダーバンプメタル１５が一面に設けられたＩＣチップ１０ができあがる。   After this pad 13 is formed, also in the present embodiment, the protective film 14 and the under bump metal 15 are formed in the same manner as described above. In this way, as shown in FIG. 8C, the IC chip 10 having the uneven pad 13, the protective film 14, and the under bump metal 15 provided on one surface is completed.

次に、図８（ｄ）に示されるように、凹凸を有するパッド１３の上に、上記同様にして、メッキによってポスト１１の本体部１１ａを形成し、さらに、上記レジストおよびアンダーバンプメタル１５の除去を行う。   Next, as shown in FIG. 8D, the main body portion 11a of the post 11 is formed by plating on the uneven pad 13 in the same manner as described above, and further, the resist and the under bump metal 15 are formed. Remove.

これにより、図８（ｄ）に示されるように、できあがった本体部１１ａは、その先端面がパッド１３の凹凸を継承した形状の凹凸面となり、当該凹凸面の凸部が鋭利部１２として構成されたものとなる。その後は、上記第１実施形態と同様に、ニッケルメッキ、金メッキを行えば、本実施形態においても、鋭利部１２が形成されたポスト１１を備えるＩＣチップ１０ができあがる。   As a result, as shown in FIG. 8 (d), the finished main body portion 11 a has a concavo-convex surface whose shape is inherited from the concavo-convex shape of the pad 13 and the convex portion of the concavo-convex surface is configured as a sharp portion 12. Will be. Thereafter, in the same manner as in the first embodiment, if nickel plating or gold plating is performed, the IC chip 10 including the post 11 in which the sharp portion 12 is formed is completed also in this embodiment.

なお、本実施形態のポスト形成工程においても、さらに図８（ｄ）に示される状態のワークに対して、上記各実施形態に示した鋭利部１２を形成するためのエッチング処理を施してもよい。それによって、図８（ｅ）に示されるように、上記凹凸面の凸部としての営利部１２が、より鋭利な形状となる。この場合も、エッチング後には、必要に応じて、ニッケルメッキ、金メッキを行ってよいことはもちろんである。   In the post forming step of the present embodiment, the workpiece in the state shown in FIG. 8D may be further subjected to an etching process for forming the sharp portion 12 shown in each of the above embodiments. . As a result, as shown in FIG. 8E, the for-profit portion 12 as the convex portion of the uneven surface has a sharper shape. Also in this case, of course, after etching, nickel plating or gold plating may be performed as necessary.

その後は、本実施形態においても、上記実施形態と同様に、はんだ配置工程、はんだ接合工程を行い、本実施形態の電子装置が完成する。そして、本実施形態においても、上記実施形態と同様に、適切にはんだ接合を行うことができる。   Thereafter, also in the present embodiment, similarly to the above-described embodiment, the solder placement process and the solder bonding process are performed, and the electronic device of the present embodiment is completed. And also in this embodiment, similarly to the said embodiment, a solder joint can be performed appropriately.

（第５実施形態）
図９（ａ）〜（ｅ）は、本発明の第５実施形態に係る電子装置の製造方法の要部を示す工程図である。この図９では、本製造方法におけるポスト形成工程の要部を示しており、工程途中におけるワークの断面構成を示している。 (Fifth embodiment)
FIGS. 9A to 9E are process diagrams showing the main part of the method for manufacturing an electronic device according to the fifth embodiment of the invention. FIG. 9 shows the main part of the post formation step in the manufacturing method, and shows the cross-sectional configuration of the workpiece in the middle of the step.

本実施形態も、上記第３実施形態と同様に、ポスト形成工程にて、ＩＣチップ１０の一面のうちポスト１１が形成される部位に凹凸を設け、その上にメッキを行い、突出方向に沿った断面が下地の凹凸を継承しているポスト１１を形成することにより、ポスト１１の先端面に鋭利部１２を形成するものである。   Similarly to the third embodiment, in the present embodiment, in the post forming step, unevenness is provided on a portion of the one surface of the IC chip 10 where the post 11 is formed, and plating is performed thereon, along the protruding direction. The sharp section 12 is formed on the tip surface of the post 11 by forming the post 11 whose cross section inherits the unevenness of the base.

ここで、本実施形態も、ＩＣチップ１０の一面のうちポスト１１が形成される部位に凹凸を設ける方法が、上記第３実施形態とは相違するものであり、ここでは、その相違点を中心に述べる。   Here, this embodiment is also different from the third embodiment in the method of providing irregularities in a portion of the one surface of the IC chip 10 where the post 11 is formed. Here, the difference is mainly described. In the following.

本実施形態では、図９（ａ）に示されるように、ポスト１１を形成する部位をパッド１３上だけでなく、その周囲の保護膜１４を含むものとしており、ポスト１１が形成される部分の保護膜１４を、部分的に厚くする。この保護膜１４の厚さの違いにより、ポスト１１が形成される部位に凹凸が形成される。   In the present embodiment, as shown in FIG. 9A, the part where the post 11 is formed includes not only the pad 13 but also the protective film 14 around it. The protective film 14 is partially thickened. Due to the difference in thickness of the protective film 14, irregularities are formed in the portion where the post 11 is formed.

こうして、保護膜１４によって凹凸を形成した後は、上記同様に、アンダーバンプメタル１５の形成、ポスト１１の本体部１１ａの形成（図９（ｂ）参照）、レジストＲおよびアンダーバンプメタル１５の除去（図９（ｃ）参照）を行う。   After the irregularities are thus formed by the protective film 14, the formation of the under bump metal 15, the formation of the body 11 a of the post 11 (see FIG. 9B), the removal of the resist R and the under bump metal 15, as described above. (See FIG. 9C).

これにより、図９（ｃ）に示されるように、できあがった本体部１１ａは、その先端面が、下地の凹凸を継承した形状の凹凸面となる。   As a result, as shown in FIG. 9C, the finished main body portion 11a has a concavo-convex surface having a shape inheriting the concavo-convex surface of the base.

続いて、本実施形態では、図９（ｄ）、（ｅ）に示されるように、当該凹凸面の凸部をエッチングにより鋭利に加工し、鋭利部１２を形成する。その後は、上記同様に、必要に応じて、ニッケルメッキ、金メッキを行えば、本実施形態においても、鋭利部１２が形成されたポスト１１を備えるＩＣチップ１０ができあがる。   Subsequently, in the present embodiment, as shown in FIGS. 9D and 9E, the projecting portion of the uneven surface is sharply processed by etching to form the sharp portion 12. Thereafter, similarly to the above, if nickel plating or gold plating is performed as necessary, also in this embodiment, the IC chip 10 including the post 11 in which the sharp portion 12 is formed is completed.

その後、上記実施形態と同様に、はんだ配置工程、はんだ接合工程を行い、本実施形態の電子装置が完成する。そして、本実施形態においても、上記実施形態と同様に、適切にはんだ接合を行うことができる。   Thereafter, similarly to the above embodiment, a solder placement process and a solder joining process are performed, and the electronic device of this embodiment is completed. And also in this embodiment, similarly to the said embodiment, a solder joint can be performed appropriately.

なお、上記例では、ポスト１１が形成される部分の保護膜１４を、部分的に厚くすることで、ポスト１１が形成される部位に凹凸を形成したが、ポスト１１が形成される部分のパッド１３を、部分的に厚くすることで、ポスト１１が形成される部位に凹凸を形成してもよい。さらには、アンダーバンプメタル１５の厚さを変えて、同様に凹凸を形成してもよい。   In the above example, the portion of the protective film 14 where the post 11 is to be formed is partially thickened to form irregularities in the portion where the post 11 is formed, but the pad where the post 11 is to be formed. By partially thickening 13, irregularities may be formed in the portion where the post 11 is formed. Furthermore, the thickness of the under bump metal 15 may be changed to form irregularities in the same manner.

（第６実施形態）
図１０（ａ）〜（ｃ）は、本発明の第６実施形態に係る電子装置の製造方法の要部を示す工程図である。この図１０では、本製造方法におけるポスト形成工程の要部を示しており、工程途中におけるワークの断面構成を示している。本実施形態は、ポスト１１の先端面に鋭利部１２を設ける方法が、上記各実施形態とは相違するものであり、ここでは、その相違点を中心に述べる。 (Sixth embodiment)
FIGS. 10A to 10C are process diagrams showing the main part of the method for manufacturing an electronic device according to the sixth embodiment of the present invention. FIG. 10 shows a main part of the post forming step in the manufacturing method, and shows a cross-sectional configuration of the workpiece in the middle of the step. In the present embodiment, the method of providing the sharp portion 12 on the tip surface of the post 11 is different from the above embodiments, and here, the difference will be mainly described.

本実施形態では、図１０（ａ）に示されるように、ＩＣチップ１０の一面のうちポスト１１が形成される部位であるパッド１３上に、針１８を立てる。この針１８としては、たとえば銅製のものであるが、メッキにより針状に形成されたものであってもよい。さらには、上述した検査用の針を、当該検査後にパッド１３上に残したものであってもよい。   In the present embodiment, as shown in FIG. 10A, the needle 18 is raised on the pad 13 that is a part where the post 11 is formed on one surface of the IC chip 10. The needle 18 is made of copper, for example, but may be formed into a needle shape by plating. Furthermore, the above-described inspection needle may be left on the pad 13 after the inspection.

その後は、図１０（ｂ）に示されるように、針１８の根元部分にメッキを行い、針１８の根元部分を封止するようにポスト１１の本体部１１ａを形成する。それにより、本体部１１ａの先端面からは、針１８の先端が突出し、この突出する針１８の先端が鋭利部１２として構成される。   Thereafter, as shown in FIG. 10B, the base portion of the needle 11 is plated to form the body portion 11 a of the post 11 so as to seal the root portion of the needle 18. Thereby, the tip of the needle 18 protrudes from the tip surface of the main body portion 11 a, and the tip of the protruding needle 18 is configured as the sharp portion 12.

その後は、図１０（ｃ）に示されるように、レジストＲおよびアンダーバンプメタル１５の除去を行う。その後は、上記同様に、必要に応じて、ニッケルメッキ、金メッキを行えば、本実施形態においても、鋭利部１２が形成されたポスト１１を備えるＩＣチップ１０ができあがる。   Thereafter, as shown in FIG. 10C, the resist R and the under bump metal 15 are removed. Thereafter, similarly to the above, if nickel plating or gold plating is performed as necessary, also in this embodiment, the IC chip 10 including the post 11 in which the sharp portion 12 is formed is completed.

そして、上記実施形態と同様に、はんだ配置工程、はんだ接合工程を行い、本実施形態の電子装置が完成する。本実施形態においても、上記実施形態と同様に、適切にはんだ接合を行うことができる。   And the solder arrangement | positioning process and a solder joining process are performed similarly to the said embodiment, and the electronic device of this embodiment is completed. Also in the present embodiment, it is possible to appropriately perform solder bonding as in the above embodiment.

（第７実施形態）
図１１（ａ）〜（ｃ）は、本発明の第７実施形態に係る電子装置の製造方法の要部を示す工程図である。この図１１では、本製造方法におけるポスト形成工程の要部を示しており、工程途中におけるワークの断面構成を示している。本実施形態も、ポスト１１の先端面に鋭利部１２を設ける方法が、上記第１実施形態とは相違するものであり、ここでは、第１実施形態との相違点を中心に述べる。 (Seventh embodiment)
11A to 11C are process diagrams showing the main part of the method for manufacturing an electronic device according to the seventh embodiment of the present invention. FIG. 11 shows the main part of the post formation step in the present manufacturing method, and shows the cross-sectional configuration of the workpiece in the middle of the step. This embodiment is also different from the first embodiment in the method of providing the sharp portion 12 on the tip surface of the post 11, and here, the difference from the first embodiment will be mainly described.

本実施形態では、図１１（ａ）に示されるように、一面にパッド１３、保護膜１４、アンダーバンプメタル１５が設けられたＩＣチップ１０を、上記同様に形成し、その後、レジストＲ１、Ｒ２を形成する。   In this embodiment, as shown in FIG. 11A, the IC chip 10 provided with the pad 13, the protective film 14, and the under bump metal 15 on one surface is formed in the same manner as described above, and then the resists R1, R2 are formed. Form.

ここでは、レジストＲ１、Ｒ２は、ＩＣチップ１０の一面側から第１のレジストＲ１、第２のレジストＲ２が積層されたものである。第１のレジストＲ１は上記第１実施形態と同様のレジストであるが、第２のレジストＲ２は、第１のレジストＲ１よりも、本体部１１ａを構成するメッキが付着しにくい材料よりなるものである。   Here, the resists R1 and R2 are obtained by laminating a first resist R1 and a second resist R2 from one surface side of the IC chip 10. The first resist R1 is the same resist as in the first embodiment, but the second resist R2 is made of a material to which the plating constituting the main body portion 11a is less likely to adhere than the first resist R1. is there.

このようなレジストＲ１、Ｒ２によりメッキを行い、本体部１１ａを形成すると、下側の第１のレジストＲ１の内部では、全体的に均一の厚さでメッキが積まれていく。そして、上側の第２のレジストＲ２の内部では、第２のレジストＲ２に接するメッキの部分、すなわち本体部１１ａの周辺部では、メッキが第２のレジストＲ２に付着しにくく、当該レジストとの接触を避けるようにメッキが積まれていく。   When plating is performed using such resists R1 and R2 to form the main body portion 11a, the plating is stacked with a uniform thickness as a whole inside the lower first resist R1. In addition, in the upper second resist R2, in the portion of the plating in contact with the second resist R2, that is, in the peripheral portion of the main body portion 11a, the plating hardly adheres to the second resist R2, and is in contact with the resist. The plating is piled up to avoid.

そのため、図１１（ｂ）に示されるように、第２のレジストＲ２の内部では、本体部１１ａの中央部では厚く、周辺部では薄く、メッキが積まれる。そして、レジストＲ１、Ｒ２およびアンダーバンプメタル１５の除去を行うと、図１１（ｃ）に示されるように、先端面が凸形状となった本体部１１ａができあがる。   For this reason, as shown in FIG. 11B, in the second resist R2, plating is deposited thick at the central portion of the main body 11a and thin at the peripheral portion. Then, when the resists R1 and R2 and the under bump metal 15 are removed, as shown in FIG. 11C, a main body portion 11a having a convex tip surface is completed.

その後は、上記第１実施形態と同様に、エッチングを行って、円錐状の鋭利部１２を形成する。このとき、本実施形態では、あらかじめ先端面が凸形状となっているので、円錐状の鋭利部１２を形成しやすい。   Thereafter, as in the first embodiment, etching is performed to form the conical sharp portion 12. At this time, in this embodiment, since the front end surface has a convex shape in advance, the conical sharp portion 12 can be easily formed.

（他の実施形態）
なお、上記各実施形態では、ポスト１１は銅などのメッキで本体部１１ａを形成し、この本体部１１ａの先端面をエッチングして鋭利部１２を形成し、その後、はんだ濡れ性の向上のために、好ましくは、その表面に金メッキ１１ｂを施すというように、ポスト１１をメッキで形成し、鋭利部１２をエッチングにより形成した。 (Other embodiments)
In each of the above embodiments, the post 11 forms the main body portion 11a by plating with copper or the like, etches the front end surface of the main body portion 11a to form the sharp portion 12, and then improves solder wettability. Preferably, the post 11 is formed by plating, and the sharp portion 12 is formed by etching so that the surface is plated with gold 11b.

ここで、ポスト１１の本体部１１ａは、上記したメッキ以外にも、たとえば銅製柱状をなすブロックをＩＣチップ１０の一面に接着などによって設けることにより、形成するようにしてもよい。   Here, the main body 11a of the post 11 may be formed by providing, for example, a copper columnar block on one surface of the IC chip 10 by bonding or the like other than the above-described plating.

また、図１２は、他の実施形態にかかる基板搭載後のＩＣチップにおけるポスト部分の拡大断面図である。上述したように、鋭利部１２は、尖った角を持つ形状であって、ＩＣチップ１０を基板２０に押し付けたときに、その角が、ポスト１１の中でも最初にはんだ３０に接触する形状となっているものが好ましい。そのようなものとしては、図１２に示されるような、平坦な先端面の端部に角部を有し、この角部を鋭利部１２とするものであってもよい。   FIG. 12 is an enlarged cross-sectional view of a post portion of an IC chip after mounting on a substrate according to another embodiment. As described above, the sharp portion 12 has a shape with a sharp corner, and when the IC chip 10 is pressed against the substrate 20, the corner is a shape that first contacts the solder 30 in the post 11. Are preferred. As such, as shown in FIG. 12, a corner portion may be provided at the end portion of the flat distal end surface, and the corner portion may be a sharp portion 12.

本発明の第１実施形態にかかるＩＣチップの概略断面図である。1 is a schematic cross-sectional view of an IC chip according to a first embodiment of the present invention. （ａ）は、第1実施形態にかかる基板搭載前のＩＣチップにおけるポスト部分の拡大断面図、（ｂ）は、基板搭載後のＩＣチップにおけるポスト部分の拡大断面図である。(A) is an expanded sectional view of the post part in the IC chip before mounting the substrate according to the first embodiment, and (b) is an enlarged sectional view of the post part in the IC chip after mounting on the substrate. 第１実施形態の電子装置の製造方法におけるポスト形成工程を示す工程図である。It is process drawing which shows the post formation process in the manufacturing method of the electronic device of 1st Embodiment. 図３に続くポスト形成工程を示す工程図である。FIG. 4 is a process diagram illustrating a post formation process subsequent to FIG. 3. 本発明の第２実施形態にかかる電子装置の製造方法の要部を示す工程図である。It is process drawing which shows the principal part of the manufacturing method of the electronic device concerning 2nd Embodiment of this invention. 本発明の第３実施形態にかかる電子装置の製造方法の要部を示す工程図である。It is process drawing which shows the principal part of the manufacturing method of the electronic device concerning 3rd Embodiment of this invention. 第３実施形態にかかる電子装置の製造方法の他の例を示す工程図である。It is process drawing which shows the other example of the manufacturing method of the electronic device concerning 3rd Embodiment. 本発明の第４実施形態にかかる電子装置の製造方法の要部を示す工程図である。It is process drawing which shows the principal part of the manufacturing method of the electronic device concerning 4th Embodiment of this invention. 本発明の第５実施形態にかかる電子装置の製造方法の要部を示す工程図である。It is process drawing which shows the principal part of the manufacturing method of the electronic device concerning 5th Embodiment of this invention. 本発明の第６実施形態にかかる電子装置の製造方法の要部を示す工程図である。It is process drawing which shows the principal part of the manufacturing method of the electronic device concerning 6th Embodiment of this invention. 本発明の第７実施形態にかかる電子装置の製造方法の要部を示す工程図である。It is process drawing which shows the principal part of the manufacturing method of the electronic device concerning 7th Embodiment of this invention. 本発明の他の実施形態にかかる基板搭載後のＩＣチップにおけるポスト部分の拡大断面図である。It is an expanded sectional view of the post part in the IC chip after substrate mounting concerning other embodiments of the present invention.

符号の説明Explanation of symbols

１０ ＩＣチップ
１１ ポスト
１１ｂ 金メッキ
１２ 鋭利部１２
１７ 凹凸としての凹み
１８ 針
２０ 基板
３０ はんだ
３１ 酸化膜 10 IC chip 11 Post 11b Gold plating 12 Sharp part 12
17 Depression as unevenness 18 Needle 20 Substrate 30 Solder 31 Oxide film

Claims (8)

ＩＣチップ（１０）の一面と基板（２０）の一面との間を、はんだ（３０）によってはんだ接合してなる電子装置の製造方法において、
前記ＩＣチップ（１０）の前記一面のうち前記はんだ接合される部位に、当該一面より突出しその先端面に鋭利形状をなす鋭利部（１２）が設けられた導電性のポスト（１１）を形成するポスト形成工程と、
前記基板（２０）の前記一面のうち前記はんだ接合される部位に、前記はんだ（３０）を配置するはんだ配置工程と、
次に、前記ＩＣチップ（１０）と前記基板（２０）とを互いの前記一面同士にて対向させ、前記ＩＣチップ（１０）を前記基板（２０）側に押し付けて前記ポスト（１１）の前記鋭利部（１２）で前記はんだ（３０）の表面に位置する酸化膜（３１）を突き破り、この状態で前記はんだ（３０）をリフローさせるはんだ接合工程と、を備えることを特徴とする電子装置の製造方法。 In the manufacturing method of an electronic device formed by soldering between one surface of the IC chip (10) and one surface of the substrate (20) with solder (30),
A conductive post (11) provided with a sharp portion (12) projecting from the one surface and having a sharp shape at the tip surface is formed at a portion of the one surface of the IC chip (10) to be soldered. A post-forming process;
A solder placement step of placing the solder (30) in the solder-bonded portion of the one surface of the substrate (20);
Next, the IC chip (10) and the substrate (20) are opposed to each other on the one surface, and the IC chip (10) is pressed against the substrate (20) side, and the post (11) A solder joining step of piercing the oxide film (31) located on the surface of the solder (30) with a sharp portion (12) and reflowing the solder (30) in this state. Production method. 前記ポスト形成工程では、前記ポスト（１１）をメッキにより形成することを特徴とする請求項１に記載の電子装置の製造方法。   The method for manufacturing an electronic device according to claim 1, wherein the post is formed by plating in the post forming step. 前記ポスト（１１）の最表面を金メッキ（１１ｂ）により形成することを特徴とする請求項２に記載の電子装置の製造方法。   The method for manufacturing an electronic device according to claim 2, wherein the outermost surface of the post (11) is formed by gold plating (11b). 前記ポスト形成工程では、前記ポスト（１１）の先端面をエッチングすることにより、前記鋭利部（１２）を形成することを特徴とする請求項１ないし３のいずれか１つに記載の電子装置の製造方法。   4. The electronic device according to claim 1, wherein, in the post forming step, the sharp portion is formed by etching a front end surface of the post. 11. Production method. 前記ポスト形成工程では、前記ポスト（１１）の先端面に粗化メッキを施すか、もしくは当該先端面をエッチングすることにより、当該先端面を、前記鋭利部（１２）としての複数の針状突起を有する粗化された面とすることを特徴とする請求項１ないし３のいずれか１つに記載の電子装置の製造方法。   In the post forming step, the tip surface of the post (11) is subjected to rough plating or the tip surface is etched so that the tip surface becomes a plurality of needle-like protrusions as the sharp part (12). 4. The method of manufacturing an electronic device according to claim 1, wherein the surface is a roughened surface. 前記ポスト形成工程では、前記ＩＣチップ（１０）の前記一面のうち前記ポスト（１１）が形成される部位に凹凸（１７）を設け、その上にメッキを行うことによって、先端面が前記凹凸（１７）を継承した形状の凹凸面となっているとともに当該凹凸面の凸部が前記鋭利部（１２）として構成されている前記ポスト（１１）を形成することを特徴とする請求項１ないし３のいずれか１つに記載の電子装置の製造方法。   In the post-forming step, an uneven surface (17) is provided on a portion of the one surface of the IC chip (10) where the post (11) is to be formed, and plating is performed on the uneven surface to form the uneven surface ( The post (11) is formed as an uneven surface having a shape inheriting 17), and the convex portion of the uneven surface is configured as the sharp portion (12). The manufacturing method of the electronic device as described in any one of these. 前記凹凸面の凸部をエッチングして、さらに鋭利な形状に加工することを特徴とする請求項６に記載の電子装置の製造方法。   The method for manufacturing an electronic device according to claim 6, wherein the convex portion of the uneven surface is etched to be further processed into a sharper shape. 前記ポスト形成工程では、前記ＩＣチップ（１０）の前記一面のうち前記ポスト（１１）が形成される部位に針（１８）を立て、その後、前記針（１８）の根元部分にメッキを行い、先端面から突出する前記針（１８）の先端が前記鋭利部（１２）として構成されている前記ポスト（１１）を形成することを特徴とする請求項１ないし３のいずれか１つに記載の電子装置の製造方法。   In the post forming step, the needle (18) is set up on a portion of the one surface of the IC chip (10) where the post (11) is formed, and thereafter, the root portion of the needle (18) is plated, The tip of the needle (18) protruding from the tip surface forms the post (11) configured as the sharp part (12), according to any one of the preceding claims. A method for manufacturing an electronic device.
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