JP2010088102A5 - 記憶装置 - Google Patents

記憶装置 Download PDF

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Publication number
JP2010088102A5
JP2010088102A5 JP2009121890A JP2009121890A JP2010088102A5 JP 2010088102 A5 JP2010088102 A5 JP 2010088102A5 JP 2009121890 A JP2009121890 A JP 2009121890A JP 2009121890 A JP2009121890 A JP 2009121890A JP 2010088102 A5 JP2010088102 A5 JP 2010088102A5
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JP
Japan
Prior art keywords
storage device
writing
segments
storage unit
storage
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JP2009121890A
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JP2010088102A (ja
JP5391449B2 (ja
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Priority to JP2009121890A priority Critical patent/JP5391449B2/ja
Priority claimed from JP2009121890A external-priority patent/JP5391449B2/ja
Priority to US12/550,723 priority patent/US20100054272A1/en
Publication of JP2010088102A publication Critical patent/JP2010088102A/ja
Publication of JP2010088102A5 publication Critical patent/JP2010088102A5/ja
Application granted granted Critical
Publication of JP5391449B2 publication Critical patent/JP5391449B2/ja
Expired - Fee Related legal-status Critical Current
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Claims (1)

  1. 第1の記憶手段に接続され、ネットワークを介して受信したパケットを複数のセグメントに分けて記憶する記憶装置であって、
    前記第1の記憶手段よりも高速にアクセスが可能な第2の記憶手段と、
    前記パケットの最初の所定数のセグメントを前記第2の記憶手段に書き込み、それ以降のセグメントを前記第1の記憶手段に書き込む書込手段とを含む、記憶装置。
JP2009121890A 2008-09-02 2009-05-20 記憶装置 Expired - Fee Related JP5391449B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009121890A JP5391449B2 (ja) 2008-09-02 2009-05-20 記憶装置
US12/550,723 US20100054272A1 (en) 2008-09-02 2009-08-31 Storage device capable of accommodating high-speed network using large-capacity low-speed memory

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008224977 2008-09-02
JP2008224977 2008-09-02
JP2009121890A JP5391449B2 (ja) 2008-09-02 2009-05-20 記憶装置

Publications (3)

Publication Number Publication Date
JP2010088102A JP2010088102A (ja) 2010-04-15
JP2010088102A5 true JP2010088102A5 (ja) 2012-03-22
JP5391449B2 JP5391449B2 (ja) 2014-01-15

Family

ID=41725368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009121890A Expired - Fee Related JP5391449B2 (ja) 2008-09-02 2009-05-20 記憶装置

Country Status (2)

Country Link
US (1) US20100054272A1 (ja)
JP (1) JP5391449B2 (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150089127A1 (en) * 2013-09-23 2015-03-26 Kuljit S. Bains Memory broadcast command
JP2015186233A (ja) 2014-03-26 2015-10-22 富士通株式会社 パケット処理装置、及びパケット処理方法
JP5835821B1 (ja) * 2014-06-10 2015-12-24 日本電信電話株式会社 統計情報メモリシステム、ネットワーク機器、および統計情報蓄積方法
JP6802762B2 (ja) * 2017-06-27 2020-12-16 日立オートモティブシステムズ株式会社 処理装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05227211A (ja) * 1992-02-17 1993-09-03 Fujitsu Ltd パケット交換システム
JPH07264242A (ja) * 1994-03-22 1995-10-13 Hitachi Ltd パケットスイッチ及びそのパケットスイッチを用いた並列計算機システム
JPH08194643A (ja) * 1995-01-19 1996-07-30 Fanuc Ltd メモリ制御方式
JP2002304353A (ja) * 2001-04-05 2002-10-18 Sony Corp 情報提供装置、通信システムおよび通信方法
FR2838899B1 (fr) * 2002-04-19 2004-08-27 Cit Alcatel Dispositif de routage a traitement parallele
CN101321047B (zh) * 2002-05-10 2012-08-08 美商内数位科技公司 协议数据单元再传输的用户终端设备及节点b
JP2004206252A (ja) * 2002-12-24 2004-07-22 Fujitsu Ltd メモリコントローラ
US20050021558A1 (en) * 2003-06-11 2005-01-27 Beverly Harlan T. Network protocol off-load engine memory management
US7657706B2 (en) * 2003-12-18 2010-02-02 Cisco Technology, Inc. High speed memory and input/output processor subsystem for efficiently allocating and using high-speed memory and slower-speed memory
JP4757109B2 (ja) * 2006-06-23 2011-08-24 富士通株式会社 データ通信プログラム
JP4417935B2 (ja) * 2006-07-28 2010-02-17 株式会社東芝 ネットワークを介して外部と通信を行う情報処理装置、情報処理方法および情報処理プログラム
JP2009020684A (ja) * 2007-07-11 2009-01-29 Kawasaki Microelectronics Kk 端末装置

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