JP2010016233A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP2010016233A
JP2010016233A JP2008175720A JP2008175720A JP2010016233A JP 2010016233 A JP2010016233 A JP 2010016233A JP 2008175720 A JP2008175720 A JP 2008175720A JP 2008175720 A JP2008175720 A JP 2008175720A JP 2010016233 A JP2010016233 A JP 2010016233A
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JP
Japan
Prior art keywords
semiconductor device
manufacturing
pad region
gas
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2008175720A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010016233A5 (enExample
Inventor
Masao Kunito
正男 國頭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Priority to JP2008175720A priority Critical patent/JP2010016233A/ja
Priority to KR1020090060270A priority patent/KR101049383B1/ko
Priority to TW098122555A priority patent/TW201013776A/zh
Publication of JP2010016233A publication Critical patent/JP2010016233A/ja
Publication of JP2010016233A5 publication Critical patent/JP2010016233A5/ja
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • H01L2224/05557Shape in side view comprising protrusions or indentations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
JP2008175720A 2008-07-04 2008-07-04 半導体装置の製造方法 Withdrawn JP2010016233A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008175720A JP2010016233A (ja) 2008-07-04 2008-07-04 半導体装置の製造方法
KR1020090060270A KR101049383B1 (ko) 2008-07-04 2009-07-02 반도체 장치의 제조 방법
TW098122555A TW201013776A (en) 2008-07-04 2009-07-03 A manufacturing method of a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008175720A JP2010016233A (ja) 2008-07-04 2008-07-04 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2010016233A true JP2010016233A (ja) 2010-01-21
JP2010016233A5 JP2010016233A5 (enExample) 2011-06-30

Family

ID=41702053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008175720A Withdrawn JP2010016233A (ja) 2008-07-04 2008-07-04 半導体装置の製造方法

Country Status (3)

Country Link
JP (1) JP2010016233A (enExample)
KR (1) KR101049383B1 (enExample)
TW (1) TW201013776A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015146023A1 (ja) * 2014-03-25 2015-10-01 株式会社Joled エッチング方法、および、これを用いた有機el表示パネルの製造方法
JP2016122801A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI794238B (zh) * 2017-07-13 2023-03-01 荷蘭商Asm智慧財產控股公司 於單一加工腔室中自半導體膜移除氧化物及碳之裝置及方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100805695B1 (ko) * 2005-08-17 2008-02-21 주식회사 하이닉스반도체 메탈퓨즈를 구비한 반도체소자의 제조 방법
KR20070105827A (ko) * 2006-04-27 2007-10-31 주식회사 하이닉스반도체 리페어 퓨즈를 구비한 반도체 소자의 제조 방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015146023A1 (ja) * 2014-03-25 2015-10-01 株式会社Joled エッチング方法、および、これを用いた有機el表示パネルの製造方法
JP2016122801A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
KR101049383B1 (ko) 2011-07-14
TW201013776A (en) 2010-04-01
KR20100004879A (ko) 2010-01-13

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