JP2009289926A - 電子部品装置の製造方法 - Google Patents
電子部品装置の製造方法 Download PDFInfo
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- JP2009289926A JP2009289926A JP2008140078A JP2008140078A JP2009289926A JP 2009289926 A JP2009289926 A JP 2009289926A JP 2008140078 A JP2008140078 A JP 2008140078A JP 2008140078 A JP2008140078 A JP 2008140078A JP 2009289926 A JP2009289926 A JP 2009289926A
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- sealing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
【解決手段】配線基板10上に電子部品21,22と共に導体ポスト24を実装し、この導体ポスト24の上面に、樹脂封止の際に用いる金型41,42よりも軟らかい材料からなる導体W3,W4を配設した後、金型41,42を用いて、該金型を導体W3,W4に接触させながら電子部品21,22及び導体ポスト24を樹脂封止する。樹脂封止後、封止樹脂層25の表面から露出している導体W3,W4上に導電性接続材料を付着させて、シールド部材を装着する。
【選択図】図2
Description
21,22…ICチップ(電子部品)、
24…金属ポスト(導体ポスト)、
25…封止樹脂層、
26…導電性ペースト(導電性接続材料)、
27…接着剤(接着性材料)、
30…金属製シールドケース(シールド部材)、
41,42…金型、
50…モジュール製品(電子部品装置)、
W1,W2,W3,W4…金属ワイヤ。
Claims (5)
- 配線基板上に電子部品と共に導体ポストを実装する工程と、
前記導体ポストの上面に、樹脂封止の際に用いる金型よりも軟らかい材料からなる導体を配設する工程と、
前記金型を用いて、該金型を前記導体に接触させながら前記電子部品及び前記導体ポストを樹脂封止する工程とを含むことを特徴とする電子部品装置の製造方法。 - 前記導体は、前記導体ポストの上面に導電性ワイヤをアーチ状にボンディングすることによって配設されることを特徴とする請求項1に記載の電子部品装置の製造方法。
- 前記樹脂封止する工程後、封止樹脂層の表面から露出している前記導体上に導電性接続材料を付着させて、前記封止樹脂層の表面を覆うようにシールド部材を装着する工程を含むことを特徴とする請求項1に記載の電子部品装置の製造方法。
- 前記シールド部材を装着する工程において、前記導体上に前記導電性接続材料を付着させる際に、前記封止樹脂層上の前記導体が露出している部分以外の所要の箇所に接着性材料を付着させることを特徴とする請求項3に記載の電子部品装置の製造方法。
- 前記樹脂封止する工程後、前記シールド部材を装着する前に、前記封止樹脂層の表面から露出している前記導体の表面に粗化処理を施す工程を含むことを特徴とする請求項3に記載の電子部品装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008140078A JP5248918B2 (ja) | 2008-05-28 | 2008-05-28 | 電子部品装置及びその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2008140078A JP5248918B2 (ja) | 2008-05-28 | 2008-05-28 | 電子部品装置及びその製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2009289926A true JP2009289926A (ja) | 2009-12-10 |
JP2009289926A5 JP2009289926A5 (ja) | 2011-06-02 |
JP5248918B2 JP5248918B2 (ja) | 2013-07-31 |
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Application Number | Title | Priority Date | Filing Date |
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JP2008140078A Expired - Fee Related JP5248918B2 (ja) | 2008-05-28 | 2008-05-28 | 電子部品装置及びその製造方法 |
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JP (1) | JP5248918B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160064970A (ko) | 2014-11-28 | 2016-06-08 | 토와 가부시기가이샤 | 전자 부품, 그 제조 방법 및 제조 장치 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10546819B2 (en) | 2016-09-15 | 2020-01-28 | Toshiba Memory Corporation | Semiconductor device and method of manufacturing the same |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07254654A (ja) * | 1994-03-15 | 1995-10-03 | Fujitsu Ltd | 半導体装置の製造方法 |
JP2002170906A (ja) * | 2000-12-04 | 2002-06-14 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
JP2003174124A (ja) * | 2001-12-04 | 2003-06-20 | Sainekkusu:Kk | 半導体装置の外部電極形成方法 |
JP2003249607A (ja) * | 2002-02-26 | 2003-09-05 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP2003258011A (ja) * | 2002-03-07 | 2003-09-12 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
-
2008
- 2008-05-28 JP JP2008140078A patent/JP5248918B2/ja not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07254654A (ja) * | 1994-03-15 | 1995-10-03 | Fujitsu Ltd | 半導体装置の製造方法 |
JP2002170906A (ja) * | 2000-12-04 | 2002-06-14 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
JP2003174124A (ja) * | 2001-12-04 | 2003-06-20 | Sainekkusu:Kk | 半導体装置の外部電極形成方法 |
JP2003249607A (ja) * | 2002-02-26 | 2003-09-05 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP2003258011A (ja) * | 2002-03-07 | 2003-09-12 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160064970A (ko) | 2014-11-28 | 2016-06-08 | 토와 가부시기가이샤 | 전자 부품, 그 제조 방법 및 제조 장치 |
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