JP2009212450A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP2009212450A JP2009212450A JP2008056403A JP2008056403A JP2009212450A JP 2009212450 A JP2009212450 A JP 2009212450A JP 2008056403 A JP2008056403 A JP 2008056403A JP 2008056403 A JP2008056403 A JP 2008056403A JP 2009212450 A JP2009212450 A JP 2009212450A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 80
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000007800 oxidant agent Substances 0.000 claims abstract description 61
- 230000001590 oxidative effect Effects 0.000 claims abstract description 60
- 238000009792 diffusion process Methods 0.000 claims abstract description 51
- 238000002955 isolation Methods 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 49
- 230000002265 prevention Effects 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims description 10
- 239000012535 impurity Substances 0.000 claims description 9
- 230000006866 deterioration Effects 0.000 abstract description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 20
- 239000000463 material Substances 0.000 description 15
- 229910052757 nitrogen Inorganic materials 0.000 description 10
- 238000005229 chemical vapour deposition Methods 0.000 description 7
- 239000011810 insulating material Substances 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 238000000151 deposition Methods 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- XUKUURHRXDUEBC-SXOMAYOGSA-N (3s,5r)-7-[2-(4-fluorophenyl)-3-phenyl-4-(phenylcarbamoyl)-5-propan-2-ylpyrrol-1-yl]-3,5-dihydroxyheptanoic acid Chemical compound C=1C=CC=CC=1C1=C(C=2C=CC(F)=CC=2)N(CC[C@@H](O)C[C@H](O)CC(O)=O)C(C(C)C)=C1C(=O)NC1=CC=CC=C1 XUKUURHRXDUEBC-SXOMAYOGSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910004129 HfSiO Inorganic materials 0.000 description 1
- -1 SiN or SiON Chemical compound 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910006501 ZrSiO Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
【解決手段】本発明の一態様に係る半導体装置は、半導体基板と、前記半導体基板内に形成され、酸化物層と、前記酸化物層上に位置する酸化剤拡散防止層とを有する素子分離領域と、前記半導体基板上および前記酸化剤拡散防止層上に形成されたゲート絶縁膜と、前記ゲート絶縁膜上に形成されたゲート電極と、を有する。
【選択図】図1
Description
(半導体装置の構成)
図1(a)、(b)は、本発明の第1の実施の形態に係る半導体装置のゲート幅方向の断面図である。
図2(a)〜(e)は、本発明の第1の実施の形態に係る半導体装置の製造工程を示すゲート幅方向の断面図である。
本発明の第1の実施の形態によれば、酸化剤拡散防止層3bが素子分離領域の上部に形成されているため、熱処理工程において素子分離領域3に含まれる酸化剤がゲート絶縁膜4を介して半導体基板2の表面に拡散移動することを防止できる。
第2の実施の形態は、素子分離領域の酸化剤拡散防止層の形成方法において、第1の実施の形態と異なる。なお、第1の実施の形態と同様の部分については、説明を省略または簡略化する。
第2の実施の形態に係る半導体装置は、第1の実施の形態に係る半導体装置1の素子分離領域3の代わりに素子分離領域13を有する。その他の構成は、第1の実施の形態に係る半導体装置1と同様である。
図3(a)〜(c)は、本発明の第2の実施の形態に係る半導体装置の製造工程を示すゲート幅方向の断面図である。
本発明の第2の実施の形態によれば、第1の実施の形態と異なる製造方法により、同様の機能を有する素子分離領域11を形成することができる。
本発明は、上記各実施の形態に限定されず、発明の主旨を逸脱しない範囲内において種々変形実施が可能である。
Claims (5)
- 半導体基板と、
前記半導体基板内に形成され、酸化物層と、前記酸化物層上に位置する酸化剤拡散防止層とを有する素子分離領域と、
前記半導体基板上および前記酸化剤拡散防止層上に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成されたゲート電極と、
を有することを特徴とする半導体装置。 - 前記酸化剤拡散防止層の底部は、前記半導体基板と前記ゲート絶縁膜との界面よりも低い位置にあることを特徴とする請求項1に記載の半導体装置。
- 前記素子分離領域のうち、前記ゲート絶縁膜と接する部分には、前記酸化剤拡散防止層が設けられていることを特徴とする請求項1または2に記載の半導体装置。
- 半導体基板中に酸化物からなる素子分離領域を形成する工程と、
前記素子分離領域の上部に不純物を導入し、酸化剤拡散防止層を形成する工程と、
前記半導体基板および前記酸化剤拡散防止層上にゲート絶縁膜を形成する工程と、
前記ゲート絶縁膜上にゲート電極を形成する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記不純物は、前記素子分離領域中の前記半導体基板の表面よりも低い位置まで導入されることを特徴とする請求項4に記載の半導体装置の製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008056403A JP2009212450A (ja) | 2008-03-06 | 2008-03-06 | 半導体装置およびその製造方法 |
US12/398,491 US8008728B2 (en) | 2008-03-06 | 2009-03-05 | Semiconductor device and manufacturing method of semiconductor device |
US13/187,213 US20110275189A1 (en) | 2008-03-06 | 2011-07-20 | Semiconductor device and manufacturing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008056403A JP2009212450A (ja) | 2008-03-06 | 2008-03-06 | 半導体装置およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
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JP2009212450A true JP2009212450A (ja) | 2009-09-17 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2008056403A Pending JP2009212450A (ja) | 2008-03-06 | 2008-03-06 | 半導体装置およびその製造方法 |
Country Status (2)
Country | Link |
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US (2) | US8008728B2 (ja) |
JP (1) | JP2009212450A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101396519B1 (ko) * | 2011-03-01 | 2014-05-22 | 글로벌파운드리즈 드레스덴 모듈 원 리미티드 라이어빌리티 컴퍼니 & 씨오. 케이지 | 얕은 트렌치 격리 영역의 캡핑에 의한 하이-케이 금속 게이트 스택의 우수한 무결성 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5289069B2 (ja) * | 2009-01-09 | 2013-09-11 | 株式会社東芝 | 半導体装置およびその製造方法 |
FR2976726A1 (fr) | 2011-06-16 | 2012-12-21 | St Microelectronics Crolles 2 | Circuit integre comprenant une tranchee d'isolement et procede correspondant |
US9087872B2 (en) | 2011-07-27 | 2015-07-21 | Stmicroelectronics (Crolles 2) Sas | Method for forming an insulating trench in a semiconductor substrate and structure, especially CMOS image sensor, obtained by said method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS607145A (ja) * | 1983-06-25 | 1985-01-14 | Toshiba Corp | 半導体装置 |
JP2000340791A (ja) * | 1999-05-28 | 2000-12-08 | Nec Corp | 半導体装置の製造方法 |
JP2003017555A (ja) * | 2001-06-29 | 2003-01-17 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2003289141A (ja) * | 2002-03-28 | 2003-10-10 | Toshiba Corp | 半導体装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05218082A (ja) | 1992-01-31 | 1993-08-27 | Sony Corp | 半導体装置の製造方法 |
US6146970A (en) * | 1998-05-26 | 2000-11-14 | Motorola Inc. | Capped shallow trench isolation and method of formation |
US6133105A (en) * | 1999-04-27 | 2000-10-17 | United Microelectronics Corp. | Method of manufacturing borderless contact hole including a silicide layer on source/drain and sidewall of trench isolation structure |
US6888214B2 (en) * | 2002-11-12 | 2005-05-03 | Micron Technology, Inc. | Isolation techniques for reducing dark current in CMOS image sensors |
US7491964B2 (en) * | 2005-01-17 | 2009-02-17 | International Business Machines Corporation | Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process |
US7385275B2 (en) * | 2006-02-15 | 2008-06-10 | International Business Machines Corporation | Shallow trench isolation method for shielding trapped charge in a semiconductor device |
-
2008
- 2008-03-06 JP JP2008056403A patent/JP2009212450A/ja active Pending
-
2009
- 2009-03-05 US US12/398,491 patent/US8008728B2/en not_active Expired - Fee Related
-
2011
- 2011-07-20 US US13/187,213 patent/US20110275189A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS607145A (ja) * | 1983-06-25 | 1985-01-14 | Toshiba Corp | 半導体装置 |
JP2000340791A (ja) * | 1999-05-28 | 2000-12-08 | Nec Corp | 半導体装置の製造方法 |
JP2003017555A (ja) * | 2001-06-29 | 2003-01-17 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2003289141A (ja) * | 2002-03-28 | 2003-10-10 | Toshiba Corp | 半導体装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101396519B1 (ko) * | 2011-03-01 | 2014-05-22 | 글로벌파운드리즈 드레스덴 모듈 원 리미티드 라이어빌리티 컴퍼니 & 씨오. 케이지 | 얕은 트렌치 격리 영역의 캡핑에 의한 하이-케이 금속 게이트 스택의 우수한 무결성 |
Also Published As
Publication number | Publication date |
---|---|
US20090224329A1 (en) | 2009-09-10 |
US20110275189A1 (en) | 2011-11-10 |
US8008728B2 (en) | 2011-08-30 |
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