JP2009212161A - Semiconductor device storage package for optical communication - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device storage package for optical communication that prevents peeling-off of a lead by reducing stress occurring at a lead end part joined to ceramics even when the lead is deformed by warpage of a printed circuit board or the like. <P>SOLUTION: The semiconductor device storage package 1 for optical communication has an almost box shape and is configured as follows. A KV ring 8 for fixing a cable 7 that passes an optical signal therethrough is joined to a through-hole drilled in the front face of a KV-made base body 2 having a cavity in its inside. A ceramic-made insulator 6 is installed inside the cavity so as to be partially exposed from a cutout part 10 drilled in the bottom face of the base body 2 to which a heat-dissipation plate 3 is joined. A conductor wiring pattern made conductive to a semiconductor device is formed on the insulator 6. One end of a lead 4b is joined to a terminal part 5 formed in the conductor wiring pattern exposed from the cutout part 10. A part P of the lead extended from the edge part 2a of the base part 2 to the outside is formed into an almost crank shape in a planar view. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an optical communication semiconductor element storage package that is surface-mounted on a printed circuit board or the like, and more particularly to an optical communication semiconductor element storage package in which a lead bonded to the bottom surface of the package is not easily peeled off. .

  An optical communication semiconductor element housing package used for an uncooled laser diode or a light receiving diode for signal transmission is, for example, KV (Fe—Ni—Co alloy having a thermal expansion coefficient approximate to that of ceramic, a trade name “ Kovar (Kovar), Kovar is a US registered trademark), etc., a base that houses a semiconductor element in a cavity formed in the interior, and installed in the cavity and drilled in the bottom and side surfaces of the base A ceramic insulator that exposes a part of the cutout from the notch, a conductor wiring pattern formed from the cavity side to the outside of the substrate in a state in which the insulation is maintained by the insulator, and the conductor And an external terminal connected to a semiconductor element housed in the cavity via the wiring pattern. Further, a through hole is provided in the side surface of the base for passing an optical signal through the cavity, and a hollow metal fixing member is joined to the through hole. In order to maintain the airtightness of the cavity, after the semiconductor element is accommodated, a lid is joined to the upper portion of the base body via a sealing ring made of a metal member such as KV.

A surface-mount type optical communication semiconductor element housing package will be described with reference to FIG.
7A and 7B are a front view and a back view, respectively, of a surface-mount type optical communication semiconductor element storage package according to the prior art.
As shown in FIGS. 7A and 7B, an optical communication semiconductor element housing package 51 mounted on the surface of a printed circuit board or the like has a heat sink 53 made of copper tungsten bonded to the bottom surface of a base 52 made of KV. At the same time, a notch 60 is formed, and a lead 54a made of a metal member such as KV or Fe—Ni—Cr alloy is formed on a conductor wiring pattern (not shown) exposed from the notch 60 via a terminal portion 55. , 54b are joined. The conductor wiring pattern that conducts to the semiconductor element in the cavity is completely insulated from the base 52 by an insulator 56 made of ceramic such as alumina or aluminum nitride.
The terminal portion 55 is formed by printing and baking a refractory metal paste such as tungsten or molybdenum on the exposed portion from the cutout portion 60 of the conductor wiring pattern. As described above, the lead 54a having a width of 0.3 mm and the lead 54b having a width of 0.2 mm are joined to the terminal portion 55 by brazing or the like. As described above, the leads 54a and 54b and the terminal portion 55 constitute an external terminal that conducts to the semiconductor element housed in the cavity via the conductor wiring pattern. Further, a through hole communicating with the cavity is formed in the side surface of the base 52, and a KV ring 58 is joined to the through hole in order to fix a cable 57 for passing an optical signal through the cavity. The cavity is kept airtight by a lid body 59 joined to the upper portion of the base 52 via a sealing ring (not shown) made of KV.

When the optical communication semiconductor element housing package 51 is mounted on a printed circuit board or the like having various conductor wiring patterns formed on the surface, the leads 54a and 54b are soldered to the conductor wiring patterns. Therefore, when the printed circuit board is bent due to mechanical or thermal factors, the leads 54 a and 54 b are deformed together with the printed circuit board, and a force is generated to peel off the end portion from the insulator 56. At this time, the lead 54b having a narrow width is easily peeled off as compared with the lead 54a.
Such a problem related to the bonding strength of the leads 54a and 54b is not limited to the optical communication semiconductor element housing package, but is common in the field of other packages for housing semiconductor elements. Therefore, a lot of research has been conducted on techniques for preventing lead peeling, and several inventions and devices have been disclosed so far.

For example, in Patent Document 1, the name “lead for semiconductor device” is generated at the inner end of the lead so that the inner end of the lead does not peel from the conductor pad even when a force is applied vertically to the outer end of the lead. An invention relating to a “semiconductor device lead” capable of suppressing the stress is disclosed.
The invention disclosed in Patent Document 1 is characterized in that the both side edges of the lead in the vicinity of the brazed portion are cut out in a U shape with respect to the lead brazed to the conductor pad provided on the insulating substrate. It is what.
According to such a structure, when a vertical force is applied to the outer end of the lead, the middle part of the lead whose bending rigidity has been lowered due to the notches on both side edges bends up and down. No excessive stress is generated. Therefore, it is possible to prevent the brazed portion at the inner end of the lead from being peeled off from the conductor pad.

Further, Patent Document 2 has a name “component mounting method”, which is a “component that can reduce stress applied between a bent portion of a lead wire and a soldered portion, and can prevent cracks in the soldered portion. The invention relating to the “implementation method” is disclosed.
In the invention disclosed in Patent Document 2, a lead wire bent into a substantially “T” shape at a required position is inserted into a hole in a printed wiring board, and the bent portion is brought into contact with an upper portion of the hole in the printed wiring board. In this state, the tip portion of the lead wire is soldered to the pattern of the printed wiring board.
According to such a structure, when the printed wiring board expands due to heat generation of a component or the like, the stress applied between the bent portion of the lead wire and the soldered portion is absorbed by the elastic effect of the bent portion. Have. Thereby, generation | occurrence | production of the crack in a soldering part is prevented.

Furthermore, in Patent Document 3, a semiconductor package having a structure in which a lead is bonded to a ceramic terminal attached to a metal package body under the name of “method for manufacturing a semiconductor package”, the defect occurrence rate in the manufacturing process is suppressed, An invention relating to a manufacturing method capable of reliably obtaining a non-defective product is disclosed.
The invention disclosed in Patent Document 3 sets and aligns a package body and a lead joined body composed of a lead frame brazed by aligning leads with ceramic terminals and electrodes, and a heating furnace. Among them, a semiconductor is assembled by brazing a package body and a ceramic terminal of a lead joined body. The lead is provided with a bent portion or a half-etched portion.
According to such a structure, there is an effect that the thermal stress generated by the expansion and contraction of the lead when the package body and the ceramic terminal are brazed is alleviated by the bent portion or the half-etched portion of the lead. As a result, it is possible to reliably manufacture a semiconductor package while suppressing the occurrence of defects due to lead deformation or the like.
JP-A-6-181276 JP-A-6-45724 JP 2006-128306 A

  However, in the invention disclosed in Patent Document 1 which is the above-described prior art, there is a problem that it cannot be applied when there is not enough width to provide a notch in the lead.

  Further, in the invention disclosed in Patent Document 2, although there is an effect of reducing the force generated in the length direction of the lead wire, there is no effect of reducing the force generated in the direction of bending the lead wire. There was a problem.

  In the invention disclosed in Patent Document 3, thermal stress generated in the length direction of the lead as the lead expands and contracts can be relieved, but for example, there is no effect when bending stress is generated in the lead. There was a problem.

  The present invention has been made in response to such a conventional situation, and even when the lead is deformed due to bending of a printed circuit board or the like, the stress generated at the end of the lead joined to the ceramic is relieved to separate the lead. An object of the present invention is to provide a semiconductor device housing package for optical communication capable of preventing the above.

To achieve the above object, the optical communication semiconductor element storage package according to claim 1 is an optical communication semiconductor element storage package in which a cavity for storing an optical communication semiconductor element is provided. A substantially box-shaped metal base having a through-hole for passing an optical signal on the front surface and a notch on the bottom surface, and a conductor that conducts to the semiconductor element and exposes a part of the notch from the notch A wiring pattern, a ceramic insulator installed in the cavity so that the conductor wiring pattern can be insulated from the substrate, and one end joined to the insulator so as to be electrically connected to the conductor wiring pattern exposed from the notch And a lead extending outward from the edge of the base, and the lead extends from the edge of the base in a substantially crank shape in plan view. It is an.
In the optical communication semiconductor element housing package having such a structure, the stress generated in the joint portion with the insulator due to the deformation of the lead due to the bending of the printed circuit board is alleviated by the portion formed in the crank shape. Have This makes it difficult for the lead to peel from the insulator.

According to a second aspect of the present invention, in the semiconductor optical device storage package for the optical optical communication according to the first aspect, one end of the lead is joined to the insulator by brazing.
In the optical communication semiconductor element housing package having such a structure, the lead is difficult to peel off from the insulator.

  As described above, in the semiconductor device housing package for optical communication according to claim 1 of the present invention, even when the printed circuit board is bent, the stress generated at the end of the lead joined to the insulator is alleviated. Thus, peeling of the lead can be prevented.

  According to the semiconductor device housing package for optical communication according to the second aspect of the present invention, the peeling of the lead from the insulator can be prevented, and the reliability of the product is improved.

  An example of a semiconductor device housing package for optical communication according to the best mode of the present invention will be described with reference to FIGS.

FIGS. 1A and 1B are a front view and a back view, respectively, of an optical communication semiconductor element storage package according to the best mode of the present invention. 2A to 2C are views showing modifications of the optical communication semiconductor element housing package of the present embodiment. 2A to 2C correspond to the partially enlarged view of the lead having a width of 0.2 mm and the vicinity thereof in FIG.
As shown in FIGS. 1A and 1B, the surface-mount type optical communication semiconductor element storage package 1 of the present embodiment has a semiconductor element placed inside (cavity) of a substantially box-shaped substrate 2 made of KV. The structure is housed and the upper portion of the base 2 is covered with a lid 9 to keep the airtightness in the cavity. A through hole is formed in the front surface of the base 2 so as to communicate with the cavity, and a KV ring 8 for fixing the cable 7 for passing an optical signal is joined to the through hole. A heat sink 3 made of copper tungsten is joined to the bottom surface of the base 2 and a notch 10 is drilled. In addition, an insulator 6 made of ceramic such as alumina or aluminum nitride is installed inside the cavity in a state where a part of the insulator 6 is exposed from the notch 10, and the insulator 6 has a conductor wiring that is electrically connected to the semiconductor element. A pattern (not shown) is formed. The conductor wiring pattern is completely insulated from the base 2 by the insulator 6, and a high melting point metal paste such as tungsten or molybdenum is printed and baked on the exposed portion from the notch portion 10. 5 is formed. The terminal portion 5 includes a lead 4a (thickness 0.2 mm, width 0.3 mm) and a lead 4b (thickness 0.2 mm, width 0.2 mm) made of a metal member such as KV or Fe—Ni—Cr alloy. The lead 4b is joined by brazing or the like, and the portion P extending outward from the edge 2a of the base 2 is substantially crank-shaped in plan view, that is, after the lead 4b is once bent approximately 90 degrees, the lead 4b is approximately 90 again. It is formed so as to bend and return to the first extending direction. Thus, the leads 4a and 4b and the terminal portion 5 constitute external terminals that are electrically connected to the semiconductor element through the conductor wiring pattern.

  The shape of the lead 4b is not limited to that shown in FIG. For example, the portion P formed in a crank shape by the lead 4b may be bent so that the tips are separated from each other as shown in FIG. As shown in FIG. 5, it may be bent in the same direction. Further, not only the lead 4b but also a portion formed in a crank shape with respect to the lead 4a may be provided. Further, the method of joining the leads 4a and 4b to the insulator 6 is not limited to brazing, and can be appropriately changed. Note that the operation and effect of the optical communication semiconductor element housing package 1 described below are similarly exhibited even when the leads 4a and 4b are joined by a method other than brazing.

The deformation that occurs in the leads 4a and 4b when the printed circuit board on which the semiconductor element housing package for optical communication 1 is bent will be described with reference to FIG.
FIGS. 3A and 3B are schematic views in which the joint portions of the leads 4a and 4b and the insulator 6 and the periphery thereof are enlarged in the optical communication semiconductor element housing package 1 of the present embodiment. In FIG. 3, it is assumed that the lead 4a and the lead 4b have the same width and thickness. Actually, the leads 4a and 4b receive force from the printed circuit board over the entire joining surface due to the bending of the printed circuit board. However, for the sake of convenience, these forces are simplified, and the leads 4a and 4b In the following description, it is assumed that only a force F that is downward (positive direction of the Z axis) is received.
As shown in FIG. 3A, when a downward force (positive Z-axis direction) F is applied to the tip of the lead 4a, the lead 4a has an X-axis with respect to the fixed end joined to the insulator 6. A bending moment A is generated so as to rotate the lead 4a around the center. On the other hand, as shown in FIG. 3B, when a downward force (positive Z-axis direction) F is applied to the tip of the lead 4b, the fixed end of the lead 4b joined to the insulator 6 is applied. In contrast, a bending moment A that rotates the lead 4b about the X axis is generated, and a torsion moment B that twists the lead 4b about the Y axis is generated. Thus, since the lead 4b is deformed by torsion in addition to bending, the bending at the tip thereof is larger than the lead 4a that only causes deformation by bending. In other words, even when the leads 4a and 4b are deformed as the printed circuit board bends and the amount of bending at the tips thereof is the same, the forces applied to the tips of the leads 4a and 4b are not the same. The force applied to the tip of the lead 4b is smaller than the force applied to the tip of the lead 4a. In this case, the stress generated in the joint portion of the lead 4b is smaller than the stress generated in the connection portion of the lead 4a. That is, even when the leads 4a and 4b are deformed so that the bending amounts of the respective tips become equal with the bending of the printed circuit board, the leads 4b are less likely to peel from the insulator 6 than the leads 4a. Note that this action is not limited to the case where only a single force F acts on the tips of the leads 4a and 4b as shown in FIG. 3, but the leads 4a and 4b are joined to the entire joint surface as the printed circuit board is bent. This is also the case when receiving a force from the printed circuit board over the entire area.

  As described above, in the optical communication semiconductor element housing package 1 having the above structure, the stress generated at the joint between the lead 4b and the insulator 6 due to the bending of the printed circuit board is formed in the crank shape of the lead 4b. It has the effect of being relaxed by the part. This makes it difficult for the lead 4b to be peeled off from the insulator 6. Further, in the optical communication semiconductor element housing package 1 of the present embodiment, the leads 4a and 4b are hardly peeled off from the insulator 6 by bonding such as brazing, and the reliability of the product is improved.

  By such an action, in the optical communication package 1 of this embodiment, even when the leads 4a and 4b are forcibly bent along with the bending of the printed circuit board, the narrow lead 4b can be prevented from being peeled off. Therefore, peeling of the leads 4a and 4b from the insulator 6 can be prevented and the reliability of the product can be improved.

Next, numerical analysis results regarding the stress generated at the joint between the leads 4a and 4b and the insulator 6 will be described with reference to FIGS. This analysis was performed using commercially available structural analysis software.
4 (a) and 4 (b) are perspective views of a numerical analysis model schematically showing a joint between a lead and an insulator and the periphery thereof in a conventional semiconductor device housing package for optical communication. FIGS. 5A and 5B are perspective views of a numerical analysis model schematically showing the joint between the lead and the insulator and the periphery thereof in the optical communication semiconductor element housing package of the present embodiment. (C) is a schematic diagram showing a crank shape of a lead. FIGS. 4B and 5B show a state where the printed circuit board is bent in FIGS. 4A and 5A, respectively.
As shown in FIGS. 4 and 5, in the numerical analysis models 11a and 11b according to the prior art and the semiconductor device housing package for optical communication of the present embodiment, the upper surfaces of the end portions of the leads 12a and 12b are bonded to the insulator 13, respectively. In addition, the entire lower surfaces of the leads 12 a and 12 b are bonded to the printed circuit board 14. In such numerical analysis models 11a and 11b, the movement in the XYZ directions is restricted with respect to the end surface 13a of the insulator 13 and the end surface 14a of the printed circuit board 14, respectively, and downward with respect to the edge 14b of the printed circuit board 14 ( A predetermined amount of displacement (1 mm) was applied to the positive direction of the Z axis), and the maximum stress generated at the joint between the leads 12a and 12b and the insulator 13 was determined by numerical analysis. The distance between the edge 14b of the printed circuit board 14 and the edge 13b of the insulator 13 is 5 mm.
In the numerical analysis model 11a shown in FIGS. 4A and 4B, the length of the lead 12a is 3.6 mm, and the width of the lead 12a is 0.3 mm. Also, in the numerical analysis model 11b shown in FIGS. 5A and 5B, the length of the lead 12b is 3.6 mm, the width of the lead 12b is 0.2 mm, and the bending shown in FIG. 5C is performed. The dimension d was set in the following seven ways. In addition, the length (pasting part length) of the part joined to the insulator 13 in the leads 12a and 12b is 0.6 mm. Further, setting the bending dimension d to 0 mm in the numerical analysis model 11b corresponds to setting the width of the lead 12a to 0.2 mm in the numerical analysis model 11a. The mechanical characteristics of the components of the numerical analysis models 11a and 11b are as shown in Table 1.

FIG. 6 shows the result of numerical analysis of the maximum stress generated at the joint between the leads 12a and 12b and the insulator 13 in the numerical analysis models 11a and 11b of FIGS. The horizontal axis is the bending dimension d (see FIG. 5C), and the vertical axis is the maximum stress generated at the joint between the leads 12a and 12b and the insulator 6. The vertical axis represents the relative value with the maximum stress when the bending dimension d of the lead 12b is 0 mm as 100%.
As shown in FIG. 6, the maximum stress generated at the joint between the lead 12a and the insulator 13 in the numerical analysis model 11a is the joint between the lead 12b and the insulator 13 when the bending dimension d is 0 mm in the numerical analysis model 11b. This is 86% of the maximum stress generated in the part. As already described, the result when the bending dimension d is 0 mm in the numerical analysis model 11b and the result when the lead 12a width is 0.2 mm in the numerical analysis model 11a are the same. That is, when the width of the lead 12a is 0.2 mm, the stress generated at the joint between the lead 12a and the insulator 13 is larger than when the width is 0.3 mm. Therefore, if the width of the lead 12a is narrow, it can be said that it is easy to peel from the insulator 13 when the printed circuit board 14 is bent.
On the other hand, in the numerical analysis model 11b, the maximum stress generated at the joint between the lead 12b and the insulator 13 decreases as the bending dimension d increases. When the bending dimension d is set to 0.35 mm, the result almost coincides with the result of the numerical analysis model 11a (the width of the lead 12a is 0.3 mm). In this case, the maximum stress at the joint between the lead 12b and the insulator 13 is substantially equal to the maximum stress at the joint between the lead 12a and the insulator 13 in the numerical analysis model 11a. This indicates that the stress generated in the joint portion of the lead 12b due to the bending of the printed circuit board 14 is relieved by the portion formed in the crank shape in the lead 12b.

  As described above, the inventions described in claims 1 and 2 are not limited to the optical communication semiconductor element housing package, but can be applied to any device having a terminal portion having a structure in which leads are joined to ceramic. Applicable.

(A) And (b) is the front view and back surface figure of the semiconductor element storage package for optical communications which concern on the best embodiment of this invention, respectively. (A) thru | or (c) is a figure which shows the modification of the semiconductor element storage package for optical communications of a present Example. (A) And (b) is the schematic diagram which expanded the junction part of a lead | read | reed and an insulator, and its periphery in the semiconductor element storage package for optical communications of a present Example. (A) And (b) is the perspective view of the model for numerical analysis which showed typically the junction part of a lead | read | reed and insulator and its periphery in the semiconductor element storage package for optical communication of a prior art. (A) And (b) is the perspective view of the model for numerical analysis which showed typically the junction part of a lead and an insulator in the semiconductor element storage package for optical communications of this example, and its circumference, and (c). It is a schematic diagram which shows the crank shape of a lead | read | reed. It is the result of having calculated | required the maximum stress which generate | occur | produces in the junction part of a lead | read | reed and an insulator in the numerical analysis model of FIG.4 and FIG.5 by numerical analysis. (A) And (b) is a front view and a back view of a surface mount type semiconductor device housing package for optical communication according to the prior art, respectively.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Optical element semiconductor package 2 ... Base | substrate 2a ... Edge part 3 ... Heat sink 4a, 4b ... Lead 5 ... Terminal part 6 ... Insulator 7 ... Cable 8 ... KV ring 9 ... Cover 10 ... Notch part 11a , 11b ... Numerical analysis model 12a, 12b ... Lead 13 ... Insulator 13a ... End face 13b ... End edge 14 ... Printed circuit board 14a ... End face 14b ... End edge 51 ... Optical communication package 52 ... Base 53 ... Heat sink 54a, 54b ... Lead 55 ... Terminal part 56 ... Insulator 57 ... Cable 58 ... KV ring 59 ... Lid 60 ... Notch part d ... Bending dimension

Claims (2)

  In an optical communication semiconductor element storage package in which a cavity for storing an optical communication semiconductor element is provided, an abbreviation in which a through hole for passing an optical signal is formed on the front surface and a notch is provided on the bottom surface. A box-shaped metal base, a conductor wiring pattern that is electrically connected to the semiconductor element and exposes a part of the cutout, and the conductor wiring pattern is installed in the cavity so as to be insulated from the base. A ceramic insulator, and a lead having one end joined to the insulator and electrically connected to the conductor so as to be electrically connected to the conductor wiring pattern exposed from the notch, and extending from the edge of the base to the outside And a lead extending from the edge of the base is formed in a substantially crank shape in plan view. 2. The semiconductor element storage package for optical communication according to claim 1, wherein one end of the lead is joined to the insulator by brazing.