JP2009075298A - Electrooptical device, driving circuit, driving method and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress a current magnitude flowing through a common electrode voltage supply circuit 30 when switching a voltage of a common electrode. <P>SOLUTION: Each pixel 110 includes a liquid crystal element of which one end is connected to a pixel electrode and the other end is connected to a common electrode 108. A scanning line driving circuit 140 applies selection voltages to scanning lines 112 of the first to 320'th rows in order. A common electrode voltage supply circuit 30, when a selection voltage is applied to a scanning line, supplies a common signal Vcom of either lower side voltage or higher side voltage to the common electrode 108 and, at the same time, switches the common signal while stepwise being changed from either one side of the lower side voltage or the higher side voltage to another side in a feedback period when no selection voltage is applied. A data line driving circuit 150 supplies a data signal of a polarity according to the voltage applied to the common electrode 108 that is a voltage in accordance with a gradation of the pixel via a data line 114 to the pixel 110 corresponding to the scanning line to which the selection voltage is applied. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

The present invention relates to a technique for switching a voltage applied to a common electrode facing a pixel electrode in an electro-optical device.

In an electro-optical device such as a liquid crystal, a liquid crystal element having a liquid crystal sandwiched between a pixel electrode and a common electrode (counter electrode) is provided corresponding to the intersection of a scanning line and a data line. The liquid crystal element is AC-driven. In order to reduce power consumption by suppressing the voltage amplitude of the data line, there is a technology for alternately switching the voltage of the common electrode between a low voltage and a high voltage when a selection voltage is applied to the scanning line. It has been proposed (see, for example, Patent Document 1).
JP 2007-101570 A

However, in such a technology, a circuit that generates a voltage signal to be applied to the common electrode flows a relatively large current when the voltage is switched. Therefore, the circuit is designed on the assumption that such a large current flows. There was a situation that had to be.
The present invention has been made in view of such circumstances, and one of its purposes is to suppress the magnitude of current in a circuit that generates a voltage signal to the common electrode when switching the voltage of the common electrode. It is to provide a technology that can.

In order to achieve the above object, the present invention is provided corresponding to the intersection of a plurality of scanning lines and a plurality of data lines, each having one end connected to the data line and a selection voltage applied to the scanning line. Between a pixel switching element that is in a conductive state between one end and the other end when a voltage is applied, a pixel electrode connected to the other end of the pixel switching element, and a common electrode to which a common signal is applied A scanning line driving circuit for applying the selection voltage in a predetermined order to the plurality of scanning lines, the driving circuit of an electro-optical device having a pixel including a liquid crystal arranged and having a gradation corresponding to a holding voltage And a common that supplies the common signal with a low voltage or a high voltage to the common electrode when a selection voltage is applied to any one of the plurality of scanning lines. Electrode voltage supply circuit , For a pixel corresponding to the scanning line to which the selection voltage is applied, a voltage corresponding to the gradation of the pixel and a data signal having a polarity corresponding to the voltage applied to the common electrode is applied to the data line. A common line voltage supply circuit, and the common electrode voltage supply circuit supplies the common signal to either the low-order side voltage or the high-order side voltage from one to the other at a predetermined cycle. Switching is performed via a voltage between the high-side voltages. According to the present invention, voltage switching is performed in a plurality of times, so that it is possible to suppress the magnitude of the current flowing through the common electrode voltage supply circuit.

In the present invention, the common electrode voltage supply circuit generates the lower voltage and the higher voltage based on a voltage from a single power source, and is a voltage between the lower voltage and the higher voltage. A configuration using a voltage from the single power source is preferable. According to this configuration, since it is not necessary to separately generate a voltage used for voltage switching, the configuration can be simplified.
The present invention can be conceptualized not only as a drive circuit for an electro-optical device, but also as an electro-optical device, a method for driving the electro-optical device, and an electronic apparatus having the electro-optical device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the electro-optical device according to the first embodiment of the invention.
As shown in this figure, the electro-optical device 10 has a display area 100, and around the display area 100, a control circuit 20, a common electrode voltage supply circuit 30, a scanning line driving circuit 140 and a data line driving circuit. 150 is arranged.

The display area 100 is an area in which the pixels 110 are arranged. In this embodiment, 320 rows of scanning lines 112 extend in the row (X) direction, and 240 data lines 114 are arranged in columns (Y
) To extend in the direction. The pixels 110 are arranged corresponding to the intersections between the scanning lines 112 in the first to 320th rows and the data lines 114 in the first to 240th columns. Therefore, in the present embodiment, the pixels 110 are arranged in a matrix of 320 vertical rows × 240 horizontal columns in the display region 100, but the present invention is not limited to this arrangement.
In this embodiment, the common electrode 108 is supplied with the common signal Vcom from the common electrode voltage supply circuit 30 and is shared by all the pixels 110.

A detailed configuration of the pixel 110 will be described. FIG. 2 is a diagram illustrating a configuration of the pixel 110, and is adjacent to the i row and the (i + 1) row adjacent thereto in the downward direction, and the j column and the column adjacent thereto in the right direction (
The configuration of a total of 4 pixels of 2 × 2 corresponding to the intersection with the j + 1) column is shown.
Here, i and (i + 1) are symbols for generally indicating the row in which the pixels 110 are arranged, and both are integers of 1 to 320. Further, j and (j + 1) are symbols for generally indicating a column in which the pixels 110 are arranged, and both are integers of 1 to 240.

As shown in FIG. 2, each pixel 110 includes an n-channel thin film transistor (hereinafter simply referred to as “TFT”) 1 that functions as a pixel switching element.
16, a liquid crystal element 120, and a storage capacitor 130. Since each pixel 110 has the same configuration in this embodiment, a description will be given by representatively assuming that it is located in i row and j column. In the pixel 110 in i row and j column, the gate electrode of the TFT 116 scans the i row. While being connected to the line 112, its source electrode is connected to the data line 114 in the j-th column, and its drain electrode is connected to the pixel electrode 118.

The common electrode 108 is provided so as to face all the pixel electrodes 118, and sandwiches the liquid crystal 105 between the pixel electrodes 118. Therefore, a liquid crystal element 120 including the pixel electrode 118, the common electrode 108, and the liquid crystal 105 is configured for each pixel.
In the present embodiment, when the liquid crystal element 120 is of a transmissive type, the transmittance of light passing between the pixel electrode 118 and the common electrode 108 is zero if the effective value of the voltage held in the liquid crystal element is zero. For example, a normally black mode in which the transmittance increases and becomes brighter as the effective value becomes larger is set. For this reason, the light irradiated by the backlight unit (not shown) is emitted at a ratio corresponding to the effective value of the voltage held in the liquid crystal element 120 for each pixel.
In addition, in order to suppress a decrease in the voltage held in the liquid crystal element 120 due to off-leakage of the TFT 116, a storage capacitor 130 is formed for each pixel. One end of the storage capacitor 130 is connected to the pixel electrode 118 (the drain of the TFT 116), and the other end is connected to the common electrode 108.

Returning to FIG. 1 again, the control circuit 20 outputs various control signals to control each part of the common electrode voltage supply circuit 30, the scanning line driving circuit 140, and the data line driving circuit 150, respectively.
The scanning line driving circuit 140 scans the scanning signals Y1, Y2, Y3,.
Y320 is supplied to the scanning lines 112 in the first, second, third,. Specifically, as shown in FIG. 4, the scanning line driving circuit 140 scans the scanning line 1 in one frame period.
12 are selected for each horizontal scanning period H in the order of 1, 2, 3,..., 320th line, counting from the top in FIG. 1 for each row, and the scanning signal to the selected scanning line is selected in the horizontal effective period Ha. A selection voltage Vgh corresponding to the H level is set, and a scanning signal to the other scanning lines is set to a non-selection voltage Vgl corresponding to the L level.
In the present embodiment, one frame refers to a period required to display one image. As shown in FIG. 4, the first scanning line is selected and the 320th scanning line is selected. The vertical effective scanning period Fa until the selection is made, and the vertical blanking period Fb excluding the vertical scanning period Fa
And divided.

The data line driving circuit 150 is a voltage corresponding to the gray level of the pixel 110 positioned on the scanning line 112 to which the selection voltage is applied by the scanning line driving circuit 140, and the polarity designation signal P
A data signal having a voltage corresponding to the writing polarity designated by ol is supplied to the data line 114.
The data line driving circuit 150 has storage areas (not shown) corresponding to a pixel matrix arrangement of 320 rows × 240 columns, and each storage area has a gradation value (brightness) of the corresponding pixel 110. Display data Da for designating) is stored. Here, immediately before the selection voltage is applied to a certain scanning line 112, the data line driving circuit 150 reads the display data Da of the pixel 110 located on the scanning line 112 from the storage area, and uses the read display data. The voltage is converted into a voltage according to the designated gradation and writing polarity, and supplied to the data line 114 as a data signal in accordance with the timing at which the selection voltage is applied. The data line driving circuit 150 executes this supply operation for each of the 1 to 240 columns positioned on the selected scanning line 112.
Note that the display data Da stored in the storage area is rewritten when the display contents are changed and the display data Da after the change is supplied together with the write address from an external upper circuit (not shown).
In addition, when the decimal value of the value designated by the display data Da is “0”, black of the lowest gradation is designated, and thereafter, the bright gradation is designated as the decimal value increases. Since the form is a normally black mode, the effective voltage value held in the liquid crystal element 120 has a relationship that increases as the value specified by the display data Da increases.

The polarity designation signal Pol is a signal that designates the writing polarity for the liquid crystal element 120. If the polarity designation signal Pol is at the H level, the polarity designation signal Pol designates the positive polarity writing that causes the potential of the pixel electrode 118 to be higher than the common electrode 108. In the case of the level, negative-polarity writing in which the potential of the pixel electrode 118 is lower than that of the common electrode 108 is designated.
In this embodiment, as shown in FIG. 4, the polarity designation signal Pol is a certain frame (“n
In the horizontal scanning period H in which the odd-numbered (1, 3, 5,..., 319) -th scanning line is selected in the period of “frame”), the even-numbered (2, 4, 6,. ) L level in the horizontal scanning period H in which the scanning line in the row is selected. For this reason, in the present embodiment, a row inversion (also referred to as line inversion or scanning line inversion) method in which the polarity of writing to pixels is inverted for each row.
The polarity designation signal Pol is logically inverted when compared in the same row in the next frame (denoted as “(n + 1) frame”). The reason for inverting the write polarity in this way is that of the DC component. This is to prevent deterioration of the liquid crystal 105 due to application.

Next, the common electrode voltage supply circuit 30 will be described. FIG. 3 is a block diagram showing a configuration of the common electrode voltage supply circuit 30.
In this figure, the voltage generating circuit 32 is a voltage 2 boosted to the positive side by a charge pump circuit or the like twice from a single power source 31 having a negative electrode as a reference potential Gnd and a positive electrode as a voltage Vdd.
Vdd and a voltage -Vdd stepped down to the negative side are generated.
The voltage generation circuit 33 generates a voltage VcomH that is higher than the voltage Vdd and lower than the voltage 2Vdd using the voltage 2Vdd as a power source. The voltage generation circuit 34 uses the voltage −Vdd as a power source, and the voltage −V
A voltage VcomL higher than dd and lower than the potential Gnd is generated.

The switches 35, 36, and 37 are all double throw type. Among these, in the switch 35, the voltage VcomH is applied to the input terminal a, and the voltage Vdd is applied to the input terminal b.
The output terminal c is connected to the input terminal a of the switch 37. In the switch 36, the input terminal a is kept at the potential Gnd, the voltage -Vdd is applied to the input terminal b, while the output terminal c.
Is connected to the input terminal b of the switch 37. The output terminal c of the switch 37 is the output terminal of the common electrode voltage supply circuit 30, and the common signal Vcom is output from the output terminal c.

In such a common electrode voltage supply circuit 30, switches 35, 3 are controlled by the control circuit 20.
6 and 37 are controlled as follows.
That is, in the common electrode voltage supply circuit 30, as shown in FIG.
Of the horizontal scanning period H in which ol is set to L level and negative polarity writing is specified, the horizontal scanning effective period Ha is in the state a, and the horizontal scanning blanking period Hb is in the state a, state b, state c, state In the horizontal scanning period H in which the polarity designation signal Pol is H level and the positive polarity writing is designated while changing in the order of d, the horizontal scanning effective period Ha is in the state d and the horizontal scanning blanking period Hb.
Then, the state changes in the order of state d, state c, state b, and state a.

Here, selection of the switches 35, 36, and 37 in the states a, b, c, and d is shown in (a), (b), (c), and (d) in FIG. Specifically, in the state a, the switch 35 is controlled to select the input terminal a, and the switch 37 is controlled to select the input terminal a, so the common signal Vcom becomes the voltage VcomH. In state b, switch 35 is connected to input terminal b.
Since the switch 37 is controlled to select the input terminal a, the common signal Vcom becomes the voltage Vdd. In the state c, since the switch 36 is controlled to select the input terminal a and the switch 37 is selected to select the input terminal b, the common signal Vcom becomes the potential Gnd. In the state d, since the switch 36 is controlled to select the input terminal b and the switch 37 is selected to select the input terminal b, the common signal Vcom becomes the voltage VcomL.

Therefore, as shown in FIG. 4, the common signal Vcom becomes the voltage VcomH in the horizontal scanning effective period Ha in the horizontal scanning period H in which the polarity designation signal Pol is at L level and negative polarity writing is designated. In the horizontal scanning blanking period Hb, the voltages VcomH, Vdd, potential Gnd, voltage Vc
On the other hand, in the horizontal scanning period H in which the polarity designation signal Pol becomes H level and the positive writing is designated while changing in a staircase (step) order in the order of omL, the voltage Vcom is in the horizontal scanning effective period Ha.
In the horizontal scanning blanking period Hb, the voltage VcomL, the potential Gnd, the voltages Vdd, and VcomH change stepwise in the order.

Next, the operation of the electro-optical device 10 according to this embodiment will be described.
As described above, in the present embodiment, the first scanning line 112 is first selected in n frames. In the horizontal scanning period H in which the scanning line 112 of the first row is selected, the scanning signal Y1 becomes the voltage Vgh corresponding to the H level over the horizontal scanning effective period Ha. Further, since the positive polarity writing is designated in the odd-numbered row in the n frame, the common signal Vcom becomes the voltage VcomL in the horizontal effective scanning period Ha in which the scanning signal Y1 is at the H level. Further, when the scanning signal Y1 becomes H level in the n frame, the data line driving circuit 150 is in the first row and 1
2, 3,..., 240 data signals X 1, X 2, X 3,.
, 240 are supplied to the data lines 114 in 240 columns. Thus, for example, the data signal Xj supplied to the data line 114 in the j-th column becomes higher than the voltage VcomL as the gradation value specified by the display data Da of the pixel 110 in the first row and j-column increases. Voltage.
When the scanning signal Y1 becomes the H level, the TFT 11 in the pixels in the first row and the first column to the first row and the 240th column.
6 are turned on, the data signals X1, X2, X3,.
240 is applied.
Therefore, the parallel capacitance of the liquid crystal element 120 and the storage capacitor 130 in the 1st row and the 1st column to the 1st row and the 240th column has a positive polarity corresponding to the voltage difference between the voltage of the data signal and the voltage VcomL of the common signal Vcom, that is, the gradation value. Will be written.

Subsequently, in the horizontal scanning period H in which the scanning line 112 of the first row is selected, the horizontal blanking period Hb
And the scanning signal Y1 becomes L level. Since the positive writing is designated in the horizontal scanning period H in which the first scanning line is selected in the n frame, the common signal Vcom is used in the horizontal scanning blanking period Hb immediately after the scanning signal Y1 becomes L level. Changes stepwise in the order of voltage VcomL, potential Gnd, voltages Vdd, and VcomH in the horizontal scanning blanking period Hb.
On the other hand, when the scanning signal Y1 becomes the L level, the TF in the pixels in the first row and the first column to the first row and the 240th column is displayed.
Since T116 is turned off, the pixel electrode 118 is in a floating state in each pixel 110 in the first row and first column to the first row and 240th column. For this reason, the pixel electrodes 118 in the first row and the first column to the first row and the 240th column change in the same direction and in the same amount with respect to the voltage change of the common electrode 108, so that the written differential voltage is not affected.

Next, in the n frame, the second scanning line 112 is selected. Second scanning line 11
In the horizontal scanning period H in which 2 is selected, the scanning signal Y2 becomes H level over the horizontal scanning effective period Ha. In addition, since negative-polarity writing is specified for even-numbered rows in the n frame, the common signal Vcom has the voltage Vco during the horizontal effective scanning period Ha in which the scanning signal Y2 is at the H level.
Maintain mH.
Further, when the scanning signal Y2 becomes H level, the data line driving circuit 150 sets the voltage to the voltage specified by the display data Da of the pixels in the second row and the first, second, third,. Vc
.., X240 are supplied to the data lines 114 of 1, 2, 3,..., 240 columns, respectively. Thus, for example, the data signal Xj supplied to the data line 114 in the j-th column is the display data Da of the pixel 110 in the second row and j-th column.
As the gradation value specified in (2) increases, the voltage becomes lower than the voltage VcomH.
When the scanning signal Y2 becomes H level, the TFT 11 in the pixel of 2 rows 1 column to 2 rows 240 columns
6 are turned on, the data signals X1, X2, X3,.
240 is applied.
Therefore, the parallel capacitance of the liquid crystal element 120 and the storage capacitor 130 in the 2nd row and the 1st column to the 2nd row and 240th column has a negative voltage corresponding to the voltage difference between the voltage of the data signal and the voltage VcomH of the common signal Vcom, that is, the gradation value. Will be written.

Subsequently, in the horizontal scanning period H in which the second scanning line 112 is selected, the horizontal blanking period Hb
And the scanning signal Y2 becomes L level. Since the negative polarity writing is designated in the horizontal scanning period H in which the second scanning line is selected in the n frame, the common signal Vcom in the horizontal scanning blanking period Hb immediately after the scanning signal Y2 becomes L level. Changes stepwise in the order of voltages VcomH, Vdd, potential Gnd, and voltage VcomL in the horizontal scanning blanking period Hb.
On the other hand, when the scanning signal Y2 becomes L level, the TF in the pixels of 2 rows 1 column to 2 rows 240 columns is displayed.
Since T116 is turned off, the pixel electrode 118 is in a floating state in each of the pixels 110 in the 2nd row and the 1st column to the 2nd row and the 240th column. For this reason, the pixel electrodes 118 in the 2nd row and the 1st column to the 2nd row and the 240th column change in the same direction in the same direction with respect to the voltage change of the common electrode 108, and thus do not affect the written differential voltage.

In the n-th frame, the same operation is repeated thereafter, and the positive voltage corresponding to the gradation value is written and held in the odd-numbered row, and the negative voltage corresponding to the gradation value is written in the even-numbered row. Held. The same operation is repeated in the next (n + 1) frame. However, since the logic level of the polarity designation signal Pol is inverted, a negative voltage corresponding to the gradation value is written and held in the odd-numbered row, and even In the row, a positive voltage corresponding to the gradation value is written and held.

FIG. 6 is a diagram illustrating the voltage waveform of the data signal Xj supplied to the j-th data line 114 in relation to the scanning signals Yi and Y (i + 1).
In the horizontal scanning period H in which the i-th scanning line is selected, when the polarity designation signal Pol is L level and negative polarity writing is designated, the horizontal scanning period Ha in which the scanning signal Yi is H level.
Then, the common signal Vcom supplied to the common electrode 108 becomes the voltage VcomH. A data signal Xj having a voltage (indicated by ↓ in FIG. 6) lower than the voltage VcomH by a voltage corresponding to the gradation of the pixel in i row and j column is supplied to the data line 114 in the j column. The Thereby, in the parallel capacitance of the liquid crystal element 120 and the storage capacitor 130 in the i row and j column, the voltage difference between the voltage of the data signal Xj and the voltage VcomH of the common electrode 108, that is, the negative voltage corresponding to the gradation is written. Will be.

In the horizontal scanning period H in which the next (i + 1) -th scanning line is selected, the polarity designation signal Pol is logically inverted to become H level, and positive writing is designated, so that the scanning signal Y (i + 1) is H. In the horizontal scanning period Ha when the level is reached, the common signal Vcom becomes the voltage VcomL. Data line 1 of the jth column
14 is supplied with a data signal Xj having a higher voltage (indicated by ↑ in FIG. 6) than the voltage VcomL by a voltage corresponding to the gradation of the pixel in (i + 1) rows and j columns. This allows (
i + 1) In the parallel capacitor of the liquid crystal element 120 and the storage capacitor 130 in the row j column, a voltage difference between the voltage of the data signal Xj and the voltage VcomL of the common electrode 108, that is, a positive voltage corresponding to the gradation is written. become.

According to the present embodiment, in the horizontal scanning effective period Ha in which negative polarity writing is specified, the common electrode 108 is at a relatively high voltage VcomH, and is lower than this voltage by a voltage corresponding to the gradation. In the horizontal scanning effective period Ha in which positive writing is specified, the common electrode 108 is at a relatively lower voltage VcomL and corresponds to the gray level than this voltage. A voltage higher by the voltage is supplied as a data signal.
Therefore, the voltage amplitude of the data signal is narrower than that in the case where the voltage of the common electrode 108 is constant, so that the withstand voltage required for the data line driving circuit 150 can be kept low, and the configuration can be simplified correspondingly. In addition, it is possible to reduce power that is wasted due to voltage changes.

Further, in the present embodiment, the common signal Vcom supplied to the common electrode 108 is the voltage VcomH when negative polarity writing is specified, and the voltage VcomL when positive polarity writing is specified. It is. In this embodiment, the voltage is switched stepwise from the voltage VcomH to the voltage VcomL in the order of VcomH → Vdd → potential Gnd → VcomL.
The voltage VcomH from comL is also stepwise in the order of VcomL → potential Gnd → Vdd → VcomH.
Thereby, in this embodiment, compared with the configuration in which one of the voltages VcomH and VcomL is switched from one to the other, the amount of current change associated with the voltage switching can be small, so that the circuit design in the common electrode voltage supply circuit 30 Can be facilitated.

This point will be described in detail. As shown in FIG. 7B, in the conventional configuration in which one of the voltages VcomH and VcomL is switched at one time, the amount of voltage change on the output side increases, In the current Id flowing from the power supply 31 to the voltage generation circuit 32, the maximum value Imax of the change amount due to voltage switching becomes large. For this reason, each part in the voltage generation circuit 32 needs to be designed so as to correspond to the increased maximum value Imax.
On the other hand, in this embodiment, as shown in FIG. 7A, one of the voltages VcomH and VcomL is switched from one to the other in a stepped manner to the voltage Vdd and the voltage zero (potential Gnd). Therefore, the amount of voltage change on the output side is reduced, and the maximum value Imax of the amount of change in current Id accompanying voltage switching is reduced. For this reason, each part in the voltage generation circuit 32 is only required to correspond to the reduced maximum value Imax, which facilitates circuit design.

Furthermore, in this embodiment, the voltage at the time of switching in a staircase pattern is not separately generated, but is the voltage (potential) of the single power supply 31 used when generating the voltages Vcom H and VcomL.
Since the switches 35 and 36 are substantially required, a simple configuration is sufficient.

In the above-described embodiment, when the liquid crystal element 120 is AC-driven, the row inversion method in which the writing polarity is inverted for each row is used. (It is also called inversion).
In the case of the frame inversion method, as shown in FIG. 8, when the polarity designation signal Pol becomes H level over the whole area of n frames and designates positive polarity writing, the whole area of the next (n + 1) frames. The negative polarity writing is designated over the L level.
At this time, the common electrode voltage supply circuit 30 applies the common signal Vcom to the voltage VcomL → zero (Gnd) → Vdd → VcomH in the vertical scanning blanking period Fb in the frame period in which positive writing is designated. On the other hand, the voltage VcomH → Vdd → zero (Gnd) in the vertical scanning blanking period Fb in the frame period in which negative polarity writing is designated.
) → VcomL may be configured to be switched step by step.

Further, in the embodiment, the common electrode 108 is shared for all the pixels 110, but the common electrode is shared for every predetermined row of the scanning line, for example, every row, and the voltage is applied outside the selection voltage application period of the scanning line. It is good also as a structure which switches to step shape.
Further, in the embodiment, the liquid crystal element 120 is in the normally black mode, but may be in a normally white mode in which a bright state is obtained when no voltage is applied. R (
Red), G (green), and B (blue) may constitute one dot to perform color display, and another color (for example, emerald green (Eg)) may be added. These four color pixels may constitute one dot to improve the color reproducibility.

<Electronic equipment>
Next, an example of an electronic apparatus having the electro-optical device 10 according to the above-described embodiment as a display device will be described.
FIG. 9 is a diagram illustrating a configuration of a mobile phone 1200 using the electro-optical device 10 according to the embodiment. As shown in this figure, the mobile phone 1200 includes the electro-optical device 10 described above, together with a plurality of operation buttons 1202, an earpiece 1204 and a mouthpiece 1206.
As an electronic apparatus to which the electro-optical device 10 is applied, in addition to the mobile phone shown in FIG. 9, a digital still camera, a notebook computer, a liquid crystal television, a video recorder, a car navigation device, a pager, an electronic notebook, a calculator , A word processor, a workstation, a video phone, a POS terminal, a touch panel, and the like. Needless to say, the electro-optical device 10 described above can be applied as a display device of these various electronic devices.

1 is a block diagram illustrating a configuration of an electro-optical device according to an embodiment of the invention. FIG. It is a figure which shows the structure of the pixel in the said electro-optical apparatus. It is a figure which shows the structure of the counter electrode voltage supply circuit of the said electro-optical apparatus. 6 is a timing chart showing the operation of the electro-optical device. It is a figure which shows operation | movement of the counter electrode voltage supply circuit of the said electro-optical apparatus. It is a figure which shows the voltage waveform example of the data signal in the said electro-optical apparatus. It is a figure which shows the magnitude | size of the inrush current in the said counter electrode voltage supply circuit. 6 is a timing chart showing another operation of the electro-optical device. It is a figure which shows the structure of the mobile telephone to which the same electro-optical apparatus is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Electro-optical apparatus, 20 ... Control circuit, 30 ... Common electrode voltage supply circuit, 32 ... Voltage generation circuit, 35-37 ... Switch, 100 ... Display area, 108 ... Common electrode, 110 ... Pixel,
DESCRIPTION OF SYMBOLS 112 ... Scanning line, 114 ... Data line, 116 ... TFT, 120 ... Liquid crystal element, 130 ... Storage capacity, 140 ... Scanning line drive circuit, 150 ... Data line drive circuit, 1200 ... Mobile phone

Claims (5)

Provided corresponding to the intersection of a plurality of scanning lines and a plurality of data lines,
A pixel switching element having one end connected to the data line and a conductive state between the one end and the other end when a selection voltage is applied to the scanning line;
A liquid crystal that is arranged between a pixel electrode connected to the other end of the pixel switching element and a common electrode to which a common signal is applied, and has a gradation according to a holding voltage;
A drive circuit for an electro-optical device having a pixel including:
A scanning line driving circuit for applying the selection voltage to the plurality of scanning lines in a predetermined order;
A common electrode voltage that supplies the common signal at a low-side voltage or a high-side voltage to the common electrode when a selection voltage is applied to any one of the plurality of scanning lines. A supply circuit;
For the pixel electrode corresponding to the scanning line to which the selection voltage is applied, a data signal having a voltage corresponding to the gradation of the pixel and having a polarity corresponding to the voltage applied to the common electrode is supplied to the data line. A data line driving circuit supplied via
Comprising
The common electrode voltage supply circuit switches the common signal from one of the lower voltage and the higher voltage to the other at a predetermined cycle via a voltage between the lower voltage and the higher voltage. A drive circuit for an electro-optical device. The common electrode voltage supply circuit is
The low-order side voltage and the high-order side voltage are generated based on a voltage from a single power supply, and the voltage from the single power supply is used as a voltage between the low-order side voltage and the high-order side voltage. The drive circuit for the electro-optical device according to claim 1. Provided corresponding to the intersection of a plurality of scanning lines and a plurality of data lines,
A pixel switching element having one end connected to the data line and a conductive state between the one end and the other end when a selection voltage is applied to the scanning line;
A liquid crystal that is arranged between a pixel electrode connected to the other end of the pixel switching element and a common electrode to which a common signal is applied, and has a gradation according to a holding voltage;
A method for driving an electro-optical device having a pixel including:
Applying the selection voltage to the plurality of scanning lines in a predetermined order;
When a selection voltage is applied to any one of the plurality of scanning lines, the common signal is supplied to the common electrode with either a low-side voltage or a high-side voltage, and the common The signal is switched at a predetermined cycle from either the low voltage or the high voltage to the other via the voltage between the low voltage and the high voltage,
For the pixel electrode corresponding to the scanning line to which the selection voltage is applied, a data signal having a voltage corresponding to the gradation of the pixel and having a polarity corresponding to the voltage applied to the common electrode is transmitted via the data line. And supplying the electro-optical device. Provided corresponding to the intersection of a plurality of scanning lines and a plurality of data lines,
A pixel switching element having one end connected to the data line and a conductive state between the one end and the other end when a selection voltage is applied to the scanning line;
A liquid crystal that is arranged between a pixel electrode connected to the other end of the pixel switching element and a common electrode to which a common signal is applied, and has a gradation according to a holding voltage;
A pixel containing
A scanning line driving circuit for applying the selection voltage to the plurality of scanning lines in a predetermined order;
A common electrode voltage that supplies the common signal at a low-side voltage or a high-side voltage to the common electrode when a selection voltage is applied to any one of the plurality of scanning lines. A supply circuit;
For a pixel corresponding to the scanning line to which the selection voltage is applied, a data signal having a voltage corresponding to the gradation of the pixel and having a polarity corresponding to the voltage applied to the common electrode is transmitted via the data line. A data line driving circuit to be supplied
Comprising
The common electrode voltage supply circuit switches the common signal from one of the lower voltage and the higher voltage to the other at a predetermined cycle via a voltage between the lower voltage and the higher voltage. Electro-optical device characterized.   An electronic apparatus comprising the electro-optical device according to claim 4.

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