JP2008529275A5 - - Google Patents

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Publication number
JP2008529275A5
JP2008529275A5 JP2007552132A JP2007552132A JP2008529275A5 JP 2008529275 A5 JP2008529275 A5 JP 2008529275A5 JP 2007552132 A JP2007552132 A JP 2007552132A JP 2007552132 A JP2007552132 A JP 2007552132A JP 2008529275 A5 JP2008529275 A5 JP 2008529275A5
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JP
Japan
Prior art keywords
insulating layer
forming
layer
semiconductor substrate
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007552132A
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English (en)
Japanese (ja)
Other versions
JP2008529275A (ja
JP5354907B2 (ja
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Publication date
Priority claimed from US11/043,827 external-priority patent/US7338894B2/en
Application filed filed Critical
Publication of JP2008529275A publication Critical patent/JP2008529275A/ja
Publication of JP2008529275A5 publication Critical patent/JP2008529275A5/ja
Application granted granted Critical
Publication of JP5354907B2 publication Critical patent/JP5354907B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2007552132A 2005-01-26 2005-12-16 窒化酸化物層を有する半導体デバイスおよびこのための方法 Expired - Fee Related JP5354907B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/043,827 US7338894B2 (en) 2005-01-26 2005-01-26 Semiconductor device having nitridated oxide layer and method therefor
US11/043,827 2005-01-26
PCT/US2005/045731 WO2006081005A2 (en) 2005-01-26 2005-12-16 Semiconductor device having nitridated oxide layer and method therefor

Publications (3)

Publication Number Publication Date
JP2008529275A JP2008529275A (ja) 2008-07-31
JP2008529275A5 true JP2008529275A5 (enExample) 2009-02-12
JP5354907B2 JP5354907B2 (ja) 2013-11-27

Family

ID=36697413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007552132A Expired - Fee Related JP5354907B2 (ja) 2005-01-26 2005-12-16 窒化酸化物層を有する半導体デバイスおよびこのための方法

Country Status (5)

Country Link
US (2) US7338894B2 (enExample)
JP (1) JP5354907B2 (enExample)
CN (1) CN100541740C (enExample)
TW (1) TWI377649B (enExample)
WO (1) WO2006081005A2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7361567B2 (en) * 2005-01-26 2008-04-22 Freescale Semiconductor, Inc. Non-volatile nanocrystal memory and method therefor
KR100683854B1 (ko) * 2005-09-06 2007-02-15 삼성전자주식회사 비휘발성 기억 소자의 형성 방법
US7705385B2 (en) * 2005-09-12 2010-04-27 International Business Machines Corporation Selective deposition of germanium spacers on nitride
US20090061608A1 (en) * 2007-08-29 2009-03-05 Merchant Tushar P Method of forming a semiconductor device having a silicon dioxide layer
KR102317763B1 (ko) * 2009-11-06 2021-10-27 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940006094B1 (ko) * 1989-08-17 1994-07-06 삼성전자 주식회사 불휘발성 반도체 기억장치 및 그 제조방법
TW587252B (en) * 2000-01-18 2004-05-11 Hitachi Ltd Semiconductor memory device and data processing device
US6320784B1 (en) * 2000-03-14 2001-11-20 Motorola, Inc. Memory cell and method for programming thereof
US6413819B1 (en) * 2000-06-16 2002-07-02 Motorola, Inc. Memory device and method for using prefabricated isolated storage elements
US6297095B1 (en) * 2000-06-16 2001-10-02 Motorola, Inc. Memory device that includes passivated nanoclusters and method for manufacture
US6444545B1 (en) * 2000-12-19 2002-09-03 Motorola, Inc. Device structure for storing charge and method therefore
JP3580781B2 (ja) * 2001-03-28 2004-10-27 株式会社東芝 半導体記憶素子
US6713127B2 (en) * 2001-12-28 2004-03-30 Applied Materials, Inc. Methods for silicon oxide and oxynitride deposition using single wafer low pressure CVD
US6657894B2 (en) * 2002-03-29 2003-12-02 Macronix International Co., Ltd, Apparatus and method for programming virtual ground nonvolatile memory cell array without disturbing adjacent cells
JP3776889B2 (ja) * 2003-02-07 2006-05-17 株式会社東芝 半導体装置およびその製造方法
US7033956B1 (en) * 2004-11-01 2006-04-25 Promos Technologies, Inc. Semiconductor memory devices and methods for making the same
US20060110883A1 (en) * 2004-11-23 2006-05-25 Intel Corporation Method for forming a memory device
US7361567B2 (en) * 2005-01-26 2008-04-22 Freescale Semiconductor, Inc. Non-volatile nanocrystal memory and method therefor

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