JP2008527603A5 - - Google Patents

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Publication number
JP2008527603A5
JP2008527603A5 JP2007550375A JP2007550375A JP2008527603A5 JP 2008527603 A5 JP2008527603 A5 JP 2008527603A5 JP 2007550375 A JP2007550375 A JP 2007550375A JP 2007550375 A JP2007550375 A JP 2007550375A JP 2008527603 A5 JP2008527603 A5 JP 2008527603A5
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JP
Japan
Prior art keywords
current path
storage node
transistor
preliminary
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007550375A
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English (en)
Japanese (ja)
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JP5114209B2 (ja
JP2008527603A (ja
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Publication date
Priority claimed from US11/033,934 external-priority patent/US7161827B2/en
Application filed filed Critical
Publication of JP2008527603A publication Critical patent/JP2008527603A/ja
Publication of JP2008527603A5 publication Critical patent/JP2008527603A5/ja
Application granted granted Critical
Publication of JP5114209B2 publication Critical patent/JP5114209B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2007550375A 2005-01-12 2005-12-14 セル安定性を改善したｓｒａｍ及びその方法 Expired - Fee Related JP5114209B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/033,934 US7161827B2 (en) 2005-01-12 2005-01-12 SRAM having improved cell stability and method therefor
US11/033,934 2005-01-12
PCT/US2005/045208 WO2006076113A1 (en) 2005-01-12 2005-12-14 Sram having improved cell stability and method therefor

Publications (3)

Publication Number Publication Date
JP2008527603A JP2008527603A (ja) 2008-07-24
JP2008527603A5 true JP2008527603A5 (enExample) 2009-02-19
JP5114209B2 JP5114209B2 (ja) 2013-01-09

Family

ID=36653059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007550375A Expired - Fee Related JP5114209B2 (ja) 2005-01-12 2005-12-14 セル安定性を改善したｓｒａｍ及びその方法

Country Status (4)

Country Link
US (1) US7161827B2 (enExample)
JP (1) JP5114209B2 (enExample)
KR (1) KR101251676B1 (enExample)
WO (1) WO2006076113A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7403426B2 (en) * 2005-05-25 2008-07-22 Intel Corporation Memory with dynamically adjustable supply
US7554841B2 (en) * 2006-09-25 2009-06-30 Freescale Semiconductor, Inc. Circuit for storing information in an integrated circuit and method therefor
JP2008103028A (ja) * 2006-10-19 2008-05-01 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7859919B2 (en) * 2008-08-27 2010-12-28 Freescale Semiconductor, Inc. Memory device and method thereof
US8233341B2 (en) * 2009-09-01 2012-07-31 Texas Instruments Incorporated Method and structure for SRAM cell trip voltage measurement
US9865330B2 (en) * 2010-11-04 2018-01-09 Qualcomm Incorporated Stable SRAM bitcell design utilizing independent gate FinFET
US8773940B2 (en) 2012-01-17 2014-07-08 Freescale Semiconductor, Inc. Skewed SRAM cell
US9263122B2 (en) * 2013-10-21 2016-02-16 Taiwan Semiconductor Manufacturing Company Ltd. Data-controlled auxiliary branches for SRAM cell
KR101705172B1 (ko) 2015-01-29 2017-02-09 경북대학교 산학협력단 반도체 메모리 장치
US12127387B2 (en) 2021-07-30 2024-10-22 Taiwan Semiconductor Manufacturing Company, Ltd. Gate-all-around high-density and high-speed SRAM cells

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04298887A (ja) * 1991-03-26 1992-10-22 Nippon Telegr & Teleph Corp <Ntt> メモリ回路
US5710742A (en) * 1995-05-12 1998-01-20 International Business Machines Corporation High density two port SRAM cell for low voltage CMOS applications
US6122191A (en) * 1996-05-01 2000-09-19 Cypress Semiconductor Corporation Semiconductor non-volatile device including embedded non-volatile elements
US5828597A (en) * 1997-04-02 1998-10-27 Texas Instruments Incorporated Low voltage, low power static random access memory cell
JP4656714B2 (ja) * 2000-10-10 2011-03-23 ルネサスエレクトロニクス株式会社 半導体記憶装置
US6510076B1 (en) * 2002-02-12 2003-01-21 Pmc-Sierra, Inc. Variable read/write margin high-performance soft-error tolerant SRAM bit cell
KR100487521B1 (ko) * 2002-03-19 2005-05-03 삼성전자주식회사 부동체 효과를 제거하는 스태틱 랜덤 억세스 메모리 셀 및그 제조방법
JP4454206B2 (ja) * 2002-06-03 2010-04-21 株式会社ルネサステクノロジ 記憶回路
US6998722B2 (en) * 2002-07-08 2006-02-14 Viciciv Technology Semiconductor latches and SRAM devices
US6924560B2 (en) * 2003-08-08 2005-08-02 Taiwan Semiconductor Manufacturing Co., Ltd. Compact SRAM cell with FinFET

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