JP2008515095A5 - - Google Patents

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Publication number
JP2008515095A5
JP2008515095A5 JP2007534653A JP2007534653A JP2008515095A5 JP 2008515095 A5 JP2008515095 A5 JP 2008515095A5 JP 2007534653 A JP2007534653 A JP 2007534653A JP 2007534653 A JP2007534653 A JP 2007534653A JP 2008515095 A5 JP2008515095 A5 JP 2008515095A5
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JP
Japan
Prior art keywords
cache memory
cache
predetermined
current
value
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JP2007534653A
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English (en)
Japanese (ja)
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JP2008515095A (ja
JP4456154B2 (ja
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Priority claimed from US10/956,560 external-priority patent/US7257678B2/en
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Publication of JP2008515095A publication Critical patent/JP2008515095A/ja
Publication of JP2008515095A5 publication Critical patent/JP2008515095A5/ja
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Publication of JP4456154B2 publication Critical patent/JP4456154B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2007534653A 2004-10-01 2005-09-21 キャッシュメモリの動的再設定 Expired - Fee Related JP4456154B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/956,560 US7257678B2 (en) 2004-10-01 2004-10-01 Dynamic reconfiguration of cache memory
PCT/US2005/033671 WO2006039153A1 (en) 2004-10-01 2005-09-21 Dynamic reconfiguration of cache memory

Publications (3)

Publication Number Publication Date
JP2008515095A JP2008515095A (ja) 2008-05-08
JP2008515095A5 true JP2008515095A5 (https=) 2008-11-13
JP4456154B2 JP4456154B2 (ja) 2010-04-28

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JP2007534653A Expired - Fee Related JP4456154B2 (ja) 2004-10-01 2005-09-21 キャッシュメモリの動的再設定

Country Status (8)

Country Link
US (1) US7257678B2 (https=)
JP (1) JP4456154B2 (https=)
KR (1) KR101136141B1 (https=)
CN (1) CN101048763B (https=)
DE (1) DE112005002672B4 (https=)
GB (1) GB2432695B (https=)
TW (1) TWI403899B (https=)
WO (1) WO2006039153A1 (https=)

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