JP2008235801A - Multi-layer printed wiring board and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multi-layer printed wiring board wherein centers of an upper hole and a lower hole of a step via are arranged at almost the same position, and to provide a method for manufacturing the board stably at a low cost, in a structure of the multi-layer printed wiring board containing a step via structure at an inter-layer connection part, and to provide its manufacturing method. <P>SOLUTION: In the structure, an outer-layer build-up layer is laminated on an inner layer core substrate. A step via hole 23a for inter-layer connection of three or more wiring layers, where diameter of a conducting hole becomes larger going toward the outer side layer and a blind via hole 23b for inter-layer connection of only the outermost layer and the next lower wiring layer are provided to the printed wiring board for inter-layer connection of the inner layer core substrate and the outer layer build-up layer. In this printed wiring board and the method for manufacturing the same, the conductor thickness of a receiving land of the inner layer core substrate to the step via hole 23a is thinner than the conductor thickness of a receiving land of the blind via hole 23b. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a build-up type multilayer printed wiring board and a manufacturing method thereof, and more particularly to a multilayer flexible printed wiring board including a step via structure in an interlayer connection portion and a manufacturing method thereof.

  In recent years, downsizing and higher functionality of electronic devices have been increasingly promoted, and for this reason, the demand for higher density of printed wiring boards is increasing. Therefore, the printed wiring board is increased in density by changing the printed wiring board from one side to a double-sided or a multilayer printed wiring board having three or more layers.

  As a part of this, it has a flexible cable part that integrates a separate flexible printed wiring board and flexible flat cable that connect between multilayer printed wiring boards and hard printed wiring boards for mounting various electronic components via connectors etc. Multilayer flexible printed wiring boards are widely used, especially in small electronic devices such as mobile phones (see Patent Document 1 (page 4, FIG. 5)).

  In particular, the miniaturization and high functionality of mobile phones are remarkable, and as a result, parts mounted on multilayer flexible printed wiring boards are also replaced with CSP (chip size package), packaging with high functionality and high density, and increasing the board size. There is a trend to add high functionality without any problems.

  Therefore, in order to realize high-density mounting, a built-up type multilayer flexible printed wiring board in which a double-sided or multilayer flexible printed wiring board is used as a core substrate and about one or two build-up layers are arranged on both sides or one side has been put into practical use. (See Patent Document 2, page 9, FIG. 3).

  In addition, in the case of a foldable mobile phone, the requirements for the bending characteristics of the cable part are also strict, and the bending characteristics are superior to electrolytic copper foil on one or both sides of a flexible insulating base material such as polyimide film. In many cases, a cable portion using a double-sided copper-clad laminate having a rolled copper foil as a starting material is used.

  In the case where the double-sided copper-clad laminate made of the above-described rolled copper foil is used for the double-sided core substrate serving as the cable part, only the interlayer connection part described in Patent Document 2 (page 8, FIG. 2) is connected by plating. If the core substrate on both sides is produced by plating, the circuit pattern to be the cable portion is not plated, so that bending characteristics can be secured. By forming a cover lay on this double-sided core substrate and further performing a one-stage build-up thereon, it becomes possible to ensure bending characteristics while satisfying the requirements for high-density mounting to some extent.

  Further, Patent Document 3 (page 3, FIG. 1) proposes combining stepped via holes, so-called step via holes, that enable high-density interlayer connection without increasing the number of processes.

  This is a technique capable of performing interlayer connection of a multilayer structure in a lump, and the diameter of a metal mask for laser processing, so-called conformal mask, is reduced as it goes to the inner layer in consideration of misalignment, etc. Conductive holes are formed by laser processing, and interlayer connection is obtained by plating or the like.

  FIG. 2 is a process diagram showing a conventional method for forming a step via hole. That is, as shown in FIG. 2 (1), a multi-layer circuit substrate having conduction holes is subjected to electrolytic plating of about 25 to 30 μm to form step via holes 101 and via holes 102, and interlayer conduction is established by interlayer conduction. The completed multilayer circuit board 100 is obtained.

  At this time, the center misalignment between the conformal mask 111 and the conformal mask 112 is displaced up to about 100 μm at maximum, so that the area around the bottom of the hole for plating becomes unstable.

  As a result, defects such as plating voids are likely to occur, and the step via holes obtained by plating are structurally asymmetric. Therefore, they occur in the step via holes 101 (FIG. 2 (1)) in temperature cycle tests. The thermal stress that is generated locally increases, which causes a decrease in reliability of interlayer connection. In addition, since a portion having a thin plating thickness is likely to occur locally, this also causes a decrease in reliability of interlayer connection such as a temperature cycle test.

  Next, as shown in FIG. 2B, an outer layer pattern 103 is formed by a normal photofabrication technique. At this time, if there is a plating layer deposited on the cover film 121 of the core substrate 120, this is also removed.

  Thereafter, the surface of the substrate is subjected to surface treatment such as solder plating, nickel plating, or gold plating as necessary, and a photo solder resist layer is formed and externally processed, so that the multilayer printed wiring board having the cable portion 104 in the inner layer. Get 100.

  However, there are several problems in forming this step via hole. As described above, it is necessary to form a large conformal mask on the outer layer side in consideration of misalignment, and depending on the positional accuracy of stacking and the like, high-density interlayer connection may not always be achieved.

  Furthermore, if the centers of the conformal masks in each layer are not aligned, the conformal mask on the outer layer side will look like a flaw, which may cause defects in laser processing on the inner layer side, or plating after the formation of holes for conduction. In other words, the surroundings with plating become unstable, defects such as plating voids are likely to occur, and step via holes obtained by plating become structurally asymmetric. This is because the thermal stress generated in the step via hole in a temperature cycle test or the like is locally increased, which causes a decrease in reliability of interlayer connection.

  For these reasons, it is necessary to increase the plating thickness in order to obtain via hole reliability. When the plating thickness is increased, the conductor layer thickness is increased and it is difficult to form a fine circuit. Further, in order to ensure the connection reliability of the via hole that electrically connects the buildup layer and the double-sided core substrate of the inner layer, it is necessary to increase the plating thickness of the wall surface of the via hole of the buildup layer. As described above, it is difficult to form a fine circuit, and the demand for high-density mounting cannot be satisfied.

In view of this, there has been proposed a method of further building up the second stage in order to make up for the shortage of fine circuit formation capability by increasing the number of layers. However, in order to fabricate a two-stage build-up type multilayer flexible printed wiring board using this method, since successive lamination is repeated, there is a problem that the process becomes complicated as the number of layers increases and the yield decreases. .
Japanese Patent No. 2631287 JP 2003-188535 A Japanese Patent No. 2562373

  As described above, step via holes are described in Patent Document 3 (page 3, FIG. 1) and the like.

  However, a specific method of step vias without misalignment of each wiring layer is not provided, and various problems remain in manufacturing a multilayer printed wiring board using step via holes. For these reasons, a method for stably and inexpensively manufacturing a multilayer printed wiring board having a cable portion capable of high-density mounting is desired.

  The present invention has been made in consideration of the above-described points, and the center of the upper hole and the lower hole of the step via is substantially equal in the structure and manufacturing method of the multilayer printed wiring board including the step via structure in the interlayer connection portion. It is an object of the present invention to provide a multilayer printed wiring board disposed at a position and a method for stably and inexpensively manufacturing the multilayer printed wiring board.

  In order to achieve the above object, the present invention provides the following inventions.

First, in the invention of the printed wiring board of the present application,
It is a structure in which an outer layer buildup layer is laminated on an inner layer core substrate, and the interlayer connection between the inner layer core substrate and the outer layer buildup layer is an interlayer connection of three or more wiring layers in which the diameter of the conduction hole increases toward the outer layer side. In a printed wiring board provided with a step via hole for performing an interlayer connection and a blind via hole for performing interlayer connection only between the outermost layer and the wiring layer one layer below,
The printed wiring board is characterized in that the conductor thickness of the receiving land of the inner core substrate with respect to the step via hole is thinner than the conductor thickness of the receiving land of the blind via hole.

In the invention of the manufacturing method of the present application,
a) a step of producing an inner core substrate having at least one conductive layer on an insulating base material made of a resin film; b) an outer buildup layer made of a copper clad laminate having a conductive layer on at least one surface; Laminating the inner layer core substrate via an adhesive, and forming a copper foil opening for perforation in the conductive hole forming portion of the conductive layer of the copper-clad laminate to form a laminated circuit substrate before or after lamination C) a step of forming a conductive hole for a step via hole whose diameter increases toward the outer layer side with respect to the laminated circuit substrate; d) a via hole formed by electroplating after conducting the conductive treatment on the conductive hole. Forming an outer layer build-up layer on the inner-layer core substrate, and for interlayer connection between the inner-layer core substrate and the outer-layer build-up layer, interlayer connection of three or more wiring layers Do the step The method for manufacturing a multilayer printed wiring board having a via hole,
Said step c)
Perforating the interlayer insulating resin of the outer layer buildup layer and the adhesive by conformal processing by irradiating the opening of the copper foil for punching with a laser beam that can be heated to a melting point of copper or higher.
Further, by irradiating the laser beam, the conductive layer on the laser beam irradiation surface side in the inner layer core substrate and the insulating base of the inner layer core substrate are perforated,
A conduction hole for a step via hole is formed in which the center of the opening of the copper foil for perforation and the center of the hole of the conductive layer of the inner core substrate formed by the direct processing are substantially equal. A multilayer printed wiring board manufacturing method is provided.

  Due to these features, the present invention has the following effects.

  The multilayer printed wiring board having the cable portion according to the present invention has a copper thickness of the receiving land of the step via hole connecting the three wiring layers, and the blind via hole connecting the interlayer between the outermost layer and the wiring layer just below it. Since the thickness of the receiving land is thinner than the copper thickness of the receiving land, a conformal mask can be formed only in the outermost layer when forming a step via hole, and a pilot hole for the step via hole can be suitably formed in the center by direct laser processing, improving yield. The plating thickness required to ensure reliability can be reduced.

  In addition, according to the method for manufacturing a multilayer printed board according to the present invention, among the multilayer printed wiring board including the step via structure in the interlayer connection portion, which is difficult in the conventional manufacturing method, the upper and lower holes of the step via are formed. A multilayer printed wiring board whose centers are arranged at substantially equal positions can be manufactured inexpensively and stably.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1A to 1C.

  1A to 1C are cross-sectional process diagrams illustrating an embodiment of a method of manufacturing a multilayer printed wiring board having a cable portion including a step via structure in an interlayer connection portion according to the present invention. First, FIG. As shown, a so-called double-sided copper-clad laminate 4 having 7 μm thick copper foils 2 and 3 on both sides of a flexible insulating base material 1 such as polyimide (here, 25 μm thick polyimide) is prepared, Conductive holes 5 are formed in the double-sided copper clad laminate 4 with an NC drill or the like. The copper foils 2 and 3 at this time are preferably a rolled copper foil or a special electrolytic copper foil having excellent flexibility.

  After that, conducting the conductive treatment, without plating on the wiring pattern such as cables, the position of the exposure, the dimensional variation of the substrate, the position of the NC drill processing, to selectively perform the electroplating on the portion located on the inner wall For partial electroplating to selectively perform electroplating on the inner wall of the hole 5 for conduction and the receiving land of the hole for interlayer connection with the build-up layer, including through-hole lands with dimensions taking account of misalignment, etc. A resist layer 6 is formed. However, since the land that is penetrated by the laser after build-up is not subjected to electrolytic plating, the resist layer 6 for partial plating is also formed at a portion corresponding to this.

  Next, as shown in FIG. 1A (2), the conductive hole 5 and the portion 8 located on the receiving land are subjected to electrolytic plating of about 10 μm to obtain interlayer conduction. Through holes 7 are formed through the steps so far. The plating is also thickened on the portion 8 located on the receiving land.

  Next, as shown in FIG. 1B (3), a resist layer for forming circuit patterns on both sides by a photofabrication technique is formed. Using the resist layer, the circuit pattern 9 and the lands 10a and 10b are formed by a photofabrication technique, and the resist layer is further peeled off. The double-sided core substrate 11 that becomes the core substrate of the multilayer printed wiring board is obtained through the steps so far.

  In the first embodiment, a through-hole type double-sided core substrate is applied, but a via-hole type double-sided core substrate is also applicable. Further, in Example 1, first, partial plating was performed on the inside of the conduction hole and the receiving land, and then a circuit pattern such as a cable was formed. After the pattern is formed, the plating can be thickened on the conduction hole and the receiving land by partial plating.

  Thereafter, a roughening process is performed on the copper surface of the double-sided core substrate 11 to improve adhesion at the time of subsequent cover lay formation, and to stably improve the absorption of laser light during laser processing after buildup. Here, Multi Bond 150 manufactured by Nihon McDermitt Co., Ltd. was used.

  As a result, the adhesion can be secured and the absorption of carbon dioxide laser light (wavelength: about 9.8μm) on the copper surface can be improved, and the absorption rate is improved from about 20% to about 30% before and after treatment. It was confirmed.

  Subsequently, as shown in FIG. 1A (4), for example, a so-called cover lay 14 having an adhesive 13 such as acrylic / epoxy having a thickness of 20 μm is prepared on a 12 μm-thick polyimide film 12. The coverlay 14 is attached to the substrate with a vacuum press, a laminator or the like. Through the steps so far, the double-sided core substrate 15 with a coverlay is obtained.

  Next, as shown in FIG. 1B (5), a so-called single-sided copper-clad laminate having a 12 μm-thick copper foil 17a on one side of a flexible insulating base material 16 such as polyimide (here, polyimide having a thickness of 25 μm). 18a is prepared, the single-sided copper-clad laminate 18a is die-cut, and a resist layer is formed on the copper foil 17a of the single-sided copper-clad laminate 18a to form a conformal mask for laser processing by a photofabrication technique. To do.

  Using this resist layer, conformal masks 17b and 17c for laser processing are formed by a photofabrication technique, and the resist layer is further peeled off. The build-up layer 18b of the multilayer printed wiring board is obtained through the steps so far. The adhesive 19 for building up the buildup layer 18b on the double-sided core substrate 15 with the coverlay is previously punched and aligned.

  The adhesive 19 is preferably a low-flow type prepreg, a bonding sheet, or the like with little flow-out. Here, since there is no need to fill the conductor layer, the thickness of the adhesive 19 can be selected to be about 15 μm or thinner. The build-up layer 18b and the double-sided core substrate 15 with a coverlay are laminated with an adhesive 19 through a vacuum press or the like. The multilayer circuit substrate 20 is obtained through the steps so far.

  Thereafter, as shown in FIG. 1B (6), using the conformal masks 17b and 17c prepared in advance for laser processing, laser processing is performed to form conduction holes 21a and 21b. As for the laser processing method, since it is essential to penetrate through the copper foil, processing using a YAG laser, a carbon dioxide gas laser, or the like that can be heated to the melting point of copper or higher by laser irradiation is necessary.

  In Example 1, a carbon dioxide laser having a high processing speed and excellent productivity was used. However, for the conduction hole 21a of Example 1, it is necessary to form a conduction hole using a carbon dioxide laser, penetrating the copper foil only at a predetermined portion and not penetrating the other portion, and under the following conditions Processing was performed.

  Using ML605GTXIII-5100U2 (manufactured by Mitsubishi Electric Corporation) as a carbon dioxide laser processing machine, image processing or reading a plurality of target marks on the substrate at the center of the conformal mask 17b, and further dimensional expansion / contraction of the multilayer circuit substrate 20 Individually read, adjusted, etc., aligned, and irradiated with laser light. The laser beam is first processed by three shots with a beam diameter of about 300 μm, a pulse width of 10 μsec, and 10 mJ, then the beam diameter is reduced to 100 μm with a predetermined aperture, and then three shots with a pulse width of 15 μsec and 10 mJ are added.

  As a result, the copper foil of the conformal masks 17b and 17c is not melted, the copper thickness is thin, the land 10a having a surface state with good absorption of carbon dioxide laser light penetrates, and the land 10b thickened by other plating is Conductive holes 21a and 21b were formed without penetrating even in a surface state with good absorption of carbon dioxide laser light.

  In order to penetrate a predetermined portion of the land 10a with a stable diameter, a laser optical system having a beam profile such as a so-called Gaussian distribution having a high energy density at the center of the laser beam is required. It has also been confirmed that if the copper thickness of the land 10a is 10 μm or less, it penetrates with good reproducibility even with an energy amount of about plus or minus 30% of the laser processing conditions described above. When the thickness is 5 μm or less, the copper in the land to be left in the above-described roughening step, etching in the subsequent pre-plating process, or the like may be partially lost. Therefore, the copper thickness is preferably 5 to 10 μm.

  With respect to the copper thickness of the land 10b, a margin for penetration of the land 10b can be obtained by increasing the copper thickness of the land 10b located on the opposite surface of the lower hole 21c to the laser irradiation surface. Specifically, if it is 14 μm or more, it has been confirmed that the laser energy required for penetration is three times or more, which is a sufficient margin.

  For this reason, it is preferable that the copper thickness is 14 μm or more. The diameters of the conformal masks 17b and 17c are 200 μm, respectively. At this time, the hole 21c on the lower side of the conduction hole 21a has a hole diameter of about 100 μm which is substantially equal to the beam diameter narrowed by an aperture or the like, and is on the land 10a. It was stably formed at the approximate center of the conformal mask 17b.

  In addition, as shown in FIG. 1B, when the conduction holes 21a and 21c and the conduction hole 21b are arranged at positions facing each other, the lead including the penetration process is taken into consideration that the land 10b is not penetrated. It is preferable to form the through holes 21a and 21c first, and then form the through holes 21b.

  Therefore, in FIG. 1B, the upper conduction holes 21a and 21c in the drawing are processed first, and the lower conduction holes 21a and 21c and the conduction holes 21b are processed. Therefore, in the first embodiment, when the conduction holes 21a and 21c and the conduction hole 21b are opposed to each other, if the conduction holes 21a and 21c are all positioned on the upper side, the laser processing is first performed on the upper side. It can be done from all the conduction holes and then to all the lower conduction holes, which is efficient.

  Furthermore, a desmear process and a conductive process are performed for interlayer connection by electrolytic plating. However, since the copper foil of the land 10a around the hole 21c on the lower side of the hole 21a for the conduction is melted and may cause problems such as generation of plating voids in the subsequent plating process, Then, the molten copper foil was removed by etching about 2 μm with an etching solution such as an aqueous ammonium persulfate solution.

  In addition to the processing using a conformal mask as described above, a large window method in which a copper mask larger than the laser beam diameter is opened in advance and laser processing is applied to the laser processing is also applicable. It is.

  Next, as shown in FIG. 1C (7), electrolytic plating of about 10 to 15 μm is performed on the multilayer circuit substrate 22 having the conduction holes 21a and 21b, and the step via hole 23a obtained from the conduction hole 21a and the conduction hole A via hole 23b obtained from 21b is formed to provide interlayer conduction.

  Since there is no misalignment in the center of the upper hole and the lower hole of the step via hole 23a, the surroundings with plating on the lower hole of the conduction hole are stable. For this reason, defects such as plating voids are unlikely to occur, and step via holes obtained by plating are structurally symmetric, so that the thermal stress generated in the step via hole 23a in a temperature cycle test or the like is evenly distributed. In addition, the interlayer connection reliability is improved. Thereby, it is possible to ensure good interlayer connection reliability with an electrolytic plating thickness of about 10 to 15 μm.

  The multilayer circuit base material 24 in which interlayer conduction is completed is obtained through the steps so far. In addition, when a through hole for mounting such as an insertion part is required, a through hole can be formed with an NC drill or the like when forming a conduction hole, and a through hole can be formed simultaneously with the above via hole plating. Is possible.

  Then, as shown in FIG. 1C (8), the outer layer pattern 25 is formed by a normal photofabrication technique. At this time, if there is a plating layer deposited on the cover film 12 of the core substrate 15, this is also removed. Thereafter, the surface of the substrate is subjected to surface treatment such as solder plating, nickel plating, gold plating, etc., if necessary, and a photo solder resist layer is formed and externally processed so that the multilayer printed wiring board 26 having a cable portion on the inner layer is obtained. Get.

  The pattern forming capability required for a high-density mounting board is, for example, if the size of a land on which 0.5 mm pitch CSP is mounted is 300 μm, in order to pass one pattern between lands, line / space = 50 μm / 50 μm It is necessary to form a so-called pitch of 100 μm.

  However, as described above, when electroplating of about 10 to 15 μm is performed on a 7 μm thick copper foil, the total conductor thickness of the outer layer is 17 to 22 μm, and it is sufficient to form fine patterns with a pitch of 100 μm with good yield Since it is possible, the requirement of high-density mounting can be satisfied.

  In addition, since the cable is arranged on the second layer, via holes for connecting the first layer and the second layer can be arranged at a narrow pitch in order to connect the component mounting portions at the shortest distance. It is necessary that the wiring of the layer is fine. As for the arrangement of the via holes, the via holes 23a and 23b can be formed with a pitch of 0.4 mm or less because the via hole diameter can be formed to 200 μm or less.

  The interlayer connection structure of the multilayer printed wiring board having the cable portion according to the present invention employs the via hole 23a having a via hole diameter of 200 μm or less, so that the structure is advantageous for high density and satisfies the demand for high density mounting. Can do. Provided a method for inexpensively and stably manufacturing a multilayer printed wiring board in which the center of the upper hole and the lower hole of the step via are arranged at substantially the same position among the multilayer printed wiring boards including the step via structure in the interlayer connection portion. can do.

The conceptual sectional drawing of the manufacturing method of the multilayer printed wiring board concerning this invention. FIG. 1B is a conceptual cross-sectional view of the method for manufacturing a multilayer printed wiring board according to the present invention following FIG. 1A. 1B is a conceptual cross-sectional view of a method for manufacturing a multilayer printed wiring board according to the present invention following FIG. 1B. The conceptual sectional drawing of the manufacturing method of the multilayer printed wiring board which has a cable part by a conventional construction method.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Flexible insulating base material 2,3 Copper foil 4 Double-sided copper clad laminated board 5 Conductive hole 6 Partial plating resist layer 7 Through hole 8 The part located in a receiving land 9 Circuit pattern 10a, 10b Land 11 Double-sided core board 12 Polyimide film 13 Adhesive material 14 Coverlay 15 Double-sided core substrate 16 Flexible insulating base material 17a Copper foils 17b and 17c Conformal mask 18a Single-sided copper-clad laminate 18b Build-up layer 19 Adhesive material 20 Multilayer circuit base materials 21a and 21b Through hole 21c Lower hole 22 for conduction hole 21a Multilayer circuit substrate 23a Step via hole 23b Via hole 24 Multilayer circuit substrate 25 with completed interlayer conduction Outer circuit pattern 26 Multilayer printed wiring board 161 having a cable portion according to the present invention Polyimide Film 162 Adhesive 163 Coverlay 164 Both with coverlay Core substrate 165 Flexible insulating base material 166a Copper foil 166b Conformal mask 167a Single-sided copper-clad laminate 167b Build-up layer 168 Adhesive 169a Multilayer circuit substrate 169b Multilayer circuit substrates 170a and 170b having conduction holes 171a Step via hole 171b Via hole 172 Multilayer circuit substrate 173 having completed inter-layer conduction Outer circuit pattern 174 Cable portion 175 Multilayer printed wiring board having cable portion by conventional method

Claims (2)

It is a structure in which an outer layer buildup layer is laminated on an inner layer core substrate, and the interlayer connection between the inner layer core substrate and the outer layer buildup layer is an interlayer connection of three or more wiring layers in which the diameter of the conduction hole increases toward the outer layer side. In a printed wiring board provided with a step via hole for performing an interlayer connection and a blind via hole for performing interlayer connection only between the outermost layer and the wiring layer one layer below,
The printed wiring board, wherein the conductor thickness of the receiving land of the inner core substrate with respect to the step via hole is thinner than the conductor thickness of the receiving land of the blind via hole. a) a step of producing an inner core substrate having at least one conductive layer on an insulating base material made of a resin film; b) an outer buildup layer made of a copper clad laminate having a conductive layer on at least one surface; A laminated circuit substrate is formed by laminating an inner layer core substrate with an adhesive, and forming a copper foil opening for perforation at a site where a conductive hole is formed in the conductive layer of the copper clad laminate before or after lamination. Step c) a step of forming a conductive hole for a step via hole whose diameter increases toward the outer layer side with respect to the laminated circuit substrate; and d) a conductive treatment is performed on the conductive hole and the via hole is formed by electrolytic plating. Forming an outer layer build-up layer on the inner-layer core substrate, and for interlayer connection between the inner-layer core substrate and the outer-layer build-up layer, interlayer connection of three or more wiring layers Do the step The method for manufacturing a multilayer printed wiring board having flop via hole,
Said step c)
Perforating the interlayer insulating resin of the outer layer buildup layer and the adhesive by conformal processing by irradiating the opening of the copper foil for punching with a laser beam that can be heated to a melting point of copper or higher.
Further, by irradiating the laser beam, the conductive layer on the laser beam irradiation surface side in the inner layer core substrate and the insulating base of the inner layer core substrate are perforated,
A conduction hole for a step via hole is formed in which the center of the opening of the copper foil for perforation and the center of the hole of the conductive layer of the inner core substrate formed by the direct processing are substantially equal. A method for manufacturing a multilayer printed wiring board.

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