JP2008218758A - 電子回路実装構造体 - Google Patents

電子回路実装構造体 Download PDF

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Publication number
JP2008218758A
JP2008218758A JP2007054957A JP2007054957A JP2008218758A JP 2008218758 A JP2008218758 A JP 2008218758A JP 2007054957 A JP2007054957 A JP 2007054957A JP 2007054957 A JP2007054957 A JP 2007054957A JP 2008218758 A JP2008218758 A JP 2008218758A
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JP
Japan
Prior art keywords
bumps
semiconductor element
resin
semiconductor elements
mounting structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2007054957A
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English (en)
Japanese (ja)
Other versions
JP2008218758A5 (https=
Inventor
Kazuya Atokawa
和也 後川
Tadaaki Mimura
忠昭 三村
Kimihito Kuwabara
公仁 桑原
Yukitoshi Ota
行俊 太田
Toshiyuki Fukuda
敏行 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2007054957A priority Critical patent/JP2008218758A/ja
Publication of JP2008218758A publication Critical patent/JP2008218758A/ja
Publication of JP2008218758A5 publication Critical patent/JP2008218758A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Wire Bonding (AREA)
JP2007054957A 2007-03-06 2007-03-06 電子回路実装構造体 Withdrawn JP2008218758A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007054957A JP2008218758A (ja) 2007-03-06 2007-03-06 電子回路実装構造体

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007054957A JP2008218758A (ja) 2007-03-06 2007-03-06 電子回路実装構造体

Publications (2)

Publication Number Publication Date
JP2008218758A true JP2008218758A (ja) 2008-09-18
JP2008218758A5 JP2008218758A5 (https=) 2009-11-12

Family

ID=39838433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007054957A Withdrawn JP2008218758A (ja) 2007-03-06 2007-03-06 電子回路実装構造体

Country Status (1)

Country Link
JP (1) JP2008218758A (https=)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014057107A (ja) * 2013-12-20 2014-03-27 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
US8698296B2 (en) 2009-05-29 2014-04-15 Renesas Electronics Corporation Semiconductor device
WO2015056430A1 (ja) * 2013-10-16 2015-04-23 パナソニック株式会社 半導体装置
JP2015185567A (ja) * 2014-03-20 2015-10-22 富士通株式会社 電子装置、電子装置の製造方法、電子部品及び電子部品の製造方法
JP2018107267A (ja) * 2016-12-26 2018-07-05 新光電気工業株式会社 配線基板、半導体装置
US11335668B2 (en) 2019-10-30 2022-05-17 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8698296B2 (en) 2009-05-29 2014-04-15 Renesas Electronics Corporation Semiconductor device
US8975120B2 (en) 2009-05-29 2015-03-10 Renesas Electronics Corporation Method of manufacturing semiconductor device
WO2015056430A1 (ja) * 2013-10-16 2015-04-23 パナソニック株式会社 半導体装置
JP2014057107A (ja) * 2013-12-20 2014-03-27 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
JP2015185567A (ja) * 2014-03-20 2015-10-22 富士通株式会社 電子装置、電子装置の製造方法、電子部品及び電子部品の製造方法
JP2018107267A (ja) * 2016-12-26 2018-07-05 新光電気工業株式会社 配線基板、半導体装置
US11335668B2 (en) 2019-10-30 2022-05-17 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same
US11769755B2 (en) 2019-10-30 2023-09-26 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same
US12119329B2 (en) 2019-10-30 2024-10-15 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same

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