JP2008166741A - Multilayer substrate and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer substrate capable of possessing high reliability by preventing crack generated in a resin insulating layer or exfoliation of the resin insulating layer. <P>SOLUTION: The mutilayer substrate 11 has a structure in which an outer layer metal layer 61 is arranged in overlay by laminating the resin insulating layers 17, 20. The multilayer substrate 11 is divided into a product formation region 15 in which a plurality of portions to be a product are arranged along a substrate plane direction, and a frame portion 16 surrounding the product formation region 15. Between the resin insulating layers 17, 20 in the frame portion 16, a mesh-shaped conductor layer 22 is formed, and in the outer layer metal layer 61 in the frame portion 16, a marking portion 62 is arranged. At a location beneath the marking portion 62 in the mesh-shaped conductor layer 22, a blank area 27 in which the mesh-shaped conductor layer 22 does not exist is arranged. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention has a structure in which a plurality of resin insulation layers are stacked and an outer metal layer is disposed on the surface layer, and is divided into a product formation region that is a part to be a product and a frame portion that surrounds the product formation region And a manufacturing method thereof.

  In recent years, as a technique for efficiently producing products such as wiring boards, a technique called so-called multi-cavity is well known (see, for example, Patent Document 1). In this method, for example, as shown in FIG. 18, the copper foil attached to both surfaces of the rectangular inner core 101 is etched to form an inner conductor layer 105 on the surface in the product formation region 104. The mesh conductor layer 106 is formed on the surface of the frame portion 108. Next, prepregs are stacked on the upper surface and the lower surface of the inner core 101 to form the outer core 102, and the buildup layer 103 is disposed on the surface layer (product formation region 104) of both the outer cores 102. A product 100 is manufactured. Further, the intermediate product 100 is divided along a boundary line (not shown) of the product formation region 104 so that a plurality of products are obtained simultaneously.

By the way, in this type of intermediate product 100, a mark (character or the like) for identifying the type of product is attached to the frame portion 108 surrounding the product formation region 104. As a method of attaching this mark, ink is generally applied to the surface of the frame portion using a dispenser or a magic pen. However, when ink is applied, there is a high possibility that the mark will disappear in a later process. Therefore, in order to solve this problem, for example, it is preferable to form a stamped portion 109 (see FIG. 18) on the surface of the frame portion.
JP 2002-18795 A (FIG. 1 etc.)

  However, as shown in FIG. 18, the surface of the frame portion 108 of the inner core 101 includes a region where the mesh-like conductor layer 106 exists and a region where the mesh-like conductor layer 106 does not exist. The same applies to the position immediately below the marking portion 109. In this case, if an impact is applied during the formation of the engraved portion 109, stress concentrates on the edge of the mesh conductor layer 106 (see, for example, A1) and cracks are formed at the boundary between the mesh conductor layer 106 and the outer core 102. 110 is likely to occur.

  Note that if the frame portion 108 is separated when the crack 110 is generated, the possibility that the crack 110 affects the product formation region 104 is small. However, since it is usually necessary to ensure workability when forming the buildup layer 103, the frame portion 108 is separated after the buildup layer 103 is formed. As a result, when the buildup layer 103 is formed, the crack 110 may progress to the product formation region 104. In addition, when a plating process is repeatedly performed during the formation of the buildup layer 103, the plating solution can enter inside through the crack 110, and the plating solution can flow into the product formation region 104 along the mesh conductor layer 106. There is also sex. In these cases, the outer core 102 and the inner conductor layer 105 of the product located in the vicinity of the marking portion 109 (that is, the product located at the outermost peripheral portion of the product formation region 104) are easily peeled off. Therefore, the reliability of the inner core 101 and the outer core 102 is lowered, and as a result, the reliability of the wiring board as a product is lowered.

  This invention is made | formed in view of said subject, The 1st objective can provide high reliability by preventing the crack which arises in a resin insulation layer, or peeling of a resin insulation layer. It is to provide a laminated substrate. A second object is to provide a method for manufacturing the above-mentioned preferred laminated substrate.

  And as a means (means 1) for solving the above-mentioned problem, it has a structure in which a plurality of resin insulation layers are stacked and an outer metal layer is arranged on the surface layer, and a part to be a product is along the substrate plane direction. A plurality of product formation regions and a frame portion surrounding the product formation region are partitioned, and a mesh conductor layer or a dotted conductor layer is formed between the plurality of resin insulation layers in the frame portion. In the laminated substrate in which the outer metal layer in the frame is provided with a marking portion, the mesh conductor layer is also located at a position immediately below the marking portion in the mesh conductor layer or the dotted conductor layer. There is a laminated substrate characterized in that a blank area in which no scattered conductor layer exists is set.

  Further, as another means (means 2) for solving the above problem, a plurality of resin insulation layers are stacked and an outer metal layer is arranged on the surface layer, and a portion to be a product is in the plane direction of the substrate. A plurality of product formation regions arranged along the frame and a frame portion surrounding the product formation region, and a mesh-like conductor layer or a dotted conductor layer between the plurality of resin insulation layers in the frame portion In the laminated substrate in which the outer metal layer in the frame is provided with a stamped portion, a cut pattern is provided at a position directly below the stamped portion in the mesh-like conductor layer or the dotted conductor layer. A gist of the present invention is a laminated substrate characterized in that a non-planar conductor region is set.

  Therefore, in the laminated substrates of means 1 and 2, since a portion where the mesh-like conductor layer or the dotted conductor layer does not exist (that is, a blank region or a plain-like conductor region) is provided immediately below the engraved portion, The uneven structure that tends to concentrate does not exist in the first place, and cracks are less likely to occur in the resin insulating layer. For this reason, it is prevented that a crack progresses to a product formation area, and the liquid which penetrate | invaded through the crack flows into a product formation area along a mesh-like conductor layer or a scattered conductor layer, The resin insulation layer can be prevented from peeling off. Therefore, it is possible to prevent the yield of the multilayer substrate from being lowered and to impart high reliability to the multilayer substrate.

  In addition, when a mark is attached by applying ink or the like, the mark disappears after a process using an acidic or alkaline chemical solution after the formation of the mark. On the other hand, means 1 and 2 are marked by forming a stamped portion. Since the stamped portion is formed by mechanically deforming a part of the outer metal layer, the shape of the stamped portion is maintained even after the step of using the above chemical solution after the stamped portion is formed. , Never disappear. Therefore, when the stamped portion is used as a mark for determining the type of product, for example, the type of product can be reliably determined.

  The outer metal layer is formed by applying or printing a plating layer formed by plating the surface layer of the resin insulating layer, a metal foil attached to the surface layer of the resin insulating layer, or a metal paste. Metal layer.

  Here, the product formation region refers to a region where a plurality of portions to be products are arranged vertically and horizontally along the substrate plane direction. In general, the resin insulating layer, the product formation region, and the part to be the product are all formed in a substantially rectangular shape in plan view. Further, the area of the part to be the product is set to be considerably smaller than the area of the product formation region. Therefore, for example, several to several hundred parts to be products are arranged in the product formation region. On the other hand, the frame part is not a product but is a part that is separated and removed from the product formation region during manufacture, and surrounds the product formation region.

  In addition, the said marking part points out the identifier formed by attaching unevenness to a part of outer metal layer. Examples of the stamped portion include characters, symbols, and pictures. Although the depth of the stamped part depends on the thickness of the outer metal layer at the time of forming the laminated substrate, it is preferably 10 μm or more and 80 μm or less, for example, 30 μm. If the depth of the stamped portion is less than 10 μm, the stamped portion may disappear later. On the other hand, if the depth of the stamped portion exceeds 80 μm, cracks are likely to occur in the outer insulating layer due to the impact applied when the stamped portion is formed, and cracks are also likely to occur in the resin insulating layer.

  The “mesh-like conductor layer” refers to a conductor layer having, for example, a lattice pattern or a staggered pattern. The “mesh-like conductor layer” can be formed by arranging strip-like patterns in a lattice pattern. Adjacent belt-like patterns are arranged at substantially constant intervals. Accordingly, the surface of the region where the mesh-like conductor layer is present in the frame portion has irregularities composed of a region where the belt-like pattern exists and a region where the belt-like pattern does not exist. The “scattered conductor layer” refers to a conductor layer composed of a plurality of small-area conductor patterns that are spaced apart in a scattered pattern (for example, a grid pattern or a zigzag pattern). The shape of each small area conductor pattern is arbitrary, and examples thereof include a triangle, a quadrangle, a hexagon, and a circle. On the other hand, the “blank area” is an area where the mesh-like conductor layer and the dotted conductor layer are not present on the surface of the frame portion (however, an area where a positioning hole is formed is excluded). Therefore, since the unevenness as described above does not exist on the surface of the blank area, the stress is not concentrated on a part of the blank area due to the impact applied when the stamped portion is formed. In addition, “a plain conductor region that does not have a blank pattern” means a conductor layer that is neither a mesh nor a dot on the surface of the frame, that is, a solid conductor that has no blank pattern and has no irregularities on the surface. Say. Therefore, since the unevenness as described above does not exist on the surface of the plane-shaped conductor region, stress is not concentrated on a part of the plane-shaped conductor region due to an impact applied when the stamped portion is formed.

The area of the blank region (or the plain-shaped conductor region) is preferably at least equal to the area of the stamped portion forming region, and particularly preferably larger than the area of the stamped portion forming region. If the area of the blank area (or the plain-shaped conductor area) is smaller than the area of the formation area of the engraved part, a mesh-like conductor layer (or scattered conductor layer) exists in a part immediately below the engraved part. Therefore, the stress is concentrated on the mesh-like conductor layer (or the dotted conductor layer) due to the impact applied during the formation of the stamped portion, and cracks are likely to occur in the resin insulating layer.
Here, the blank area may be surrounded by a dam-shaped conductor. Without the dam-shaped conductor, a liquid such as a plating solution may enter the blank area during the manufacturing process of the multilayer wiring board, and the adhesiveness of the portion may decrease. On the other hand, if the blank area is surrounded by a dam-shaped conductor, the blank area and the surrounding mesh conductor layer (or scattered conductor layer) are partitioned, and liquid can be surely penetrated into the blank area. To be blocked. Therefore, it is possible to reliably prevent a decrease in adhesion in the blank area, and as a result, it is easy to achieve an improvement in reliability.

  Further, the multilayer substrate in means 1 or 2 is a core substrate in a build-up multilayer wiring substrate comprising a build-up layer in which insulating layers and conductor layers are alternately stacked on at least one of the main surface of the multilayer substrate and the back surface of the multilayer substrate. It is preferable to be used as an application. In this way, since an electric circuit can be formed also in the buildup layer, the function of the multilayer substrate can be enhanced. The build-up layer may be formed only on either the multilayer substrate main surface or the multilayer substrate back surface, but is preferably formed on both the multilayer substrate main surface and the multilayer substrate back surface. With this configuration, an electrical circuit can be formed on both the build-up layer formed on the main surface of the multilayer substrate and the build-up layer formed on the back surface of the multilayer substrate, thereby further enhancing the functionality of the multilayer substrate. Can be planned.

  Further, as another means (means 3) for solving the above-mentioned problem, the laminated substrate manufacturing method according to the above means 1 or 2, wherein the mesh-like conductor layer or scattered dots are formed on the surface of the frame portion. A step of preparing a resin insulation layer for an inner layer in which the blank conductor region or the plain conductor region is set in the region where the conductor layer is formed and the mesh conductor layer or the dotted conductor layer is formed A lamination step of stacking and integrating the resin insulation layer for the inner layer, the resin insulation layer for the outer layer, and the metal foil to form a laminated substrate body, and forming a through-hole conductor that penetrates the laminated substrate body as the product A through-hole conductor forming step to be formed in the region, and a portion that is directly above the blank region or the plain-like conductor region in the outer metal layer configured to include the metal foil And by, the method of manufacturing a multilayer substrate, characterized in that it comprises a stamping step of providing the marking portion in the outer metal layer and its gist.

  Therefore, according to the manufacturing method of the means 3, in the marking step, the marking portion is provided at a position directly above the blank area or the plain-shaped conductor area. Therefore, even if an impact is applied during the formation of the stamped portion, most of the impact is transmitted to the blank area or the plain-shaped conductor area where the uneven structure does not exist, so that cracks due to stress concentration occur in the resin insulating layer. Hard to occur. For this reason, it is prevented that a crack progresses to a product formation area, and the liquid which penetrate | invaded through the crack flows into a product formation area along a mesh-like conductor layer or a scattered conductor layer, The resin insulation layer can be prevented from peeling off. Therefore, it is possible to prevent the yield of the multilayer substrate from being lowered and to impart high reliability to the multilayer substrate.

  Hereinafter, the manufacturing method of the laminated substrate concerning the means 3 is demonstrated.

  First, in the preparation step, the mesh-like conductor layer or the scattered conductor layer is formed on the surface of the frame portion, and the blank region or the area within the region where the mesh-like conductor layer or the scattered conductor layer is formed. A resin insulating layer for an inner layer in which a plain conductor region is set is prepared. Here, the material for forming the base of the resin insulation layer for the inner layer is not particularly limited, but a preferable resin insulation layer for the inner layer is formed mainly of a polymer material. Specific examples of the polymer material for forming the resin insulation layer for the inner layer include, for example, EP resin (epoxy resin), PI resin (polyimide resin), BT resin (bismaleimide / triazine resin), PPE resin (polyphenylene) Ether resin). In addition, composite materials of these resins and glass fibers (glass woven fabric or glass nonwoven fabric) or organic fibers such as polyamide fibers may be used.

  In the preparation step, after preparing an inner layer resin insulation layer having an inner layer conductor layer forming metal layer on its surface, the inner layer conductor layer forming metal layer is etched to form a surface in the product formation region. It is preferable to form an inner conductor layer and form the mesh conductor layer or the dotted conductor layer in which the blank region or the plain conductor region is set on the surface of the frame portion. In this way, since the inner conductor layer that becomes a part of the product is also formed at the time of forming the mesh conductor layer or the dotted conductor layer, the product can be manufactured efficiently. In the preparation step, a dam-like conductor surrounding the blank area may be formed.

  Further, in the preparation step, after preparing an inner layer resin insulation layer having an inner layer conductor layer forming metal layer on its surface, an etching resist material imparting photosensitivity is provided on the inner layer conductor layer forming metal layer. A step of placing an exposure mask on which the predetermined mask pattern is formed on the etching resist material, a step of exposing the etching resist material through the exposure mask, and developing the etching resist material to develop an etching resist Etching the inner layer conductor layer forming metal layer to form an inner layer conductor layer on the surface of the product formation region, and the blank region or the plain conductor region on the surface of the frame portion. It is preferable to perform the step of forming the mesh-like conductor layer or the dotted conductor layer in which is set. In this way, it is possible to form a mesh-like conductor layer or a dotted conductor layer in which a blank area or a plane-like conductor area is set only by changing the mask pattern of the exposure mask using the same technique as before. For this reason, it is possible to prevent an increase in the number of steps necessary for manufacturing the multilayer substrate, and it is possible to prevent an increase in manufacturing cost of the multilayer substrate.

  In the subsequent laminating step, the laminated substrate main body is formed by stacking and integrating the resin insulating layer for the inner layer, the resin insulating layer for the outer layer, and the metal foil. In addition, although it does not specifically limit as a resin insulating layer for outer layers, For example, it is preferable that it is a prepreg. Here, the “prepreg” refers to a semi-cured sheet obtained by impregnating a base material such as glass fiber (glass woven fabric or glass nonwoven fabric) or paper with a prepared resin varnish and drying. The temperature at which the prepreg is crimped is preferably, for example, 100 ° C. or more and 230 ° C. or less, and the pressure at the time of crimping the prepreg is, for example, preferably 0.5 MPa or more and 5 MPa or less.

  In the subsequent through-hole conductor forming step, a through-hole conductor that penetrates the multilayer substrate body is formed in the product formation region. Further, in the marking step, the marking portion is provided in the outer metal layer by stamping a portion of the outer metal layer including the metal foil directly above the blank region or the plain conductor region. . In addition, after performing a through-hole conductor formation process, you may perform a marking process, and you may perform a through-hole conductor formation process after performing a marking process. Then, when both the through-hole conductor forming step and the marking step are completed, the multilayer substrate is completed.

  In addition, after completion of the laminated substrate, an insulating layer forming step of forming an insulating layer on the laminated substrate main surface and the laminated substrate back surface, or an already formed insulating layer, and a conductor layer forming step of forming a conductor layer of a predetermined pattern May be implemented. Here, if the insulating layer forming step and the conductor layer forming step are alternately performed, a buildup layer formed by alternately laminating the conductor layer and the insulating layer can be formed on the laminated substrate, A product can be formed. Note that via holes (blind holes) may be formed in the insulating layer in advance in order to form via conductors for interlayer connection.

  And while removing a frame part from the product formation area | region of the intermediate product of a product and cut | disconnecting along products by cutting along the scheduled cutting line in a product formation area | region, the product of several pieces will be obtained. The intermediate product is a concept for a finished product, and specifically refers to a product in a state where the division between the products is not completed.

  Hereinafter, an embodiment embodying the present invention will be described in detail with reference to the drawings.

  As shown in FIG. 1, the intermediate product 10 of the wiring board of the present embodiment includes a core substrate 11 (laminated substrate) having a substantially rectangular plate shape in plan view, and a laminated substrate main surface 12 (upper surface in FIG. 1). ) And a second buildup layer 32 formed on the laminated substrate back surface 13 (the lower surface in FIG. 1) of the core substrate 11. That is, the core substrate 11 is used for a core substrate in a build-up multilayer wiring substrate.

  As shown in FIGS. 1 and 2, the core substrate 11 includes a product forming region 15 in which a plurality of portions 14 to be products are arranged along the substrate plane direction, and a frame portion 16 surrounding the product forming region 15. (Outside product area). Each of the portions 14 to be products has a substantially rectangular shape in plan view, and a plurality of portions 14 are arranged vertically and horizontally in the product formation region 15. Therefore, the product formation region 15 is also substantially rectangular in plan view. In addition, as shown in FIG. 2, positioning holes 51 and 52 for positioning the core substrate 11 are provided in two opposing sides of the frame portion 16.

  As shown in FIG. 1, the core substrate 11 has a structure in which an inner core 17 that is a resin insulation layer for an inner layer and an outer core 20 that is a resin insulation layer for an outer layer are stacked and integrated. . In the present embodiment, the inner core 17 is a substrate having a substantially rectangular shape in plan view made of glass epoxy. On the other hand, the outer core 20 is formed on the inner core upper surface 18 and the inner core lower surface 19, respectively, and is a substantially rectangular substrate in plan view formed by impregnating an inorganic material such as glass cloth with an organic material such as an epoxy resin. is there.

  A through hole 24 is formed in the core substrate 11, and a through hole conductor 25 for electrically connecting the buildup layers 31 and 32 is formed on the inner peripheral surface of the through hole 24. . A hollow portion in the through-hole conductor 25 is filled with a filler 26.

  As shown in FIG. 1, an inner layer conductor layer 21 made of copper is disposed on the inner core upper surface 18 and the inner core lower surface 19 in the product formation region 15. Further, in the product formation region 15, the upper surface of the outer core 20 formed on the inner core upper surface 18 (ie, the laminated substrate main surface 12) and the lower surface of the outer core 20 formed on the inner core lower surface 19 (ie, the laminated layer). Conductor patterns 23 are provided on the back surface 13) of the substrate.

  The first buildup layer 31 has a structure in which insulating layers 33, 34 and 35 made of epoxy resin and conductor layers 36 made of copper are alternately laminated. Via conductors 37 are formed at a plurality of locations in the insulating layers 33, 34, and 35, and the conductor layer 36 is electrically connected to the via conductors 37 and the like. Further, terminal pads 38 are formed in an array on the surface of the uppermost insulating layer 35 at the upper end of each via conductor 37. Further, the surface of the insulating layer 35 is almost entirely covered with a solder resist 39. The terminal pad 38 is exposed, and a plurality of solder bumps (not shown) are provided on the surface of the terminal pad 38.

  As shown in FIG. 1, the second buildup layer 32 has substantially the same structure as the first buildup layer 31 described above. That is, the second buildup layer 32 has a structure in which insulating layers 40, 41, and 42 made of an epoxy resin and conductor layers 36 are alternately laminated. Via conductors 37 are formed at a plurality of locations in the insulating layers 40, 41, 42, and the conductor layers 36 are electrically connected to the via conductors 37 and the like. In addition, terminal pads 43 are formed in a lattice shape on the lower surface of the lowermost insulating layer 42 at the lower end of each via conductor 37. Further, the lower surface of the insulating layer 42 is almost entirely covered with the solder resist 44. The terminal pad 43 is exposed, and a plurality of solder bumps (not shown) are provided on the surface of the terminal pad 43 for electrical connection with a mother board (not shown). The intermediate product 10 is mounted on the mother board by each solder bump.

  As shown in FIG. 2, the intermediate product 10 of this wiring board is cut along the outline of the portion 14 to be the product. Such a line along the outline is defined as a planned cutting line 45.

  As shown in FIGS. 1, 2, and 7, between the inner core 17 and the outer core 20 in the frame portion 16, that is, on the inner core upper surface 18 and the inner core lower surface 19 in the frame portion 16. On the top, a mesh-like conductor layer 22 made of copper is formed. More specifically, the mesh-like conductor layer 22 is a conductor layer formed by arranging strip-like patterns in a lattice pattern. The mesh conductor layer 22 is formed in a rectangular frame shape so as to surround the product forming region 15. The outer peripheral edge of the mesh-like conductor layer 22 coincides with the outer peripheral edge of the inner core 17, and the inner peripheral edge of the mesh-like conductor layer 22 is located on the boundary line between the frame portion 16 and the product forming region 15. In the present embodiment, the mesh conductor layer 22 has a thickness of 35 μm. Further, a blank area 27 where the mesh conductor layer 22 does not exist is set in the mesh conductor layer 22 formed on the inner core upper surface 18. The blank area 27 has a rectangular shape in a plan view of 8 mm in length and 40 mm in width, and is arranged on the side of the frame portion 16 having the positioning holes 51 and 52 while avoiding the positioning holes 51 and 52. The blank area 27 is disposed at an intermediate portion between the outer peripheral edge and the inner peripheral edge of the mesh-like conductor layer 22.

  As shown in FIGS. 1, 2, and 12, an outer metal layer 61 is disposed on a surface layer of the outer core 20, that is, on the laminated substrate main surface 12 and the laminated substrate back surface 13 in the frame portion 16. ing. The outer metal layer 61 is a plain conductor formed in a rectangular frame shape so as to surround the product forming region 15. The outer peripheral edge of the outer metal layer 61 coincides with the outer peripheral edge of the outer core 20, and the inner peripheral edge of the outer metal layer 61 is located on the boundary line between the frame portion 16 and the product formation region 15. The outer metal layer 61 is set to be about 4 times the thickness of the conductor layer 36 constituting the first buildup layer 31. In the present embodiment, the thickness of the conductor layer 36 is set to 25 μm, and the thickness of the outer metal layer 61 is set to about 100 μm.

  In addition, the outer metal layer 61 disposed on the laminated substrate main surface 12 in the frame portion 16 is provided with a marking portion 62. The engraving portion 62 is made up of characters (such as “ABCDE” in this embodiment) indicating a lot number, product number, or the like. The marking portion 62 is arranged on the side of the frame portion 16 having the positioning holes 51 and 52 so as to avoid the positioning holes 51 and 52. In addition, the marking portion 62 is disposed at an intermediate portion between the outer peripheral edge and the inner peripheral edge of the outer metal layer 61. The marking portion 62 of the present embodiment is a character of about 6 mm in length × 6 mm in width, and the depth of the marking portion 62 is set to about 30 μm. The blank area 27 is set at a position directly below the marking portion 62 in the mesh conductor layer 22. The area of the blank area 27 is set to be slightly larger than the area of the formation area of the marking portion 62. As a result, the blank area 27 is positioned immediately below the marking portion 62.

  Next, a method for manufacturing the intermediate product 10 of the wiring board will be described.

  Here, first, the core substrate 11 is manufactured. In the preparation step, a copper clad laminate in which a metal layer 71 (see FIG. 3) for forming an inner conductor layer made of copper foil having a thickness of 35 μm is attached to both surfaces of a base material having a length of 410 mm × width of 430 mm × thickness of 0.8 mm (see FIG. 3) An inner core 17) is prepared.

  In the subsequent etching resist material arrangement step, an etching resist material 72 imparted with photosensitivity is provided on the inner conductor layer forming metal layer 71 (see FIG. 4). Further, in the exposure mask arrangement step, an exposure mask 74 on which a predetermined mask pattern 73 is formed is arranged on the etching resist material 72. In the exposure process, the etching resist material 72 is exposed through the exposure mask 74, and in the subsequent development process, the etching resist material 72 is developed to form an etching resist 75 (see FIG. 5). Next, in the etching step, the inner conductor layer-forming metal layer 71 is etched to partially dissolve and remove the inner conductor layer-forming metal layer 71. As a result, the inner conductor layer 21 is formed on the surface of the product formation region 15. At the same time, the mesh-like conductor layer 22 is patterned on the surface of the frame portion 16, and a blank area 27 is set in the area where the mesh-like conductor layer 22 is formed (see FIGS. 6 and 7).

  In the subsequent laminating process, the inner core 17, the outer core 20, and the copper foil 76 are stacked and integrated to form a laminated substrate body 78. More specifically, first, prepregs 77 each having a copper foil 76 (metal foil) attached on one side are arranged on the inner core upper surface 18 and the inner core lower surface 19 of the inner core 17 (see FIG. 8). In the present embodiment, the thickness of the prepreg 77 is 115 μm, and the thickness of the copper foil 76 is 28 μm or 33 μm. Then, a pressing force (2 MPa) is applied in the laminating direction (bonding direction) while heating to a temperature of 180 ° C. or higher (hot pressing). Along with this, the inner core 17, the prepreg 77, and the copper foil 76 are pressed along the stacking direction, and the viscosity of the organic material in the prepreg 77 is increased by heat. As a result, the prepreg 77 and the copper foil 76 are bonded (thermocompression bonding) on the inner core upper surface 18 and the inner core lower surface 19, respectively, so that the prepreg 77 becomes the outer core 20, and the laminated substrate body 78 is completed.

  In the subsequent through-hole conductor forming step, the through-hole conductor 25 penetrating the multilayer substrate body 78 is formed in the product forming region 15. More specifically, first, a drilling machine is used to drill a hole in the multilayer substrate body 78, and the through holes 24 for forming the through hole conductors 25 are formed in advance at predetermined positions (see FIG. 9). . Then, electroless copper plating is applied to the entire surface of the laminate to form through-hole conductors 25 on the inner peripheral surfaces of the through holes 24 (see FIG. 10).

  In the subsequent marking step, a marking portion 62 is provided on the copper foil 76 by marking a portion of the copper foil 76 formed on the laminated substrate main surface 12 directly above the blank region 27. Specifically, the upper die 82 is placed on the laminated substrate main surface 12 side of the core substrate 11 with the lower substrate 81 supporting the laminated substrate back surface 13 side of the core substrate 11 (see FIG. 10). The upper mold 82 has a convex portion 83 for forming a stamp on the lower surface side. Moreover, since the upper mold | type 82 of this embodiment can switch the multiple types of convex part 83, the marking part 62 which shows a different lot number and a product number for every core board | substrate 11 can be formed.

  Next, a pressing force (4 MPa) is applied in the stacking direction. Along with this, as a result of a part of the copper foil 76 being pressed and recessed by the convex portion 83, a stamped portion 62 is formed (see FIGS. 11 and 12). At this time, the lower portion of the marking portion 62 in the outer core 20 is slightly recessed.

  Next, a resin paste is printed and filled in the through-hole conductor 25 and heated and cured to form the filler 26. Furthermore, after performing lid plating, the laminated substrate main surface 12 side and the laminated substrate back surface 13 side of the core substrate 11 are polished. As a result, since the flatness of the core substrate 11 is improved, the build-up layers 31 and 32 can be accurately formed in the subsequent steps (insulating layer forming step and conductor layer forming step). Then, the conductor pattern 23 and the outer metal layer 61 are patterned (see FIG. 11). At this point, the core substrate 11 is completed.

  After the core substrate 11 is completed, an insulating layer forming step for forming the insulating layers 33 to 35 and 40 to 42 and a conductor layer forming step for forming the conductor layer 36 having a predetermined pattern are alternately performed to stack the core substrate 11. Build-up layers 31 and 32 are formed on the substrate main surface 12 and the laminated substrate back surface 13. More specifically, first, a sheet-like thermosetting epoxy resin is laminated on the laminated substrate main surface 12 and the laminated substrate back surface 13 of the core substrate 11 to form the first insulating layers 33 and 40 in an uncured state. Next, the insulating layers 33 and 40 are semi-cured by heating to 170 ° C. Further, a blind hole is formed at a position where the via conductor 37 is to be formed by a laser processing machine. Then, the insulating layers 33 and 40 are cured by heating to 180 ° C. Next, electrolytic copper plating is performed according to a conventionally known method (for example, a semi-additive method) to form a via conductor 37 in the blind hole and a conductor layer 36 on the insulating layers 33 and 40. At this time, since the electrolytic copper plating is also performed on the outer metal layer 61, the outer metal layer 61 is thickened by the thickness of the conductor layer 36.

  Then, a sheet-like thermosetting epoxy resin is laminated on the first insulating layers 33 and 40 to form the second insulating layers 34 and 41 in an uncured state. Next, the insulating layers 34 and 41 are semi-cured by heating to 170 ° C. Further, a blind hole is formed at a position where the via conductor 37 is to be formed by a laser processing machine. Then, the insulating layers 34 and 41 are cured by heating to 180 ° C. Further, electrolytic copper plating is performed in accordance with a conventionally known method to form a via conductor 37 inside the blind hole and to form a conductor layer 36 on the insulating layers 34 and 41. At this time, since the electrolytic copper plating is performed also on the outer metal layer 61, the outer metal layer 61 is further thickened by the thickness of the conductor layer 36.

  Further, a sheet-like thermosetting epoxy resin is laminated on the second insulating layers 34 and 41 to form third insulating layers 35 and 42 in an uncured state. Next, the insulating layers 35 and 42 are semi-cured by heating to 170 ° C. Further, a blind hole is formed at a position where the via conductor 37 is to be formed by a laser processing machine. Then, the insulating layers 35 and 42 are cured by heating to 180 ° C. Further, electrolytic copper plating is performed in accordance with a conventionally known method to form a via conductor 37 inside the blind hole and to form terminal pads 38 and 43 on the insulating layers 35 and 42. At this time, since the electrolytic copper plating is performed also on the outer metal layer 61, the outer metal layer 61 is further thickened by the thickness of the terminal pads 38 and 43. The buildup layers 31 and 32 are completed at this stage.

  Next, solder resists 39 and 44 are formed by applying and curing a photosensitive epoxy resin on the third insulating layers 35 and 42. Next, exposure and development are performed with a predetermined mask placed, and the solder resists 39 and 44 are patterned to expose the terminal pads 38 and 43. As a result, the intermediate product 10 of the wiring board shown in FIG. 1 is obtained.

  Thereafter, the frame portion 16 is cut and removed from the product formation region 15 using a conventionally known cutting device or the like, and cut along the planned cutting line 45 in the product formation region 15. Thereby, products are divided and a multi-piece product (wiring board) is obtained.

  Therefore, according to the present embodiment, the following effects can be obtained.

  (1) According to the core substrate 11 of the present embodiment, since the blank region 27 where the mesh-like conductor layer 22 does not exist is provided immediately below the engraved portion 62, an uneven structure that tends to concentrate stress originally exists. In other words, cracks (see FIG. 18) are less likely to occur in the outer core 20. For this reason, it is prevented that a crack progresses to the product formation area 15, and liquids, such as a plating solution which permeated through the crack, flow into the product formation area 15 along the mesh-like conductor layer 22, and the product formation area 15 The peeling of the outer core 20 and the inner conductor layer 21 can be prevented. Therefore, it is possible to prevent a decrease in the yield of the core substrate 11 due to cracks and peeling, and to impart high reliability to the core substrate 11.

  (2) Since the blank area 27 of the present embodiment is an area where there is no metal part such as a conductor layer, the adhesion strength between the inner core 17 and the outer core 20 is higher than the other parts. Accordingly, cracks and peeling are less likely to occur in the blank region 27 where impact is easily transmitted when the stamped portion 62 is formed. In addition, if there is any metal part in the blank area 27, when a crack occurs, a liquid such as a plating solution may penetrate the metal part and penetrate between the inner core 17 and the outer core 20, Since there is no metal portion in the blank area 27 of the present embodiment, the above-described liquid penetration is prevented. In addition, the mesh-like conductor layer 22 of this embodiment also has a function as a dam that dams up liquid that has entered through cracks.

  (3) By the way, as an exposure mask used in the exposure mask arrangement step (see FIG. 4), it is conceivable that a light shielding tape or the like is attached to an exposure original plate (glass mask or the like). However, it is difficult to apply the light shielding tape accurately. In addition, when a light shielding tape is used, pinholes or dust is generated in the light shielding tape due to peeling, deterioration, or adhesive of the light shielding tape. On the other hand, in this embodiment, since the exposure mask 74 in which the predetermined mask pattern 73 is formed is used instead of the exposure mask to which a light shielding tape or the like is attached, the above problem is solved.

  In addition, you may change embodiment of this invention as follows.

  In the above embodiment, the blank region 27 is set at a position immediately below the stamped portion 62 in the mesh-like conductor layer 22. However, as shown in FIGS. 13 and 14, a plain-shaped conductor region 91 having no punch pattern may be set at a position immediately below the marking portion 62 in the mesh-shaped conductor layer 22. In the plane-shaped conductor region 91, a plane-shaped conductor 92 having a rectangular shape in plan view of 8 mm in length and 40 mm in width exists. The plain conductor 92 is formed simultaneously with the mesh conductor layer 22, for example.

  Even in this case, stress concentration in the vicinity of the mesh-like conductor layer 22 due to the impact applied when the stamped portion 62 is formed can be prevented, so that the occurrence of cracks (see FIG. 18) in the outer core 20 can be prevented. Accordingly, it is possible to prevent the crack from proceeding to the product formation region 15 and the liquid such as the plating solution that has entered through the crack from flowing into the product formation region 15 along the belt-like pattern of the mesh conductor layer 22. . For this reason, it is possible to prevent the outer core 20 and the inner conductor layer 21 from being peeled off in the product formation region 15 due to the advanced cracks and the infiltrated liquid. Therefore, it is possible to prevent a decrease in the yield of the core substrate 11 due to cracks and peeling, and to impart high reliability to the core substrate 11.

  In the above embodiment, the blank region 27 is set only at a position directly below the stamped portion 62 in the mesh conductor layer 22 on the inner core upper surface 18. However, the blank region 27 may also be set at a position immediately below the stamped portion 62 in the mesh conductor layer 22 on the inner core lower surface 19. By doing so, the mesh-like conductor layer 22 does not exist in the portion where the impact at the time of forming the stamped portion 62 is easily transmitted on the inner core lower surface 19 side, so that the occurrence of cracks can be prevented more reliably.

  In the above embodiment, the formation of the filler 26, the lid plating, the patterning of the conductor pattern 23 and the outer metal layer 61 are performed after the formation of the marking portion 62, but may be performed before the formation of the marking portion 62. . In the above embodiment, the conductor pattern 23 and the outer metal layer 61 are patterned after the lid plating. However, after the outer metal layer 61 is patterned, the conductor pattern 23 is patterned by performing the lid plating. It may be formed.

In the above embodiment, the mesh conductor layer 22 is patterned on the surface of the frame portion 16 and the blank area 27 is set in the area where the mesh conductor layer 22 is formed, but the other areas shown in FIGS. As in the embodiment, a dam-like conductor 95 surrounding the blank region 27 may be formed together. According to this configuration, the blank area 27 and the mesh-like conductor layer 22 therearound are partitioned, and the penetration of the plating solution into the blank area 27 is reliably prevented. Therefore, it is possible to reliably prevent the adhesion in the blank area 27 from being lowered, and as a result, it is easy to achieve an improvement in reliability. The dam-like conductor 95 is preferably formed simultaneously with the surrounding mesh-like conductor layer 22.
In the above embodiment, the mesh conductor layer 22 is formed. However, as in another embodiment shown in FIG. 17, for example, a dotted conductor layer such as a polka dot pattern conductor layer 22 </ b> A may be formed.
Next, the technical ideas grasped by the embodiment described above are listed below.

  (1) A product forming region having a structure in which a plurality of resin insulating layers are stacked and an outer metal layer is disposed on the surface layer, and a plurality of portions to be products are disposed along the substrate plane direction, and the product forming region A mesh-like conductor layer or a dotted conductor layer is formed between the plurality of resin insulation layers in the frame portion, and a marking portion is formed on the outer metal layer in the frame portion. Provided in the mesh-like conductor layer or in the dotted-like conductor layer at a position directly below the engraved portion, there is a blank area or a blank pattern in which neither the mesh-like conductor layer nor the dotted-like conductor layer exists. A method of manufacturing a laminated substrate in which a non-planar conductor region is set, and after preparing a resin insulation layer for an inner layer having an inner layer conductor layer forming metal layer on its surface, the inner layer conductor layer forming metal layer D A preparatory step of forming an inner conductor layer on the surface in the product formation region and forming the mesh conductor layer or the scattered conductor layer on the surface in the frame, and resin insulation for the inner layer Laminating step of forming a laminated substrate body by stacking and integrating a resin insulating layer for outer layer and a metal foil, and forming a laminated substrate body, and forming a through-hole conductor that penetrates the laminated substrate body in the product formation region And a marking step of providing the marking portion on the outer layer metal layer by marking a position directly above the blank region or the plain-shaped conductor region in the outer layer metal layer including the metal foil. The manufacturing method of the laminated substrate characterized by including.

  (2) A product formation region having a structure in which a plurality of resin insulation layers are stacked and an outer metal layer is disposed on the surface layer, and a plurality of portions to be products are disposed along the substrate plane direction, and the product formation region A mesh-like conductor layer or a dotted conductor layer is formed between the plurality of resin insulation layers in the frame portion, and a marking portion is formed on the outer metal layer in the frame portion. Provided in the mesh-like conductor layer or in the dotted-like conductor layer at a position directly below the engraved portion, there is a blank area or a blank pattern in which neither the mesh-like conductor layer nor the dotted-like conductor layer exists. A method of manufacturing a laminated substrate in which a non-planar conductor region is set, and after preparing a resin insulation layer for an inner layer having an inner layer conductor layer forming metal layer on its surface, the inner layer conductor layer forming metal layer above A step of providing an etching resist material imparted with light, a step of placing an exposure mask on which a predetermined mask pattern is formed on the etching resist material, a step of exposing the etching resist material through the exposure mask, Developing the etching resist material to form an etching resist; and etching the inner conductor layer forming metal layer to form an inner conductor layer on the surface in the product formation region; and the surface in the frame portion A preparatory step for forming the mesh-like conductor layer or the dotted-like conductor layer, and the inner layer resin insulation layer, the outer layer resin insulation layer, and the metal foil are stacked and integrated to form a laminated substrate body. And a through-hole conductor type for forming a through-hole conductor penetrating through the multilayer substrate body in the product formation region And a marking step of providing the marking portion on the outer layer metal layer by marking a position directly above the blank region or the plain-shaped conductor region in the outer layer metal layer including the metal foil. The manufacturing method of the laminated substrate characterized by including.

  (3) A product formation region having a structure in which a plurality of resin insulation layers are stacked and an outer metal layer is disposed on the surface layer, and a plurality of portions to be products are disposed along the substrate plane direction, and the product formation region A mesh-like conductor layer or a dotted conductor layer is formed between the plurality of resin insulation layers in the frame portion, and a marking portion is formed on the outer metal layer in the frame portion. An intermediate product of a wiring board comprising: a laminated board provided; and a build-up layer provided on at least one of a laminated board main surface and a laminated board back surface of the laminated board, wherein insulating layers and conductor layers are alternately laminated. In this case, a blank area in which neither the mesh conductor layer nor the scattered conductor layer exists is set at a position immediately below the engraved portion in the mesh conductor layer or the scattered conductor layer. An intermediate product of the wiring board to be.

The principal part schematic sectional drawing which shows the intermediate product of the wiring board in this embodiment. The schematic plan view which shows the intermediate product of a wiring board. The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic plan view which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic plan view which shows the manufacturing method of a wiring board (core board | substrate). The principal part schematic sectional drawing which shows the intermediate product of the wiring board in other embodiment. The principal part schematic plan view which shows the intermediate product of the wiring board in other embodiment. The principal part schematic plan view which shows the intermediate product of the wiring board in other embodiment. The principal part schematic sectional drawing which shows the intermediate product of the wiring board in other embodiment. The principal part schematic plan view which shows the intermediate product of the wiring board in other embodiment. The principal part schematic plan view which shows the intermediate product of the wiring board in a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Core board | substrate 12 as a laminated substrate ... Laminated substrate main surface 13 ... Laminated substrate back surface 14 ... Part 15 which should become a product ... Product formation area 16 ... Frame part 17 ... Inner core 20 as a resin insulation layer for inner layers ... Outer layer Outer core 22 as a resin insulating layer for the metal ... Mesh conductor layer 22A ... Polka dot pattern conductor layer 25 as a dotted conductor layer ... Through-hole conductor 27 ... Blank region 31 ... First buildup layer as a buildup layer 32 ... Second buildup layers 33, 34, 35, 40, 41, 42 as buildup layers ... Insulating layer 36 ... Conductor layer 61 ... Outer metal layer 62 ... Stamped portion 76 ... Copper foil 78 as metal foil ... Lamination Substrate main body 91 ... Plain conductor region 95 ... Dam conductor

Claims (6)

It has a structure in which a plurality of resin insulating layers are stacked and an outer metal layer is arranged on the surface layer, and a product forming region in which a plurality of portions to be products are arranged along the plane direction of the substrate and the product forming region are surrounded. A mesh-like conductor layer or a dotted conductor layer is formed between the plurality of resin insulation layers in the frame portion, and a marking portion is provided in the outer metal layer in the frame portion. In laminated substrates,
A blank region in which neither the mesh-like conductor layer nor the scattered conductor layer exists is set at a position immediately below the marking portion in the mesh-like conductor layer or the scattered conductor layer. Laminated substrate.   The multilayer substrate according to claim 1, wherein the blank region is surrounded by a dam-shaped conductor. It has a structure in which a plurality of resin insulating layers are stacked and an outer metal layer is arranged on the surface layer, and a product forming region in which a plurality of portions to be products are arranged along the plane direction of the substrate and the product forming region are surrounded. A mesh-like conductor layer or a dotted conductor layer is formed between the plurality of resin insulation layers in the frame portion, and a marking portion is provided in the outer metal layer in the frame portion. In laminated substrates,
A multilayer substrate, wherein a plain-shaped conductor region having no punch pattern is set at a position immediately below the engraved portion in the mesh-shaped conductor layer or the dotted conductor layer.   2. A core substrate in a build-up multilayer wiring board comprising a build-up layer in which an insulating layer and a conductor layer are alternately laminated on at least one of the main surface of the multilayer substrate and the back surface of the multilayer substrate. 4. The laminated substrate according to any one of items 1 to 3. A method for manufacturing a laminated substrate according to any one of claims 1 to 4,
The mesh conductor layer or the dotted conductor layer is formed on the surface of the frame portion, and the blank area or the plain conductor area is in the area where the mesh conductor layer or the dotted conductor layer is formed. A preparation step of preparing a set resin insulation layer for the inner layer;
A lamination step of stacking and integrating the resin insulation layer for the inner layer, the resin insulation layer for the outer layer, and the metal foil to form a laminated substrate body;
A through-hole conductor forming step of forming a through-hole conductor penetrating the multilayer substrate body in the product formation region;
A marking step of providing the marking portion on the outer metal layer by marking a portion of the outer metal layer including the metal foil directly above the blank region or the plain conductor region. A method for producing a laminated substrate characterized by the above.   The method for manufacturing a multilayer substrate according to claim 5, wherein in the preparation step, a dam-like conductor surrounding the blank area is formed.

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