CN105870075A - Substrate structure - Google Patents
Substrate structure Download PDFInfo
- Publication number
- CN105870075A CN105870075A CN201510032482.3A CN201510032482A CN105870075A CN 105870075 A CN105870075 A CN 105870075A CN 201510032482 A CN201510032482 A CN 201510032482A CN 105870075 A CN105870075 A CN 105870075A
- Authority
- CN
- China
- Prior art keywords
- wiring region
- portion inside
- board structure
- insulating barrier
- metal level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
The invention discloses a substrate structure. The substrate structure includes a board body and a supporting component; a wiring region and a non-wiring region are defined on the board body; the supporting component is arranged on the non-wiring region; the wiring region is provided with at least one circuit layer; the edge of the wiring region is provided with an insulating layer; the supporting component is provided with an inner connection portion which adjoins the insulating layer; and an interface between the inner connection portion and the insulating layer is a non-flat surface, so that the contact area of the inner connection portion and the insulating layer can be increased, and therefore, the bonding strength of the insulating layer and the supporting component can be increased. The insulating layer can be effectively fixed by the inner connection portion, so that the fracture of the insulating layer at the interface between the inner connection portion and the insulating layer can be avoided.
Description
Technical field
The present invention relates to a kind of board structure, particularly relate to a kind of board structure that can promote reliability.
Background technology
Along with the evolution of semiconductor packaging, semiconductor device (Semiconductor device) is developed
Different encapsulation kenels, and be to promote electrical functionality and save encapsulated space, heap adds multiple encapsulating structure then
To form encapsulation stacking structure (Package on Package is called for short PoP), this kind of packaged type can play system
System encapsulation (System in Package is called for short SiP) heterogeneous integration characteristic, can be by the electronics of different functions
Element, such as: memorizer, central processing unit, graphic process unit, image application processor etc., passes through
Stack design reaches the integration of system, is suitably applied the various electronic product of light and thin type.
General packaging technology is to be located on base plate for packaging by chip, and along with electronic product more they tends to frivolous short
The demand that little and function constantly promotes, the wiring density of memory package part is the highest, with nano-scale
Office, thus the spacing between its contact is less.
Figure 1A and Figure 1B is section and the upper schematic diagram of existing board structure 1.
As illustrated in figures ia and ib, plate body 10 definition has wiring region A and around described wiring region A
Non-wiring region B, described wiring region A by multiple base board unit 10a (dotted line as shown in Figure 1A) institute
Constitute.
The upper and lower both sides of described wiring region A have first line layer 11 and the second line layer 12, and
There is in described plate body 10 leading of multiple electric connection described first line layer 11 and the second line layer 12
Electricity post 100, is formed with one first insulating barrier 13 and the second insulating barrier 14 on described wiring region A, and
Expose part surface and the part surface of the second line layer 12 of described first line layer 11, using as outward
Connection pad, for forming a surface-treated layer 15.
The upside of described non-wiring region B is provided with a metal level 16 and be located on described metal level 16
Carrying tablet 17, using as support member 19.
And in existing board structure 1, described metal level 16 and the first insulating barrier 13 are in described wiring region A
Present straight line with the intersection of described non-wiring region B and trim state (upright dotted line L as shown in Figure 1A),
So that the downforce of described carrying tablet 17 easily makes described board structure 1 from described metal level 16 and institute
The interface S stated between the first insulating barrier 13 ruptures on the downside of described plate body 10.
Therefore, how to overcome the breakage problem of prior art, become the problem desiring most ardently solution at present in fact.
Summary of the invention
In view of the defect of above-mentioned prior art, the present invention provides a kind of board structure, can strengthen described insulation
Bond strength between layer and described support member.
The positive space of a whole page substrate of the present invention includes: a plate body, and its definition has an adjacent wiring region and non-
Wiring region, described wiring region is provided with at least one line layer, and it is exhausted to be laid with one in the edge of described wiring region
Edge layer；And a support member, it is located on described non-wiring region and has one and adjoins the interior of described insulating barrier
Meet portion, and the interface of described portion inside and described insulation interlayer presents non-burnishing surface.
Aforesaid board structure, metal level that described support member comprises a described insulating barrier of connection and be located at institute
State the carrying tablet on metal level.Described portion inside is made up of described metal level.Described portion inside is by institute
Stating metal level to be constituted with described carrying tablet, the medial surface lower edge of described carrying tablet forms concavo-convex edge.
Aforesaid board structure, described support member is a metal level, and described metal level has one and adjoins institute
State the edge strip of insulating barrier, make described edge strip as described portion inside.
Aforesaid board structure, being shaped as of described portion inside is latticed, city wall shape or Palta type.
From the foregoing, it will be observed that the board structure of the present invention, by the interface of described portion inside Yu described insulation interlayer
Present non-burnishing surface, to increase the contact area of described portion inside and described insulating barrier, so compared to existing
Have technology, the portion inside of the present invention can effective insulating barrier described in build-in, to avoid described insulating barrier from described
Portion inside and the interfacial fracture of described insulation interlayer.
Accompanying drawing explanation
Figure 1A is the upper schematic diagram of existing board structure；
Figure 1B is the part sectioned view of Figure 1A；
Fig. 2 A is the upper schematic diagram of board structure of the present invention；
Fig. 2 B is the part sectioned view of Fig. 2 A；
Fig. 2 C is the partial side view of Fig. 2 A；
Fig. 2 D is to regard schematic diagram in the end of Fig. 2 A；
Fig. 3 A to Fig. 3 C is the local upper schematic diagram of the different embodiments of the portion inside of the present invention；
Fig. 3 D is the profile of another embodiment of board structure of the present invention；
Fig. 3 D ' is the local upper schematic diagram of Fig. 3 D；
Fig. 4 A is the upper schematic diagram of another embodiment of board structure of the present invention；
Fig. 4 B is the part sectioned view of Fig. 4 A；
Fig. 4 C is the partial side view of Fig. 4 A.
Symbol description
1,2,3,4 board structures
10,20 plate bodys
10a, 20a base board unit
100,200 conductive poles
11,21 first line layers
12,22 second line layers
13,23 first insulating barriers
14,24 second insulating barriers
15,25 surface-treated layers
16,26 metal levels
17,27 carrying tablets
19,29,39,49 support members
26a main body
260,260 ', 260 ", 360 edge strips
260a, 360a side
261 protuberances
262 pads
270 medial surface
28 metal gaskets
290,390,490 portion inside
291,491 outer parts
37 projecting blocks
A wiring region
The non-wiring region of B
The upright dotted line of L
S interface
H, r height.
Detailed description of the invention
Below by way of particular specific embodiment, embodiments of the present invention being described, those skilled in the art can
Other advantages and effect of the present invention is understood easily by content disclosed in this specification.
It should be clear that structure shown by this specification accompanying drawing, ratio, size etc., all it is only used for coordinating explanation
Book disclosure of that, for understanding and the reading of those skilled in the art, is not intended to limit the present invention
Enforceable qualifications, so not having technical essential meaning, the modification of any structure, ratio are closed
The change of system or the adjustment of size, do not affecting effect and the achieved purpose that the present invention can be generated by
Under, all should still fall in the range of technology contents disclosed in this invention obtains and can contain.Meanwhile, this explanation
In book cited as " on ", D score, " first ", the term such as " second " and " ", be also only and be easy to narration
Understand, not for limit the enforceable scope of the present invention, being altered or modified of its relativeness,
Without under essence change technology contents, when being also considered as the enforceable category of the present invention.
Fig. 2 A is the upper schematic diagram of board structure 2 of the present invention.Fig. 2 B, Fig. 2 C and Fig. 2 D are Fig. 2 A
Part section, partial side and bottom view.Described board structure 2 refers to not yet carry out singulation process,
And the substrate after singulation is mainly used on the product of encapsulation stacking structure of thin space and many pins, example
Such as products such as smart mobile phone, flat board, Netcom, notebook computers.
As shown in Fig. 2 A, Fig. 2 B and Fig. 2 C, plate body 20 definition has the adjacent institute of wiring region A and cincture
Stating the non-wiring region B of wiring region A, described wiring region A is (such as Fig. 2 B institute by multiple base board unit 20a
The dotted line shown) constituted, to separate the structure on each described base board unit 20a when the follow-up singulation process,
And the structure on described non-wiring region B will remove when follow-up singulation process.
The upper and lower both sides of described wiring region A have first line layer 21 and the second line layer 22 and
First insulating barrier 23 and the second insulating barrier 24, and have described in multiple electric connection in described plate body 20
First line layer 21 and the conductive pole 200 of the second line layer 22, described first insulating barrier 23 is exhausted with second
Edge layer 24 also exposes part surface and the part surface of the second line layer 22 of described first line layer 21,
Using as outer connection pad, and on more described outer connection pad, form a surface-treated layer 25.
In the present embodiment, described first insulating barrier 23 and the second insulating barrier 24 are with die cast, coating
Mode or pressing mode are formed on described plate body 20, and it is exhausted with second to form described first insulating barrier 23
The material of edge layer 24 is casting die compound (Molding Compound), subbing (Primer) or such as
The dielectric material of epoxy resin (Epoxy).
Additionally, more described outer connection pad is for combining soldered ball (figure slightly), electronic installation needed for combining (as
Circuit board, chip, logical wrapper part or memory package part).
The upside of described non-wiring region B is provided with a support member 29, and described support member 29 has a linking
The portion inside 290 and one of described wiring region A (i.e. adjoining described first insulating barrier 23) is described around adjoining
The outer part 291 of portion inside 290.
In the present embodiment, described support member 29 by a metal level 26 be located on described metal level 26
One carrying tablet 27 is constituted.Specifically, described metal level 26 is layers of copper, its have be covered in described non-
Main body 26a on the upside of the B of wiring region and (the most described first insulation of the adjacent A edge, described wiring region of cincture
Layer 23) an edge strip 260, and described carrying tablet 27 covers described main body 26a and do not covers described edge strip
260, make described edge strip 260 expose to described carrying tablet 27.
Therefore, described edge strip 260 is in framework, and described portion inside 290 is made up of described edge strip 260,
And described outer part 291 is made up of described main body 26a and described carrying tablet 27, make described portion inside 290
Height r less than the height h of described outer part 291, and make described portion inside 290 and described first insulation
Interface S between layer 23 presents non-burnishing surface, and (the zigzag interface S of Fig. 2 A is only signal, in detail such as figure
Shown in 3A to Fig. 3 D).
Additionally, as shown in Figure 2 C, the side of described board structure 2 is broadly divided into three layers of (the most described plate
Body 20, described metal level 26 and described carrying tablet 27).
Also, as shown in Figure 2 D, in the downside of the non-wiring region B of described plate body 20, described second insulation
Layer 24 is formed with multiple round hole to expose the metal surface such as copper, to be provided as circular metal pad 28.
It addition, be fabricated to non-flat facing directly (as shown in Figure 2 A by the side 260a of described edge strip 260
Interface S), make the side surface of described portion inside 290 present and non-flat face (as concavo-convex) directly, to increase
State the first insulating barrier 23 and the contact area of described metal level 26 (the most described portion inside 290), use increasing
Bond strength between the most described first insulating barrier 23 and described support member 29.
Of a great variety, as shown in Fig. 3 A to Fig. 3 C about portion inside (the interface S of the most non-smooth shape).
(omitting described carrying tablet 27) as shown in Figure 3A, described portion inside 290 is latticed, makes institute
State interface S (thick line in figure).Specifically, described edge strip 260 is etched into latticed to define
State portion inside 290.Such as, it is initially formed described first line layer 21 and described latticed edge strip 260, then
Make described first insulating barrier 23, so the side 260a of described edge strip 260 is concavo-convex or dentation, and
The part material of described first insulating barrier 23 can be formed in grid.
As shown in Figure 3 B, described portion inside 290 is city wall shape.Specifically, described edge strip 260 ' is formed
Multiple have interval and the protuberance 261 that differs of length to define described portion inside 290, and described protuberance
261 adjoin described main body 26a, so the part material of described first insulating barrier 23 can be formed at each described
Between protuberance 261, described interface S (thick line in figure) is made to present non-burnishing surface.
As shown in Figure 3 C, the Palta type that described portion inside 290 is constituted by multiple pads 262.Specifically,
In described edge strip 260 " on etch the pad 262 of multiple differ in size (shape is not intended to) to define
Described portion inside 290, and the part material of described first insulating barrier 23 can be formed at each described pad 262
Between, so described edge strip 260 " side 260a be concavo-convex, make described interface S (thick line in figure)
Present non-burnishing surface.
The board structure 2 of the present invention be the portion inside 290 of described support member 29 is designed as non-smooth shape (as
Edge strip 260,260 ', 260 "), make described interface S present non-burnishing surface, so described portion inside 290 can
Disperse the downforce from described carrying tablet 27, to avoid the first more crisp insulating barrier 23 1 folding i.e. from institute
State medial surface 270 (or the described interface S) fracture of carrying tablet 27.
Fig. 3 D and Fig. 3 D ' is the schematic diagram of another embodiment of board structure 3 of the present invention.
As shown in Fig. 3 D and Fig. 3 D ', described portion inside 390 is by described edge strip 360 and described carrying tablet
27 are constituted.Specifically, the side 360a of described edge strip 360 is burnishing surface, and in described carrying tablet
Medial surface 270 lower edge of 27 forms concavo-convex edge, as by like half round dot and protrusion as a example by described concavo-convex edge
Multiple projecting blocks 37 that length differs are constituted, and combine described first insulation with more described projecting block 37
Layer 23.
Therefore, although described carrying tablet 27 covers described edge strip 360, but passes through more described projecting block 37
Design, making medial surface 270 lower edge of harder carrying tablet 27 is that concavo-convex portion inside 390 is (such as institute
State the most described medial surface of projecting block 37 270 to protrude), the most described interface S presents non-burnishing surface, so
Still can increase the contact area of described first insulating barrier 23 and described portion inside 390, to strengthen described first
Bond strength between insulating barrier 23 and described support member 39, making the first more crisp insulating barrier 23 be susceptible to should
Power and fracture.
Fig. 4 A is the upper schematic diagram of another embodiment of board structure 4 of the present invention.Fig. 4 B and Fig. 4 C
Part section and partial side view for Fig. 4 A.The difference of the present embodiment and above-described embodiment is only that and does not sets
Having carrying tablet 27, other structure is identical, so repeating no more, hereby states clearly.
As shown in Fig. 4 A, Fig. 4 B and Fig. 4 C, described support member 49 is described metal level 26, and institute
State edge strip 260 as portion inside 490, and described main body 26a is as described outer part 491, wherein, has
Close described portion inside 490 concavo-convex surface can edge strip 260,260 ' as shown in Fig. 3 A to Fig. 3 C, 260 "
Kenel.
In sum, the board structure 2 of the present invention, 3,4, mainly pass through the interior of described support member 29,39,49
Meet portion 290,390,490 and there is the design of convex-concave surface, make described portion inside 290,390,490 and described the
Interface S between one insulating barrier 23 presents non-burnishing surface (such as zipper), to increase described portion inside
Contact area between 290,390,490 and described first insulating barrier 23, so described portion inside 290,390,490
Can effective the first insulating barrier 23 described in build-in, to avoid described first insulating barrier 23 1 folding i.e. from described interface
Rupture at S.
Above-described embodiment is only used for principle and effect thereof of the illustrative present invention, not for limiting this
Invention.Any those skilled in the art all can be under the spirit and the scope of the present invention, to above-mentioned reality
Execute example to modify.Therefore the scope of the present invention, should limit such as claims.
Claims (7)
1. a board structure, it is characterised in that described board structure includes:
One plate body, its definition has an adjacent wiring region and a non-wiring region, described wiring region be provided with to
A few line layer, and it is laid with an insulating barrier in the edge of described wiring region；And
One support member, it is located on described non-wiring region and has a portion inside adjoining described insulating barrier,
And the interface of described portion inside and described insulation interlayer presents non-burnishing surface.
Board structure the most according to claim 1, it is characterised in that described support member comprises a connection
The metal level of described insulating barrier and the carrying tablet being located on described metal level.
Board structure the most according to claim 2, it is characterised in that described portion inside is by described metal
Layer is constituted.
Board structure the most according to claim 2, it is characterised in that described portion inside is by described metal
Layer is constituted with described carrying tablet.
Board structure the most according to claim 4, it is characterised in that under the medial surface of described carrying tablet
Edge forms concavo-convex edge.
Board structure the most according to claim 1, it is characterised in that described support member is a metal level,
And described metal level has an edge strip adjoining described insulating barrier, make described edge strip as described portion inside.
Board structure the most according to claim 1, it is characterised in that being shaped as of described portion inside
Latticed, city wall shape or Palta type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510032482.3A CN105870075A (en) | 2015-01-22 | 2015-01-22 | Substrate structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510032482.3A CN105870075A (en) | 2015-01-22 | 2015-01-22 | Substrate structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105870075A true CN105870075A (en) | 2016-08-17 |
Family
ID=56623437
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510032482.3A Pending CN105870075A (en) | 2015-01-22 | 2015-01-22 | Substrate structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105870075A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000340715A (en) * | 1999-05-31 | 2000-12-08 | Kyocera Corp | Wiring board for mounting semiconductor element and semiconductor device using the same |
| CN1426102A (en) * | 2001-12-10 | 2003-06-25 | 矽统科技股份有限公司 | Chip package base board |
| CN101198211A (en) * | 2006-12-04 | 2008-06-11 | 日本特殊陶业株式会社 | Laminated substrate and manufacturing method thereof |
| JP2008186878A (en) * | 2007-01-29 | 2008-08-14 | Kyocera Corp | Wiring board and semiconductor element mounted structure using the same |
| CN101271848A (en) * | 2007-03-22 | 2008-09-24 | 日本特殊陶业株式会社 | Method for manufacturing multi-layer wire substrate |
| CN102347287A (en) * | 2010-08-02 | 2012-02-08 | 日本特殊陶业株式会社 | Multilayer wiring substrate |
-
2015
- 2015-01-22 CN CN201510032482.3A patent/CN105870075A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000340715A (en) * | 1999-05-31 | 2000-12-08 | Kyocera Corp | Wiring board for mounting semiconductor element and semiconductor device using the same |
| CN1426102A (en) * | 2001-12-10 | 2003-06-25 | 矽统科技股份有限公司 | Chip package base board |
| CN101198211A (en) * | 2006-12-04 | 2008-06-11 | 日本特殊陶业株式会社 | Laminated substrate and manufacturing method thereof |
| JP2008186878A (en) * | 2007-01-29 | 2008-08-14 | Kyocera Corp | Wiring board and semiconductor element mounted structure using the same |
| CN101271848A (en) * | 2007-03-22 | 2008-09-24 | 日本特殊陶业株式会社 | Method for manufacturing multi-layer wire substrate |
| CN102347287A (en) * | 2010-08-02 | 2012-02-08 | 日本特殊陶业株式会社 | Multilayer wiring substrate |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102576764B1 (en) | Semiconductor packages of asymmetric chip stacks | |
| US20150279759A1 (en) | Semiconductor package | |
| CN105097759A (en) | Package stack structure and method for fabricating the same, and coreless package substrate and method for fabricating the same | |
| US10283442B2 (en) | Interposer substrate and method of fabricating the same | |
| CN103456703A (en) | Semiconductor package and fabrication method thereof | |
| US20160233205A1 (en) | Method for fabricating semiconductor package | |
| US20170271250A1 (en) | Semiconductor package assembly | |
| CN104681499B (en) | Package stack structure and method for fabricating the same | |
| KR20190015661A (en) | Semiconductor package with multi staked dies | |
| US9504152B2 (en) | Printed circuit board for semiconductor package | |
| CN111243967A (en) | Stack type packaging method | |
| CN103650131B (en) | Semiconductor device | |
| CN105870075A (en) | Substrate structure | |
| US20180047662A1 (en) | Interposer substrate and method of manufacturing the same | |
| JP2010087403A (en) | Semiconductor device | |
| US9318354B2 (en) | Semiconductor package and fabrication method thereof | |
| CN202940236U (en) | Package substrate structure | |
| US20160165722A1 (en) | Interposer substrate and method of fabricating the same | |
| US20120267783A1 (en) | Stacked-substrate structure | |
| CN102468278B (en) | Multi-chip stacking and packaging structure | |
| US20240047437A1 (en) | Package structure and method for fabricating same | |
| CN104051373A (en) | Heat dissipation structure, semiconductor package and manufacturing method thereof | |
| US8581384B2 (en) | Semiconductor package structure | |
| US20230245949A1 (en) | Electronic device | |
| CN201111124Y (en) | Memory card |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160817 |