JP2008140902A - Multilayer printed circuit board and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer printed circuit board of which adhesion between a circuit layer and an insulating layer is sufficiently improved. <P>SOLUTION: The multilayer wiring circuit board 10 includes first, second, and third insulating layers 11A, 11B, and 11C and circuit layers 12A, 12B, 12C, and 12D stacked alternately, and first via hole conductor 13A for connecting the first and second circuit layers 12A and 12B, second via hole conductor 13B for connecting the second and third circuit layers 12B and 12C, and a third via hole conductor 13C for connecting the third and fourth circuit layers 12C and 12D. The first and fourth circuit layers 12A and 12D has protrusions 12E and 12E protruding sideways from the side surfaces in the first and third insulating layers 11A and 11C. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a multilayer wiring board having an insulating layer and a wiring layer and a method for manufacturing the same, and more particularly to a multilayer wiring board capable of improving the adhesion between the insulating layer and the wiring layer and a method for manufacturing the same.

  As this type of conventional multilayer wiring board, for example, a printed wiring board is widely used. The wiring pattern of the printed wiring board is formed mainly by two kinds of methods, a subtractive method using etching and an additive method using electrolytic plating. As the printed wiring board becomes thinner and finer, not only the insulating layer but also the wiring layer is made thinner, and therefore, it is important to ensure the peel strength between the resin layer and the wiring layer. As a basic measure, the subtractive method obtains an anchor effect by roughening the copper foil surface, and the additive method uses various methods such as embedding electrodes in the resin using the transfer method. Yes.

  Patent Document 1 proposes a method for manufacturing a multilayer wiring board using a copper foil as a circuit pattern. In the technique of Patent Document 1, the surface of copper, which is an inner layer material composed of an insulating substrate and copper on the surface, is roughened by treating it with an ionized gas such as plasma. Then, copper on the surface of the inner layer material is formed as a circuit pattern before or after roughening, and a multilayer wiring board is manufactured by laminating an insulating layer and a wiring layer on this circuit pattern. Since the circuit pattern is roughened, the inner layer material and the insulating layer are in close contact due to the anchor effect of the circuit pattern.

JP 06-132654 A

  However, in the multilayer wiring board described in Patent Document 1, since the inner layer material and the insulating layer are only in close contact with each other by the anchor effect due to the fine uneven structure on the surface of the circuit pattern of the inner layer material, the anchor effect is not sufficient. The adhesion strength is not sufficient, and the insulating layer may peel off from the inner layer material.

  The present invention has been made in order to solve the above-described problems, and an object of the present invention is to provide a multilayer wiring board capable of sufficiently increasing the adhesion strength between the wiring layer and the insulating layer, and a method for manufacturing the same.

  A multilayer wiring board according to claim 1 of the present invention includes insulating layers and wiring layers that are alternately stacked, and via-hole conductors that connect upper and lower wiring layers, and at least one of the wiring layers includes the insulating layer. It has the protrusion part which protrudes from the side surface in a layer to the side.

  A multilayer wiring board according to a second aspect of the present invention is the multilayer wiring board according to the first aspect, wherein the wiring layer having the protruding portion has a T-shaped cross section. is there.

  According to a third aspect of the present invention, in the multilayer wiring board according to the first or second aspect, the wiring layer having the projecting portion has a first main surface as the other insulating layer. The wiring layer is not in contact with the wiring layer.

  According to a fourth aspect of the present invention, there is provided the multilayer wiring board according to any one of the first to third aspects, wherein the wiring layer having the projecting portion is the first in the insulating layer. The main surface of 2 has a rough surface.

  According to a fifth aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board comprising: forming a first resist layer in a predetermined pattern on a transfer plate; and a second resist on the first resist layer. Forming a layer having a predetermined pattern, forming a resist laminate in which at least one first and second resist layers are laminated in this order, and forming the resist laminate on the transfer plate. Forming a conductive layer by electroplating in a region where there is not more than the thickness of the resist layer directly below the uppermost layer of the resist laminate and not more than the thickness of the laminate; And a step of removing the second resist layer and a step of transferring the conductive layer from the transfer plate to the insulating layer as a wiring layer. The area of the second resist layer is the first resist layer. Smaller than the area of the layer, One, the first, second resist layer is one in which each of the areas is equal to or is adjustable.

  According to a sixth aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board comprising: forming a first resist layer in a predetermined pattern on a transfer plate; and a second resist on the first resist layer. Forming a layer in a predetermined pattern, and in the region where the first and second resist layers are not formed on the transfer plate, the first and second resists have a thickness equal to or greater than the thickness of the first resist. A step of forming a conductive layer by electroplating so as to be equal to or less than the thickness of the laminate composed of layers, a step of removing the first and second resist layers from the transfer plate, and a step of removing the conductive layer from the transfer plate. And transferring to the insulating layer as a wiring layer, wherein the area of the second resist layer is smaller than the area of the first resist layer.

  According to a seventh aspect of the present invention, there is provided the multilayer wiring board manufacturing method according to the fifth or sixth aspect, wherein the upper surface of the transfer plate is roughened. It is.

  Further, in the method for manufacturing a multilayer wiring board according to claim 8 of the present invention, in the invention according to any one of claims 5 to 7, the transfer plate is made of a conductive metal, and the transfer plate The conductive layer is formed by energizing the substrate.

  ADVANTAGE OF THE INVENTION According to this invention, the multilayer wiring board which can fully improve the adhesiveness of a wiring layer and an insulating layer, and each manufacturing method can be provided.

Hereinafter, the present invention will be described based on the embodiment shown in FIGS.
First Embodiment A multilayer wiring board 10 of this embodiment includes, for example, a plurality of insulating layers 11 and a plurality of wiring layers 12 that are alternately stacked, and upper and lower wiring layers 12 as shown in FIG. And via-hole conductors 13 that are electrically connected in a predetermined pattern. The plurality of insulating layers 11 are composed of three layers of a lowermost first insulating layer 11A, an intermediate second insulating layer 11B, and an uppermost third insulating layer 11C, all of which are made of resin. ing.

  The plurality of wiring layers 12 include a first wiring layer 12A formed in a predetermined pattern on the lower surface of the first insulating layer 11A, and a predetermined pattern on the interface between the first insulating layer 11A and the second insulating layer 11B. Of the second wiring layer 12B formed in the above, the third wiring layer 12C formed in a predetermined pattern at the interface between the second insulating layer 11B and the third insulating layer 11C, and the third insulating layer 11C. And a fourth wiring layer 12D formed in a predetermined pattern on the upper surface.

  The via-hole conductor 13 electrically connects the first via-hole conductor 13A that electrically connects the first wiring layer 12A and the second wiring layer 12B, and the second wiring layer 12B and the third wiring layer 12C. A second via-hole conductor 13B connected to the third wiring layer 12C and a third via-hole conductor 13C electrically connecting the third wiring layer 12C and the fourth wiring layer 12D. The via-hole conductors 13A, 13B, 13C Each is arranged in a predetermined pattern.

  Thus, as shown in FIG. 1A, the first and fourth wiring layers 12A and 12D are laterally (horizontal) from both side surfaces in the first and third insulating layers 11A and 11C. Projecting portions 12E and 12E projecting in the direction), and each cross section is formed in a T-shape. The protruding portion 12E may be formed in an L shape protruding from only one side surface. Since the first and fourth wiring layers 12A and 12D having a T-shaped cross section are embedded in the protruding portions 12E and 12E in the first and third insulating layers 11A and 11C, A sufficient anchor effect can be obtained by the respective projecting portions 12E and 12E, and the adhesion strength with the first and third insulating layers 11A and 11C, that is, the peel strength can be significantly improved. In the present embodiment, the cross section of the protrusion 12E is rectangular (plate-like), but the cross section of the protrusion 12E protrudes from the side surfaces of the first and third wiring layers 11A and 11C to the side. As long as it is present, the shape is not limited to a rectangular shape, and may be another shape such as a triangular shape or a semicircular shape.

  As shown in FIG. 1A, each of the first and fourth wiring layers 12A and 12D has a first main surface in a predetermined pattern from the first and third insulating layers 11A and 11C to the outside. Exposed. Rough surfaces 12F and 12F are formed on the first main surfaces of the first and fourth wiring layers 12A and 12D, and the respective rough surfaces 12F and 12F improve the adhesion to other insulating layers. is there. A plurality of electrode portions for mounting various surface mount components, for example, are formed on part of the first and fourth wiring layers 12A and 12D. When surface-mounted components are mounted on these electrode portions, the first and fourth wiring layers 12A and 12D are affected by the anchor effect of the protruding portions 12E even if an external force is applied to the surface-mounted components. Since the first and third insulating layers 11A and 11C are firmly adhered to each other, they are not peeled off from the respective insulating layers 11A and 11C.

  When the protruding portion 12E is a T-shaped wiring layer 12, for example, as shown in FIG. 1B, the thickness t of the first and fourth wiring layers 12A and 12D is in the range of 30 to 70 μm, for example. Preferably, the thickness t1 of the protrusion 12E is preferably in the range of 15 to 30 μm, for example, and the thickness t2 of the lower part from the protrusion 12E is preferably in the range of 15 to 40 μm, for example. Further, the line width w of the T-shaped portion including the left and right protruding portions 12E is preferably in the range of 100 to 300 μm, for example, and the width w1 between the lower side surfaces of the T-shape is preferably in the range of 50 to 150 μm, for example. . Specifically, t = 50 μm, t1 = 20 μm, t2 = 35 μm, w = 100 μm, and w1 = 50 μm. If the difference between w and w1 is 25 μm or more, a sufficient anchor effect can be obtained. At this time, the thickness T of the first insulating layer 11A is 200 μm.

  The first insulating layer 11A and the first and second wiring layers 12A, 12B are formed so as to be integrated with the via-hole conductor 13A by sequentially laminating on a transfer plate whose upper surface is roughened as will be described later. The exposed surfaces of the first insulating layer 11A and the first wiring layer 12A are roughened as rough surfaces 11D and 12F by peeling the transfer plate. In the manufacturing process described later, for convenience, this is referred to as a first element substrate. The third insulating layer 11C and the fourth and third wiring layers 12D and 12C are also formed on the transfer plate roughened in the same manner as the first insulating layer 11A and the first and second wiring layers 12A and 12B. The third element substrate is formed by laminating sequentially and integrally with the via-hole conductor 13C. By roughening the first main surfaces of the first and fourth wiring layers 12A and 12D in this way, the rough surface 12F exhibits an anchor effect when another insulating layer is laminated later. . Each of the second and third wiring layers 12B and 12C is roughened, and the adhesion strength with the second insulating layer 11B is increased by the anchor effect of the rough surface. The second and third wiring layers 12B and 12C can further increase the adhesion strength between the upper and lower insulating layers by roughening both surfaces by, for example, sandblasting. The second insulating layer 11B is formed as a second element substrate integrally with the via-hole conductor 13B by a method different from the first and third insulating layers 11A and 11C. 3 of the insulating layer 11C.

  The material of the insulating layer 11 is not particularly limited as long as it is an insulating material. For example, a resin alone or a mixed resin composition of a resin and an inorganic filler is preferable. As resin used for the insulating layer 11 of this embodiment, thermosetting resins, such as an epoxy resin, a modified polyimide resin, a polyimide resin, a phenol resin, a bismaleimide triazine resin, are preferable, for example. Moreover, as an inorganic filler contained in a mixed resin composition, glass cloth, an alumina, a silica etc. are preferable, for example. In the present embodiment, a mixed resin composition (prepreg) is used as the resin layer 11.

  The material of the wiring layer 12 is not particularly limited as long as it is a conductive metal, but for example, a metal such as Cu, Ni, or Sn is preferable. In the present embodiment, the wiring layer 12 is made of copper. Of the wiring layer 12, the first and fourth wiring layers 12A and 12D are each formed of, for example, electrolytically plated copper, and the second and third wiring layers 12B and 12C are respectively formed of, for example, copper foil. The first, second, and third via hole conductors 13A, 13B, and 13C are all formed of a conductive resin obtained by curing a conductive paste. The conductive paste is a conductive resin composition containing, for example, metal particles and a thermosetting resin. As the metal particles, for example, metals such as Au, Ag, Cu, and Ni can be used, and as the thermosetting resin, for example, an epoxy resin, a modified polyimide resin, a polyimide resin, a phenol resin, a screw, and the like, as in the insulating layer. A thermosetting resin such as maleimide triazine resin can be used.

  Next, a method for manufacturing the multilayer wiring board 10 shown in FIG. 1A will be described with reference to FIGS. In the present embodiment, the first, second, and third element substrates are individually formed as described above. For example, first, a conductive transfer plate 20 having a roughened upper surface as shown in FIG. In this embodiment, a stainless steel transfer plate 20 is prepared. After a resist layer 30 is formed on the rough surface 20A of the transfer plate 20, a resist is used through a photomask 40 having a hole 40A having a predetermined pattern as shown in FIG. The upper surface of the layer 30 is irradiated with ultraviolet light L to form a first resist layer 30A having a predetermined pattern as shown in FIG. Next, after another resist layer is formed on the upper surface of the transfer plate 20, a second resist is formed on the upper surface of the first resist layer 30A in the same manner as the first resist layer 30A as shown in FIG. The layer 31A is reduced and formed according to the first resist layer 30A. Since the second resist layer 31A is formed by reducing the first resist layer 30A, the area of the second resist layer 31A is smaller than that of the first resist layer 30A as shown in FIG. It is formed in a size (line width) that fits within the upper surface of the layer 30A.

  Thereafter, a conductive layer to be the first wiring layer 12A is formed in the gap (region where the first and second resist layers are not formed) between the first and second resist layers 30A and 31A. That is, as shown in FIG. 2 (e), electrolytic plating copper is applied to the upper surface of the transfer plate 20 while energizing the stainless transfer plate 20, and the gap between the first and second resist layers 30A and 31A is electroplated. A conductive layer 112A is formed by filling with copper. The conductive layer 112A has a height equal to or less than the sum of the thickness of the first resist layer 30A and the thickness of the second resist layer 31A, and the upper surface thereof is formed so as not to exceed the upper surface of the second resist layer 31A. ing. Accordingly, the second resist layer 112A exhibits a function of preventing a short circuit between the adjacent conductive layers (electrodes) 112A. Thereafter, as shown in FIG. 5F, the first and second resist layers 30A and 31A are removed to form a conductive layer 112A having a T-shaped cross section, and as shown in FIG. A semi-cured prepreg layer 111 </ b> A having a copper foil 112 </ b> B on its upper surface is pressed onto the transfer plate 20. Since the conductive layer 112A to be the wiring layer 12A is formed on the roughened transfer plate 20, the adhesion between the transfer plate 20 and the conductive layer 112A is good, and the conductive layer 112A is embedded in the prepreg layer 111A. The positional deviation can be suppressed. Then, after peeling off the transfer plate 20 from the prepreg layer 111A, the prepreg layer 111A is cured as shown in FIG. 3 to form the first insulating layer 11A. As a result, the rough surface 20A of the transfer plate 20 is transferred to the first main surfaces of the first insulating layer 11A and the wiring layer 12A, and the rough surfaces 11D and 12F are formed. In (g) of the figure, the upper surface of the copper foil 112B has a fine concavo-convex structure by roughening treatment.

Next, a via-hole conductor 113A is formed in the first insulating layer 11A. That is, as shown in FIG. 3A, a substrate made of an insulating layer 11A, a wiring layer 12A, and a copper foil 112B is prepared. Then, after the copper foil 112B is etched with a predetermined pattern using a lithography technique to form a hole H for a via hole, the copper foil 112A is irradiated with, for example, a CO ₂ laser, as shown in FIG. A via hole 113′A is formed in a portion corresponding to the hole H. Subsequently, as shown in (c) of the figure, the via hole 113'A is filled with a conductive paste and cured to form a via hole conductor 13A. Then, as shown in (d) of the figure, the copper foil 112B and the via hole conductor are formed. A copper plating film 112′B is formed on the upper surface of 13A. Further, as shown in FIG. 5E, the copper plating film 112′B and the copper foil 112B are etched in a predetermined pattern to form the wiring layer 12B. At this time, although not shown, the surface of the copper plating film 112′B is roughened. A first element substrate is formed by the steps shown in FIGS. In this embodiment, a CO ₂ laser is used as the laser, but a YAG laser, an excimer laser, and an ultraviolet laser can be used in addition to that.

  Thereafter, a third element substrate is manufactured in the same manner as the first element substrate, and a second element substrate is manufactured. In producing the second element substrate, for example, a prepreg is applied on a support such as a PET film to produce a semi-cured prepreg sheet. Then, after forming via holes in a predetermined pattern in the prepreg sheet, a prepreg sheet 111B having via hole conductors 13B arranged in a predetermined pattern as shown in FIG. Is made. Then, for example, after the prepreg sheet 111B is attached to the third element substrate as indicated by an arrow in FIG. 4A, the first element substrate is attached to the prepreg sheet 111B. Then, after bonding the first element substrate and the third element substrate via the prepreg sheet 111B, when the prepreg sheet 111B is fully cured, the prepreg sheet 111B becomes the second insulating layer 11B, As shown in (b), the multilayer wiring board 10 in which the first element substrate and the third element substrate are integrated via the second element substrate can be obtained. Since the first element substrate and the second element substrate are bonded via the rough surface of the second wiring layer 112B, the first element substrate and the second element substrate have good adhesion and are difficult to peel off. The third element substrate and the second element substrate are difficult to peel off via the rough surface of the third wiring layer 112C.

  In the present embodiment, the first and fourth wiring layers 12A and 12D having a T-shaped cross section have been described. However, as shown in FIG. 5A, the protruding portion 12E has the first and second protrusions 12E. It may be formed between the upper and lower ends of the side surfaces of the wiring layers 12 and 12D. Also, as shown in FIG. It may be formed. In the present embodiment, only the first resist layer 30A and the second resist layer 31A are formed and the T-shaped wiring layers 12A and 12D are formed. However, when forming wiring layers of other shapes, for example, A third resist layer may be formed between the first resist 30A and the second resist layer 31A or on the second resist layer 31A. And when forming a wiring layer by electrolytic plating, if it forms with the height below the thickness which added the thickness of several resist layers, a short circuit can be prevented. Further, when a multilayer wiring board having a plurality of protruding portions on the side surface of the wiring layer as shown in FIGS. 5A and 5B is manufactured, the second resist layer is the first resist. Multilayer wiring having one or more protrusions intermittently on the side surface of the wiring layer by sequentially laminating the first and second resist layers in this order while maintaining a relationship smaller than the area of the layer A substrate can be produced.

  In the present embodiment, the first, second, and third via-hole conductors 13A, 13B, and 13C have been described as being formed of conductive resin. However, as shown in FIG. Alternatively, the third via-hole conductors 13A and 13C may be formed of plated copper, and the second via-hole conductor 13B may be formed of a conductive resin. For example, the first via-hole conductor 13A can be formed by forming the electroless plating layer 13A ′ on the side wall of the via hole and then forming the electrolytic plating layer 13A ″ on the surface thereof. The third via-hole conductor 13C is also formed. It can be formed in the same manner as the first via-hole conductor 13A.

  As described above, according to this embodiment, the insulating layers 11A, 11B, and 11C and the wiring layers 12A, 12B, 12C, and 12D that are alternately stacked are connected to the first and second wiring layers 12A and 12B. A first via-hole conductor 13B connecting the first via-hole conductor 13A, the second and third wiring layers 12B and 12C, and a third via-hole conductor 13C connecting the third and fourth wiring layers 12C and 12D; The first and fourth wiring layers 12A and 12D have projecting portions 12E and 12E projecting sideways from the side surfaces in the first and third insulating layers 11A and 11C, respectively. The four wiring layers 12A and 12D are in close contact with the first and third insulating layers 11A and 11C through the protrusions 12E and 12E, and the first and fourth wiring layers 12A and 12D are pulled in the vertical direction. Even if it works Protrusions 12E, first by the anchor effect of 12E of, never fourth wiring layers 12A, 12D is peeled off from the respective insulating layers 11A, 11C.

  In addition, according to the present embodiment, the first and fourth wiring layers 12A and 12D having the projecting portions 12E have a T-shaped cross section, respectively. Therefore, the anchors for the first and third insulating layers 11 and 11C are used. The effect is increased, and the first and fourth wiring layers 12A and 12D can be more reliably prevented from being separated from the insulating layers 11A and 11C. The first and fourth wiring layers 12A and 12D having the protruding portion 12E are wiring layers whose first main surfaces are not in contact with other insulating layers, and the first and third insulating layers 11A and 11C. Even if an external force that peels off the first and fourth wiring layers 12A and 12D through, for example, a surface-mounted component, the first and fourth wiring layers are exposed. 12A and 12D are both locked in the first and third insulating layers 11A and 11C by the protrusions 12E and 12E, and have high adhesion strength with the first and third insulating layers 11A and 11C. The third insulating layers 11A and 11C are not peeled off.

  Further, according to the method for manufacturing a multilayer wiring board of the present embodiment, for example, a step of forming the first resist layer 30A in a predetermined pattern on the transfer plate 20, and a second step on the first resist layer 30A. The step of laminating the resist layer 31A in a predetermined pattern, the step of forming the conductive layer 112A in the gap between the first and second resist layers 30A and 31A on the transfer plate 20, and the first and second from the transfer plate 20 And removing the resist layers 30A and 31A, and transferring the conductive layer 112A from the transfer plate 20 to the first insulating layer 11A as the first wiring layer 12A. The area of the second resist layer 31A Is smaller than the area of the first resist layer 31A, and therefore, a first wiring layer 12A having a T-shaped cross section having a protruding portion 12E protruding from the side surface to the side in the first insulating layer 11A is formed. be able to.

Second Embodiment In the present embodiment, the same or equivalent parts as those in the first embodiment will be denoted by the same reference numerals based on FIGS. 7 and 8, and the description will focus on the features of the present embodiment. The multilayer wiring board 10A of the present embodiment includes a wiring layer having a T-shaped cross section as shown in FIG. 7, for example, and has a rough surface on both the first main surface of the wiring layer and the second main surface on the opposite side. It is characterized in that it is processed.

  That is, as shown in FIG. 7, the multilayer wiring board 10A of the present embodiment includes an insulating layer 11, and first and second wiring layers 12A and 12B formed on both upper and lower surfaces of the insulating layer 11, The first and second wiring layers 12A and 12B are electrically connected by a via hole conductor (not shown). Further, other insulating layers and wiring layers can be alternately stacked on the upper and lower surfaces of the multilayer wiring board 10A. Each of the first and second wiring layers 12A and 12B has a T-shaped cross section as in the first embodiment. As in the first embodiment, rough surfaces 12F and 12F are formed on the first main surface exposed to the outside from the insulating layer 11 of the first and second wiring layers 12A and 12B, respectively. 12F is formed integrally with the rough surfaces 11D and 11D on the upper and lower surfaces of the insulating layer 11. In addition, rough surfaces 12G and 12G are formed on the second main surface in the insulating layer 11 of the first and second wiring layers 12A and 12B, respectively, and these rough surfaces 12G and 12G are respectively projected portions 12E. 12E, the adhesion strength with the insulating layer 11 is further increased as compared with the case of the first embodiment.

  Next, a method for manufacturing the multilayer wiring board 10A will be described with reference to FIG. First, as shown in FIG. 8A, first and second resist layers 30A and 31A are formed on a stainless steel transfer plate 20 formed through the steps shown in FIGS. A substrate on which the conductive layer 112A is formed is prepared. Then, as shown in FIG. 5B, the upper surfaces of the second resist layer 31A and the conductive layer 112A are roughened by a known method such as sandblasting to form rough surfaces 31B and 112G. Next, as shown in FIG. 5C, the first and second resist layers 30A and 31A are removed, and the first wiring layer 12A is formed on the transfer plate 20. A second wiring layer 12B is formed on the transfer plate 20 by the same method. Subsequently, as shown in FIG. 4D, after the first and second wiring layers 12A and 12B of the transfer plate 20 are transferred from both surfaces of the semi-cured sheet-like prepreg 11 to the prepreg 11, the upper and lower transfer When the plate 20 is peeled off from the prepreg 11 and cured, a multilayer wiring board 10A having first and second wiring layers 12A and 12B having a T-shaped cross section shown in FIG. 7 is obtained. Further, rough surfaces 12F and 12F are formed on the first main surfaces of the first and second wiring layers 12A and 12B, respectively, and rough surfaces 12G and 12G are formed on the second main surface.

  As described above, according to the present embodiment, the first and second wiring layers 12A and 12B have the protruding portions 12E and 12E that form a T shape inside the insulating layer 11, and the insulating layer 11 Since the second main surface inside is formed as rough surfaces 12G and 12G, the first and second wiring layers 12A and 12B are more closely attached to the insulating layer 11 than in the case of the first embodiment. The peel strength can be further increased.

  The present invention is not limited to the above embodiments. The multilayer wiring board of the present invention basically includes insulating layers and wiring layers that are alternately stacked, and via conductors that connect the upper and lower wiring layers, and at least one wiring layer is stacked from the side. What is necessary is just to have the protrusion part which protrudes in the direction which cross | intersects in the inside of an insulating layer. The shape and number of the protrusions can be appropriately set as necessary. The wiring layer having the protruding portion can be provided on either the inner insulating layer or the outermost insulating layer of the multilayer wiring board, and is preferably disposed on the surface exposed from the upper and lower surfaces of the multilayer wiring board. The insulating layer is not limited to the resin layer, and may be an insulating layer such as another ceramic layer.

  In each of the above embodiments, one or two protruding portions 12E are provided on the side surface of the wiring layer 12, and the protruding amount of the protruding portions 12E is the same as an example (FIG. 5B). The protrusion amount of the protrusion is not necessarily the same, and the protrusion amount can be changed regularly or randomly as necessary. When changing the protrusion amounts of the plurality of protrusions, the relationship of the area of the second resist layer is smaller than the area of the first resist layer, and the areas of the first and second resist layers are appropriately changed. On the other hand, by sequentially laminating the first and second resist layers in this order, it is possible to form a protrusion whose protrusion amount changes regularly or randomly. In the resist laminated body in which the first and second resist layers are laminated, as long as the first and second resist layers are laminated in this order, either the first or second resist layer is the uppermost layer. Also good.

  The present invention can be suitably used for, for example, a multilayer wiring board used in a mobile communication device such as a mobile phone or an electronic device and a manufacturing method thereof.

(A), (b) is a figure which shows one Embodiment of the multilayer wiring board of this invention, respectively, (a) is sectional drawing which shows the whole, (b) is explanatory drawing of the dimension of a wiring layer and an insulating layer. is there. (A)-(g) is sectional drawing which shows the process of one Embodiment of the manufacturing method of the multilayer wiring board shown in FIG. 1, respectively. (A)-(e) is sectional drawing which shows the process of following FIG. 2, respectively. (A), (b) is sectional drawing which shows the process of following FIG. 3, respectively. (A), (b) is sectional drawing which shows the wiring layer of other embodiment of the multilayer wiring board of this invention, respectively. It is sectional drawing which shows the process of forming the via-hole conductor of further another embodiment of the multilayer wiring board of this invention. It is sectional drawing which shows other embodiment of the multilayer wiring board of this invention. (A)-(d) is sectional drawing which shows the process intrinsic | native to one Embodiment of the manufacturing method of the multilayer wiring board shown in FIG. 7, respectively.

Explanation of symbols

10, 10A Multilayer wiring board 11, 11A, 11B, 11C Insulating layer 12, 12A, 12B, 12C, 12D Wiring layer 12E Protruding part 12F Rough surface 13, 13A, 13B, 13C Via-hole conductor 111A, 111B, 111C Prepreg 112A, 112B 112C, 112D Conductive layer

Claims (8)

  Insulating layers and wiring layers stacked alternately, and via-hole conductors connecting the upper and lower wiring layers, and at least one of the wiring layers has a protruding portion protruding laterally from a side surface in the insulating layer. A multilayer wiring board characterized by that.   The multilayer wiring board according to claim 1, wherein the wiring layer having the protruding portion has a T-shaped cross section.   3. The multilayer wiring board according to claim 1, wherein the wiring layer having the protruding portion is a wiring layer in which the first main surface is not in contact with another insulating layer.   4. The multilayer wiring board according to claim 1, wherein the wiring layer having the protruding portion has a second main surface in the insulating layer having a rough surface. 5. Forming a first resist layer on the transfer plate in a predetermined pattern;
Forming a second resist layer in a predetermined pattern on the first resist layer to form a resist laminate in which the first and second resist layers are laminated at least one layer in this order;
Conduction is performed by electrolytic plating in a region where the resist laminate is not formed on the transfer plate so that the thickness is equal to or greater than the thickness of the resist layer directly below the uppermost layer of the resist laminate and less than the thickness of the laminate. Forming a layer;
Removing the first and second resist layers from the transfer plate;
Transferring the conductive layer from the transfer plate to the insulating layer as a wiring layer,
The area of the second resist layer is smaller than the area of the first resist layer, and each area of the first and second resist layers can be adjusted. Production method. Forming a first resist layer on the transfer plate in a predetermined pattern;
Forming a second resist layer in a predetermined pattern on the first resist layer;
In a region where the first and second resist layers are not formed on the transfer plate, the thickness is not less than the thickness of the first resist and not more than the thickness of the laminate composed of the first and second resist layers. And a step of forming a conductive layer by electrolytic plating,
Removing the first and second resist layers from the transfer plate;
Transferring the conductive layer from the transfer plate to the insulating layer as a wiring layer,
The method of manufacturing a multilayer wiring board, wherein an area of the second resist layer is smaller than an area of the first resist layer.   7. The method for manufacturing a multilayer wiring board according to claim 5, wherein the upper surface of the transfer plate is roughened.   The method for manufacturing a multilayer wiring board according to claim 5, wherein the transfer plate is made of a conductive metal, and the conductive layer is formed by energizing the transfer plate.

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