JP2007324418A - Semiconductor device, manufacturing method for solder bump connection board, and manufacturing method for semiconductor device - Google Patents

Semiconductor device, manufacturing method for solder bump connection board, and manufacturing method for semiconductor device Download PDF

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JP2007324418A
JP2007324418A JP2006153835A JP2006153835A JP2007324418A JP 2007324418 A JP2007324418 A JP 2007324418A JP 2006153835 A JP2006153835 A JP 2006153835A JP 2006153835 A JP2006153835 A JP 2006153835A JP 2007324418 A JP2007324418 A JP 2007324418A
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substrate
solder bumps
solder bump
columnar structure
solder
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JP5017930B2 (en
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Yoshikatsu Ishizuki
義克 石月
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Fujitsu Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10145Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/10175Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1405Shape
    • H01L2224/14051Bump connectors having different shapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81136Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/81139Guiding structures on the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81136Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8114Guiding structures outside the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/38Effects and problems related to the device integration
    • H01L2924/384Bump effects
    • H01L2924/3841Solder bridging

Abstract

<P>PROBLEM TO BE SOLVED: To provide a board connection structure for connecting boards via solder bumps which structure prevents short circuit between the solder bumps caused by deformation of the solder bumps, and connects the boards firmly using an underfill. <P>SOLUTION: In the board connection structure, a pillarlike structure 4 made of an insulating material is disposed between the solder bumps 3 closest to each other, and a gap between the connected boards 1 and 2 is filled with the underfill 5. The deformed solder bumps 3 are blocked by the pillarlike structure 4 made of the insulating material, which prevents short circuit between the adjacent solder bumps 3. The plane of the pillarlike structure 4 and that of the solder bump 3 are separated from each other, so that the inflow of the underfill from the periphery of the structure 4 and solder bump 3 is not obstructed to allow firm connection through the underfill 5 with less voids. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、はんだバンプを用いて2枚の基板を接続する半導体装置、かかる接続に適したはんだバンプ接続用基板の製造方法及びはんだバンプ接続用基板を用いた半導体装置の製造方法に関し、とくにはんだバンプの変形による隣接バンプ間の短絡を防ぐための基板の接続構造を有する半導体装置、かかる半導体装置に用いられるはんだバンプ接続用基板の製造方法及びかかる半導体装置の製造方法に関する。   The present invention relates to a semiconductor device for connecting two substrates using solder bumps, a method for manufacturing a solder bump connection substrate suitable for such connection, and a method for manufacturing a semiconductor device using the solder bump connection substrate. The present invention relates to a semiconductor device having a substrate connection structure for preventing a short circuit between adjacent bumps due to deformation of the bump, a method for manufacturing a solder bump connection substrate used in the semiconductor device, and a method for manufacturing such a semiconductor device.

電子回路の分野では、主面に電極が形成された2枚の基板を、各基板上の電極が対向するように配置して、それらの電極間をはんだバンプにより接続する基板接続方法が広範に使用されている。例えば、半導体集積回路が形成された半導体基板(チップ)の接続用電極としてはんだバンプを用いるフリップチップ、半導体基板を搭載した回路基板をグリッドアレイ状に配列したはんだボールで接続するグリッドアレイパッケージ、あるいはメイン回路基板上にはんだバンプを用いて搭載されるサブ回路基板、等の各種基板の接続に使用されている。   In the field of electronic circuits, there are a wide range of substrate connection methods in which two substrates having electrodes formed on the main surface are arranged so that the electrodes on each substrate face each other and the electrodes are connected by solder bumps. in use. For example, a flip chip using solder bumps as connection electrodes of a semiconductor substrate (chip) on which a semiconductor integrated circuit is formed, a grid array package in which circuit boards mounted with a semiconductor substrate are connected by solder balls arranged in a grid array, or It is used to connect various substrates such as sub circuit substrates mounted on the main circuit substrate using solder bumps.

かかるはんだバンプは、一方の基板の下面に設けられた電極上(下面)に形成されている。接続の際は、この一方の基板を他方の基板、例えばメイン回路基板上に、他方の基板の電極とはんだバンプとの位置を合わせて載置する。次いで、リフロー又は超音波ボンディングによりはんだバンプを介して一方及び他方の基板上の電極間を接続する。その後、一方及び他方の基板の間にアンダーフィルを充填し、硬化して、両基板の接着を強固にする。このとき、スペーサを配して基板間距離を一定に保持し、接続の際の荷重の偏在やはんだバンプの高さの不均一に起因する接続不良及び応力集中を軽減する方法も採られている。   Such a solder bump is formed on an electrode (lower surface) provided on the lower surface of one substrate. At the time of connection, this one board is placed on the other board, for example, the main circuit board, with the positions of the electrodes and solder bumps of the other board aligned. Next, the electrodes on one and the other substrates are connected via solder bumps by reflow or ultrasonic bonding. Thereafter, an underfill is filled between one and the other substrates and cured to strengthen the adhesion between the two substrates. At this time, a method of reducing the connection failure and stress concentration due to the uneven distribution of the load and the unevenness of the height of the solder bump at the time of connection by arranging a spacer to keep the distance between the substrates constant is also adopted. .

しかし、半導体集積回路の集積度の向上に伴い、外部端子を構成する電極、例えばはんだバンプの配置数が多くなり電極間ピッチも短縮されている。このため、上述した接続方法では、リフロー等で接続する際、隣接するはんだバンプが変形して互いに接触し短絡を生ずることがある。また、上述した従来の接続方法では、スペーサははんだバンプの形成領域外に設けられており、スペーサの配置によりはんだバンプの変形を抑制する効果はあるものの、隣接するはんだバンプとの短絡を十分に防止することは難しい。   However, as the degree of integration of the semiconductor integrated circuit is improved, the number of electrodes, for example, solder bumps, constituting the external terminals is increased, and the pitch between the electrodes is shortened. For this reason, in the connection method described above, when connecting by reflow or the like, the adjacent solder bumps may be deformed to contact each other and cause a short circuit. Further, in the conventional connection method described above, the spacer is provided outside the solder bump formation region, and although there is an effect of suppressing the deformation of the solder bump by the arrangement of the spacer, the short circuit with the adjacent solder bump is sufficiently performed. It is difficult to prevent.

かかる隣接するはんだバンプ間の短絡を、網状スペーサを用いて防止する方法が開示されている。(例えば、特許文献1参照。)。   A method of preventing a short circuit between adjacent solder bumps using a mesh spacer is disclosed. (For example, refer to Patent Document 1).

図13は従来の基板接続構造の説明図であり、網状スペーサを用いてはんだバンプ間の短絡を防止した基板接続構造を表している。なお、図13(a)は斜視図による組み立て図、図13(b)は図13(a)中のG−G’垂直断面図である。   FIG. 13 is an explanatory diagram of a conventional substrate connection structure, and shows a substrate connection structure in which a short circuit between solder bumps is prevented using a mesh spacer. FIG. 13A is an assembly view according to a perspective view, and FIG. 13B is a vertical cross-sectional view taken along line G-G ′ in FIG.

図13を参照して、この方法では、網状スペーサ44を接続されるべき基板間、すなわちLSI41と電子回路基板42との間に挿入する。このとき、はんだバンプ43は、網状スペーサ44の各網目の中に配置される。従って、各はんだバンプ43は網状スペーサ44により完全に隔離されるため、リフローによる隣接はんだバンプ43との短絡を完全に防ぐことができる。   Referring to FIG. 13, in this method, mesh spacer 44 is inserted between the substrates to be connected, that is, between LSI 41 and electronic circuit board. At this time, the solder bumps 43 are arranged in each mesh of the mesh spacer 44. Accordingly, since each solder bump 43 is completely isolated by the mesh spacer 44, a short circuit with the adjacent solder bump 43 due to reflow can be completely prevented.

しかし、この網状スペーサ44は、上端がLSI41に下端が電子回路基板42に接触しているため、はんだバンプ43による接続後に網状スペーサ44の外側からアンダーフィルを注入することができない。このため、アンダーフィルを用いた強固な接着方法を適用することができない。
特開平6−232203号公報
However, since the mesh spacer 44 is in contact with the LSI 41 at the top and the electronic circuit board 42 at the bottom, underfill cannot be injected from the outside of the mesh spacer 44 after connection by the solder bumps 43. For this reason, a strong adhesion method using underfill cannot be applied.
JP-A-6-232203

上述したように、従来の基板接続構造は、接続の際にあるいは後工程でのリフローの際に、はんだバンプが変形して隣接するはんだバンプに接触し短絡するという問題がある。また、スペーサをはんだバンプ形成領域外に設けてはんだバンプの変形を抑制しても、かかるはんだバンプの短絡を阻止することができない。   As described above, the conventional board connection structure has a problem that the solder bump is deformed to contact and short-circuit with the adjacent solder bump at the time of connection or at the time of reflow in a later process. Further, even if the spacer is provided outside the solder bump formation region to suppress the deformation of the solder bump, the short circuit of the solder bump cannot be prevented.

さらに、基板間に網状スペーサを挿入して、この網状スペーサにより各はんだバンプを隔離してはんだバンプ間の接触を防止する方法では、はんだバンプを接続した後に網状スペーサの外側からアンダーフィルを注入することができない。このため、アンダーフィルを用いた強固な接続構造を採ることができないという問題がある。   Furthermore, in the method of inserting a mesh spacer between the substrates and isolating each solder bump by the mesh spacer to prevent contact between the solder bumps, underfill is injected from the outside of the mesh spacer after the solder bump is connected. I can't. For this reason, there exists a problem that the firm connection structure using an underfill cannot be taken.

本発明は、2枚の基板をはんだバンプを用いて接続する基板接続構造において、隣接するはんだバンプ間の短絡を防止し、かつ、アンダーフィルによる強固な接続がなされる基板接続構造、かかる基板接続構造を提供するに適したはんだバンプ接続用基板、及びそのはんだバンプ接続用基板の製造方法を提供することを目的とする。   The present invention relates to a substrate connection structure in which two substrates are connected using solder bumps, and a substrate connection structure that prevents a short circuit between adjacent solder bumps and provides a strong connection by underfill, and such a substrate connection. It is an object of the present invention to provide a solder bump connection substrate suitable for providing a structure and a method of manufacturing the solder bump connection substrate.

上記課題を解決するための本発明の第1の構成の半導体装置は、第1及び第2基板のそれぞれの主面に形成された第1及び第2電極を対向させてはんだバンプにより接続し、第1及び第2基板の間をアンダーフィルで充填する半導体装置において、夫々のはんだバンプ間に絶縁物からなる柱状構造物を設ける。   A semiconductor device having a first configuration according to the present invention for solving the above-described problems is formed by connecting the first and second electrodes formed on the main surfaces of the first and second substrates to each other by solder bumps, In a semiconductor device in which the space between the first and second substrates is filled with an underfill, a columnar structure made of an insulator is provided between each solder bump.

本第1の構成では、絶縁物からなる柱状構造物が夫々のはんだバンプ間に配置される。このため、基板接続の際にはんだバンプが変形しても、隣接するはんだバンプとの接触が柱状構造物により妨げられるから、はんだバンプの変形によるはんだバンプ間の短絡を回避することができる。   In the first configuration, a columnar structure made of an insulator is disposed between each solder bump. For this reason, even if the solder bumps are deformed when the substrate is connected, the contact with the adjacent solder bumps is hindered by the columnar structure, so that a short circuit between the solder bumps due to the deformation of the solder bumps can be avoided.

一方、柱状構造物は、はんだバンプの間に離散して配置される。即ち、柱状構造物及びはんだバンプの基板の主面に平行な断面には、はんだバンプの間に柱状構造物の小さな断面が分散して配置されている。このため、柱状構造物及びはんだバンプにより接続された第1及び第2基板の隙間に、接続部分の周囲からアンダーフィルを容易に注入することができる。従って、本第1の構成では、アンダーフィルを用いた強固な接続構造を形成することができる。なお、アンダーフィルが基板間に完全に充填されず、はんだバンプ間を跨ぐボイドを生じた場合でも、はんだバンプの変形は柱状構造物により抑制されるので、はんだバンプ間の短絡は回避される。   On the other hand, the columnar structures are discretely arranged between the solder bumps. That is, small cross sections of the columnar structures are distributed between the solder bumps on the cross section of the columnar structures and the solder bumps parallel to the main surface of the substrate. For this reason, underfill can be easily injected into the gap between the first and second substrates connected by the columnar structure and the solder bumps from the periphery of the connection portion. Therefore, in the first configuration, a strong connection structure using the underfill can be formed. Even when the underfill is not completely filled between the substrates and a void straddling between the solder bumps is generated, the deformation of the solder bumps is suppressed by the columnar structure, so that a short circuit between the solder bumps is avoided.

第1の構成の柱状構造物を、第1及び第2基板の間隔に等しい高さに形成し、スペーサとして機能させることもできる。これにより、第1及び第2基板間の間隔が所定の距離に保持され、はんだバンプの過度の変形が防止されるので、よりはんだバンプ間の短絡が防止される。   The columnar structure having the first structure can be formed at a height equal to the distance between the first and second substrates and function as a spacer. Thereby, the space | interval between 1st and 2nd board | substrates is hold | maintained to predetermined distance, and since an excessive deformation | transformation of a solder bump is prevented, the short circuit between solder bumps is prevented more.

また、第1の構成の柱状構造物の高さを第1及び第2基板の間隔より短くずることもできる。即ち、柱状構造物は第1又は第2の基板の一方の基板の主面に立設され、先端は対向する他方の基板の主面に届かない。従って、この柱状構造物はスペーサとして機能しない。このようにすることで、柱状構造物と第1又は第2基板の主面との間に隙間が形成される。このため、はんだバンプにより接続された第1及び第2基板の隙間にアンダーフィルを注入するに際して、この隙間を通過させてアンダーフィルを流入できるので、アンダーフィルを第1の構成よりもさらに容易に注入することができる。   In addition, the height of the columnar structure having the first configuration can be made shorter than the interval between the first and second substrates. That is, the columnar structure is erected on the main surface of one substrate of the first or second substrate, and the tip does not reach the main surface of the other substrate facing the columnar structure. Therefore, this columnar structure does not function as a spacer. By doing so, a gap is formed between the columnar structure and the main surface of the first or second substrate. For this reason, when the underfill is injected into the gap between the first and second substrates connected by the solder bumps, the underfill can flow through the gap and therefore the underfill can be more easily performed than in the first configuration. Can be injected.

上述した第1の構成の柱状構造物は、接続部分の周辺から注入されるアンダーフィルの流入を妨げないように、丸みを帯びた断面形状とすることが好ましい。同じ観点から、アンダーフィルの流れ方向に長辺を有する板状としてもよい。   The columnar structure having the first configuration described above preferably has a rounded cross-sectional shape so as not to prevent inflow of underfill injected from the periphery of the connection portion. From the same point of view, a plate shape having a long side in the flow direction of the underfill may be used.

上記第1の構成において,絶縁物の柱状構造物を、最近接位置にあるはんだバンプの間に配置することができる。このように配置することで、はんだバンプの変形により最も接触し易い最隣接のはんだバンプの変形が、絶縁物の柱状構造物により阻止され、最隣接はんだバンプ間の短絡が妨げられる。   In the first configuration, the insulator columnar structure can be disposed between the solder bumps at the closest positions. By arranging in this way, the deformation of the nearest solder bump that is most likely to come into contact with the deformation of the solder bump is blocked by the columnar structure of the insulator, and the short circuit between the adjacent solder bumps is prevented.

また、絶縁物の柱状構造物を、さらに第2隣接位置にあるはんだパンプ間に配置することもできる。これにより、変形して最近接はんだバンプの間に突出して第2隣接はんだバンプと接触する短絡を防止することができる。   Moreover, the columnar structure of the insulator can be further disposed between the solder bumps at the second adjacent position. Thereby, the short circuit which deform | transforms and protrudes between nearest solder bumps and contacts a 2nd adjacent solder bump can be prevented.

上述した第1の構成の半導体装置を、他の基板、例えば電子回路基板にはんだバンプを介して接続し、両基板の隙間にアンダーフィルを注入することで、電子回路基板と強固に接続された電子機器を製造することができる。   The above-described semiconductor device having the first configuration is connected to another substrate, for example, an electronic circuit substrate via solder bumps, and is firmly connected to the electronic circuit substrate by injecting underfill into the gap between the two substrates. Electronic equipment can be manufactured.

このとき、第1基板の主面に電極と、最近接位置にある電極間に立設された絶縁樹脂からなる柱状構造物を設け、この第1基板の主面にはんだバンプを設けないこともできる。この第1基板に、はんだバンプを介して他の基板を接続することにより、上述した第1の構成の半導体装置を有する電子機器を製造することができる。この構成では、他の基板として、半導体集積回路に用いられる通常のフリップチップ、グリッドアレイパッケージの基板を用いることができる。   At this time, an electrode and a columnar structure made of an insulating resin standing between the electrodes at the closest position are provided on the main surface of the first substrate, and no solder bump is provided on the main surface of the first substrate. it can. By connecting another substrate to the first substrate via a solder bump, an electronic apparatus having the semiconductor device having the first configuration described above can be manufactured. In this configuration, a normal flip chip or grid array package substrate used in a semiconductor integrated circuit can be used as another substrate.

上述の本発明の半導体装置の第1基板又は第2基板として用いられるはんだバンプ接続用基板は、基板の主面に複数の電極を形成する工程と、電極上にはんだバンプを形成する工程と、基板上に感光性絶縁樹脂層を形成し、露光及び現像して、最近接位置にある電極間に感光性絶縁樹脂層からなる柱状構造物を形成する工程とを有するはんだバンプ接続用基板の製造方法により製造することができる。なお、はんだバンプの形成工程と、柱状構造物の形成工程とは、いずれが先であってもかまわない。   A solder bump connection substrate used as the first substrate or the second substrate of the semiconductor device of the present invention described above, a step of forming a plurality of electrodes on the main surface of the substrate, a step of forming solder bumps on the electrodes, Forming a photosensitive insulating resin layer on the substrate, exposing and developing, and forming a columnar structure composed of the photosensitive insulating resin layer between the electrodes at the closest positions; It can be manufactured by a method. Note that either the solder bump forming step or the columnar structure forming step may be performed first.

本はんだバンプ接続用基板の製造方法によれば、柱状構造物を感光性樹脂の塗布、露光及び現像によりパターニングして形成することができるから製造が容易である。また、柱状構造物の高さは基板上に塗布された感光生絶縁樹脂層の厚さで規定されるから、柱状構造物の高さを精密に制御することができる。   According to the method for manufacturing a solder bump connecting substrate, the columnar structure can be formed by patterning by applying a photosensitive resin, exposing and developing, and thus manufacturing is easy. Further, since the height of the columnar structure is defined by the thickness of the photosensitive raw insulating resin layer applied on the substrate, the height of the columnar structure can be precisely controlled.

また、本発明の半導体装置の製造方法では、上述した主面に複数の第1電極を有するはんだバンプ接続用基板を形成する工程と、第1電極に対応して主面に形成された複数の第2電極を備えた第2基板の主面上に、第1電極と第2電極とを対向させてはんだバンプにより接続する工程と、第1及び第2基板の主面間をアンダフィルで充填する工程とを有する。   Further, in the method for manufacturing a semiconductor device of the present invention, the step of forming the solder bump connection substrate having the plurality of first electrodes on the main surface described above, and the plurality of the plurality of formed on the main surface corresponding to the first electrode. Filling the main surface of the second substrate having the second electrode with solder bumps so that the first electrode and the second electrode face each other, and filling the main surface between the first and second substrates with underfill The process of carrying out.

本半導体装置の製造方法により製造された半導体装置は、はんだバンプ間の短絡が防止されかつ第1及び第2基板間を強固なアンダフィルによる接着で固着される。   The semiconductor device manufactured by the method for manufacturing the semiconductor device is prevented from being short-circuited between the solder bumps, and is firmly fixed between the first and second substrates by bonding with a strong underfill.

本発明によれば、はんだバンプ間の短絡が防止され、かつ2枚の基板間をアンダーフィルで接着した強固なはんだバンプを用いた基板接続構造を形成することができる。   According to the present invention, a short circuit between solder bumps can be prevented, and a substrate connection structure using strong solder bumps in which two substrates are bonded with an underfill can be formed.

本発明の第1実施形態は、スペーサを兼ねる柱状構造物を最近接はんだバンプ間に配置した基板接続構造に関する。   1st Embodiment of this invention is related with the board | substrate connection structure which has arrange | positioned the columnar structure which serves as a spacer between the nearest solder bumps.

図1は本発明の第1実施形態の基板接続構造説明図である。図1(a)ははんだバンプ及び柱状構造物の配置を表すための平面形状を、図1(b)は図1(a)のA−A’に沿う垂直断面を、図1(c)は図1(a)のB−B’に沿う垂直断面を表している。   FIG. 1 is an explanatory diagram of a substrate connection structure according to a first embodiment of the present invention. FIG. 1A shows a planar shape for representing the arrangement of solder bumps and columnar structures, FIG. 1B shows a vertical cross section along AA ′ in FIG. 1A, and FIG. The vertical cross section along BB 'of Fig.1 (a) is represented.

図1を参照して、本第1実施形態の基板接続構造は、第1基板1としてフェイスダウンボンディング用のLSIチップ(フリップチップ)を、第2基板2としてマザーボードとなる電子回路基板を用い、第2基板上に第1基板1をはんだバンプ3を介して接続したものである。   With reference to FIG. 1, the substrate connection structure of the first embodiment uses an LSI chip (flip chip) for face-down bonding as the first substrate 1, and an electronic circuit substrate serving as a motherboard as the second substrate 2. The first substrate 1 is connected to the second substrate via solder bumps 3.

第1基板1の主面(図1(b)中の第1基板1の下面)には、縦横それぞれ200μmのピッチで格子状に電極1aが配置されている。第2基板2の主面にも、第1基板1の電極1aに対応した位置に電極2aが配置されている。これらの対応する電極1a、2aをそれぞれ対向させ、その間をはんだバンプを用いて接合することで第1及び第2基板1、2は接続される。   On the main surface of the first substrate 1 (the lower surface of the first substrate 1 in FIG. 1B), electrodes 1a are arranged in a grid pattern at a pitch of 200 μm in both vertical and horizontal directions. An electrode 2 a is also arranged on the main surface of the second substrate 2 at a position corresponding to the electrode 1 a of the first substrate 1. The first and second substrates 1 and 2 are connected by making these corresponding electrodes 1a and 2a face each other and joining them using solder bumps.

はんだバンプは、通常のフェイスダウンボンデングに用いられるバンプであればよく、例えばボール状のはんだバンプとすることができる。はんだバンプの高さ及び直径は第1及び第2基板1、2間の間隔に合せて適宜選択する。例えば、第1及び第2基板1、2間の間隔が60μmのとき、直径80μmのボール状はんだバンプを用いることができる。   The solder bump may be a bump used for normal face-down bonding, and may be, for example, a ball-shaped solder bump. The height and diameter of the solder bumps are appropriately selected according to the distance between the first and second substrates 1 and 2. For example, when the distance between the first and second substrates 1 and 2 is 60 μm, ball-shaped solder bumps having a diameter of 80 μm can be used.

第1基板1及び第2基板2の主面間には両端がそれぞれ第1基板及び第2基板2の主面に当接する絶縁樹脂からなる柱状構造物4、例えば多角柱、円柱、楕円柱が設けられ、この柱状構造物4がスペーサとなり第1基板及び第2基板2の主面間の間隔が、例えば60μmに保持される。   Between the main surfaces of the first substrate 1 and the second substrate 2, there are columnar structures 4 made of insulating resin whose both ends are in contact with the main surfaces of the first substrate and the second substrate 2, for example, polygonal columns, cylinders, and elliptical columns. The columnar structure 4 is provided as a spacer, and the distance between the main surfaces of the first substrate and the second substrate 2 is maintained at 60 μm, for example.

柱状構造物4の断面の大きさは、スペーサとしての強度を有し、かつアンダーフィル5の注入を妨げないような大きさでなければならない。この観点から、例えば直径40μmの円柱からなる柱状構造物4とすることができる。また、柱状構造物4の材料はスペーサとしての強度を保持できる絶縁物であればよく、例えば絶縁樹脂を用いることができる。   The size of the cross section of the columnar structure 4 must be large enough to have strength as a spacer and not to prevent the underfill 5 from being injected. From this point of view, for example, the columnar structure 4 can be made of a cylinder having a diameter of 40 μm. Moreover, the material of the columnar structure 4 should just be an insulator which can maintain the intensity | strength as a spacer, for example, can use insulating resin.

この柱状構造物4は、最近接位置で隣接するはんだバンプ3の中間位置、例えば最近接のはんだバンプ3の中心を結ぶ直線の中点に配置される。なお、柱状構造物4の他の配置位置については後述する。   This columnar structure 4 is arranged at an intermediate position between adjacent solder bumps 3 at the closest position, for example, at the midpoint of a straight line connecting the centers of the closest solder bumps 3. Other arrangement positions of the columnar structure 4 will be described later.

第1基板1及び第2基板2の主面間には、アンダーフィル5が充填、硬化され、これにより両基板1、2の接続が強化される。このアンダーフィル5は、はんだバンプ3により両基板1、2を接続したのち、基板1の周辺から注入されて硬化される。   Between the main surfaces of the first substrate 1 and the second substrate 2, the underfill 5 is filled and hardened, whereby the connection between the substrates 1 and 2 is strengthened. The underfill 5 is injected from the periphery of the substrate 1 and cured after the substrates 1 and 2 are connected by the solder bumps 3.

本第1実施形態において、はんだバンプ3及び柱状構造物4は、予め第1基板1又は第2基板2に固定されていてもよく、また、予め作製されている柱状構造物4を、接続の際に基板1、2上に配置することもできる。さらに、はんだバンプ3及び柱状構造物4の一方を基板1、2の一方に、他方を基板1、2の他方に固定しておくこともできる。   In the first embodiment, the solder bumps 3 and the columnar structures 4 may be fixed to the first substrate 1 or the second substrate 2 in advance, and the columnar structures 4 prepared in advance may be connected. In some cases, it may be arranged on the substrates 1 and 2. Furthermore, one of the solder bump 3 and the columnar structure 4 can be fixed to one of the substrates 1 and 2 and the other can be fixed to the other of the substrates 1 and 2.

図2は本発明の第1実施形態変形例断面図であり、図1A−A’垂直断面に相当するこの変形例の断面を表している。   FIG. 2 is a sectional view of a modified example of the first embodiment of the present invention, and shows a section of this modified example corresponding to the vertical section of FIG.

図2(a)を参照して、この変形例では、柱状構造物4aは第1基板1の主面に設けられ、柱状構造物4aの先端(図2(a)の下端)は対向する第2基板2の主面に届かない。このため、柱状構造物4aの先端と第2基板2の主面との間に隙間を有する。   Referring to FIG. 2 (a), in this modification, the columnar structure 4a is provided on the main surface of the first substrate 1, and the tip of the columnar structure 4a (the lower end of FIG. 2 (a)) is opposed. 2 Does not reach the main surface of the substrate 2. For this reason, there is a gap between the tip of the columnar structure 4 a and the main surface of the second substrate 2.

この変形例では、柱状構造物4aと第2基板2との間に隙間があるから、第1及び第2基板1、2の間に第1基板1の外周からアンダーフィルを注入したとき、アンダーフィルの流れの乱れが小さくボイドの形成が少ない。なお、本変形例では、柱状構造物4はスペーサとして機能しないので、第1及び第2基板1、2の間隔はもっぱらはんだバンプ3により維持される。   In this modification, since there is a gap between the columnar structure 4a and the second substrate 2, when an underfill is injected between the first and second substrates 1 and 2 from the outer periphery of the first substrate 1, The turbulence of the fill flow is small and the formation of voids is small. In this modification, since the columnar structure 4 does not function as a spacer, the interval between the first and second substrates 1 and 2 is maintained exclusively by the solder bumps 3.

図2(b)を参照して、図2(a)に示す変形例の柱状構造物4aを、第2基板2の主面に設けることもできる。このようにすることで、後述するように、はんだバンプ3の変形による短絡を、図2(a)に示す変形例より効果的に抑制することができる。この柱状構造物4aの先端(図2(a)の上端)は対向する第1基板2の主面に届かず、柱状構造物4aの先端と第1基板1の主面との間に隙間を有する。この変形例でも、アンダーフィル5の流れの乱れが少なくボイドの発生が少ない。   With reference to FIG. 2B, the columnar structure 4 a of the modification shown in FIG. 2A can be provided on the main surface of the second substrate 2. By doing in this way, the short circuit by the deformation | transformation of the solder bump 3 can be more effectively suppressed than the modification shown to Fig.2 (a) so that it may mention later. The tip of the columnar structure 4a (the upper end of FIG. 2A) does not reach the main surface of the first substrate 2 that is opposed, and a gap is formed between the tip of the columnar structure 4a and the main surface of the first substrate 1. Have. Even in this modified example, the flow of the underfill 5 is less disturbed and voids are less generated.

上記の柱状構造物4aは、はんだバンプ3の変形が最も大きい高さ、例えばはんだバンプ3の高さの中央位置に達する高さを有することが好ましい。これにより、はんだバンプ3間の短絡を有効に防ぐことができる。   The columnar structure 4a preferably has a height at which the deformation of the solder bump 3 is greatest, for example, a height that reaches the center position of the height of the solder bump 3. Thereby, a short circuit between the solder bumps 3 can be effectively prevented.

図2(a)に示す変形例では、柱状構造物4aと下側の第2基板2との間に隙間がある。変形したはんだバンプ3は重力で下側に膨らむので、はんだバンプ3がこの隙間を通り隣接するはんだバンプと接触することがある。これに対して、隙間が上側になる図2(b)に示す変形例では、かかる隙間を通してのはんだバンプ3の接触が回避される。従って、図2(a)に示す変形例よりバンプ3の接触による短絡を効果的に抑制することができる。   In the modification shown in FIG. 2A, there is a gap between the columnar structure 4 a and the lower second substrate 2. Since the deformed solder bump 3 swells downward due to gravity, the solder bump 3 may pass through this gap and come into contact with an adjacent solder bump. On the other hand, in the modification shown in FIG. 2B in which the gap is on the upper side, the contact of the solder bump 3 through the gap is avoided. Therefore, the short circuit due to the contact of the bump 3 can be effectively suppressed as compared with the modification shown in FIG.

本発明の第2実施形態は最近接及び第2近接のはんだバンプ間に柱状構造物を配置した基板接続構造に関する。   2nd Embodiment of this invention is related with the board | substrate connection structure which has arrange | positioned the columnar structure between the nearest and 2nd adjacent solder bump.

図3は本発明の第2実施形態の基板接続構造説明図であり、図3(a)は基板接続構造部分の平面を、図3(b)及び(c)はそれぞれ図3(a)中のC−C’垂直断面及びD−D’垂直断面を表している。   FIG. 3 is an explanatory diagram of a substrate connection structure according to a second embodiment of the present invention. FIG. 3 (a) is a plan view of the substrate connection structure portion, and FIGS. 3 (b) and 3 (c) are diagrams in FIG. CC ′ vertical section and DD ′ vertical section of FIG.

図3を参照して、本第2実施形態では、第1実施形態形態と同様に格子状に配置されたはんだバンプ3の最近接はんだバンプ3の間に柱状構造物4が配置される他、格子の対角上に位置する第2近接はんだバンプ3の間に柱状構造物4−2を配置している。   Referring to FIG. 3, in the second embodiment, a columnar structure 4 is arranged between the closest solder bumps 3 of the solder bumps 3 arranged in a lattice like the first embodiment, A columnar structure 4-2 is arranged between the second adjacent solder bumps 3 located on the diagonal of the lattice.

このように柱状構造物4、4−2を最近接及び第2近接のはんだバンプ3間に配置することで、はんだバンプが変形して最近接はんだバンプ3の間を擦り抜けて第2近接はんだバンプ3に接触し短絡することを防止することができる。   By arranging the columnar structures 4 and 4-2 between the closest and second adjacent solder bumps 3 in this way, the solder bumps are deformed and rubbed between the closest solder bumps 3 to be second adjacent solder. It is possible to prevent short circuit due to contact with the bump 3.

本第2実施形態の柱状構造物の材料及び形状は、既述の第1実施形態と同様である。また、第1実施形態の変形例のように、柱状構造物の長さ(高さ)が基板1、2間距離より短くできることも同様である。   The material and shape of the columnar structure of the second embodiment are the same as those of the first embodiment described above. Similarly, the length (height) of the columnar structure can be made shorter than the distance between the substrates 1 and 2 as in the modification of the first embodiment.

次ぎに、上述した柱状構造物4、4−2、4aの配置について説明する。   Next, the arrangement of the columnar structures 4, 4-2, 4a described above will be described.

図4は本発明の柱状構造物の配置を説明するための平面図であり、基板接続構造内のはんだバンプと柱状構造物の平面位置を表している。図4(a)は中心のはんだバンプ3から最近接位置にある4個のはんだバンプ3−1,及びその間に設けられた柱状構造物4A〜4Dを、図4(b)は中心のはんだバンプ3の第2近接位置にある4個のはんだバンプ3−2を表している。   FIG. 4 is a plan view for explaining the arrangement of the columnar structures according to the present invention, and represents the planar positions of the solder bumps and the columnar structures in the board connection structure. 4A shows four solder bumps 3-1 and the columnar structures 4A to 4D provided between the solder bump 3-1, which are closest to the central solder bump 3, and FIG. 4B shows the central solder bump. 4 shows four solder bumps 3-2 in the second proximity position.

図4(a)を参照して、柱状構造物4、4−2、4a(図4(A)中の柱状構造物4A〜4D)は、まず、最近接位置にあるはんだバンプ3−1と中心位置にあるはんだバンプ3との間に配置される。   Referring to FIG. 4A, columnar structures 4, 4-2, 4a (columnar structures 4A-4D in FIG. 4A) first have solder bumps 3-1 at the closest position. It arrange | positions between the solder bump 3 in a center position.

柱状構造物4Aは、最近接位置のはんだバンプ3−1と中心位置のはんだバンプ3の中心線上に、両はんだバンプ3、3−1の中間点に配置されている。かかる位置に配置することで、はんだバンプ3、3−1がつぶれて直径が大きく変形した場合に隣接するはんだバンプ3、3−1間の短絡を有効に防止することができる。   The columnar structure 4 </ b> A is disposed on the center line between the solder bump 3-1 at the closest position and the solder bump 3 at the center position, at an intermediate point between the solder bumps 3 and 3-1. By arranging at this position, when the solder bumps 3 and 3-1 are crushed and the diameter is greatly deformed, a short circuit between the adjacent solder bumps 3 and 3-1 can be effectively prevented.

柱状構造物4Bは、最近接位置のはんだバンプ3−1と中心位置のはんだバンプ3の中心線からはんだバンプ3の半径以内の範囲(図4(a)中のハッチングされた領域)内に完全に含まれるように配置される。また、柱状構造物4C、4Dはその範囲内に一部が含まれるように配置され、柱状構造物4Dのように2個の柱状構造物4Dがそのハッチングされた領域の両側に配置されてもよい。このように配置することで、変形したはんだバンプ3が互いに短絡することが妨げられる。   The columnar structure 4B is completely within the radius of the solder bump 3 from the center line of the solder bump 3-1 at the closest position and the solder bump 3 at the central position (hatched area in FIG. 4A). It is arranged to be included in. Further, the columnar structures 4C and 4D are arranged so that a part thereof is included in the range, and even if two columnar structures 4D are arranged on both sides of the hatched area like the columnar structure 4D. Good. By arranging in this way, the deformed solder bumps 3 are prevented from short-circuiting each other.

図4(b)を参照して、上述した柱状構造物4A〜4Dの他に、さらに柱状構造物4−2A〜4−2Dを、はんだバンプ3と、はんだバンプ3の第2近接位置にあるはんだバンプ3−2との間に配置することができる。   Referring to FIG. 4B, in addition to the columnar structures 4A to 4D described above, the columnar structures 4-2A to 4-2D are located at the second proximity positions of the solder bump 3 and the solder bump 3. It can arrange | position between solder bumps 3-2.

柱状構造物4−2Aは、第2近接位置のはんだバンプ3−2と中心位置のはんだバンプ3の中心線上の中点に配置される。また、柱状構造物4−2Aは第2近接位置のはんだバンプ3−2と中心位置のはんだバンプ3の中心線からはんだバンプ3の半径以内の範囲(図4(b)中のハッチングされた領域)内に完全に含まれるように、柱状構造物4−2C及び4−2Dはそれぞれハッチングされたその領域に一部含まれるように配置される。このように、本実施例では、柱状構造物4A〜4D、4−2A〜4−2Dは、一方のみ又はその組合せによって構成される。   The columnar structure 4-2A is disposed at a midpoint on the center line of the solder bump 3-2 at the second proximity position and the solder bump 3 at the center position. Further, the columnar structure 4-2A has a range within the radius of the solder bump 3 from the center line of the solder bump 3-2 at the second proximity position and the solder bump 3 at the center position (hatched area in FIG. 4B). The columnar structures 4-2C and 4-2D are arranged so as to be partly included in the hatched area so that they are completely included in (). Thus, in the present embodiment, the columnar structures 4A to 4D and 4-2A to 4-2D are configured by only one or a combination thereof.

本発明の第3実施形態ははんだバンプ形成領域外にスペーサを配置した基板接続構造に関する。   3rd Embodiment of this invention is related with the board | substrate connection structure which has arrange | positioned the spacer outside the solder bump formation area.

図5は本発明の第3実施形態の基板接続構造説明図であり、図5(a)は平面図、図5(a)及び(b)はそれぞれ図5(a)中のE−F’垂直断面及びF−F’垂直断面を表している。   FIG. 5 is an explanatory diagram of a substrate connection structure according to a third embodiment of the present invention. FIG. 5A is a plan view, and FIGS. 5A and 5B are EF ′ in FIG. A vertical section and a FF ′ vertical section are shown.

図1を参照して、本第3実施形態では、図1に示す第1実施形態の基板接続構造に加えて、第1基板1の周縁部分にスペーサ6が配置されている。スペーサ6以外はアンダーフィル5の充填、硬化を含めて第1実施形態の基板接続構造と同様である。この第1基板1の周縁部分にスペーサ6を配置することで、第1基板を第2基板に精密に平行に配置することが容易になる。   Referring to FIG. 1, in the third embodiment, spacers 6 are arranged on the peripheral portion of the first substrate 1 in addition to the substrate connection structure of the first embodiment shown in FIG. 1. Except for the spacer 6, it is the same as the substrate connection structure of the first embodiment, including filling and curing of the underfill 5. By disposing the spacer 6 on the peripheral portion of the first substrate 1, it becomes easy to dispose the first substrate precisely parallel to the second substrate.

このスペーサ6は、柱状構造物4と同じ高さを有し、例えば柱状構造物4と材料、形状を同じくすることもできる。これにより、スペーサ6を柱状構造物4と同時に形成することができるので、製造が簡易になる。   The spacer 6 has the same height as the columnar structure 4 and can be made of the same material and shape as the columnar structure 4, for example. Thereby, since the spacer 6 can be formed simultaneously with the columnar structure 4, manufacture becomes easy.

図6は本発明の第3実施形態変形例断面図であり、図5(a)のE−E’断面に相当する位置の垂直断面を表している。   FIG. 6 is a cross-sectional view of a modification of the third embodiment of the present invention, and shows a vertical cross section at a position corresponding to the E-E ′ cross section of FIG.

図6(a)を参照して、本第3実施形態変形例では、柱状構造物4aは第1基板1の主面に立設され、その高さはスペーサ6より低く形成される。即ち、第1及び第2基板1、2間の距離はスペーサ6により規定され、柱状構造物4aと第2基板2との間に隙間が形成される。   With reference to FIG. 6A, in the third embodiment modification example, the columnar structure 4 a is erected on the main surface of the first substrate 1, and its height is lower than the spacer 6. That is, the distance between the first and second substrates 1 and 2 is defined by the spacer 6, and a gap is formed between the columnar structure 4 a and the second substrate 2.

本変形例では、柱状構造物4aと第2基板2との間に隙間があるため、アンダーフィル5の注入が容易である。一方、基板1、2間距離はスペーサ6により保持されるから、はんだバンプ3の無用に大きな変形を阻止することができる。   In this modification, since there is a gap between the columnar structure 4a and the second substrate 2, the underfill 5 can be easily injected. On the other hand, since the distance between the substrates 1 and 2 is held by the spacer 6, unnecessary large deformation of the solder bump 3 can be prevented.

本変形例では、柱状構造物4aとスペーサ6の高さが異なる。かかる構造は、柱状構造物4aとスペーサ6とをそれぞれ第1及び第2基板上に配置することで容易に形成することができる。もちろん、同一基板上に配置しても差し支えない。   In this modification, the columnar structure 4a and the spacer 6 are different in height. Such a structure can be easily formed by disposing the columnar structure 4a and the spacer 6 on the first and second substrates, respectively. Of course, they may be arranged on the same substrate.

図6(b)を参照して、本第3実施形態変形例において、柱状構造物4aを第2基板2上に配置することもできる。この変形例は、図2(b)に示す第1実施形態の変形例と同様の効果を奏する。   With reference to FIG. 6B, the columnar structure 4 a can be arranged on the second substrate 2 in the third embodiment modification example. This modification has the same effect as the modification of the first embodiment shown in FIG.

本発明の第4実施形態は、本発明の基板接続構造を構成するに適したはんだバンプ接続用基板及びその製造方法に関する。   4th Embodiment of this invention is related with the board | substrate for solder bump connection suitable for comprising the board | substrate connection structure of this invention, and its manufacturing method.

図7は本発明の第4実施形態製造工程断面図であり、基板接続構造を構成するはんだバンプ接続用基板の断面を表している。   FIG. 7 is a cross-sectional view of a manufacturing process according to a fourth embodiment of the present invention, and shows a cross section of a solder bump connecting substrate constituting the substrate connecting structure.

第4実施形態では、図7(a)を参照して、半導体集積回路が形成された半導体基板1上に絶縁膜1bを形成し、絶縁膜1b上又は絶縁膜1bに埋め込むように電極1aを形成する。なお、基板1は、半導体基板の他、半導体装置のパッケージ用回路基板あるいは電子回路基板であっても同様の工程で基板1を製造することができる。   In the fourth embodiment, referring to FIG. 7A, an insulating film 1b is formed on a semiconductor substrate 1 on which a semiconductor integrated circuit is formed, and an electrode 1a is embedded on the insulating film 1b or in the insulating film 1b. Form. In addition, the board | substrate 1 can be manufactured by the same process, even if it is the circuit board for package of a semiconductor device, or an electronic circuit board other than a semiconductor substrate.

次いで、図7(b)を参照して、電極1a上にボール状のはんだバンプ3を接合する。   Next, referring to FIG. 7B, ball-shaped solder bumps 3 are bonded onto the electrode 1a.

次いで、図7(c)を参照して、はんだバンプ3を覆う感光性絶縁樹脂、例えばベンゾシクロブテン系の樹脂(BCB樹脂:例えばデュポン社製)を、はんだバンプ3を覆うように基板1上に塗布し、180℃で1時間の熱処理による半キュアを施し、はんだバンプ3を覆う平坦な感光性絶縁樹脂層7を形成する。感光性絶縁樹脂層7の厚さは、例えばはんだバンプの頂点程度とする。このベンゾシクロブテン系の樹脂はキュアの熱処理の際、収縮が小さいので、柱状構造物4の高さ及び形状を精密に製作することができる。感光性絶縁樹脂として、他にポリイミド系樹脂、エポキシ系樹脂、オレフィン系樹脂又はフェノール系の感光性樹脂を用いることもできる。   Next, referring to FIG. 7C, a photosensitive insulating resin that covers the solder bump 3, for example, a benzocyclobutene resin (BCB resin: manufactured by DuPont, for example) is applied to the substrate 1 so as to cover the solder bump 3. And a flat curing is performed by heat treatment at 180 ° C. for 1 hour to form a flat photosensitive insulating resin layer 7 covering the solder bumps 3. The thickness of the photosensitive insulating resin layer 7 is, for example, about the apex of the solder bump. Since this benzocyclobutene-based resin has a small shrinkage during the heat treatment of the cure, the height and shape of the columnar structure 4 can be precisely manufactured. As the photosensitive insulating resin, polyimide resin, epoxy resin, olefin resin, or phenol photosensitive resin can also be used.

次いで、図7(d)を参照して、感光性絶縁樹脂層7を露光、現像して、パターニングし、感光性絶縁樹脂からなる柱状構造物4を形成する。露光パターンは、円形パターンを図1(a)に示す円柱構造物4の位置に配置した。なお、所望の断面形状を有する円柱構造物4を図1(a)、図3(a)又は図5(a)の位置に配置したパターンとすることもできる。このとき、柱状構造物4、4−2及びスペーサ6は同一の露光、現像工程で製造される。なお、これらの円柱構造物4の位置は、必要に応じて、図4(a)又は図4(b)のように配置することもできる。   Next, referring to FIG. 7D, the photosensitive insulating resin layer 7 is exposed, developed, and patterned to form the columnar structure 4 made of the photosensitive insulating resin. As the exposure pattern, a circular pattern was arranged at the position of the cylindrical structure 4 shown in FIG. In addition, it can also be set as the pattern which has arrange | positioned the cylindrical structure 4 which has desired cross-sectional shape in the position of Fig.1 (a), Fig.3 (a), or Fig.5 (a). At this time, the columnar structures 4 and 4-2 and the spacer 6 are manufactured by the same exposure and development process. In addition, the position of these cylindrical structures 4 can also be arrange | positioned like FIG. 4 (a) or FIG.4 (b) as needed.

以上の工程を経て、主面にはんだバンプ3及び柱状構造物4が形成されたはんだバンプ接続用基板10、例えばフリップチップが製造された。このはんだバンプ接続用基板10は、基板1上に形成された電極1a上にはんだバンプ(例えば、はんだボール)が接合され、最近接位置のハンダバンプ3間に感光性絶縁樹脂からなる柱状構造物4が設けられている。   Through the above steps, a solder bump connecting substrate 10 having the solder bumps 3 and the columnar structures 4 formed on the main surface, for example, a flip chip, was manufactured. In this solder bump connecting substrate 10, a solder bump (for example, a solder ball) is joined to an electrode 1 a formed on the substrate 1, and a columnar structure 4 made of a photosensitive insulating resin between the solder bumps 3 at the closest position. Is provided.

次に、上記はんだバンプ接続用基板10を用いた基板接続構造の製造方法を説明する。   Next, a method for manufacturing a substrate connection structure using the solder bump connection substrate 10 will be described.

図7(e)を参照して、まず、基板2(第2基板)として、上面(主面)に電極2aが配置された電子回路基板を準備する。この電極2aは、はんだバンプ接続用基板10の電極1aに対応して配置されており、上面から突起している。   With reference to FIG.7 (e), the electronic circuit board by which the electrode 2a is arrange | positioned at the upper surface (main surface) is first prepared as the board | substrate 2 (2nd board | substrate). The electrode 2a is disposed corresponding to the electrode 1a of the solder bump connecting substrate 10 and protrudes from the upper surface.

次いで、基板2上に、はんだパンプ接続用基板10を電極1aと電極2aとが対向する位置に位置合わせし、ハンダバンプ3を電極2の上面に接合する。このとき、電極2aは基板2上面から突起しているので、電極1a、2aを合わせた高さは柱状構造物4の高さより高くなる。従って、柱状構造物4により両基板1、2間の間隔が規定されていても、はんだバンプ3は電極2aに押圧され潰されて変形する。接合は、例えばリフロー又は超音波ボンデングによりなすことができる。なお、リフローは例えば220℃でなされる。これにより、基板1と基板2は、電極1aと電極2aとがはんだバンプ2を介して接続され、両基板1、2は接続され固定される。   Next, the solder bump connection substrate 10 is positioned on the substrate 2 at a position where the electrodes 1 a and 2 a face each other, and the solder bump 3 is bonded to the upper surface of the electrode 2. At this time, since the electrode 2 a protrudes from the upper surface of the substrate 2, the combined height of the electrodes 1 a and 2 a is higher than the height of the columnar structure 4. Therefore, even if the distance between the substrates 1 and 2 is defined by the columnar structure 4, the solder bump 3 is pressed and crushed by the electrode 2a and deformed. The joining can be performed by, for example, reflow or ultrasonic bonding. The reflow is performed at 220 ° C., for example. Thereby, the board | substrate 1 and the board | substrate 2 are connected to the electrode 1a and the electrode 2a via the solder bump 2, and both the board | substrates 1 and 2 are connected and fixed.

次いで、250℃で1時間の熱処理をして、柱状構造物4を構成する感光性絶縁樹脂をキュアする。このキュアにより、柱状構造物4と基板1及び基板2との接着が強化されるともに、柱状構造物4の強度が高くなる。   Next, heat treatment is performed at 250 ° C. for 1 hour to cure the photosensitive insulating resin constituting the columnar structure 4. By this curing, the adhesion between the columnar structure 4 and the substrate 1 and the substrate 2 is strengthened, and the strength of the columnar structure 4 is increased.

次いで、基板1の周辺からアンダーフィル5を注入し、硬化する。この工程を経て、図1(a)、図3(a)又は図5(a)を参照して説明した本発明の基板接続構造が形成される。   Next, the underfill 5 is injected from the periphery of the substrate 1 and cured. Through this step, the substrate connection structure of the present invention described with reference to FIG. 1 (a), FIG. 3 (a) or FIG. 5 (a) is formed.

本発明の第5実施形態は、はんだバンプより低い柱状構造物を有するはんだバンプ接続用基板に関する。   5th Embodiment of this invention is related with the board | substrate for solder bump connection which has a columnar structure lower than a solder bump.

図8は本発明の第5実施形態製造工程断面図であり、はんだバンプ接続用基板の断面を表している。   FIG. 8 is a cross-sectional view of a manufacturing process of a fifth embodiment of the present invention, showing a cross section of a solder bump connecting substrate.

図8(a)を参照して、図7(a)に示す第4実施形態の基板1と同様の基板1、即ち、主面に絶縁膜1bと、その絶縁膜1b上に形成された電極1aとを有する集積回路の基板1を準備する。そして、基板1上に絶縁物からなる柱状構造物4aを形成する。   Referring to FIG. 8A, a substrate 1 similar to the substrate 1 of the fourth embodiment shown in FIG. 7A, that is, an insulating film 1b on the main surface and an electrode formed on the insulating film 1b. An integrated circuit substrate 1 having 1a is prepared. Then, a columnar structure 4 a made of an insulator is formed on the substrate 1.

柱状構造物4aは、第4実施形態と同様に感光性絶縁樹脂層7の露光、現像により形成した。しかしこれに限らず、他の方法、例えばあらかじめ製作された柱状絶縁物4aを、基板1上に植設して形成することもできる。なお、柱状構造物4aの平面配置位置は、第4実施形態の柱状構造物4、4−2及びスペーサ6の配置位置と同じである。   The columnar structure 4a was formed by exposing and developing the photosensitive insulating resin layer 7 as in the fourth embodiment. However, the present invention is not limited to this, and other methods, for example, a columnar insulator 4 a manufactured in advance can be implanted and formed on the substrate 1. In addition, the planar arrangement position of the columnar structure 4a is the same as the arrangement position of the columnar structures 4, 4-2 and the spacer 6 of the fourth embodiment.

次いで、図8(b)を参照して、電極1a上にはんだボールを接合し、電極1a上にはんだバンプ3を形成する。これにより、基板1上にはんだバンプ3及び絶縁物からなる柱状構造物4aが配置されたはんだバンプ接続用基板10が製造された。   Next, referring to FIG. 8B, solder balls are bonded onto the electrode 1a, and solder bumps 3 are formed on the electrode 1a. As a result, the solder bump connecting substrate 10 in which the solder bumps 3 and the columnar structures 4a made of an insulator are arranged on the substrate 1 is manufactured.

本第5実施形態では、はんだバンプ3を柱状構造物4aの配置後に配置、接合するので、はんだバンプ3と柱状構造物4aの高さをそれぞれ独立に制御することができる。従って、はんだバンプ3より低い柱状構造物4aを配置することも容易である。また、柱状構造物4aとして、第1実施形態のように、ほぼバンプと同じ又は高い柱状構造物4を配置することもできる。   In the fifth embodiment, since the solder bumps 3 are arranged and joined after the columnar structures 4a are arranged, the heights of the solder bumps 3 and the columnar structures 4a can be controlled independently. Therefore, it is easy to arrange the columnar structures 4a lower than the solder bumps 3. Further, as the columnar structure 4a, a columnar structure 4 that is substantially the same as or higher than the bump can be disposed as in the first embodiment.

本第5実施形態のはんだバンプ接続用基板10は、第4実施形態と同様に、はんだバンプ3を介して通常の電子回路基板2上に接続し、さらにアンダーフィルを注入して硬化することで本発明の基板接続構造が形成される。このとき、柱状構造物4aがはんだバンプ3より十分に低い場合は、図2を参照して、両基板1、2がはんだバンプ3により接続され、はんだバンプ3の短絡防止機能を有する柱状構造物4aがスペーサとしては機能しない第1実施形態変形例の基板接続構造が製作される。また、柱状構造物4aがはんだバンプ3より同じ程度又は高い場合は、図1を参照して、柱状構造物4aがスペーサとしての柱状構造物4の機能を奏する第1実施形態の基板接続構造が製作される。   Similarly to the fourth embodiment, the solder bump connecting substrate 10 of the fifth embodiment is connected to a normal electronic circuit board 2 through the solder bumps 3, and further is injected and cured by injecting underfill. The substrate connection structure of the present invention is formed. At this time, if the columnar structure 4a is sufficiently lower than the solder bump 3, referring to FIG. 2, both the substrates 1 and 2 are connected by the solder bump 3, and the columnar structure having a function of preventing the solder bump 3 from being short-circuited. A substrate connection structure according to a modified example of the first embodiment in which 4a does not function as a spacer is manufactured. When the columnar structure 4a is the same or higher than the solder bump 3, the substrate connection structure of the first embodiment in which the columnar structure 4a functions as the columnar structure 4 as a spacer is described with reference to FIG. Produced.

第6実施形態ははんだバンプより低い柱状構造物を有するはんだバンプ接続用基板の他の製造方法に関する。   The sixth embodiment relates to another method for manufacturing a solder bump connection board having a columnar structure lower than the solder bump.

図9は本発明の第6実施形態製造工程断面図であり、はんだバンプ接続用基板の断面を表している。   FIG. 9 is a cross-sectional view of a manufacturing process according to the sixth embodiment of the present invention, showing a cross section of a solder bump connecting substrate.

本第6実施形態では、基板1の主面に形成された電極1a上にはんだバンプ3を接合する工程までは、第4実施形態の図7(b)に示す工程と同じである。   In the sixth embodiment, the process up to the step of bonding the solder bump 3 onto the electrode 1a formed on the main surface of the substrate 1 is the same as the process shown in FIG. 7B of the fourth embodiment.

次いで、図9(a)を参照して、ベンゾシクロブテン系の樹脂を塗布して、感光性絶縁樹脂層7を形成する。この感光性樹脂層7は、はんだバンプ3の高さより薄く塗布する。従って、感光性樹脂層7ははんだバンプ3の間で薄く、例えばはんだバンプ3のほぼ中心の位置でほぼ高さ30μmとなる。次いで180℃、1時間の半キュアを行う。   Next, referring to FIG. 9A, a benzocyclobutene-based resin is applied to form a photosensitive insulating resin layer 7. The photosensitive resin layer 7 is applied thinner than the height of the solder bump 3. Therefore, the photosensitive resin layer 7 is thin between the solder bumps 3, and has a height of about 30 μm, for example, at a substantially central position of the solder bumps 3. Next, a half cure is performed at 180 ° C. for 1 hour.

次いで、感光性樹脂層7を露光、現像して、感光性樹脂からなる柱状構造物4aを最近接はんだバンプ3間に形成する。次いで、250℃で1時間の熱処理によりキュアして、柱状構造物4aを強化する。この工程を経て、はんだバンプより低い柱状構造物4aを有するはんだバンプ接続用基板10が製造される。   Next, the photosensitive resin layer 7 is exposed and developed to form a columnar structure 4 a made of a photosensitive resin between the closest solder bumps 3. Next, the columnar structure 4a is strengthened by curing at 250 ° C. for 1 hour. Through this step, the solder bump connecting substrate 10 having the columnar structure 4a lower than the solder bump is manufactured.

本第6実施形態では、感光性樹脂の塗布、露光及び現像により柱状構造物4aを形成できるから、容易にはんだバンプ接続用基板10を製造することがてきる。   In the sixth embodiment, since the columnar structure 4a can be formed by applying, exposing and developing a photosensitive resin, the solder bump connecting substrate 10 can be easily manufactured.

本発明の第7実施形態は、絶縁物の柱状構造物が配置されたはんだバンプ接続用基板20に関する。   7th Embodiment of this invention is related with the board | substrate 20 for solder bump connection in which the columnar structure of the insulator was arrange | positioned.

図10は本発明の第7実施形態組み立て図であり、はんだバンプ接続用基板の断面を表している。   FIG. 10 is an assembly diagram of the seventh embodiment of the present invention, and shows a cross section of the solder bump connecting substrate.

図10を参照して、本第7実施形態のはんだバンプ接続用基板10は、基板2、例えば電子回路基板の上面(主面)に電極2aと、その最近接位置の電極2a間に立設された絶縁物からなる柱状構造物4aを備える。この柱状構造物4aは、記述の第5実施形態と同様に、感光性絶縁樹脂層7を露光、現像するパターニングにより形成される。もちろん、他の方法にを用いて製造されるものでも差し支えない。   Referring to FIG. 10, the solder bump connecting substrate 10 of the seventh embodiment is erected on the upper surface (main surface) of the substrate 2, for example, an electronic circuit substrate, between the electrode 2a and the electrode 2a at the nearest position. A columnar structure 4a made of an insulating material is provided. This columnar structure 4a is formed by patterning that exposes and develops the photosensitive insulating resin layer 7 as in the fifth embodiment described. Of course, it may be manufactured using other methods.

このはんだバンプ接続用基板10の上方から、基板1の主面にはんだバンプ3が形成されたフリップチップ30を、はんだバンプ3と電極2aとの位置を合わせ、リフロー又は超音波ボンデイングにより接合する。次いで、基板1、2の間にアンダーフィル5を注入、硬化して、本発明の基板接続構造が形成される。なお、柱状構造物4aの高さが高いときは、図1に示す第1実施形態の基板接続構造が、低いときは図2に示す第1実施形態変形例の基板接続構造が形成される。   From above the solder bump connecting substrate 10, the flip chip 30 in which the solder bump 3 is formed on the main surface of the substrate 1 is aligned with the position of the solder bump 3 and the electrode 2 a and joined by reflow or ultrasonic bonding. Next, the underfill 5 is injected between the substrates 1 and 2 and cured to form the substrate connection structure of the present invention. In addition, when the height of the columnar structure 4a is high, the board | substrate connection structure of 1st Embodiment shown in FIG. 1 is formed, and when low, the board | substrate connection structure of 1st Embodiment modification shown in FIG. 2 is formed.

本第7実施形態のはんだバンプ接続用基板は、フリップチップ又はグリッドアレイ回路基板のようなはんだバンプ3を用いて接続する通常の基板を用いて、本発明の基板接続構造を形成することができる。   The substrate for solder bump connection according to the seventh embodiment can form the substrate connection structure of the present invention using a normal substrate connected by using solder bumps 3 such as flip chip or grid array circuit boards. .

図11は本発明の第8実施形態組み立て図であり、図9(b)に示す第6実施形態のはんだバンプ接続用基板10と、スペーサ6が形成された電子回路基板2とを接合した基板接続構造を表している。   FIG. 11 is an assembly diagram of the eighth embodiment of the present invention, in which the solder bump connection substrate 10 of the sixth embodiment shown in FIG. 9B and the electronic circuit substrate 2 on which the spacer 6 is formed are joined. Represents a connection structure.

本第8実施形態では、主面にスペーサ6が立設された電子回路基板2を用いる。このスペーサ6は絶縁物からなり、図5(a)に示すように、電極の形成領域(即ち、はんだバンプ3の形成領域)の外側に配置される。なお、スペーサ6材料を感光性絶縁樹脂とすることで、露光、現像により製造することができる。   In the eighth embodiment, the electronic circuit board 2 in which the spacer 6 is erected on the main surface is used. The spacer 6 is made of an insulating material and is disposed outside the electrode formation region (that is, the solder bump 3 formation region) as shown in FIG. In addition, it can manufacture by exposure and image development by making the spacer 6 material into photosensitive insulating resin.

この上に、はんだバンプ3が電極2aに一致するように位置合わせして、はんだバンプ3と電極2aとを接合する。その後、アンダーフィルを注入し、硬化して、図5に示すようなスペーサ6で間隔が保持された本発明の基板接合構造が製造される。   On top of this, the solder bumps 3 and the electrodes 2a are joined by aligning them so that the solder bumps 3 coincide with the electrodes 2a. Thereafter, underfill is injected and cured, and the substrate bonding structure of the present invention in which the distance is maintained by the spacer 6 as shown in FIG. 5 is manufactured.

本第8実施形態では、柱状構造物4aとスペーサ6とが、それぞれ異なる基板1、2に形成されるから、それぞれの干渉を受けることなく製造でき製造が容易である。   In the eighth embodiment, since the columnar structure 4a and the spacer 6 are formed on different substrates 1 and 2, respectively, the columnar structure 4a and the spacer 6 can be manufactured without being affected by each interference, and manufacturing is easy.

本発明の第9実施形態は、はんだバンプ3が第1及び第2基板1、2上に形成されたはんだバンプ接続用基板1、2をもちいて形成される基板接続構造に関する。   The ninth embodiment of the present invention relates to a substrate connection structure in which solder bumps 3 are formed using solder bump connection substrates 1 and 2 formed on first and second substrates 1 and 2.

図12は本発明の第9実施形態製造工程断面図であり、はんだバンプ接続用基板の断面を表している。   FIG. 12 is a cross-sectional view of a ninth embodiment of the present invention, showing a cross section of a solder bump connecting substrate.

本第9実施形態では、主面に電極1aが形成されたフリップチップ基板1と、主面に電極2aが形成された電子回路基板2とを用いる。基板1、2の電極1a、2a上には、それぞれはんだバンプ3が形成されている。そして、基板1、2の一方、例えば基板1の主面に、スペーサとして機能する高さを有する絶縁物からなる柱状構造物4が設けられている。この柱状構造物4の配置及び形成方法は上述の第4〜第9実施形態と同様の方法で形成することができる。   In the ninth embodiment, a flip chip substrate 1 having an electrode 1a formed on the main surface and an electronic circuit substrate 2 having an electrode 2a formed on the main surface are used. Solder bumps 3 are formed on the electrodes 1a and 2a of the substrates 1 and 2, respectively. A columnar structure 4 made of an insulator having a height that functions as a spacer is provided on one of the substrates 1 and 2, for example, the main surface of the substrate 1. The arrangement and formation method of the columnar structures 4 can be formed by the same method as in the above fourth to ninth embodiments.

上記の基板1及び基板2を、互いのはんだバンプ3を合わせて接合する。このとき、基板1、2を押圧して基板1、2間の間隔がスペーサ6で保持されるようにする。次いで、基板1の周辺からアンダーフィル5を注入し、硬化して、図5に示す本発明の基板接続構造が製造される。   The substrate 1 and the substrate 2 are joined together with the solder bumps 3 of each other. At this time, the substrates 1 and 2 are pressed so that the space between the substrates 1 and 2 is held by the spacer 6. Next, the underfill 5 is injected from the periphery of the substrate 1 and cured to produce the substrate connection structure of the present invention shown in FIG.

本第9実施形態では、スペーサとして機能する柱状構造物4であっても、柱状構造物4の高さをはんだバンプ3の高さより低くすることができるので、図7を参照して説明した、はんだバンプ3を覆う感光性絶縁樹脂層7を平坦に形成する第4実施形態の方法により容易に基板1をはんだバンプ接続用基板に作製することができる。   In the ninth embodiment, even in the columnar structure 4 that functions as a spacer, the height of the columnar structure 4 can be made lower than the height of the solder bump 3, so that it has been described with reference to FIG. The substrate 1 can be easily formed on a solder bump connecting substrate by the method of the fourth embodiment in which the photosensitive insulating resin layer 7 covering the solder bumps 3 is formed flat.

上述した本明細書には以下の付記記載の発明が開示されている。
(付記1)第1基板の主面に形成された複数の第1電極と、前記第1電極に対応して第2基板の主面に形成された複数の第2電極とを対向させてはんだバンプにより接続し、前記第1及び第2基板の前記主面間をアンダフィルで充填された半導体装置造において、
夫々のはんだバンプ間に絶縁物からなる柱状構造物を有する半導体装置。
(付記2)前記柱状構造物が、最近接位置にある前記はんだバンプの間に設けられていることを特徴とする付記1記載の半導体装置。
(付記3)さらに、前記柱状構造物が第2近接位置にある前記はんだバンプ間にも設けられていることを特徴とする付記1又は2記載の半導体装置。
(付記4)前記柱状構造物が、感光性絶縁樹脂からなることを特徴とする付記1、2又は3記載の半導体装置。
(付記5)主面に形成された複数の電極と、前記電極上に形成されたはんだバンプとを有するはんだバンプ接続用基板において、
前記はんだバンプ接続用基板の前記主面に立設された絶縁物からなる柱状構造物が、最近接位置にある前記はんだバンプの間に設けられていることを特徴とするはんだバンプ接続用基板。
(付記6)第1基板を、前記第1基板の主面に形成された複数のはんだバンプを用いて接続するための複数の電極を主面に備えたはんだバンプ接続用基板において、
前記はんだバンプ接続用基板の前記主面に立設された絶縁物からなる柱状構造物が、最近接位置にある前記電極間に設けられていることを特徴とするはんだバンプ接続用基板。
(付記7)さらに、前記柱状構造物が第2近接位置にある前記はんだバンプ間にも設けられていることを特徴とする付記5又は6記載のはんだバンプ接続用基板。
(付記8)前記柱状構造物が、感光性絶縁樹脂からなることを特徴とする付記5、6又は7記載のはんだバンプ接続用基板。
(付記9)基板の主面に複数の電極を形成する工程と、
前記電極上にはんだバンプを形成する工程と、
前記基板上に感光性絶縁樹脂層を形成する工程と、
前記感光性絶縁樹脂層を露光及び現像して、最近接位置にある前記電極間に前記感光性絶縁樹脂層からなる柱状構造物を形成する工程とを有することを特徴とするはんだバンプ接続用基板の製造方法。
(付記10)前記柱状構造物を、第2近接位置にある前記電極間に形成することを特徴とする付記9記載のはんだバンプ形成用基板の製造方法。
(付記11)前記柱状構造物の形成工程後に、前記はんだバンプを形成することを特徴とする付記9またと10記載のはんだバンプ接続用基板の製造方法。
(付記12)基板の主面に複数の電極を形成する工程と、
前記電極上にはんだバンプを形成する工程と、
前記基板上に感光性絶縁樹脂層を形成する工程と、
前記感光性絶縁樹脂層を露光及び現像して、最近接位置にある前記電極間に前記感光性絶縁樹脂層からなる柱状構造物を形成する工程と、
前記第1電極に対応して主面に形成された複数の第2電極を備えた第2基板の前記主面上に、前記第1電極と前記第2電極とを対向させて前記はんだバンプにより接続する工程と、
前記第1及び第2基板の前記主面間をアンダフィルで充填する工程とを有することを特徴とすることを特徴とする半導体装置の製造方法。
The present invention described above discloses the invention described in the following supplementary notes.
(Supplementary Note 1) Solder by facing a plurality of first electrodes formed on the main surface of the first substrate and a plurality of second electrodes formed on the main surface of the second substrate corresponding to the first electrode In a semiconductor device structure connected by bumps and filled with underfill between the main surfaces of the first and second substrates,
A semiconductor device having a columnar structure made of an insulating material between each solder bump.
(Supplementary note 2) The semiconductor device according to supplementary note 1, wherein the columnar structure is provided between the solder bumps at the closest positions.
(Supplementary note 3) The semiconductor device according to Supplementary note 1 or 2, wherein the columnar structure is also provided between the solder bumps in a second proximity position.
(Additional remark 4) The said columnar structure consists of photosensitive insulating resin, The semiconductor device of Additional remark 1, 2 or 3 characterized by the above-mentioned.
(Supplementary Note 5) In a solder bump connection substrate having a plurality of electrodes formed on the main surface and solder bumps formed on the electrodes,
A solder bump connection substrate, wherein a columnar structure made of an insulator standing on the main surface of the solder bump connection substrate is provided between the solder bumps at the closest positions.
(Supplementary Note 6) In a solder bump connection substrate provided with a plurality of electrodes on the main surface for connecting the first substrate using a plurality of solder bumps formed on the main surface of the first substrate,
A solder bump connection substrate, wherein a columnar structure made of an insulator standing on the main surface of the solder bump connection substrate is provided between the electrodes at the closest positions.
(Additional remark 7) Furthermore, the said columnar structure is provided also between the said solder bumps in a 2nd proximity position, The board | substrate for solder bump connection of Additional remark 5 or 6 characterized by the above-mentioned.
(Supplementary note 8) The solder bump connection substrate according to supplementary note 5, 6 or 7, wherein the columnar structure is made of a photosensitive insulating resin.
(Appendix 9) forming a plurality of electrodes on the main surface of the substrate;
Forming solder bumps on the electrodes;
Forming a photosensitive insulating resin layer on the substrate;
And a step of exposing and developing the photosensitive insulating resin layer to form a columnar structure made of the photosensitive insulating resin layer between the electrodes at the closest positions. Manufacturing method.
(Additional remark 10) The manufacturing method of the board | substrate for solder bump formation of Additional remark 9 characterized by forming the said columnar structure between the said electrodes in a 2nd proximity position.
(Supplementary note 11) The method for manufacturing a solder bump connecting substrate according to supplementary notes 9 and 10, wherein the solder bump is formed after the step of forming the columnar structure.
(Appendix 12) A step of forming a plurality of electrodes on the main surface of the substrate;
Forming solder bumps on the electrodes;
Forming a photosensitive insulating resin layer on the substrate;
Exposing and developing the photosensitive insulating resin layer to form a columnar structure composed of the photosensitive insulating resin layer between the electrodes at the closest positions; and
On the main surface of the second substrate having a plurality of second electrodes formed on the main surface corresponding to the first electrode, the first electrode and the second electrode are opposed to each other by the solder bumps. Connecting, and
And filling the space between the main surfaces of the first and second substrates with an underfill.

本発明を集積回路のシリコン基板、パッケージ基板又は電子回路基板の接続に適用することで、接着強度が高く信頼性の高い電子回路機器を製造することができる。   By applying the present invention to the connection of a silicon substrate, a package substrate, or an electronic circuit substrate of an integrated circuit, an electronic circuit device having high adhesive strength and high reliability can be manufactured.

本発明の第1実施形態の基板接続構造説明図Board connection structure explanatory drawing of 1st Embodiment of this invention 本発明の第1実施形態変形例断面図Sectional drawing of a modification of the first embodiment of the present invention 本発明の第2実施形態の基板接続構造説明図Board connection structure explanatory drawing of 2nd Embodiment of this invention. 本発明の柱状構造物の配置を説明するための平面図The top view for demonstrating arrangement | positioning of the columnar structure of this invention 本発明の第3実施形態の基板接続構造説明図Board connection structure explanatory drawing of 3rd Embodiment of this invention. 本発明の第3実施形態変形例断面図Sectional drawing of a modification of the third embodiment of the present invention 本発明の第4実施形態製造工程断面図Sectional view of the manufacturing process of the fourth embodiment of the present invention 本発明の第5実施形態製造工程断面図Sectional view of manufacturing process of fifth embodiment of the present invention 本発明の第6実施形態製造工程断面図Sectional view of the manufacturing process of the sixth embodiment of the present invention 本発明の第7実施形態組み立て図Assembly drawing of seventh embodiment of the present invention 本発明の第8実施形態組み立て図Assembly drawing of eighth embodiment of the present invention 本発明の第9実施形態製造工程断面図Sectional view of manufacturing process of ninth embodiment of the present invention 従来の基板接続構造の説明図Illustration of conventional board connection structure

符号の説明Explanation of symbols

1 第1基板
1a、2a 電極
1b 絶縁膜
2 第2基板
3、3−1、3−2 はんだバンプ
4、4−2、4A〜4D、4−2A〜4−2D 柱状構造物
4a 柱状構造物
5 アンダーフィル
6 スペーサ
7 感光性絶縁樹脂層
10、20 はんだバンプ接続用基板
30 フリップチップ
41 LSI
41a、42a 電極
42 電子回路基板
43 はんだバンプ
44 網状スペーサ
DESCRIPTION OF SYMBOLS 1 1st board | substrate 1a, 2a Electrode 1b Insulating film 2 2nd board | substrate 3, 3-1, 3-2 Solder bump 4, 4-2, 4A-4D, 4-2A-4-2D Columnar structure 4a Columnar structure 5 Underfill 6 Spacer 7 Photosensitive insulating resin layer 10, 20 Solder bump connection substrate 30 Flip chip 41 LSI
41a, 42a Electrode 42 Electronic circuit board 43 Solder bump 44 Reticulated spacer

Claims (5)

第1基板の主面に形成された複数の第1電極と、前記第1電極に対応して第2基板の主面に形成された複数の第2電極とを対向させてはんだバンプにより接続し、前記第1及び第2基板の前記主面間をアンダフィルで充填された半導体装置において、
夫々のはんだバンプ間に絶縁物からなる柱状構造物を有する半導体装置。
A plurality of first electrodes formed on the main surface of the first substrate and a plurality of second electrodes formed on the main surface of the second substrate corresponding to the first electrodes are opposed to each other by solder bumps. In the semiconductor device in which the space between the main surfaces of the first and second substrates is filled with underfill,
A semiconductor device having a columnar structure made of an insulating material between each solder bump.
前記柱状構造物が、最近接位置にある前記はんだバンプの間に設けられていることを特徴とする請求項1記載の半導体装置。   The semiconductor device according to claim 1, wherein the columnar structure is provided between the solder bumps at the closest positions. さらに、前記柱状構造物が第2近接位置にある前記はんだバンプ間にも設けられていることを特徴とする請求項1又は2記載の半導体装置。   The semiconductor device according to claim 1, wherein the columnar structure is also provided between the solder bumps in a second proximity position. 基板の主面に複数の電極を形成する工程と、
前記電極上にはんだバンプを形成する工程と、
前記基板上に感光性絶縁樹脂層を形成する工程と、
前記感光性絶縁樹脂層を露光及び現像して、最近接位置にある前記電極間に前記感光性絶縁樹脂層からなる柱状構造物を形成する工程とを有することを特徴とするはんだバンプ接続用基板の製造方法。
Forming a plurality of electrodes on the main surface of the substrate;
Forming solder bumps on the electrodes;
Forming a photosensitive insulating resin layer on the substrate;
And a step of exposing and developing the photosensitive insulating resin layer to form a columnar structure made of the photosensitive insulating resin layer between the electrodes at the closest positions. Manufacturing method.
基板の主面に複数の電極を形成する工程と、
前記電極上にはんだバンプを形成する工程と、
前記基板上に感光性絶縁樹脂層を形成する工程と、
前記感光性絶縁樹脂層を露光及び現像して、最近接位置にある前記電極間に前記感光性絶縁樹脂層からなる柱状構造物を形成する工程と、
前記第1電極に対応して主面に形成された複数の第2電極を備えた第2基板の前記主面上に、前記第1電極と前記第2電極とを対向させて前記はんだバンプにより接続する工程と、
前記第1及び第2基板の前記主面間をアンダフィルで充填する工程とを有することを特徴とすることを特徴とする半導体装置の製造方法。
Forming a plurality of electrodes on the main surface of the substrate;
Forming solder bumps on the electrodes;
Forming a photosensitive insulating resin layer on the substrate;
Exposing and developing the photosensitive insulating resin layer to form a columnar structure composed of the photosensitive insulating resin layer between the electrodes at the closest positions; and
On the main surface of the second substrate having a plurality of second electrodes formed on the main surface corresponding to the first electrode, the first electrode and the second electrode are opposed to each other by the solder bumps. Connecting, and
And filling the space between the main surfaces of the first and second substrates with an underfill.
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