JP2004134653A - Substrate connecting structure and fabricating process of electronic parts therewith - Google Patents

Substrate connecting structure and fabricating process of electronic parts therewith

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Publication number
JP2004134653A
JP2004134653A JP2002299061A JP2002299061A JP2004134653A JP 2004134653 A JP2004134653 A JP 2004134653A JP 2002299061 A JP2002299061 A JP 2002299061A JP 2002299061 A JP2002299061 A JP 2002299061A JP 2004134653 A JP2004134653 A JP 2004134653A
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substrate
display
ic
bump
electrodes
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JP2002299061A
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Japanese (ja)
Inventor
Takashi Matsui
Masayuki Matsumoto
Motoji Shioda
塩田 素二
松井 隆司
松本 将之
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Sharp Corp
シャープ株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Abstract

<P>PROBLEM TO BE SOLVED: To make it possible to contribute to heightening an added value of a liquid crystal display by enhancing its sophistication and narrowing its picture frame due to enabling application to reduction in electrode pitch with reliability ensured in both connection and insulation resistance, with regard to a substrate connecting structure of the liquid crystal display in which conductive particles ACF 10 are intervened between a display substrate 8b of a liquid crystal panel 1 and a driving IC 4, the display substrate 8b and the drive IC 4 are connected mechanically to each other by an insulative adhesive agent 12 within the ACF 10, and pads 7 on the display substrate 8b and bump electrodes 9 on the drive IC 4 are connected electrically by the conductive particles 11 within the ACF 10. <P>SOLUTION: Insulation bodies 13 with much the same heights as those of the bump electrodes 9 are arranged between the bump electrodes 9 and 9 that are juxtaposed to each other on the drive IC 4. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】 [0001]
【発明の属する技術分野】 BACKGROUND OF THE INVENTION
本発明は、バンプ電極を有するICチップやLEDチップなどの半導体基板と電極を有する回路基板とを異方性導電接着剤を用いてフェイスダウンボンディング接続するようにした基板接続構造に関し、特に、異方性導電接着剤中の導電性粒子によるバンプ電極間の短絡を防止する対策に関する。 The present invention relates to a board connection structure so as to face-down bonding connection with the anisotropic conductive adhesive and a circuit board having a semiconductor substrate and an electrode of an IC chip or an LED chip having a bump electrode, in particular, different by the conductive particles in the anisotropic conductive adhesive regarding measures to prevent a short circuit between the bump electrodes.
【0002】 [0002]
【従来の技術】 BACKGROUND OF THE INVENTION
一般に、携帯電話などの表示装置として、液晶表示装置が用いられていることは広く知られている。 In general, as a display device such as a mobile phone, the liquid crystal display device is used is widely known. この液晶表示装置は、一対の基板の間に液晶層が挟持されてなる液晶パネルを有しており、一対の基板のうち、IC搭載部を有する表示基板(回路基板)には、表示信号および走査信号を供給するための半導体基板としての液晶駆動用IC回路基板(半導体基板。以下、駆動用ICという)が実装されている。 The liquid crystal display device includes a liquid crystal panel having liquid crystal layer is held between a pair of substrates, the pair of substrates, the display substrate having an IC mounting part (circuit board), the display signal and liquid crystal driving IC circuit substrate as a semiconductor substrate for supplying a scanning signal (the semiconductor substrate. hereinafter referred driver IC) is mounted.
【0003】 [0003]
上記駆動用ICの実装構造としては、TCP(Tape Carrier Package)を用いた構造が一般に知られているが、近年では、低コスト,高信頼性,薄形化などの観点から、駆動用ICを表示基板にベアチップ実装するようにしたCOG(ChipOn Glass )方式が見られるようになってきており、このCOG方式の中でも、駆動用ICの電極を突起状のバンプ電極に形成し、このバンプ電極と、表示基板のIC搭載部上に形成されたパッド(ボンディングパッド)とをフェイスダウンボンディング接続するようにした接続構造が一般的である。 The mounting structure of the driving IC, but TCP (Tape Carrier Package) was used structure is commonly known, in recent years, low cost, high reliability, from the viewpoint of thinning, a driving IC have come to have the COG (chipon Glass) method so that bare chip mounted on the display board can be seen, even in this COG method, the electrode of the driver IC is formed on the protruding bump electrodes, and the bump electrode the connection structure in which a pad formed on the IC mounting portion of the display substrate (bonding pad) so as to face-down bonding connections are common. そして、COG方式の接続構造としては、駆動用ICのバンプ電極を半田にて形成し、これを溶融してIC搭載部のパッドと接続するようにしたものなどもあるが、近年では、バンプ電極をAuなどの金属により形成し、異方性導電接着剤によりパッドと接続するようにした接続構造が主流となっている。 And, as the connection structure of the COG type, forming a bump electrode of the driving IC by soldering, there is also such which those to be melted for connecting the pads of the IC mounting portion, in recent years, the bump electrodes the forming of a metal such as Au, connection structure to be connected to the pad is mainly used by the anisotropic conductive adhesive.
【0004】 [0004]
異方性導電接着剤とは、絶縁性接着剤中に導電性粒子を拡散させてなるものであって、異方性導電接着剤中の導電性粒子が、バンプ電極とパッドとの間に挟み込まれることで、駆動用ICと液晶パネルとの間に導通が得られるようになっている。 The anisotropic conductive adhesive, there is obtained by diffusing the conductive particles in an insulating adhesive, electrically conductive particles in the anisotropic conductive adhesive, sandwiched between the bump electrodes and the pad by being, conduction between the driving IC and the liquid crystal panel is obtained. したがって、異方性導電接着剤を用いた接続構造では、両基板間の接続ピッチが駆動用ICにおけるバンプ電極の高さのみに依存し、また、相隣るバンプ電極間に絶縁性接着剤が充填されるため、バンプ電極間に十分な絶縁性を容易に確保できるなどの利点を有している。 Therefore, the connection structure using the anisotropic conductive adhesive, the connection pitch between the two substrates is dependent only on the height of the bump electrode in the driving IC, with the, the insulating adhesive between Aitonaru bump electrodes to be filled, it has advantages such as easily secure a sufficient insulation between the bump electrodes.
【0005】 [0005]
ここで、液晶パネルの表示基板に駆動用ICをフェイスダウンボンディング接続するようにした従来の基板接続構造について具体的に説明する。 Here, concretely explaining the drive IC to the display substrate of the liquid crystal panel for a conventional substrate connection structure so as to face-down bonding connection.
【0006】 [0006]
図6は、バンプ電極59,59,…を有する従来の駆動用IC54の平面図を示している。 Figure 6 shows a plan view of a conventional driving IC54 having bump electrodes 59, 59 ... a. また、図7〜図8は、異方性導電接着剤として、絶縁性接着剤62に均一サイズの導電性粒子61,61,…が混在されてなるACF60(Anisotoropic Conductive Film)と呼ばれる異方性導電膜を用いてフェイスダウンボンディング接続するようにした表示基板58と駆動用IC54との従来の接続構造を示しており、表示基板58と駆動用IC54との間に、ACF60が介在している。 Further, FIGS. 7-8, as the anisotropic conductive adhesive, called the insulating adhesive 62 conductive particles uniformly sized 61, ... it is formed by mixing ACF60 (Anisotoropic Conductive Film) Anisotropic display substrate 58 so as to face-down bonding connection using a conductive film and shows a conventional connection structure between the driving IC 54, between the display substrate 58 and the driving IC54, ACF60 is interposed. 表示基板58上のパッド57と、駆動用IC54上のバンプ電極59との間には、このACF60に含まれる導電性粒子61,61,…が挟まれており、各導電性粒子61の周囲には、絶縁性接着剤62が充填されている。 The pads 57 on the display substrate 58, between the bump electrodes 59 on the drive IC 54, the conductive particles 61 contained in the ACF60, ... and is sandwiched, around each conductive particle 61 , an insulating adhesive 62 is filled.
【0007】 [0007]
このようなACF60を用いた基板接続構造では、まず、表示基板58にACF60が圧着され、次いで、表示基板58と駆動用IC54との位置合わせが行われ、その後、圧着ツール56にて、駆動用IC54側より加熱圧着が施される。 The board connection structure using such ACF60, firstly, the crimping ACF60 the display substrate 58, then, is performed alignment of the display substrate 58 and the driving IC 54, then, in the crimping tool 56, the driving heat pressing from the IC54 side is performed. このように加熱圧着されることで、パッド57とバンプ電極59との間の導電性粒子61,61,…は、パッド57およびバンプ電極59間に挟まれて厚み方向に弾性変形(扁平)し、その周りの絶縁性接着剤62が硬化することで、変形状態を保持したまま固定されることとなる。 By being thus heated and pressed, the conductive particles 61 between the pad 57 and the bump electrodes 59, ... is sandwiched between the pad 57 and the bump electrode 59 in the thickness direction elastically deformed (flattened) by insulating adhesive 62 around it hardens, so that the fixed while maintaining the deformed state. その結果、パッド57とバンプ電極59との導通が確保され、電気的接続が実現される。 As a result, conduction between the pad 57 and the bump electrode 59 is secured, the electrical connection is realized. また、硬化した絶縁性接着剤62にて、表示基板58と駆動用IC54との機械的接続も実現される。 Also, in the cured insulating adhesive 62, the mechanical connection between the display substrate 58 and the driving IC54 is also realized.
【0008】 [0008]
尚、このような導電性粒子を弾性変形させて両電極間の導通を確保するようにした接続構造は、例えば、特許文献1に記載されている。 The connection structure as such conductive particles to ensure the conduction between the electrodes is elastically deformed, for example, described in Patent Document 1.
【0009】 [0009]
【特許文献1】 [Patent Document 1]
特開平10−206874号公報(第1頁、図1) JP 10-206874 discloses (page 1, FIG. 1)
【特許文献2】 [Patent Document 2]
特開平5−74850号公報(第1頁、図1) JP-5-74850 discloses (page 1, FIG. 1)
【0010】 [0010]
【発明が解決しようとする課題】 [Problems that the Invention is to Solve
ところで、近年では、液晶表示装置の高精細化ないし狭額縁化に伴い、電極の配設ピッチを縮小化することが進んでおり、このことから、上記従来の接続構造では、図9に模式的に示すように、相隣るバンプ電極59,59間において、導電性粒子61、61,…が繋がるような現象が生じ、その結果、電極59,59同士が短絡してしまうという問題がある。 In recent years, with the higher definition or frame narrowing of the liquid crystal display device, is proceeding is possible to reduce the arrangement pitch of the electrodes, from this that, in the above conventional connection structure, schematically in Figure 9 as shown in, in between Aitonaru bump electrodes 59, conductive particles 61, 61, ... phenomenon occurs as leads, as a result, there is a problem that between the electrodes 59, 59 short-circuited.
【0011】 [0011]
尚、これに対しては、例えば、特許文献2に記載されているように、TAB式半導体装置とガラス基板との接続に当り、半導体装置上のバンプ電極(リード)周りに、バンプ電極の高さよりも高い凸部を設け、これにより、半導体装置表面のバンプ電極部分に所定深さ(5〜10μm)の凹部が形成されるようにする一方、ガラス基板上の電極を上記凹部の深さと同じ寸法の厚さに形成しておき、凹部内にのみ異方性導電接着剤が充填されるようにすることで、導電性粒子がバンプ電極間に分散してバンプ電極同士がショートするのを防止するようにした技術が知られているが、このものでは、ガラス基板を半導体装置に加圧する際に、凸部が邪魔になって両電極間にギャップを生じる虞れがあり、そのような場合には、導電性粒子を十分に Incidentally, for this, for example, as described in Patent Document 2, per the connection between the TAB type semiconductor device and the glass substrate, the bump electrodes (leads) around the semiconductor device, the bump electrode height maintain high protrusions than is, thereby, while as the recess of a predetermined depth in the bump electrode of the semiconductor device surface (5 to 10 [mu] m) is formed, an electrode on the glass substrate same as the depth of the recess previously formed to a thickness dimension, by such anisotropically conductive adhesive only in the recesses are filled, to prevent the bump electrodes with each other to short-circuit the conductive particles are distributed among the bump electrodes a technique is known in which so as to, in this compound, when pressurizing the glass substrate in a semiconductor device, there is a possibility that the convex portion results in a gap between the electrodes in the way, when such the conductive particles thoroughly 性変形させることができないために相対向する電極間の確実な電気的接続が得られにくいという別の問題がある。 There is another problem that reliable electrical connection is hardly obtained between opposing electrodes due to the inability to sexual deformed.
【0012】 [0012]
本発明は、斯かる点に鑑みて成されたものであり、その主な目的は、異方性導電接着剤により回路基板と半導体基板とを機械的に接続するとともに回路基板上の電極と半導体基板上のバンプ電極とを電気的に接続するようにした液晶表示装置などにおける基板接続構造において、半導体基板上の隣り合うバンプ電極同士が、異方性導電接着剤中の導電性粒子により短絡するのを回避できるようにし、もって、相隣る電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、電極ピッチの縮小化に対応できるようにすることにある。 The present invention has been made in view of the foregoing, the main purpose, the electrodes and the semiconductor on the circuit board while mechanically connecting the circuit board and the semiconductor substrate by an anisotropic conductive adhesive in the substrate connecting structure in a liquid crystal display device which is adapted to electrically connect the bump electrodes on the substrate, the bump electrodes adjacent to each other on a semiconductor substrate, a short circuit by the conductive particles in the anisotropic conductive adhesive to be able to avoid, with and without impairing the insulation resistance reliability between Aitonaru electrodes, and a reliability of electrical connection between opposing electrodes, to be corresponding to the reduction of the electrode pitch It lies in the fact.
【0013】 [0013]
【課題を解決するための手段】 In order to solve the problems]
上記の目的を達成すべく、本発明では、半導体基板上のバンプ電極間に、該バンプ電極と略同じ高さの絶縁体を配置し、このことで、両電極間に介在する導電性粒子の分散を防止するとともに、該導電性粒子を弾性変形させる際に絶縁体が邪魔にならないようにした。 To achieve the above object, the present invention, between the bump electrodes on the semiconductor substrate, arranged substantially an insulator of the same height as the said bump electrode, by this, the conductive particles interposed between the electrodes thereby preventing the dispersion, insulators conductive particles when to elastically deform is out of the way.
【0014】 [0014]
具体的には、請求項1の発明では、電極を有する回路基板と、突起状のバンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、上記絶縁性接着剤により回路基板と半導体基板とを機械的に接続するとともに、上記導電性粒子により回路基板上の電極と半導体基板上のバンプ電極とを電気的に接続するようにした基板接続構造を前提としている。 Specifically, in the invention of claim 1, and a circuit board having an electrode, between a semiconductor substrate having a protruding bump electrodes, formed by the conductive particles are dispersed in an insulating adhesive anisotropy the conductive adhesive is interposed, thereby mechanically connecting the circuit board and the semiconductor substrate by the insulating adhesive, electrically connected to the bump electrodes on the electrode and the semiconductor substrate on the circuit board by the conductive particles a circuit-board connection structure was to be based on the premise.
【0015】 [0015]
そして、上記半導体基板上のバンプ電極間には、該バンプ電極と略同じ高さの絶縁体が配置されているものとする。 And, between the bump electrodes on said semiconductor substrate, it is assumed that the insulator substantially the same height as the said bump electrode is disposed.
【0016】 [0016]
これにより、回路基板と半導体基板とが互いに圧着される際に、回路基板上の電極と半導体基板上のダンプ電極との間に介在する導電性粒子は、絶縁体により分散が抑制され、しかも、絶縁体の邪魔を受けずに弾性変形できることとなる。 Thus, when the circuit board and the semiconductor substrate is crimped together, the conductive particles interposed between the dump electrode on the electrode and the semiconductor substrate on the circuit board, the dispersion is suppressed by the insulating body, moreover, so that the elastically deformed without being disturbed insulator.
【0017】 [0017]
請求項2の発明では、請求項1の発明において、絶縁体の硬度が、導電性粒子の硬度よりも小さくされているものとする。 In the invention of claim 2, in the invention of claim 1, the hardness of the insulator, assumed to be smaller than the hardness of the conductive particles.
【0018】 [0018]
これにより、絶縁体と回路基板との間に介在する導電性粒子は、該絶縁体および回路基板間に挟まれたときに、絶縁体の硬度が導電性粒子の硬度と同じないしそれよりも高い場合に比べて、扁平状に変形しにくく、よって、複数の導電性粒子が扁平化して繋がることによるバンプ電極間の短絡は生じにくくなる。 Thus, conductive particles interposed between the insulator and the circuit board, when sandwiched between the insulator and the circuit board, the same or higher than the hardness of the hardness of the insulator conductive particles as compared to the case, hardly deformed into a flat shape, therefore, a short circuit between the bump electrodes according to the plurality of conductive particles leads to flattening is less likely to occur.
【0019】 [0019]
請求項3の発明では、請求項1および2の発明において、導電性粒子の硬度が、バンプ電極の硬度よりも小さくされているものとする。 In the invention of claim 3, in the invention of claims 1 and 2, the hardness of the conductive particles, assumed to be smaller than the hardness of the bump electrode.
【0020】 [0020]
これにより、回路基板上の電極と、半導体基板上のバンプ電極との間に介在する導電性粒子は、該両電極間に挟まれたときに、導電性粒子の硬度がバンプ電極の硬度と同じないしそれよりも高い場合に比べて、扁平状に変形しやすく、よって、両電極間の電気的接続が確実化する。 Thus, the electrode on the circuit board, conductive particles interposed between the bump electrode on the semiconductor substrate, when sandwiched between the both electrodes, the hardness of the conductive particles is the same as the hardness of the bump electrode or in comparison with the case higher than, easily deformed into a flat shape, therefore, to be sure of the electrical connection between the electrodes.
【0021】 [0021]
請求項4の発明では、請求項1〜3の発明において、絶縁体は、隣接するバンプ電極間を横切る方向に長い平面形状をなしているものとする。 In the invention of claim 4, in the invention of claims 1 to 3, the insulator is assumed to no longer planar shape in a direction transverse to the adjacent bump electrodes.
【0022】 [0022]
これにより、回路基板上の電極と半導体基板上のバンプ電極との間に介在する導電性粒子が該バンプ電極に隣接するバンプ電極との間に分散することが効率よく抑制される。 Thus, the conductive particles interposed between the bump electrodes on the electrode and the semiconductor substrate on the circuit board are distributed between the bump electrodes adjacent to the bump electrodes is efficiently prevented.
【0023】 [0023]
請求項5の発明では、電子部品として、請求項1〜4の発明に係る基板接続構造を備えているものとする。 In the invention of claim 5, as an electronic component, and it shall have a board connecting structure according to the invention of claims 1 to 4.
【0024】 [0024]
これにより、導電性粒子によるバンプ電極間の短絡の少ない高集積度の電子部品が得られる。 Thus, the electronic components of small high integration degree of short circuit between the bump electrodes by the conductive particles.
【0025】 [0025]
請求項6の発明では、液晶表示装置として、請求項1〜4の発明に係る基板接続構造を備えているものとする。 In the invention of claim 6, as the liquid crystal display device will be assumed to have a board connecting structure according to the invention of claims 1 to 4.
【0026】 [0026]
これにより、導電性粒子によるバンプ電極間の短絡の少ない高精細ないし狭額縁の液晶表示装置が得られる。 Thus, the liquid crystal display device short with less high-definition or narrow frame between the bump electrodes by the conductive particles.
【0027】 [0027]
請求項7の発明では、電子部品の製造方法として、電極を有する回路基板と、バンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、回路基板と半導体基板とを電極同士を対向させて挟圧することで、絶縁性接着剤により回路基板と半導体基板とを機械的に接続するとともに、導電性粒子により回路基板上の電極と半導体基板上のバンプ電極とを電気的に接続する接続工程を備えていることを前提としている。 In the invention of claim 7, as a method of manufacturing an electronic component, a circuit board having an electrode, between a semiconductor substrate having a bump electrode, anisotropic conductive conductive particles in an insulating adhesive is dispersed the adhesive is interposed, circuit substrate and the semiconductor substrate are opposed to electrodes together with that nipping, while mechanically connecting the circuit board and the semiconductor substrate by an insulating adhesive, the conductive particles by the circuit board it is assumed that comprises a connecting step of connecting the electrode and the bump electrode on the semiconductor substrate electrically.
【0028】 [0028]
そして、上記の接続工程において、半導体基板として、バンプ電極間に該バンプ電極と略同じ高さの絶縁体が配置されてなる半導体基板を用いるようにする。 Then, in the connection process, as the semiconductor substrate, an insulator of a substantially same height as the bump electrode is to use a semiconductor substrate made is disposed between the bump electrodes.
【0029】 [0029]
これにより、請求項1の発明の場合と同様の作用効果が得られる。 Thus, the same effect as the case of the invention of claim 1 is obtained.
【0030】 [0030]
【発明の実施の形態】 DETAILED DESCRIPTION OF THE INVENTION
以下、本発明の実施形態を、図面に基づいて説明する。 Hereinafter, the embodiments of the present invention will be described with reference to the drawings.
【0031】 [0031]
図2は、本発明の実施形態に係る液晶表示装置の要部の構成を模式的に示す平面図であり、この液晶表示装置では、COG方式にて液晶パネルにベアチップ実装される駆動用IC(液晶駆動用IC回路基板)を、該駆動用ICの有する突起状のボンディング用バンプ電極(以下、バンプ電極という)と、液晶パネル側の表示回路基板(以下、表示基板という)上のボンディングパッド(以下、パッドという)とがフェイスダウンボンディング接続されている。 Figure 2 is a plan view schematically showing a structure of a main portion of a liquid crystal display device according to an embodiment of the present invention, in the liquid crystal display device, a driving IC which is bare-chip mounting on a liquid crystal panel in COG method ( the liquid crystal driving IC circuit board), protruding bonding bump electrode having the said drive IC (hereinafter, the called bump electrode), the display circuit board of the liquid crystal panel side (hereinafter, bonding pads on the display as a substrate) ( hereinafter) and that the pad is connected face-down bonding.
【0032】 [0032]
液晶パネル1は、大小一対の基板8a,8b間に図外の液晶層が封入されてなっていて、小さい方の基板8aの形状に合わせるように表示部2が形成されている。 The liquid crystal panel 1, a pair of large and small substrates 8a, have the liquid crystal layer, not shown between 8b becomes sealed, the display unit 2 so as to match the shape of the smaller substrate 8a is formed. 大きい方の基板8bは、上記の表示基板であり、この表示基板8bにおいて、表示部2の領域からはみ出した部分は、液晶駆動用IC搭載部3(以下、IC搭載部という)とされており、駆動用IC4は、このIC搭載部3に実装されている。 Substrate 8b larger is the display substrate described above, in the display substrate 8b, the portion protruding from the area of ​​the display unit 2 has a liquid crystal driving IC mounting portion 3 (hereinafter, referred to as IC mounting part) are the , driving IC4 are mounted on the IC mounting portion 3. また、IC搭載部3には、データ信号線および走査信号線を生成する基になる信号や電源を外部回路から供給するためのフレキシブル配線基板5(以下、FPCという)も接続されている。 Further, in the IC mounting portion 3, the flexible wiring board 5 (hereinafter, referred to as FPC) for supplying a signal and power underlying generating a data signal line and the scanning signal line from an external circuit is also connected.
【0033】 [0033]
IC搭載部3には、図示は省略するが、上記の信号配線に接続された複数のパッドと、駆動用IC4に信号および電源を入力するための複数の入力配線と、これら入力配線の信号出力端に電気的に接続された複数のパッドと、上記入力配線の信号入力端に電気的に接続された複数のFPC入力端子とがそれぞれ形成されており、上記のFPC5は、FPC入力端子に電気的に接続されている。 The IC mounting part 3, although not shown, a plurality of pads connected to the signal lines, a plurality of input lines for inputting signals and power to the driving IC 4, the signal outputs of the input wiring a plurality of pads electrically connected to the end, and a plurality of FPC input terminal electrically connected is formed to the signal input terminal of the input lines, FPC 5 above, electricity FPC input terminal They are connected to each other.
【0034】 [0034]
一方、駆動用IC4には、IC搭載部3上の信号配線に接続するパッドおよび入力配線の各信号出力端に接続するパッドにそれぞれ対応するように、図3の平面図に示す如く、複数のバンプ電極9が形成されている。 On the other hand, the driving IC4, respectively so as to correspond to the pads connected to the signal output end of the pad and the input wiring connected to the signal wiring on the IC mounting portion 3, as shown in the plan view of FIG. 3, a plurality of bump electrodes 9 are formed. また、表示基板8bのIC搭載部3と駆動用IC4との間には、絶縁性接着剤12に導電性粒子11が混合されてなる異方性導電接着剤としてのACF10が介在しており、絶縁性接着剤12により駆動用IC4と表示基板8bとが機械的に接続されているとともに、導電性粒子11により駆動用IC4上のバンプ電極9と該バンプ電極9に対応するIC搭載部3上のパッド7とが電気的に接続されている。 Between the IC mounting part 3 of the display board 8b and the driving IC 4, is interposed ACF10 is as insulating adhesive 12 anisotropic conductive adhesive conductive particles 11 is formed by mixing, with driving IC4 and the display substrate 8b are mechanically connected by an insulating adhesive 12, the conductive particles 11 on the driving IC4 bump electrode 9 and the upper IC mounting part 3 corresponding to the bump electrodes 9 and pad 7 are electrically connected.
【0035】 [0035]
そして、本実施形態では、図1に示すように、駆動用IC4上の各バンプ電極9,9間には、それぞれ、該バンプ電極9と略同じ高さの絶縁体13が配置されている。 In the present embodiment, as shown in FIG. 1, between each bump electrodes 9 on the driving IC 4, respectively, the insulator 13 of substantially the same height as the said bump electrode 9 is arranged.
【0036】 [0036]
具体的には、各絶縁体13は、図4(a)〜同図(c)の各平面図にそれぞれ一例を示すように、矩形状,菱形状および楕円状など、相隣るバンプ電極9,9間を横切る方向(同各図の上下方向)に延びる平面形状をなしていて、バンプ電極状の突起物に形成されている。 Specifically, the insulator 13, as an example to each plan view of FIG. 4 (a) ~ FIG. (C), a rectangular shape, a rhombic shape and elliptical shape, etc., Aitonaru bump electrodes 9 , it forms a planar shape extending in a direction (vertical direction in the drawing) crossing between 9 and is formed on the bump electrodes like projection.
【0037】 [0037]
絶縁体13としては、一例として、絶縁材バンプ電極と同じ導電材料からなる突起物の表面を樹脂などの絶縁材により覆うようにしたものや、絶縁材のみからなるものであってもよく、そのような絶縁材の例としては、耐熱性のあるポリスルホンポリフェニレンサルファイド,ポリエーテルスルホン,ポリエーテルイミド,ポリイミド系の樹脂などが挙げられる。 The insulator 13 may as an example, the surface of the projections formed of the same conductive material and the insulating material bump electrodes and that to cover with an insulating material such as resin, be comprised only of an insulation material, the examples of such an insulating material, polysulfone polyphenylene sulfide with a heat resistant, polyether sulfone, polyether imide, and the like polyimide resin is.
【0038】 [0038]
また、上記各絶縁体13の硬度は、表示基板8b上のパッド7の硬度よりも低くなされており、さらに、ACF10中の各導電性粒子11の硬度は、駆動用IC4上の各バンプ電極9の硬度よりも小さくなされている。 Further, the hardness of the insulator 13, the display has been made lower than the hardness of the pad 7 on the substrate 8b, further, the hardness of the conductive particles 11 in the ACF10, each bump electrode on the driving IC 4 9 It is made smaller than the hardness.
【0039】 [0039]
上記のように構成された基板接続構造の作用を説明する。 A description will be given of the operation of the configured board connection structure as described above. まず、表示基板8b上にACF10を圧着し、次いで、表示基板8bと駆動用IC4との位置合わせを行い、その後、図5の側面図に模式的に示すように、圧着ツール6にて、駆動用IC4を表示基板8b側に押圧しつつ加熱して該表示基板8bに加熱圧着し、この加熱圧着により、パッド7とバンプ電極9との間に介在する導電性粒子11のうちの一部は、樹脂流動に伴って分散しようとし、残部は、パッド7およびバンプ電極9間に挟まれて扁平状に変形しようとする。 First, crimp the ACF10 on the display substrate 8b, then aligns the driving IC4 display substrate 8b, then, as schematically shown in side view in FIG. 5, in the crimping tool 6, the drive by heating while pressing the use IC4 to the display substrate 8b side thermocompression bonding to the display substrate 8b, this heat and pressure, some of the conductive particles 11 interposed between the pad 7 and the bump electrodes 9 , attempts to disperse with the resin flow, the balance is sandwiched between the pads 7 and the bump electrodes 9 to deform into a flat shape.
【0040】 [0040]
このとき、上記一部の導電性粒子11,11,…は、絶縁体13により、該バンプ電極9に隣接するバンプ電極9との間に分散することが抑制されるので、バンプ電極9,9間における導電性粒子11,11,…の繋がりは生じにくい。 At this time, the portion of the conductive particles 11, 11, ... is an insulating material 13, because it is suppressed to disperse between the bump electrode 9 adjacent to the bump electrodes 9, bump electrodes 9 conductive particles 11, 11 in between, ... ties hardly occurs.
【0041】 [0041]
また、絶縁体13の硬度がバンプ電極9の硬度よりも低く、しかも、絶縁体13の高さがバンプ電極9の高さと略同じであるので、バンプ電極9とパッド7との間にギャップが生じにくい。 The hardness of the insulator 13 is lower than the hardness of the bump electrodes 9, moreover, since the height of the insulator 13 is a high and substantially the same bump electrodes 9, the gap between the bump electrode 9 and the pads 7 less likely to occur. よって、上記残部の導電性粒子11,11,…は、十分に変形してバンプ電極9とパッド7とを電気的に接続する。 Thus, the conductive particles 11, 11 of the remainder, ... electrically connect the bump electrodes 9 and the pad 7 is sufficiently deformed.
【0042】 [0042]
一方、バンプ電極9およびパッド7間以外の領域のうち、絶縁体13と表示基板8bとの間では、絶縁体13の硬度が導電性粒子11の硬度よりも低いので、導電性粒子11,11,…は、絶縁体13と表示基板8bとの間に挟まれても変形しにくい。 On the other hand, among the regions other than between the bump electrodes 9 and the pads 7, between the display substrate 8b and the insulator 13, since the hardness of the insulator 13 is less than the hardness of the conductive particles 11, the conductive particles 11 and 11 , ... it is hardly deformed even sandwiched between the display substrate 8b and the insulator 13. よって、絶縁体13および表示基板8b間の導電性粒子11,11,…がバンプ電極9,9同士を短絡させるという事態は抑えられる。 Thus, the insulator 13, and a display electrically conductive particles 11, 11 between the substrates 8b, ... are situation where short the bump electrodes 9 each other is suppressed.
【0043】 [0043]
以上のようにして、絶縁性接着剤12が硬化することにより、図1に示したように、表示基板8bと駆動用IC4とが機械的に接続するとともに、パッド7とバンプ電極9との電気的に接続が固定されることとなる。 As described above, by insulating adhesive 12 is cured, electricity, as shown in FIG. 1, along with a display board 8b and the driving IC4 is mechanically connected, the pad 7 and the bump electrodes 9 connection is to be fixed manner.
【0044】 [0044]
したがって、本実施形態によれば、液晶パネル1の表示基板8bと駆動用IC4との間にACF10を介在させ、ACF10中の絶縁性接着剤12により表示基板8bと駆動用IC4とを機械的に接続するとともに、ACF10中の導電性粒子11,11,…により表示基板8b上のパッド7,7,…と駆動用IC4上のバンプ電極9,9,…とを電気的に接続するようにした液晶表示装置の基板接続構造として、駆動用IC4上の相隣る各バンプ電極9,9間に、該バンプ電極9と略同じ高さの絶縁体13を配置するようにしたので、導電性粒子11,11,…によるパッド7とバンプ電極9との間の電気的接続の確実性を維持しつつ、それら導電性粒子11,11,…によるバンプ電極9,9間の短絡を低減することができる。 Therefore, according to this embodiment, by interposing a ACF10 between the display substrate 8b and the driving IC4 of the liquid crystal panel 1, mechanically and driving IC4 display substrate 8b by the insulating adhesive 12 in ACF10 with connecting the conductive particles 11, 11 in the ACF 10, ... the display pad 7, 7 on the substrate 8b, ... and on the driving IC4 bump electrodes 9, was ... and so as to electrically connect as a substrate connecting structure of a liquid crystal display device, between the bump electrodes 9, 9 Tonariru phase on driving IC 4, since to arrange the insulator 13 of substantially the same height as the said bump electrode 9, the conductive particles 11 and 11, while maintaining the reliability of electrical connection between ... and pad 7 and the bump electrodes 9 by their conductive particles 11, 11, ... is possible to reduce the short circuit between the bump electrodes 9 by it can. この結果、接続信頼性と絶縁抵抗信頼性とを共に確保しながら、高精細化および狭額縁化を図る上で不可欠な電極ピッチの縮小化に対応することが可能となり、よって、高付加価値を有する液晶表示装置の実現に寄与することができる。 As a result, while both ensuring connection reliability and insulation resistance reliability, it is possible to correspond to the reduction of the integral electrode pitch in achieving higher definition and narrower frame, thus, high-value it can contribute to the realization of a liquid crystal display device having.
【0045】 [0045]
尚、上記の実施形態では、液晶表示装置における液晶パネル1の表示基板8bと駆動用IC4との接続構造について説明しているが、本発明は、種々の電子部品における基板接続構造に適用することができる。 Note that in the above embodiment has described the connection structure of the display substrate 8b and the driving IC4 of the liquid crystal panel 1 in the liquid crystal display device, the present invention is applied to a substrate connecting structure in the various electronic components can.
【0046】 [0046]
【発明の効果】 【Effect of the invention】
以上説明したように、請求項1の発明に係る基板接続構造、および請求項7の発明に係る電子部品の製造方法によれば、異方性導電接着剤を用いて回路基板と半導体基板とを接続するようにした基板接続構造において、バンプ電極間における異方性導電接着剤中の導電性粒子が繋がってバンプ電極同士を短絡させるのを抑えることができ、しかも、電極とバンプ電極との間の導電性粒子を絶縁体に邪魔されることなく扁平状に変形させることができ、よって、バンプ電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、電極ピッチの縮小化にすることが対応できる。 As described above, the substrate connecting structure according to the invention of claim 1, and according to the method of manufacturing an electronic component according to the invention of claim 7, a circuit substrate and the semiconductor substrate by using the anisotropic conductive adhesive in the circuit-board connection structure to be connected, connected conductive particles in the anisotropic conductive adhesive between the bumps electrodes can be prevented from shorting bump electrodes with each other, moreover, between the electrode and the bump electrode the conductive particles can be deformed into a flat shape without being obstructed by the insulator, thus compromising the insulation resistance reliability between the bump electrodes and the reliability of electrical connection between opposing electrodes without cope be a reduction of the electrode pitch.
【0047】 [0047]
請求項2の発明によれば、導電性粒子が絶縁体および回路基板により挟まれたときに扁平状に弾性変形するのを回避することができるので、該導電性粒子がバンプ電極同士を短絡させるように繋がるのを防止することができ、よって、バンプ電極間における絶縁抵抗信頼性を高めることができる。 According to the invention of claim 2, since the conductive particles can be prevented from being elastically deformed to a flat shape when it is sandwiched between the insulator and the circuit board, conductive particles shorting bump electrodes are it is possible to prevent the leading manner, thus, it is possible to increase the insulation resistance reliability between the bump electrodes.
【0048】 [0048]
請求項3の発明によれば、導電性粒子が電極およびバンプ電極に挟まれた導電性粒子を扁平状に容易に弾性変形させることができるので、両電極間の電気的接続のさらなる確実化を図ることができる。 According to the invention of claim 3, since the conductive particles are sandwiched between the electrode and the bump electrode conductive particles can easily be elastically deformed into a flat shape, a further reliable of electrical connection between the electrodes it is possible to achieve.
【0049】 [0049]
請求項4の発明によれば、電極およびバンプ電極間の導電性粒子が、隣接するバンプ電極との間に分散するのを効率よく抑制することができ、よって、請求項1の発明による効果を効率よく得ることができる。 According to the invention of claim 4, the conductive particles between the electrode and the bump electrode can be suppressed efficiently to disperse between the adjacent bump electrodes, thus, the effect of the invention of claim 1 it can be efficiently obtained.
【0050】 [0050]
請求項5の発明に係る電子部品によれば、バンプ電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、電極ピッチの縮小化による高集積化に対応することができる。 According to the electronic component according to the invention of claim 5, without deteriorating an insulating resistance reliability between the bump electrodes and the reliability of electrical connection between opposing electrodes, the high integration of the reduction of the electrode pitch it is possible to respond to.
【0051】 [0051]
請求項6の発明に係る液晶表示装置によれば、バンプ電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、高精細化および狭額縁化を図る上で不可欠な電極ピッチの縮小化にすることができ、よって、液晶表示装置の高付加価値化に寄与することができる。 According to the liquid crystal display device according to the invention of claim 6, the insulation resistance reliability between the bump electrodes, without compromising the reliability of electrical connection between opposing electrodes, a higher definition and narrower frame can be reduction of the essential electrode pitch in achieving, therefore, it can contribute to the high value of the liquid crystal display device.
【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS
【図1】本発明の実施形態に係る液晶表示装置における液晶パネルの表示基板と駆動用ICとの接続構造を模式的に示す側面図である。 1 is a side view schematically showing the connection structure between the driving IC and the display substrate of the liquid crystal panel in the liquid crystal display device according to an embodiment of the present invention.
【図2】液晶表示装置の要部の構成を示す平面図である。 2 is a plan view showing a major portion of the liquid crystal display device.
【図3】駆動用ICのバンプ電極側の面を示す平面図である。 3 is a plan view showing a surface of the bump electrode of the driver processing IC.
【図4】矩形状(a),菱形状(b)および楕円状(c)の各絶縁体の平面形状を示す平面図である。 [4] rectangular (a), it is a plan view showing a planar shape of each insulator rhombic shape (b) and elliptical (c).
【図5】駆動用ICが表示基板に押圧されるときの状態を模式的に示す側面図である。 5 is a side view schematically showing a state in which the driving IC is pressed against the display substrate.
【図6】液晶表示装置において液晶パネルの表示基板に接続される従来の駆動用ICのダンプ電極側の面を示す平面図である。 6 is a plan view showing a surface of a dump electrode side of a conventional drive IC that is connected to a display substrate of the liquid crystal panel in a liquid crystal display device.
【図7】従来の接続構造において駆動用ICが表示基板に押圧されるときの状態を模式的に示す図5相当図である。 7 is a view corresponding to FIG. 5 schematically shows a state in which the driving IC in the conventional connecting structure is pressed against the display substrate.
【図8】表示基板と駆動用ICとの従来の接続構造を模式的に示す図1相当図である。 8 is a diagram 1 corresponding view schematically showing a conventional connection structure between the display substrate and the driving processing IC.
【図9】電極ピッチの縮小化に伴う従来の接続構造の問題を模式的に示す図1相当図である。 The 9 of a conventional connecting structure caused by the reduction of the electrode pitch problems is 1 equivalent diagram schematically showing.
【符号の説明】 DESCRIPTION OF SYMBOLS
4 液晶駆動用IC回路基板(半導体基板) 4 liquid crystal driving IC circuit substrate (semiconductor substrate)
7 ボンディングパッド(電極) 7 bonding pad (electrode)
8 表示回路基板(回路基板) 8 display circuit board (circuit board)
9 ボンディング用バンプ電極(バンプ電極) 9 bonding bump electrode (bump electrode)
10 ACF(異方性導電接着剤) 10 ACF (anisotropic conductive adhesive)
11 導電性粒子12 絶縁性接着剤13 絶縁体 11 conductive particles 12 insulating adhesive 13 insulator

Claims (7)

  1. 電極を有する回路基板と、突起状のバンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、上記絶縁性接着剤により上記回路基板と上記半導体基板とを機械的に接続するとともに、上記導電性粒子により上記回路基板上の電極と上記半導体基板上のバンプ電極とを電気的に接続するようにした基板接続構造であって、 A circuit board having an electrode, between a semiconductor substrate having a protruding bump electrodes, is interposed an anisotropic conductive adhesive conductive particles dispersed in an insulating adhesive, the insulating adhesive and the circuit board and the semiconductor substrate as well as mechanically connected by the conductive particles in the circuit-board connection structure so as to electrically connect the bump electrodes on the electrode and the semiconductor substrate on the circuit board by there,
    上記半導体基板上の相隣るバンプ電極間に、該バンプ電極と略同じ高さの絶縁体が配置されていることを特徴とする基板接続構造。 Board connection structure is characterized in that between Aitonaru bump electrodes on said semiconductor substrate, an insulator of a substantially same height as the bump electrodes are arranged.
  2. 請求項1記載の基板接続構造において、 In board connection structure according to claim 1, wherein,
    絶縁体の硬度が、導電性粒子の硬度よりも小さいことを特徴とする基板接続構造。 Board connection structure wherein the hardness of the insulator is smaller than the hardness of the conductive particles.
  3. 請求項1又は2記載の基板接続構造において、 In board connection structure according to claim 1 or 2, wherein,
    導電性粒子の硬度が、バンプ電極の硬度よりも小さいことを特徴とする基板接続構造。 Board connection structure hardness of the conductive particles may be smaller than the hardness of the bump electrode.
  4. 請求項1,2又は3記載の基板接続構造において、 In board connection structure according to claim 1, wherein,
    絶縁体は、相隣るバンプ電極間を横切る方向に長い平面形状をなしていることを特徴とする基板接続構造。 Insulator board connection structure characterized in that it no longer planar shape in a direction crossing the inter Aitonaru bump electrodes.
  5. 請求項1,2,3又は4記載の基板接続構造を備えたことを特徴とする電子部品。 Electronic component comprising the claims 1, 2, 3 or 4 board connection structure according.
  6. 請求項1,2,3又は4記載の基板接続構造を備えたことを特徴とする液晶表示装置。 A liquid crystal display device comprising the claims 1, 2, 3 or 4 board connection structure according.
  7. 電極を有する回路基板と、突起状のバンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、上記回路基板と上記半導体基板とを電極同士を対向させて挟圧することで、上記絶縁性接着剤により上記回路基板と上記半導体基板とを機械的に接続するとともに、上記導電性粒子により上記回路基板上の電極と上記半導体基板上のバンプ電極とを電気的に接続する接続工程を備えた電子部品の製造方法であって、 A circuit board having an electrode, between a semiconductor substrate having a protruding bump electrodes, is interposed an anisotropic conductive adhesive conductive particles dispersed in an insulating adhesive, the circuit board and the a semiconductor substrate an electrode to each other are opposed by nipping, the by insulating adhesive while mechanically connecting said circuit board and said semiconductor substrate by the conductive particles and electrodes on the circuit board above a method of manufacturing an electronic component having a connecting step of electrically connecting the bump electrode on a semiconductor substrate,
    上記接続工程において、上記半導体基板として、相隣る上記バンプ電極間に該バンプ電極と略同じ高さの絶縁体が配置されてなる半導体基板を用いることを特徴とする電子部品の製造方法。 In the connecting step, the as the semiconductor substrate, Aitonaru the bump electrodes said bump electrode substantially method of manufacturing an electronic component, which comprises using a semiconductor substrate having an insulating body of the same height, which are arranged between.
JP2002299061A 2002-10-11 2002-10-11 Substrate connecting structure and fabricating process of electronic parts therewith Pending JP2004134653A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7041589B2 (en) * 2000-08-29 2006-05-09 Au Optronics Corp. Metal bump with an insulating sidewall and method of fabricating thereof
WO2007039960A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
WO2007039959A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
JP2007324418A (en) * 2006-06-01 2007-12-13 Fujitsu Ltd Semiconductor device, manufacturing method for solder bump connection board, and manufacturing method for semiconductor device
WO2008041486A1 (en) * 2006-09-28 2008-04-10 Sanyo Electric Co., Ltd. Solar battery module
KR101344345B1 (en) * 2012-02-03 2013-12-24 아이엘아이 테크놀로지 코포레이션 An integrated circuit including a bond pad structure, and a plurality of bonding pad structure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7041589B2 (en) * 2000-08-29 2006-05-09 Au Optronics Corp. Metal bump with an insulating sidewall and method of fabricating thereof
WO2007039960A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
WO2007039959A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
US8013454B2 (en) 2005-10-05 2011-09-06 Sharp Kabushiki Kaisha Wiring substrate and display device including the same
JP2007324418A (en) * 2006-06-01 2007-12-13 Fujitsu Ltd Semiconductor device, manufacturing method for solder bump connection board, and manufacturing method for semiconductor device
WO2008041486A1 (en) * 2006-09-28 2008-04-10 Sanyo Electric Co., Ltd. Solar battery module
KR101344345B1 (en) * 2012-02-03 2013-12-24 아이엘아이 테크놀로지 코포레이션 An integrated circuit including a bond pad structure, and a plurality of bonding pad structure

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