JP2007288173A5 - - Google Patents

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Publication number
JP2007288173A5
JP2007288173A5 JP2007071920A JP2007071920A JP2007288173A5 JP 2007288173 A5 JP2007288173 A5 JP 2007288173A5 JP 2007071920 A JP2007071920 A JP 2007071920A JP 2007071920 A JP2007071920 A JP 2007071920A JP 2007288173 A5 JP2007288173 A5 JP 2007288173A5
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JP
Japan
Prior art keywords
semiconductor film
plane
crystal
orientation
substrate
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Application number
JP2007071920A
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English (en)
Japanese (ja)
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JP5311754B2 (ja
JP2007288173A (ja
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Priority to JP2007071920A priority Critical patent/JP5311754B2/ja
Priority claimed from JP2007071920A external-priority patent/JP5311754B2/ja
Publication of JP2007288173A publication Critical patent/JP2007288173A/ja
Publication of JP2007288173A5 publication Critical patent/JP2007288173A5/ja
Application granted granted Critical
Publication of JP5311754B2 publication Critical patent/JP5311754B2/ja
Expired - Fee Related legal-status Critical Current
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JP2007071920A 2006-03-20 2007-03-20 結晶性半導体膜、半導体装置及びそれらの作製方法 Expired - Fee Related JP5311754B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007071920A JP5311754B2 (ja) 2006-03-20 2007-03-20 結晶性半導体膜、半導体装置及びそれらの作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006077484 2006-03-20
JP2006077484 2006-03-20
JP2007071920A JP5311754B2 (ja) 2006-03-20 2007-03-20 結晶性半導体膜、半導体装置及びそれらの作製方法

Publications (3)

Publication Number Publication Date
JP2007288173A JP2007288173A (ja) 2007-11-01
JP2007288173A5 true JP2007288173A5 (enExample) 2010-04-22
JP5311754B2 JP5311754B2 (ja) 2013-10-09

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ID=38759599

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007071920A Expired - Fee Related JP5311754B2 (ja) 2006-03-20 2007-03-20 結晶性半導体膜、半導体装置及びそれらの作製方法

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JP (1) JP5311754B2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG156537A1 (en) 2008-04-09 2009-11-26 Toshiba Matsushita Display Tec Methods of laser annealing a semiconductor layer and semiconductor devices produced thereby
WO2013054505A1 (ja) * 2011-10-12 2013-04-18 パナソニック株式会社 薄膜トランジスタ装置
WO2015083042A1 (ja) * 2013-12-03 2015-06-11 株式会社半導体エネルギー研究所 半導体装置およびその作製方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0770479B2 (ja) * 1985-02-14 1995-07-31 旭硝子株式会社 半導体装置の製造方法
JPS63299322A (ja) * 1987-05-29 1988-12-06 Sony Corp 単結晶シリコン膜の形成方法
JP3377160B2 (ja) * 1996-12-13 2003-02-17 シャープ株式会社 半導体装置およびその製造方法
JP4841740B2 (ja) * 2000-04-26 2011-12-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2004087535A (ja) * 2002-08-22 2004-03-18 Sony Corp 結晶質半導体材料の製造方法および半導体装置の製造方法
JP4593212B2 (ja) * 2003-09-19 2010-12-08 株式会社半導体エネルギー研究所 薄膜トランジスタの作製方法、及び半導体装置の作製方法
JP2005285827A (ja) * 2004-03-26 2005-10-13 Advanced Lcd Technologies Development Center Co Ltd 半導体薄膜の結晶化方法並びに結晶化装置、薄膜トランジスタ、およびこの薄膜トランジスタを使用した表示装置

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