JP2007251947A5 - - Google Patents
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- Publication number
- JP2007251947A5 JP2007251947A5 JP2007064090A JP2007064090A JP2007251947A5 JP 2007251947 A5 JP2007251947 A5 JP 2007251947A5 JP 2007064090 A JP2007064090 A JP 2007064090A JP 2007064090 A JP2007064090 A JP 2007064090A JP 2007251947 A5 JP2007251947 A5 JP 2007251947A5
- Authority
- JP
- Japan
- Prior art keywords
- wire serial
- master device
- serial bus
- master
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/378,884 US7634611B2 (en) | 2006-03-17 | 2006-03-17 | Multi-master, chained two-wire serial bus |
| US11/378,884 | 2006-03-17 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007251947A JP2007251947A (ja) | 2007-09-27 |
| JP2007251947A5 true JP2007251947A5 (enExample) | 2010-04-22 |
| JP4966695B2 JP4966695B2 (ja) | 2012-07-04 |
Family
ID=38375141
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007064090A Expired - Fee Related JP4966695B2 (ja) | 2006-03-17 | 2007-03-13 | マルチマスタのチェーン接続された二線シリアルバス装置及びディジタル状態機械 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7634611B2 (enExample) |
| JP (1) | JP4966695B2 (enExample) |
| DE (1) | DE102007012054B4 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4978421B2 (ja) * | 2007-10-24 | 2012-07-18 | セイコーエプソン株式会社 | データ通信システム及び通信制御装置 |
| US7752365B2 (en) * | 2008-04-01 | 2010-07-06 | Kyocera Corporation | Bi-directional single conductor interrupt line for communication bus |
| JP5324908B2 (ja) * | 2008-08-22 | 2013-10-23 | パナソニック株式会社 | カードホストlsiを有するセット機器、およびカードホストlsi |
| US8860249B2 (en) * | 2010-12-08 | 2014-10-14 | Schlumberger Technology Corporation | Power allocation to downhole tools in a bottom hole assembly |
| US8812760B1 (en) * | 2011-12-22 | 2014-08-19 | Cisco Technology, Inc. | System and method for monitoring two-wire communication in a network environment |
| US9858235B2 (en) * | 2012-11-15 | 2018-01-02 | Advanced Micro Devices, Inc. | Emulated legacy bus operation over a bit-serial bus |
| US9769051B2 (en) | 2014-01-13 | 2017-09-19 | Viavi Solutions Inc. | Demarcation unit enclosure and method |
| JP6321393B2 (ja) * | 2014-02-14 | 2018-05-09 | 山洋電気株式会社 | マスタスレーブ相互間中継装置およびその中継方法 |
| DE102014103524B4 (de) * | 2014-03-14 | 2015-12-17 | Osram Gmbh | Schaltungsanordnung zum Betreiben zumindest eines Leuchtmittels |
| TWI569253B (zh) * | 2016-01-12 | 2017-02-01 | 友達光電股份有限公司 | 驅動器及其操作方法 |
| CN111984576B (zh) * | 2019-05-24 | 2022-03-22 | 鸿富锦精密电子(天津)有限公司 | 数据通信系统以及方法 |
| CN112202573B (zh) * | 2020-09-30 | 2022-08-30 | 金华飞光科技有限公司 | 一种二线制的供电、组网通信系统 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW230808B (en) * | 1993-06-04 | 1994-09-21 | Philips Electronics Nv | A two-line mixed analog/digital bus system and a station for use in such a system |
| JPH103447A (ja) * | 1996-06-18 | 1998-01-06 | Matsushita Electric Ind Co Ltd | バスブリッジ装置 |
| JP2000242612A (ja) * | 1999-02-25 | 2000-09-08 | Sega Enterp Ltd | メモリ及びバスを共有化したシステム |
| US20040225814A1 (en) * | 2001-05-29 | 2004-11-11 | Ervin Joseph J. | Method and apparatus for constructing wired-AND bus systems |
| US20040255195A1 (en) * | 2003-06-12 | 2004-12-16 | Larson Thane M. | System and method for analysis of inter-integrated circuit router |
-
2006
- 2006-03-17 US US11/378,884 patent/US7634611B2/en not_active Expired - Fee Related
-
2007
- 2007-03-13 DE DE102007012054.2A patent/DE102007012054B4/de not_active Expired - Fee Related
- 2007-03-13 JP JP2007064090A patent/JP4966695B2/ja not_active Expired - Fee Related
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