JP2007219354A - Electro-optical device and its driving method, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To inspect pixels of an electro-optical device such as a liquid crystal device without increasing the device size and to supply a precharge signal to data lines during normal display. <P>SOLUTION: The electro-optical device has scanning lines 11 and data lines 3, pixel parts 70 which are supplied with an image signal inverted in polarity in every horizontal scanning period, and a reference signal line ref which supplies a signal having the same polarity as the image signal as a precharging reference potential between high-potential power VDD and low-potential power VSS. Further, the electro-optical device is equipped with a differential amplifying circuit 4a which inputs the potential of the reference signal line ref as a node (so) and the potential of the data line 3 at a node (se), compares the potential of the node (so) with the potential of the node (se), and outputs the low-potential power VSS from the node (se) to the data line 3 in a horizontal blanking period when the potential of the node (se) is lower than the potential of the node (so) and the high-potential power VDD when the potential of the node (se) is higher than the potential of the node (so). <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technical field of an electro-optical device such as a liquid crystal display device, a driving method thereof, and an electronic apparatus.

  A liquid crystal device, which is an example of this type of electro-optical device, includes a step of inspecting a TFT array substrate on which a thin film transistor (hereinafter referred to as “TFT”) is formed, and for controlling the TFT array substrate and the liquid crystal. And a step of sealing liquid crystal between the opposing substrates on which the opposing electrodes are formed. If defects in the TFT formed on the TFT array substrate are not detected in the process of inspecting the TFT array substrate, but are detected in the finished liquid crystal device, the process after forming the TFT array substrate However, this is a useless process, and there is a problem in that the yield and cost of the liquid crystal device are reduced.

  As one means for solving such a problem, for example, Patent Document 1 discloses a pixel unit corresponding to all intersections of two data lines and scanning lines electrically connected to a comparator in a pixel array. Is disclosed, and a technique for inspecting whether or not a defect occurs in the pixel portion by comparing potential information supplied to the two pixel portions at the stage of forming the TFT array substrate is disclosed.

  On the other hand, in order to prevent liquid crystal burn-in and deterioration, a driving method for the liquid crystal device employs an inversion driving method such as line inversion or frame inversion that inverts the polarity of an image signal every predetermined period. In such an inversion driving method, when inverting the polarity of an image signal, writing the image signal through a data line that is always at the opposite polarity to the image signal to be supplied requires a large writing capability. Therefore, for example, during a horizontal blanking period, it is common to perform precharge in which a precharge signal having a predetermined potential is written to a data line prior to supply of an image signal.

JP 2004-226551 A

  However, in the technique disclosed in Patent Document 1, providing a precharge circuit for precharging data lines during normal display on the substrate in addition to the inspection comparator is a reduction in the size of the electro-optical device. There is a problem that it is difficult from the viewpoint. Furthermore, if a precharge circuit is provided separately from the comparator, the precharge circuit is electrically connected to the data line in the vicinity of the comparator, thereby adversely affecting the inspection by the comparator that detects a minute potential difference. There is also a problem that it ends up.

  The present invention has been made in view of, for example, the above-described problems. For example, the pixel portion can be inspected without increasing the size of an electro-optical device such as a liquid crystal device, and the data line is displayed during normal display. It is an object of the present invention to provide an electro-optical device that can supply a precharge signal, a driving method thereof, and an electronic apparatus including such an electro-optical device.

  In order to solve the above problem, an electro-optical device according to an aspect of the invention corresponds to a plurality of scanning lines and a plurality of data lines intersecting each other on a substrate, and corresponding to the intersection of the plurality of scanning lines and the plurality of data lines. A plurality of pixel units that are arranged and supplied with an image signal whose polarity is inverted between a positive polarity on the higher side and a negative polarity on the lower side with respect to the predetermined potential in a predetermined cycle, via the data line; Among the high potential reference signal having a potential higher than the predetermined potential and the low potential reference signal having a low potential, a reference signal line that supplies a signal having the same polarity as the image signal to the predetermined potential as a reference signal; The potential of the reference signal line is input to the first node and the potential of the data line is input to the second node. The potential of the first node and the potential of the second node are compared, and the second node The node potential is A low potential signal having a potential lower than the predetermined potential when the potential is lower than the potential of the node, and a high potential having a potential higher than the predetermined potential when the potential of the second node is higher than the potential of the first node. A differential amplifier circuit that outputs a potential signal from the second node to the data line in a period preceding the supply of the image signal to the data line.

  According to the electro-optical device of the present invention, during the operation, for example, an image signal is supplied to each pixel unit via the data line by the data line driving circuit. At the same time, a scanning signal is supplied to each pixel portion via the scanning line by the scanning line line driving circuit. For example, a pixel switching transistor provided for each pixel portion has a gate connected to the scanning line, and selectively supplies an image signal to the pixel electrode in accordance with the scanning signal. Thus, for example, by controlling or driving an electro-optical material such as liquid crystal sandwiched between the pixel electrode and the counter electrode in each pixel unit, a plurality of pixel units are planarly arranged in a matrix, for example The image is displayed. At this time, the storage capacitor improves the potential holding characteristic in the pixel portion, and the display can have high contrast. For example, a transmissive pixel electrode that transmits incident light or a reflective or transflective pixel electrode that reflects incident light is used as the pixel electrode.

  In the present invention, the polarity of the potential of the image signal is inverted with respect to a predetermined potential such as a common fixed potential or a ground potential in a predetermined cycle such as one horizontal scanning period. That is, for example, line inversion driving, area inversion driving for inversion driving for each partial area, or the like is performed according to the selection order of the scanning lines. The scanning line may be selected in any order.

  Furthermore, in the present invention, a differential amplifier circuit is provided on the substrate. The differential amplifier circuit is used for inspecting the quality of the pixel portion at the time of inspection performed prior to the operation of the electro-optical device. That is, at the time of an inspection performed prior to the operation of the electro-optical device, an inspection reference potential serving as an inspection reference is supplied to the first node of the differential amplifier circuit through the reference signal line. On the other hand, to the second node of the differential amplifier circuit, for example, a potential signal input to, for example, a pixel electrode in the pixel portion is read and supplied. Such inspection is preferably performed before the electro-optical device is bonded to the pair of substrates. Here, the potential signal read from the pixel portion is a signal reflecting the quality of the pixel portion. More specifically, for example, an inspection signal is supplied to the pixel portion in advance prior to the inspection, and a signal having a potential that varies from the potential of the inspection signal according to the quality of the pixel portion is output as a potential signal. “Possibility of the pixel portion” means whether or not the pixel portion has a defect, and the level relationship between the reference potential for inspection and the potential of the potential signal varies depending on the defect that has occurred in the pixel portion. For example, when the potential signal output from the pixel unit and supplied to the second node has a potential slightly lower than the inspection reference potential supplied to the first node, the differential amplifier circuit has an inspection reference potential. The low potential signal is output to the second node so that the low potential of the potential signal supplied to the second node is not obscured by noise applied to the wiring such as the data line. On the other hand, for example, when the potential of the potential signal output from the pixel portion and supplied to the second node has a slightly higher potential than the inspection reference potential supplied to the first node, the second node Outputs a high potential signal. As described above, the low potential signal or the high potential signal output from the differential amplifier circuit is a signal reflecting the quality of the pixel portion described above. Based on the output from such a differential amplifier circuit, for example, if the potential signal supplied in advance to the pixel portion is higher than the inspection reference potential, if the low potential signal is output from the differential amplifier circuit, the second signal is output. It is determined that some defect has occurred in the pixel portion corresponding to the data line electrically connected to the node.

  In the present invention, in particular, the differential amplifier circuit can be used not only as the inspection circuit during the above-described inspection but also as a precharge circuit that supplies a precharge signal to the data line during the operation of the electro-optical device. it can. That is, the reference signal line electrically connected to the first node of the differential amplifier circuit has a high potential reference signal having a potential higher than a predetermined potential and a low potential reference signal having a low potential with respect to the predetermined potential. Then, a signal having the same polarity as the image signal is supplied as a reference signal. As the high potential reference signal and the low potential reference signal, for example, a high potential power source and a low potential power source for driving a data line driving circuit, a scanning line driving circuit, or the like are used. It is desirable that the potential of the high potential reference signal is higher than the maximum potential that the image signal can take, and the potential of the low potential reference signal is lower than the minimum potential that the image signal can take. For example, when the image signal has a potential lower than a predetermined potential (that is, a negative potential) during the i-th (where i is a natural number) horizontal scanning period, the reference signal line is In the i-th horizontal scanning period, a high-potential reference signal having a polarity opposite to that of the image signal (that is, positive polarity), that is, higher than a predetermined potential is supplied to the first node, and in the i + 1-th horizontal scanning period. Supplies a low potential reference signal having a polarity opposite to that of the image signal whose polarity is inverted (that is, negative polarity), that is, lower than a predetermined potential, to the first node. On the other hand, the potential signal is supplied from the data line to the second node in the non-display period (that is, the period preceding the supply of the positive image signal) such as the horizontal blanking period in the (i + 1) th horizontal scanning period. Is done. At this time, the potential signal supplied from the data line has the same polarity (that is, negative polarity) as the image signal supplied in the i-th horizontal scanning period. In this way, in the (i + 1) th horizontal blanking period, the low potential reference signal is supplied to the first node via the reference signal line, and the negative potential signal is supplied to the second node via the data line. Will be supplied. Then, the differential amplifier circuit has a high potential that is higher than the predetermined potential because the potential of the negative potential signal supplied to the second node is higher than the potential of the low potential reference signal supplied to the first node. The potential signal is output to the data line via the second node. That is, a high potential signal having positive polarity is supplied to the data line in advance in the horizontal blanking period preceding the period in which the positive polarity image signal is supplied in the (i + 1) th horizontal scanning period. Is precharged.

  As described above, according to the electro-optical device of the present invention, the data line can be precharged by the differential amplifier circuit. That is, a differential amplifier circuit used for checking the quality of the pixel portion can function as a precharge circuit. In other words, the differential amplifier circuit can be used as both an inspection circuit for inspecting pass / fail of the pixel portion and a precharge circuit for precharging the data line, that is, can also be used. Therefore, it is not necessary to form a precharge circuit on the substrate separately from the inspection circuit. Accordingly, the substrate size can be reduced, and the electro-optical device can be reduced in size. Further, as compared with the case where the precharge circuit is provided separately from the differential amplifier circuit, the deterioration and delay of the precharge signal can be reduced. That is, if a precharge circuit is provided separately, it is necessary to route a precharge signal wiring for supplying a precharge signal on the substrate, and while the precharge signal propagates through the precharge signal wiring, There is a risk of deterioration or delay of the precharge signal. However, according to the present invention, since the output from the differential amplifier circuit is supplied as the precharge signal, the precharge signal is hardly deteriorated or delayed.

  In one aspect of the electro-optical device of the present invention, the predetermined period is one horizontal scanning period of the image signal, and the preceding period is a horizontal blanking period in the one horizontal scanning period.

  According to this aspect, the data line can be precharged for each horizontal blanking period or horizontal blanking period that does not contribute to display in one horizontal scanning period in which one scanning line is scanned.

  In another aspect of the electro-optical device according to the aspect of the invention, a scanning line driving circuit that supplies a scanning signal to the pixel unit via the scanning line, and the image signal to each of the plurality of pixel units via the data line. And a plurality of power supply lines for supplying each of a high potential power source higher than the predetermined potential and a low potential power source lower than the predetermined potential to at least one of the scanning line driving circuit and the image signal supply circuit. The high potential reference signal and the high potential signal are the same potential as the potential of the high potential power source, and the low potential reference signal and the low potential signal are the same potential as the potential of the low potential power source.

  According to this aspect, since the high potential reference signal, the high potential signal, the low potential reference signal, and the low potential signal can be supplied from the power supply wiring, it is necessary to wire the wiring for supplying these signals separately from the power supply wiring. Absent. Therefore, the data line can be precharged by the differential amplifier circuit without increasing the substrate size or complicating the stacked structure on the substrate.

  In another aspect of the electro-optical device of the present invention, the intermediate potential reference signal having an intermediate potential between the high potential reference signal and the low potential reference signal, and the same among the high potential reference signal and the low potential reference signal. A selection circuit that selectively supplies a polarity signal to the reference signal line is provided.

  According to this aspect, when the pixel portion is inspected, the intermediate potential reference signal is supplied to the reference signal line, whereby the pixel portion can be reliably inspected by the differential amplifier circuit. Further, for normal display by the pixel portion, by supplying a high potential reference signal or a low potential reference signal to the reference signal line, the pixel portion can be reliably precharged by the differential amplifier circuit.

  In order to solve the above-described problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention.

  Since the electronic apparatus of the present invention includes the above-described electro-optical device of the present invention, a projection display device, a television, a mobile phone, an electronic notebook, a word processor, a view capable of performing high-quality image display. Various electronic devices such as a finder type or a monitor direct-view type video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. In addition, as an electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper, an electron emission device (Field Emission Display and Conduction Electron-Emitter Display), and a display device using these electrophoretic device and electron emission device are realized. Is also possible.

  In order to solve the above-described problem, a driving method of an electro-optical device according to an embodiment of the present invention includes a plurality of scanning lines and a plurality of data lines intersecting each other on a substrate, and the plurality of scanning lines and the plurality of data lines intersecting each other. A plurality of corresponding pixel portions, a reference signal line that supplies a reference signal, a potential of the reference signal line is input to the first node, and a potential of the data line is input to the second node An electro-optical device driving method for driving an electro-optical device including a differential amplifier circuit, wherein the potential is inverted between a positive polarity on a higher side and a negative polarity on a lower side with respect to a predetermined potential in a predetermined cycle. An image signal supply process for supplying an image signal to the plurality of pixel portions through the data line, and a potential of a high potential reference signal having a potential higher than the predetermined potential and a low potential reference signal having a low potential Same pole as the image signal The reference signal supply process of supplying the signal as the reference signal to the reference signal line is compared with the potential of the first node and the potential of the second node, and the potential of the second node is When the potential of the second node is lower than the potential of the first node, a low potential signal having a potential lower than the predetermined potential is received. When the potential of the second node is higher than the potential of the first node, the potential is higher than the predetermined potential. A precharge process for supplying a high potential signal to the data line through the second node as a precharge signal for precharging the data line in a period preceding the supply of the image signal to the data line. With.

  According to the driving method of the electro-optical device of the present invention, as in the case of the above-described electro-optical device of the present invention, the low-potential signal or the signal from the differential amplifier circuit in the period preceding the supply of the image signal to the data line. By supplying a high potential signal to the data line, the data line can be precharged.

  The operation and other advantages of the present invention will become apparent from the best mode for carrying out the invention described below.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, an active matrix driving type liquid crystal device with a built-in driving circuit, which is an example of the electro-optical device of the present invention, is taken as an example.
<First Embodiment>
The liquid crystal device according to the first embodiment will be described with reference to FIGS.

  First, the overall configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the configuration of the liquid crystal device according to this embodiment, and FIG. 2 is a cross-sectional view taken along the line H-H 'in FIG.

  1 and 2, in the liquid crystal device according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are arranged to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are provided with a sealing material 52 provided in a seal region positioned around the image display region 10a. Are bonded to each other.

  In FIG. 1, a light-shielding frame light-shielding film 53 that defines the frame area of the image display region 10a is provided on the counter substrate 20 side in parallel with the inside of the seal region where the sealing material 52 is disposed. A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region in which the sealing material 52 is disposed in the peripheral region. The sampling circuit 7 is provided so as to be covered with the frame light shielding film 53 on the inner side of the seal region along the one side. The data line driving circuit 101 and the sampling circuit 7 constitute an example of the “image signal supply circuit” according to the present invention. The scanning line drive circuit 104 is provided so as to be covered with the frame light-shielding film 53 inside the seal region along two sides adjacent to the one side. On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are arranged in regions facing the four corner portions of the counter substrate 20. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  On the TFT array substrate 10, a lead wiring 90 for electrically connecting the external circuit connection terminal 102 and the data line driving circuit 101, the scanning line line driving circuit 104, the vertical conduction terminal 106, and the like is formed. Yes.

  In FIG. 2, on the TFT array substrate 10, a laminated structure in which wirings such as pixel switching transistors, scanning lines, and data lines as drive elements are formed is formed. In the image display area 10a, a pixel electrode 9a is provided in an upper layer of wiring such as a pixel switching transistor, a scanning line, and a data line. On the other hand, on the surface of the counter substrate 20 facing the TFT array substrate 10, a counter electrode 21 made of a transparent material such as ITO (Indium Tin Oxide) is formed to face the plurality of pixel electrodes 9a. Further, the liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  Although not shown here, on the TFT array substrate 10, in addition to the data line driving circuit 101 and the scanning line line driving circuit 104, as described later, as an example of the “differential amplifier circuit” according to the present invention. Differential amplifier circuit 4a, selection circuit 200, and the like are formed.

  For example, a transmissive pixel electrode that transmits incident light or a reflective or transflective pixel electrode that reflects incident light can be used as the pixel electrode 9a.

  Next, the circuit configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. FIG. 3 is a block diagram showing the main circuit configuration of the liquid crystal device according to this embodiment. FIG. 4 is a circuit diagram showing an electrical configuration of the pixel portion.

  In FIG. 3, the liquid crystal device according to the present embodiment includes a pixel unit 70, a sampling circuit 7, a scanning line drive circuit 104, a data line drive circuit 101, a differential amplifier circuit 4a, a transmission gate 60, and a selection on a TFT array substrate 10. A circuit 200 is provided.

  The pixel unit 70 is two-dimensionally arranged in a matrix of n rows × m columns in the image display area 10a. Here, m and n are natural numbers, respectively. More specifically, as shown in FIG. 3, the pixel unit 70 includes the first column, the second column,..., The m-th column from the right side in the image display region 10 a, the first row, the second column from the upper side. Are arranged in a matrix of rows,..., N-th row. That is, a pixel unit 70 that is a unit display element is provided corresponding to the intersection of the n data lines 3 and the m scanning lines 11.

  As shown in FIG. 4, the pixel unit 70 includes a transistor 30, a liquid crystal capacitor Clc, and an additional capacitor Cs.

  The liquid crystal capacitance Clc is a capacitance due to the pixel electrode 9a, the counter electrode 21, and the liquid crystal layer 50 (see FIG. 2).

  The additional capacitor Cs is electrically connected in parallel with the liquid crystal capacitor Clc.

  The transistor 30 has a source terminal s electrically connected to the data line 3 and a gate terminal g electrically connected to the scanning line 11. The transistor 30 is turned on and off by a scanning signal supplied from the scanning line driver circuit 104.

  The drain of the transistor 30 is electrically connected to one end of each of the liquid crystal capacitor Clc and the additional capacitor Cs, and the other end of the additional capacitor Cs is electrically connected to the common fixed potential LCCOM. When the scanning signal is input to the gate terminal g of the transistor 30 and the transistor 30 is turned on, the voltage applied to the source terminal s of the transistor 30 electrically connected to the data line 3 is applied to the liquid crystal capacitor Clc and the additional capacitor Cs. The potential of the applied data signal is maintained. Thus, the potential of the data signal supplied to the pixel unit 70 when image display is performed can be held for a long time.

  In FIG. 3 again, the data line driving circuit 101 has a sampling circuit driving signal Si (i = 1, 1) for driving the sampling circuit 7 based on the clock signal CLX (and its inverted signal CLXB) and the shift register start signal DX. .., M) are output.

  The sampling circuit 7 includes a sampling switch 71 composed of a P-channel or N-channel single-channel TFT or a complementary TFT. The sampling circuit 7 samples the image signal VID supplied to the image signal line 6 in accordance with the sampling circuit drive signal Si that is a reference clock signal, and applies each to the data line 3 as a data signal. The data line 3 is electrically connected to each of the n pixel units 70 in each column, and a data signal from the data line 3 is transmitted to the pixel unit 70 (more specifically, a liquid crystal included in each pixel unit 70). The capacity Clc and the additional capacity Cs) are written.

  The scanning line drive circuit 104 uses a scanning signal Gi (i = 1,..., N) so as to scan the plurality of pixel units 70 arranged in a matrix in the arrangement direction of the scanning lines 11 by using a data signal and a scanning signal. Applied to the scanning line 11.

  As shown in FIG. 5, the scanning line drive circuit 104 includes a scanning signal Gi (i) generated based on a clock signal CLY (and its inverted signal CLYB) that is a reference clock for applying a scanning signal and a shift register start signal DY. = 1,..., N) are applied to the plurality of scanning lines 11. FIG. 5 is a timing chart showing scanning signal supply timing. More specifically, when the shift register start signal DY that defines the vertical scanning period is input, the scanning line drive circuit 104 scans one scan every one horizontal scanning period Th defined by the clock signal CLY. The scanning signal Gi is sequentially supplied to the line 11, that is, one scanning line 11 is sequentially selected. A data signal is written to the pixel portion 70 corresponding to the intersection of one scanning line 11 and m data lines selected every horizontal scanning period Th. The order of supplying the scanning signals Gi (i = 1,..., N) to the m scanning lines 11 may be an arbitrary order.

  At the beginning of one horizontal scanning period Th, a horizontal blanking period Tb that does not contribute to display is provided.

  In the present embodiment, the image signal VID supplied to the image signal line 6 has a positive potential on the higher side and a negative polarity on the lower side with respect to the common fixed potential LCCOM with one horizontal scanning period as a predetermined circumference. The polarity is reversed. That is, inversion driving is performed in which the potential of the data signal is alternately inverted for each scanning line 11 in the selected order. The inversion driving may be, for example, line inversion driving. For example, the m scanning lines 11 are divided into, for example, the image display area 10a into a plurality of partial areas, and scanning lines in different partial areas are sequentially selected. In this way, region inversion driving or the like in which inversion driving is performed for each partial region may be performed.

  In FIG. 3, one differential amplifier circuit 4a is provided for each data line 3 on the side opposite to the data line driving circuit 101 with respect to the image display region 10a when viewed in plan on the TFT array substrate 10. ing. A transmission gate 60 is provided between the pixel unit 70 provided in the image display region 10a and the differential amplifier circuit 4a.

  Here, the electrical configuration of the differential amplifier circuit according to the present embodiment will be described with reference to FIGS. FIG. 6 is a circuit diagram showing the electrical configuration of the differential amplifier circuit.

  In FIG. 6, a differential amplifier circuit 4a is a cross-coupled differential amplifier circuit including p-channel transistors Tr1 and Tr2 and n-channel transistors Tr3 and Tr4. More specifically, a series circuit in which transistors Tr1 and Tr2 are electrically connected in series and a series circuit in which transistors Tr3 and Tr4 are electrically connected in series are electrically connected in parallel. The gates of the transistors Tr1 and Tr3 are electrically connected to the node so. The gates of the transistors Tr2 and Tr4 are electrically connected to the node se. The connection points of the sources and drains of the transistors Tr1 and Tr2 are electrically connected to the node sp, and the connection points of the sources and drains of the transistors Tr3 and Tr4 are electrically connected to the node sn.

  As shown in FIG. 3, the nodes se and so are electrically connected to a se wiring 4f and a so wiring 4g that supply potentials to these nodes, respectively. The se wiring 4f can be electrically connected to the data line 3 via the transmission gate 60, and the potential of the data signal read from the pixel unit 70 is supplied to the se wiring 4f. An inspection reference potential or a precharge reference potential is supplied to the so wiring 4g via a reference signal line ref from a selection circuit 200 described later. The node sp is supplied with the high potential power supply VDD through the transistor 4d, and the node sn is supplied with the low potential power supply VSS lower than the high potential power supply VDD through the transistor 4e. The transistors 4d and 4e are controlled to be turned on and off by drive signals SAp-ch and SAn-ch supplied via terminals 4b and 4c, respectively.

  In FIG. 6, the differential amplifier circuit 4a configured in this manner raises the potential supplied to the nodes se and so to one of the potential of the high potential power supply VDD and the other to the potential of the low potential power supply VSS. For example, when a potential slightly higher than the node so is supplied to the node se, the transistor Tr4 is turned on first among the transistors Tr1 to Tr4. Since the transistor Tr4 is turned on, the potential of the node so decreases to the potential of the low potential power supply VSS of the node sn. Then, since the node so falls to the potential of the low potential power supply of the node sn, the transistor Tr1 whose gate is electrically connected to the node so is turned on. As a result, the node se rises to the potential of the high potential power supply VDD of the node sp. On the other hand, when a potential slightly lower than that of the node so is supplied to the node se, the transistor Tr3 is turned on first among the transistors Tr1 to Tr4. Since the transistor Tr3 is turned on, the potential of the node se is lowered to the potential of the low potential power supply VSS of the node sn. Then, since the node se is lowered to the potential of the low potential power supply VSS of the node sn, the transistor Tr2 whose gate is electrically connected to the node se is turned on. As a result, the node so rises to the potential of the high potential power supply VDD of the node sp.

  As described above, the differential amplifier circuit 4a functions to increase the higher potential among the potentials applied to the nodes se and so, and lower the lower potential.

  In FIG. 3 again, the transmission gate 60 is constituted by a transistor 60 s provided corresponding to each data line 3. The se wiring 4f electrically connected to the node se of the differential amplifier circuit 4a is electrically connected to the source of the transistor 60s, and the gate of the transistor 60s is electrically connected to the control terminal 9b. The transistor 60 s is turned on by a HIGH connection control signal TE input via the control terminal 9 b, and the differential amplifier circuit 4 a is electrically connected to the data line 3.

  The selection circuit 200 is electrically connected to the node so of the plurality of differential amplifier circuits 4a via the so wiring 4g and the reference signal line ref.

  Here, the electrical configuration of the selection circuit 200 will be described with reference to FIG. FIG. 7 is a circuit diagram showing an electrical configuration of the selection circuit.

  In FIG. 7, the selection circuit 200 includes p-channel transistors 211 and 221 and n-channel transistors 212 and 222. The gates of the transistors 211 and 212 are electrically connected to the terminal 231. The gates of the transistors 221 and 222 are electrically connected to the terminal 232. A source of the transistor 211 is electrically connected to the terminal 233, and a source of the transistor 212 is electrically connected to the terminal 234. A source of the transistor 222 is electrically connected to the terminal 235. The drains of the transistors 211 and 222 are electrically connected to the source of the transistor 221, and the drains of the transistors 221 and 222 are electrically connected to the terminal 236.

  The terminal 231 is supplied with an inversion period defining signal FRP for defining the polarity inversion period of the image signal VID to be inverted. The inversion cycle defining signal FRP has the same cycle as the polarity inversion cycle of the image signal VID and the same polarity as the image signal VID. That is, during a period in which the image signal VID has a higher potential than the common fixed potential LCCOM, the inversion cycle defining signal FRP also has a higher potential than the common fixed potential LCCOM, and the image signal VID has a common fixed potential. During a period having a potential lower than LCCOM, the inversion cycle defining signal FRP also has a potential lower than the common fixed potential LCCOM.

  The terminal 232 is supplied with a switching signal ex for controlling switching between inspection and normal display. The switching signal ex is HIGH during inspection and LOW during normal display.

  A high potential power supply VDD is supplied to the terminal 233.

  The terminal 234 is supplied with a low potential power supply VSS.

  The terminal 235 is supplied with the inspection reference potential VM. The inspection reference potential VM has a potential between the high potential power supply VDD and VSS.

  Next, the inspection of the pixel portion by the differential amplifier circuit according to the present embodiment will be described with reference to FIGS.

  3 and 7, when inspecting whether the pixel unit 70 is good or bad, the HIGH switching signal ex is supplied to the terminal 232 of the selection circuit 200, whereby the transistor 221 is turned off and the transistor 222 is turned on. The As a result, the terminal 235 and the terminal 236 of the selection circuit 200 are electrically connected, and the inspection reference potential VM is supplied to the reference signal line ref.

  In FIG. 3, when inspecting the quality of the pixel unit 70, the transistor 60 s is turned on by supplying the HIGH connection control signal TE to the connection control terminal 9 b, and the differential amplifier circuit 4 a is connected to the data line 3. Electrically connected.

  In the inspection of the pixel portion, for example, a LOW or HIGH data signal is written to each pixel portion 70, and the data signal written to the pixel portion 70 is read and applied to the node se of the differential amplifier circuit 4a. On the other hand, the inspection reference potential VM is supplied from the selection circuit 200 to the node so of the differential amplifier circuit 4a through the reference signal line ref and the so wiring 4g. As described above with reference to FIG. 6, the differential amplifier circuit 4 a reduces the low level potential of the two inputs (that is, the input to the node so and the node se) to the potential of the low potential power supply VSS and increases the level. By raising the level potential to the potential of the high-potential power supply VDD, a subtle level difference between the two inputs is increased to facilitate the determination of the level of the two inputs. Based on the output from the differential amplifier circuit 4a, for example, when the data signal supplied to the pixel unit 70 in advance is higher than the inspection reference potential VM, the potential of the low potential power supply VSS from the differential amplifier circuit 4a. Is output, it is possible to check the quality of the pixel unit 70 by determining that there is some malfunction in the pixel unit 70 corresponding to the data line electrically connected to the node se. . Therefore, in the manufacturing process, the electrical characteristics of the plurality of pixel portions 70 can be evaluated or inspected before the TFT array substrate 10 and the counter substrate 20 are bonded and the liquid crystal is sealed.

  Next, precharging by the differential amplifier circuit according to the present embodiment will be described with reference to FIGS. 3 and 6 to 8. FIG. 8 is a timing chart showing changes in the potential of the data line precharged by the differential amplifier circuit.

  Particularly in the present embodiment, the differential amplifier circuit 4a can be used not only as an inspection circuit at the time of inspection as described above, but also as a precharge for supplying a precharge signal to the data line 3 at the time of normal display of the liquid crystal device. It can be used as a circuit.

  3 and 7, in the normal display, the LOW switching signal ex is supplied to the terminal 232 of the selection circuit 200, whereby the transistor 221 is turned on and the transistor 222 is turned off. As a result, the terminal 236 of the selection circuit 200 and the drains of the transistors 211 and 212 are electrically connected, and the reference signal line ref is switched to a high potential by switching on and off the transistors 211 and 212 based on the inversion period defining signal FRP. The potential of the power supply VDD or the low potential power supply VSS is supplied as a precharge reference potential. That is, as shown in FIGS. 7 and 8, when the inversion period defining signal FRP is HIGH in the i-th horizontal scanning period Th (i) (that is, when the polarity of the image signal is higher than the common fixed potential LCCOM). The transistor 211 is turned off and the transistor 212 is turned on, and the potential of the low potential power supply VSS is supplied to the reference signal line ref. In the subsequent (i + 1) th horizontal scanning period Th (i + 1), the inversion period defining signal FRP changes to LOW, whereby the transistor 211 is turned on and the transistor 212 is turned off, and the reference signal line ref has a high potential power supply. A potential of VDD is supplied. That is, during normal display, the reference signal line ref has a polarity opposite to that of the image signal with respect to the common fixed potential LCCOM, and the potentials of the high potential power supply VDD and the low potential power supply VSS are changed every horizontal scanning period Th. It is alternately supplied as a precharge reference potential. The precharge reference potential is supplied to the node so of the differential amplifier circuit 4a through the so wiring 4g electrically connected to the reference signal line ref. Here, the high potential power supply VDD and the low potential power supply VSS are power supplies for driving the data line driving circuit 101, the scanning line line driving circuit 104, or the like, and the potential of the high potential power supply VDD is the potential of the image signal VID. The potential of the low potential power supply VSS is higher than the maximum potential that can be taken, and is lower than the minimum potential that the image signal VID can take.

  3 and 8, during normal display, the connection control signal TE that goes HIGH during the precharge period Tp in the horizontal blanking period Tb is supplied to the connection terminal 9b, so that the transistor 60s of the transmission gate 60 is turned on. The differential amplifier circuit 4a is electrically connected to the data line 3. At this time, the data line potential Vd which is the potential of the data line 3 is supplied to the node se of the differential amplifier circuit 4a.

  In FIG. 8, the data line potential Vd has a negative polarity at the beginning of the i-th horizontal blanking period Tb (i) (that is, has a potential lower than the common fixed potential LCCOM). . That is, the polarity of the potential of the data signal supplied to the pixel unit 70 is negative in the (i-1) th horizontal scanning period Th (i-1), and the polarity is inverted in the horizontal blanking period T (i). Since the positive data signal is not yet supplied to the data line 3, the data line potential Vd is kept negative.

  When the precharge period Tp preceding the image signal supply period starts at time t1 (that is, when the connection control signal TE becomes HIGH), the transistor 60s is turned on, and the data line potential Vd having the negative polarity is differential. The signal is supplied to the node se of the amplifier circuit 4a. On the other hand, as described above, in the i-th horizontal scanning period Th (i), the potential of the low potential power supply VSS is supplied to the reference signal line ref. Therefore, the differential amplifier circuit 4a uses the potential of the high potential power supply VDD as the node because the negative data line potential Vd supplied to the node se is higher than the potential of the low potential power supply VSS supplied to the node so. It is output to the data line 3 via se, that is, the data line potential Vd is set to the potential of the high potential power supply VDD. Therefore, in the i-th horizontal scanning period Th (i), in the horizontal blanking period Tb (i) (more precisely, the precharge period Tp) preceding the period in which the positive data signal is supplied. The potential of the high potential power supply VDD having a positive polarity can be supplied to the line 3 in advance, that is, the data line 3 can be precharged.

As described above, according to the liquid crystal device of the present embodiment, the data line 3 can be precharged by the differential amplifier circuit 4a. That is, the differential amplifier circuit 4a used for checking the quality of the pixel unit 70 can function as a precharge circuit. In other words, the differential amplifier circuit 4 a can be used as both an inspection circuit for inspecting the quality of the pixel unit 70 and a precharge circuit for precharging the data line 3, that is, can also be used. Therefore, it is not necessary to form a precharge circuit on the TFT array substrate 10 separately from the differential amplifier circuit 4a as the inspection circuit. Therefore, the substrate size of the TFT array substrate 10 can be reduced as compared with the case where the inspection circuit and the precharge circuit are provided separately, and the liquid crystal device can be downsized. Furthermore, as compared with the case where the precharge circuit is provided separately from the differential amplifier circuit 4a, the deterioration and delay of the precharge signal can be reduced. That is, if the precharge circuit is provided separately from the differential amplifier circuit 4a, it is necessary to route the precharge signal wiring for supplying the precharge signal on the TFT array substrate 10, and the precharge signal is The precharge signal may be deteriorated or delayed while propagating through the precharge signal wiring. However, according to the liquid crystal device of the embodiment, since the output from the differential amplifier circuit 4a is supplied as a precharge signal, the precharge signal is hardly deteriorated or delayed.
<Electronic equipment>
Next, the case where the liquid crystal device which is the above-described electro-optical device is applied to various electronic devices will be described.

  A projector using this liquid crystal device as a light valve will be described. FIG. 9 is a plan view showing a configuration example of the projector. As shown in FIG. 9, a projector 1100 includes a lamp unit 1102 made up of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Therefore, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  In addition, since light corresponding to each primary color of R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 9, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, and an electronic notebook , Calculators, word processors, workstations, videophones, POS terminals, devices with touch panels, and the like. Needless to say, the present invention can be applied to these various electronic devices.

  In addition to the liquid crystal device described in the above embodiment, the present invention includes a plasma display (PDP), a field emission display (FED, SED), an organic EL display, a digital micromirror device (DMD), an electrophoresis device, and the like. It is also applicable to.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. The driving method and the electronic apparatus including the electro-optical device are also included in the technical scope of the present invention.

It is a top view which shows the whole structure of the liquid crystal device which concerns on 1st Embodiment. It is sectional drawing of HH 'of FIG. 1 is a block diagram illustrating a main circuit configuration of a liquid crystal device according to a first embodiment. It is a circuit diagram which shows the electrical structure of a pixel part. It is a timing chart which shows the supply timing of a scanning signal. It is a circuit diagram which shows the electric constitution of a differential amplifier circuit. It is a circuit diagram which shows the electric constitution of a selection circuit. 6 is a timing chart showing a change in potential of a data line precharged by a differential amplifier circuit. It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 3 ... Data line, 4a ... Differential amplifier circuit, 6 ... Image signal line, 9a ... Pixel electrode, 7 ... Sampling circuit, 10 ... TFT array substrate, 10a ... Image display area, 11 ... Scanning line, 20 ... Counter substrate, 60 ... Transmission gate, 70 ... Pixel part, 101 ... Data line driving circuit, 104 ... Scanning line driving circuit, 200 ... Selection circuit, ex ... Switching signal, FRP ... Inversion period defining signal, ref ... Reference signal line, so, se ... node, VDD ... high potential power supply, VSS ... low potential power supply

Claims (6)

On the board
A plurality of scan lines and a plurality of data lines intersecting each other;
An image signal which is arranged corresponding to the intersection of the plurality of scanning lines and the plurality of data lines and whose potential is inverted at a predetermined cycle between a positive polarity on the higher side and a negative polarity on the lower side with respect to the predetermined potential. A plurality of pixel portions supplied via the data lines;
Among the high potential reference signal having a potential higher than the predetermined potential and the low potential reference signal having a low potential, a reference signal line that supplies a signal having the same polarity as the image signal to the predetermined potential as a reference signal;
The potential of the reference signal line is input to the first node and the potential of the data line is input to the second node. The potential of the first node and the potential of the second node are compared, and the second node When the potential of the node is lower than the potential of the first node, a low potential signal having a potential lower than the predetermined potential is received. When the potential of the second node is higher than the potential of the first node, the predetermined potential is determined. A differential amplifier circuit that outputs a high potential signal having a potential higher than a potential from the second node to the data line in a period preceding the supply of the image signal to the data line. An electro-optical device. The predetermined period is one horizontal scanning period of the image signal,
The electro-optical device according to claim 1, wherein the preceding period is a horizontal blanking period in the one horizontal scanning period. A scanning line driving circuit for supplying a scanning signal to the pixel portion via the scanning line;
An image signal supply circuit for supplying the image signal to each of the plurality of pixel portions via the data line;
A plurality of power supply lines for supplying each of a high potential power source higher than the predetermined potential and a low low potential power source to at least one of the scanning line driving circuit and the image signal supply circuit;
The high potential reference signal and the high potential signal are the same potential as the potential of the high potential power source,
The electro-optical device according to claim 1, wherein the low-potential reference signal and the low-potential signal are the same potential as the potential of the low-potential power source.   The reference signal line selectively selects an intermediate potential reference signal having an intermediate potential between the high potential reference signal and the low potential reference signal and a signal having the same polarity among the high potential reference signal and the low potential reference signal. 4. The electro-optical device according to claim 1, further comprising a selection circuit that supplies the selection circuit.   An electronic apparatus comprising the electro-optical device according to claim 1. A plurality of scanning lines and a plurality of data lines intersecting each other on a substrate, a plurality of pixel portions arranged corresponding to the intersection of the plurality of scanning lines and the plurality of data lines, and a reference for supplying a reference signal An electro-optical device for driving an electro-optical device, comprising: a signal line; and a differential amplifier circuit in which a potential of the reference signal line is input to a first node and a potential of the data line is input to a second node. A driving method comprising:
An image signal supply process for supplying an image signal whose polarity is inverted between a positive polarity on a higher side and a negative polarity on a lower side with respect to a predetermined potential in a predetermined cycle to the plurality of pixel portions via the data line;
A reference signal for supplying a signal having the same polarity as the image signal to the reference signal line as the reference signal among a high potential reference signal having a potential higher than the predetermined potential and a low potential reference signal having a low potential Supply process,
When the potential of the first node is compared with the potential of the second node, and the potential of the second node is lower than the potential of the first node, a low potential signal having a potential lower than the predetermined potential is When the potential of the second node is higher than the potential of the first node, a high potential signal having a potential higher than the predetermined potential is sent to the data in a period preceding the supply of the image signal to the data line. And a precharging process for supplying the data line via the second node as a precharge signal for precharging the line.

Images