JP2007180460A - Light-emitting thyristor, and light-emitting device and image forming device using light-emitting thyristor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light-emitting thyristor in which the emission intensity is increased without deteriorating photoreception sensitivity, and to provide a light-emitting device and an image forming device using the light-emitting thyristor. <P>SOLUTION: A first light-emitting thyristor according to the present invention comprises a first semiconductor layer 102, a second semiconductor layer 103, a third semiconductor layer 104, and a fourth semiconductor layer 107, which are laminated on a substrate 101 in this order, wherein the band gap of the second semiconductor layer 103 and third semiconductor layer 104 is configured to be equal, and the band gap of the first semiconductor layer 102 and fourth semiconductor layer 107 is configured to be greater than that of the second semiconductor layer 103 and third semiconductor layer 104. The third semiconductor layer 104 is divided into a first region 105 on the side of the substrate and a second region 106 on the opposite side, with the impurity density of the second region 106 being configured to be greater than that of the first region 105. Moreover, the impurity density of the fourth semiconductor layer 107 is configured to be greater than that of the second region 106, and the impurity density of the second semiconductor layer 103 is configured to be greater than that of the first region 105 and smaller than that of the first semiconductor layer 102. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  In the thyristor formed by sequentially laminating an N-type semiconductor layer and a P-type semiconductor layer, the present invention extracts light emitted from the inside of the semiconductor layer to the outside and changes the light emission state from the outside electrically. The present invention relates to a light emitting thyristor that can be controlled by irradiation and has improved light emission intensity and light receiving sensitivity. The present invention also relates to a self-scanning light-emitting device in which the light-emitting thyristor is integrated as a transfer switch element by light excitation, and further relates to an image forming apparatus using the light-emitting device.

  A light-emitting thyristor is formed by using a direct transition type semiconductor such as gallium arsenide (GaAs) or aluminum gallium arsenide (AlGaAs) for each layer of a normal thyristor having a PNPN structure, and has a switching function of the normal thyristor. In addition, it has a light emitting function.

  FIG. 16 is a cross-sectional view showing the basic structure of a conventional light emitting thyristor 114. In FIG. 16, the substrate 101 is an N-type semiconductor substrate such as gallium arsenide (GaAs), and the semiconductor layers 102, 103, 104, and 107 made of GaAs or aluminum gallium arsenide (AlGaAs) are NPNP conductivity type. Are stacked in this order. In FIG. 16, the first semiconductor layer 102 is N-type, the second semiconductor layer 103 is P-type, the third semiconductor layer 104 is N-type, and the fourth semiconductor layer 107 is P-type. By making the substrate have the same conductivity type as the first semiconductor layer, a back electrode 111 can be provided on the back surface of the substrate, and this back electrode 111 is used as a cathode electrode. The anode electrode becomes the surface electrode 110. Further, a gate electrode 112 for inputting a switching signal is provided on the surface (the side away from the substrate) of the third semiconductor layer 104.

  When the substrate 101 is a P-type semiconductor, the semiconductor layers 102, 103, 104, and 107 are stacked in the order of PNPN. In this case, the front electrode 110 becomes a cathode electrode, and the back electrode 111 becomes an anode electrode. The operation of the thyristor is the same regardless of which conductivity type is used.

FIG. 17 shows current-voltage characteristics when a forward current is applied from the front surface electrode (anode electrode) 110 to the back surface electrode (cathode electrode) 111 of the light-emitting thyristor 114. The current-voltage characteristic shows a negative resistance characteristic similar to that of a general thyristor. The threshold voltage V _BO shown in FIG. 17 can be lowered by voltage or current applied to the gate electrode 112 or by irradiating the semiconductor layers 102, 103, 104, and 107 with light. In FIG. 16, the change due to the light irradiation is shown in FIG. 16 in which the NPN layer formed by the first semiconductor layer (N-type) 102, the second semiconductor layer (P-type) 103, and the third semiconductor layer (N-type) 104 serves as a phototransistor as a light receiving element. By functioning.

The switching function of the light-emitting thyristor utilizes this decrease in the threshold voltage V _BO , and the off-state b point where the characteristic curve representing the current-voltage characteristic and the load line 72 intersect, and the characteristic curve and the load line 72 The intersecting point a in the on state is changed.

  The light emitting function of the light emitting thyristor utilizes recombination of carriers injected from the PN junction in the on state. In FIG. 16, when the light-emitting thyristor 114 is in the ON state, the PN junction J1 including the first semiconductor layer (N-type) 102 and the second semiconductor layer (P-type) 103, the third semiconductor layer (N-type) 104, and the first As a result of forward current flowing through the PN junction J3 composed of the four semiconductor layers (P-type) 107, light is emitted in the vicinity of the junctions J1 and J3.

It has been reported that a light emitting device used as an optical printer head such as an electrophotographic printer can be realized by using the switching function and the light emitting function of the light emitting thyristor (see, for example, Patent Documents 2 and 3). Conventionally, as this type of light emitting device, a light emitting diode (Light
An LED array formed by arranging a large number of Emitted Diodes (abbreviated as LEDs) has been known, but since it is necessary to individually connect the LED and the drive circuit, a large number of bonding pads are required, and high integration is difficult. There was a problem that. The light-emitting thyristor has advantages such that a light-emitting element array can be made more compact than an LED array, and mounting on a substrate is simple.

  The light-emitting devices using the light-emitting thyristors proposed so far can be broadly classified into a type that realizes the transfer of the light-emitting state by utilizing a decrease in the threshold voltage due to light excitation, and an electric voltage or current applied to the gate electrode. There are two types that can realize the transfer of the light emission state. The light emitting device 1 of the first conventional technique illustrated in FIG. 18 uses the former method based on light excitation, and the light emitting device 2 of the second conventional technique illustrated in FIG. 19 uses the latter method based on electric control. (Refer to FIG. 8 of Patent Document 1 and Patent Document 2 and the related description for the light emitting device 1 of the first prior art. The light emitting device 2 of the second prior art is patented.) See reference 3.)

  In the light emitting device 1 of the first prior art whose schematic circuit configuration is shown in FIG. 18, a plurality of light emitting thyristors that are emitted from the light emitting thyristors in the on state are incident on other light emitting thyristors adjacent in the arrangement direction. , Tn of light emitting thyristors T0, T1,. A self-scanning function that sequentially transfers the light emission state is realized by applying scanning signals φ1, φ2, and φ3 in accordance with the timing when the threshold voltage of the light emitting thyristor is lowered by receiving light from adjacent light emitting thyristors. The In order to expose the photosensitive member, the light emission signal φE is set to a high level in accordance with the timing at which the light emitting thyristor emits light, thereby increasing the amount of current applied to the light emitting thyristor and increasing the light emission intensity. Therefore, a certain amount of light emission (bias light) is generated from the light-emitting thyristor that is in the on state in order to transfer the switching signal even during exposure.

On the other hand, in the light emitting device 2 of the second prior art whose schematic circuit configuration is shown in FIG. 19, the switch thyristor T for transferring the switching signal is separated and electrically controlled. . In order to electrically realize on-state transfer by the switch thyristor T, a transfer direction designating diode D, a load resistor _RL for controlling the voltage applied to the gate electrode, and the like are required. In FIG. 19, in order to cause the light emission thyristor L to emit light, the light emission signal φE is set to the high level in accordance with the timing when the switch thyristor T is turned on. Since the corresponding gate electrodes of the switch thyristor T and the light emitting thyristor L are connected to each other, the light emitting thyristor shifts to the on state and emits light.

  For the purpose of application to these light emitting devices, attempts have been proposed to improve the performance of the light emitting thyristor by optimizing the band gap and impurity concentration of each layer of the light emitting thyristor (see, for example, Patent Documents 4 and 5).

  Patent Document 4 proposes a light-emitting thyristor structure in which an N-type AlGaAs layer, a P-type GaAs layer, an N-type GaAs layer, and a P-type AlGaAs layer are stacked in this order on an N-type GaAs substrate. In order to confine carriers in the P-type GaAs layer and the N-type GaAs layer, which are active layers, a structure in which the active layer is sandwiched between AlGaAs layers having a large bandwidth is expected to improve the light emission efficiency (Patent Literature). 4 (see page 6, column 6).

  Patent Document 5 proposes an attempt to optimize both the impurity concentration and the band gap. According to Patent Document 5, an electric field is generated and implanted by providing a gradient in the impurity concentration of the gate layer of the light-emitting thyristor (corresponding to the second semiconductor layer 103 and the third semiconductor layer 104 in FIG. 16). The generated minority carriers are pushed out by an electric field, and as a result, the minority carrier residence time inside the gate layer is shortened, and the switching time is expected to be shortened. The above-described internal electric field can also be formed by providing a gradient in the band gap of the semiconductor layer constituting the gate layer. Further, according to Patent Document 5, in order to increase the light extraction efficiency to the outside of the light emitting thyristor, the gate layer of the light emitting thyristor is divided into a gate layer that emits light and another gate layer, and the gate layer that emits light is divided. The structure is such that the band gap of the other gate layer is larger than the band gap. As a result, the thickness of the light emitting gate layer can be reduced, the absorption at the light emitting place itself is reduced, and the gate layer that does not emit light has a wide band gap so that it does not absorb light, and the light to the outside can be absorbed. It is expected that the extraction efficiency can be increased (see paragraphs [0045] [0047] [0049] in Patent Document 5).

JP 49-124992 A Japanese Patent No. 2577034 Japanese Patent No. 3020177 Japanese Patent No. 2577089 JP-A-8-153890

  When the light-emitting thyristor is applied to a light-emitting device such as an optical printer head, the required performance of the light-emitting thyristor is that the light-emitting thyristor is excellent in light emission efficiency as a light-emitting thyristor for exposure. Since the luminous efficiency is expressed by the product of the internal quantum efficiency and the light extraction efficiency, it is necessary to increase both of them. Second, it is necessary to improve the performance as a switching element required as a thyristor for a switch. In the case of the method by light excitation as in the light emitting device 1 of the first conventional technique, it is necessary that the light receiving sensitivity is excellent, and the method by electric control as in the light emitting device 2 of the second conventional technique. In this case, it is necessary that the switching speed is high, particularly that the gate turn-on time is shortened. Usually, in the manufacturing process of the light emitting device, the light emitting thyristor and the switch thyristor are simultaneously formed on the substrate, so that both thyristors are formed by the same semiconductor layer configuration. Therefore, the required performance of the light-emitting thyristor requires both the improvement of the light emission efficiency and the improvement of the light receiving sensitivity, or the improvement of the light emission efficiency and the improvement of the switching speed. However, the conventional light-emitting thyristor does not sufficiently satisfy this requirement.

  For example, in the light emitting thyristor described in Patent Document 5, since the band gap of the gate layer on the substrate side (corresponding to the second semiconductor layer 103 in FIG. 16) is small, this portion is assumed as the main light emitting place. (See FIG. 9 and FIG. 11 of Patent Document 5 and description related thereto). In this case, since electrons are injected from the cathode on the substrate side, light emission due to recombination of holes and electrons causes a portion of the gate layer closer to the substrate (in the vicinity of the junction J1 in the second semiconductor layer 103 in FIG. 16). Is the strongest. Then, by the time the light is extracted to the outside, a band gap is formed in most of the P-type gate layer (second semiconductor layer 103 in FIG. 16) and the N-type gate layer (third semiconductor layer 104 in FIG. 16). If the re-absorption of light in those layers is taken into consideration, the extraction efficiency to the outside cannot be said to be high. The reason why the band gap is configured in this way in Patent Document 5 is that, in Patent Document 5, the application of the second conventional technique to the light-emitting device 2 is aimed at. This is thought to be due to the priority given to the improvement of the switching speed required for the thyristor.

  Therefore, an object of the present invention is to increase the light emission intensity to the outside without reducing the light receiving sensitivity so that it can be used for both the light emitting thyristor of the light emitting device and the switch thyristor utilizing optical excitation. It is to provide a light emitting thyristor.

  Another object of the present invention is to provide a light emitting device that can simplify the overall structure and is excellent in reliability by using this light emitting thyristor.

  Still another object of the present invention is to provide an image forming apparatus using the light emitting device of the present invention to obtain a recorded image with good image quality.

The light-emitting thyristor according to the present invention has the same conductivity as the first semiconductor layer, the first semiconductor layer of the N type or P type conductivity type, the second semiconductor layer of the opposite conductivity type to the first semiconductor layer, and the first semiconductor layer. In the light emitting thyristor in which the third semiconductor layer of the type and the fourth semiconductor layer of the conductivity type opposite to the first semiconductor layer are stacked in this order,
The band gap of the third semiconductor layer is substantially the same as the band gap of the second semiconductor layer, and is narrower than the band gaps of the first and fourth semiconductor layers,
The third semiconductor layer includes a first region on the substrate side and a second region on the opposite side of the substrate, and the impurity concentration of the first region is lower than the impurity concentration of the second region. Yes,
The impurity concentration of the second semiconductor layer is substantially the same as or higher than the impurity concentration of the first region of the third semiconductor layer, and lower than the impurity concentration of the first semiconductor;
The impurity concentration of the fourth semiconductor layer is substantially the same as or higher than the impurity concentration of the second region of the third semiconductor layer.

  According to the light-emitting thyristor of the present invention, a fifth semiconductor layer having the same conductivity type as the fourth semiconductor layer is stacked on the opposite side of the fourth semiconductor layer from the substrate in the first light-emitting thyristor. The band gap of the fifth semiconductor layer is substantially the same as or wider than the band gap of the fourth semiconductor layer, and the impurity concentration of the fifth semiconductor layer is substantially the same as or higher than the impurity concentration of the fourth semiconductor layer. It is characterized by high concentration.

According to the light emitting device of the present invention,
(A) a light emission signal transmission path for transmitting a light emission signal;
(B) A light-emitting element array in which a plurality of light-emitting elements connected to the light-emitting signal transmission path are arranged with a space therebetween,
(B1) The light emitting element includes the light emitting thyristor,
(B2) When the light emitting thyristor constituting the light emitting element is applied with the light emission signal between the anode electrode and the cathode electrode in a state where the threshold voltage is lowered by applying a trigger signal to the gate electrode, the light emission A light emitting element array that emits light from a thyristor;
(C) a plurality of scanning signal transmission paths for transmitting scanning signals;
(D) A switch element array in which a plurality of switch elements connected to the scanning signal transmission path are arranged one-dimensionally with a space between each other,
(D1) The connection between the plurality of switch elements and the scanning signal transmission path is such that the scanning signals are given at different timings in the switch elements adjacent in the arrangement direction,
(D2) The switch element includes the light emitting thyristor,
(D3) The light-emitting thyristor constituting the switch element is disposed so as to receive the light emission of the light-emitting thyristor adjacent in the arrangement direction,
(D4) The scanning signal is applied between the anode electrode and the cathode electrode in a state where the threshold voltage is lowered by the light emitting thyristor constituting the switch element receiving the light emission of the light emitting thyristor adjacent in the arrangement direction. A switch element array for causing the light emitting thyristor to emit light and generating a trigger signal at the gate electrode;
(E) including a connection means for electrically connecting a gate electrode of the light emitting thyristor constituting the switch element and a gate electrode of the light emitting thyristor constituting the light emitting element.

  According to the light emitting device of the present invention, the light emitting device includes a light shielding means for shielding the light emitted from the switch element so that the light emitted from the light emitting element is not interfered with by the light emitted from the switch element.

According to the image forming apparatus of the present invention, the light emitting device;
Driving means for driving the light emitting device based on image information;
Condensing means for condensing light from the light emitting element of the light emitting device on the photosensitive drum;
Developer supplying means for supplying the developer to the exposed photosensitive drum by which light from the light emitting device is condensed on the photosensitive drum by the condensing means;
Transfer means for transferring an image formed by a developer on the photosensitive drum to a recording sheet;
And fixing means for fixing the developer transferred to the recording sheet.

  According to the light emitting thyristor of the present invention, since the band gap of the fourth semiconductor layer (P-type) is larger than the band gap of the third semiconductor layer (N-type), a potential barrier is formed at the interface between the two semiconductor layers, The electrons injected from the first semiconductor layer can be confined, and the electron density in the third semiconductor layer (N-type) can be increased. Further, since the third semiconductor layer (N-type) is divided into two layers of the first region and the second region, the impurity concentration of the second region on the fourth semiconductor layer (P-type) side is increased, so that the second region The electron density in the thermal equilibrium state at 1 is increased. Further, the density of holes injected from the fourth semiconductor layer into the second region is increased by making the impurity concentration of the fourth semiconductor layer (P-type) substantially the same as or higher than the impurity concentration of the second region. be able to. With the above settings, holes and electrons can be efficiently recombined in the second region to emit light, and the internal quantum efficiency can be increased.

  In addition, the band gap of the fourth semiconductor layer (P-type), which is the light extraction direction, is wider than the band gap of the second region, which is the main light emitting layer, and thus does not serve as an absorption layer for the emitted light. Since the main light-emitting layer is the second region close to the light extraction direction, absorption by the main light-emitting layer itself is not a problem, and according to the present invention, a light-emitting thyristor excellent in light extraction efficiency is provided. be able to.

  Furthermore, the band gap of the first semiconductor layer (N type) is made wider than the band gap of the second semiconductor layer (P type), and the impurity concentration of the first semiconductor layer (N type) is changed to the second semiconductor layer (P type). The emitter injection efficiency of the NPN phototransistor composed of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer can be increased. As a result, it is possible to provide a light emitting thyristor with high light receiving sensitivity.

  Further, according to the light emitting thyristor of the present invention, the fifth semiconductor layer (P type) having a high impurity concentration is interposed between the ultrathin ohmic contact layer and the fourth semiconductor layer (P type), so that the anode electrode Good ohmic contact can be obtained between the two. The band gap of the fifth semiconductor layer (P type) is substantially the same as or wider than the band gap of the fourth semiconductor layer (P type), so that it does not become an absorption layer for light emitted inside, and the light extraction efficiency is reduced. I will not let you.

  According to the light emitting device of the present invention, when the light emitting thyristor constituting one switch element emits light among the plurality of switch elements of the switch element array, the light of the emitted switch elements is mutually spaced in the arrangement direction. Is received by the adjacent switch element. The light-emitting thyristor constituting the received switch element has a threshold voltage lower than the voltage of the scan signal, and provides a scan signal transmitted by the scan signal transmission line connected to the switch element having the lowered threshold voltage. Light is emitted. Since the scanning signals transmitted by the plurality of scanning signal transmission paths are given at different timings for each switching element adjacent in the arrangement direction, the scanning signal can be given to the switching elements whose threshold voltage has decreased due to light reception. Thus, the switch elements can be made to emit light sequentially in the arrangement direction.

  When the switch element receives light, a trigger signal is generated at the gate electrode of the light emitting thyristor constituting the switch element, and this trigger signal is applied to the gate electrode of the light emitting thyristor constituting the corresponding light emitting element through the connecting means. The threshold voltage of the light emitting thyristor constituting the light emitting element is lowered when a trigger signal is applied to the gate electrode. Each light emitting element can selectively emit light by giving a light emission signal transmitted through the light emission signal transmission path in a state where the threshold voltage of the light emitting thyristor constituting the light emitting element is lower than the voltage of the light emission signal. it can.

  The light emitting thyristor constituting each switch element receives a light emitted from an adjacent switch element, and its threshold voltage is lowered by photoexcitation. Therefore, unlike a method using electric control, a diode for specifying a transfer direction at a gate electrode. In addition, it is not necessary to connect a load resistor connected between the power source and the power source. Therefore, only a predetermined light emitting element among a plurality of light emitting elements arranged can be selectively caused to emit light with as few signal transmission paths as possible without complicating the structure of the device. Further, since the structure of the device is simplified as compared with the light emitting device of the second prior art, the manufacturing process can be reduced and the productivity of the device can be improved.

  Also, according to the light emitting device of the present invention, the photoconductor is exposed to the light emitted from the switch element by blocking the light emitted sequentially by the switch thyristors constituting each switch element by the light blocking means. So that there is no. As a result, the photosensitive member is exposed only to light emitted from the light emitting element, and when applied to an optical printer head, a light emitting device with a stable exposure amount and excellent image quality can be provided.

  According to the image forming apparatus of the present invention, the light emitting device is driven by the driving unit based on the image information, and the light from the light emitting device is condensed on the charged photosensitive drum by the light collecting unit. The body drum is exposed to form an electrostatic latent image on its surface. When the developer is supplied to the photosensitive drum on which the electrostatic latent image is formed by the developer supplying means, the developer adheres to the photosensitive drum and an image is formed. An image formed with the developer on the photosensitive drum is transferred to the recording sheet by the transfer unit, and the developer transferred to the recording sheet is fixed by the fixing unit, whereby an image is formed on the recording sheet.

  The switch elements emit light in order along the scanning direction, but the switch elements and the light emitting elements are separated from each other, and the photosensitive drum is exposed by light emission of the light emitting elements, and the photosensitive drum is exposed by light emission of the switch elements. Therefore, a recorded image with excellent quality can be obtained.

  In addition, the light-emitting element for exposing the photosensitive drum and the switch element for signal transfer can be integrated so that the circuit board for mounting the light-emitting device can be downsized. In addition, since the number of wire bondings with the circuit board and the number of drive ICs to be mounted on the circuit board can be reduced, downsizing and cost reduction can be realized.

  Embodiments of a light-emitting thyristor of the present invention and a light-emitting device and an image forming apparatus of the present invention using the same will be described below with reference to the drawings.

  FIG. 1 shows a sectional view of the light-emitting thyristor 115 according to the first embodiment of the present invention, and the impurity concentration and band gap of each layer constituting the light-emitting thyristor 115. Note that the impurity concentration and band gap values in FIG. 1 show a desirable example, and the effects of the present invention are not limited to these values.

First, the structure of the light emitting thyristor 115 shown in FIG. 1 will be described.
A light-emitting thyristor 115 shown in FIG. 1 includes an N-type first semiconductor layer 102, a P-type second semiconductor layer 103, an N-type third semiconductor layer 104, and a P-type fourth semiconductor on an N-type semiconductor substrate 101. By laminating the layers 107 in this order, an NPNP thyristor structure is formed. Here, the third semiconductor layer 104 includes two layers of a first region 105 on the substrate side and a second region 106 on the opposite side of the substrate, and each of these layers is formed of an N-type semiconductor. Further, a P-type semiconductor ohmic contact layer 109 for making good ohmic contact with the surface electrode 110 is formed on the surface of the P-type fourth semiconductor layer 107 opposite to the substrate (the side away from the substrate). . The surface electrode 110 is formed on the surface of the ohmic contact layer 109 opposite to the substrate. The back electrode 111 is formed on the back surface of the substrate 101. In this case, the front electrode 110 is used as an anode electrode, and the back electrode 111 is used as a cathode electrode. A gate electrode 112 is provided on the surface of the third semiconductor layer 104 on the opposite side of the substrate of the second region 106.

  In this embodiment, the case where the substrate 101 is formed using an N-type semiconductor is illustrated. On the contrary, a P-type semiconductor substrate is used as the substrate 101, the first semiconductor layer 102 is P-type, the second semiconductor layer 103 is N-type, the third semiconductor layer 104 is P-type, and the fourth semiconductor is used as the semiconductor layer. It is also possible to form a PNPN thyristor structure with an N-type layer. In this case, an N-type semiconductor is used for the ohmic contact layer, and the back electrode 111 serves as an anode electrode and the front electrode 110 serves as a cathode electrode. However, it is preferable to form the substrate from an N-type semiconductor. This is because when the light emitting thyristors are integrated, the back electrode (cathode electrode) 111 on the back surface of the substrate can be connected to a common ground, and a positive power source can be connected to the front electrode (anode electrode) 110. Note that the effect of the present embodiment is not changed regardless of the order of conductivity types. In the case where the substrate is a P-type semiconductor substrate, the following explanation is valid as long as holes and electrons are exchanged.

  Further, an insulating substrate, a semi-insulating substrate, or the like can be used for the substrate 101. In this case, the second semiconductor layer 103, the third semiconductor layer 104, the fourth semiconductor layer 107, and the ohmic contact layer 109 are partially etched to expose the surface of the first semiconductor layer 102 (the side away from the substrate). Then, a cathode electrode corresponding to the back electrode 111 is formed on the exposed surface of the first semiconductor layer 102.

  Each of the semiconductor layers 102, 103, 104, and 107 and the ohmic contact layer 109 are formed by an epitaxial growth method such as a metal organic vapor phase epitaxy (MOVPE) or a molecular beam epitaxy (MBE). The reason why the epitaxial growth is necessary is that it cannot function as a phototransistor as a light emitting element and a light receiving element if it contains a large amount of lattice defects. Therefore, materials for the substrate 101, the semiconductor layers 102, 103, 104, and 107 and the ohmic contact layer 109 are selected from the viewpoint of lattice matching.

  As the material of the substrate 101, thin films of III / V semiconductors and II / VI semiconductors can be epitaxially grown. For example, gallium arsenide (GaAs), indium phosphide (InP), gallium phosphide (GaP), silicon (Si ) And germanium (Ge). When an insulating substrate or a semi-insulating substrate is used as the substrate 101, for example, GaAs, gallium nitride (GaN), sapphire, or the like is used. Note that in order to improve the crystallinity of each of the semiconductor layers 102, 103, 104, and 107, a buffer layer having the same conductivity type as that of the first semiconductor layer 102 may be provided between the substrate 101 and the first semiconductor layer 102. is there.

  As the material of each semiconductor layer 102, 103, 104, 107, gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), indium gallium phosphide (InGaP), aluminum gallium indium phosphide (AlGaInP), or the like is used. Note that the emission wavelength when a light-emitting thyristor is manufactured using these materials is 600 to 800 nm.

The ohmic contact layer 109 is made of a material that does not contain aluminum, such as GaAs or InGaP. This is because when aluminum is included, the surface is easily oxidized in the atmosphere, and it is difficult to make a good ohmic contact with the surface electrode 110. In addition, it is necessary for the ohmic contact layer 109 to have an impurity concentration of 3 × 10 ¹⁹ (cm ⁻³ ) or more in order to achieve good ohmic contact. The thickness of the ohmic contact layer 109 is preferably as thin as 0.01 to 0.02 μm. This is because the band gap value of GaAs and InGaP is smaller than that of a material containing aluminum, so that if the film thickness is large, it becomes a reabsorption layer for light generated inside.

  As the material of each of the electrodes 110, 111, and 112, a material suitable for maintaining good ohmic contact with the semiconductor layer or the substrate 101 that is in contact is used. For example, gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), or the like is used for the surface electrode 110 in order to make good ohmic contact with the ohmic contact layer 109. . For example, Au, AuGe, nickel (Ni), or the like is used for the gate electrode 112 in order to make a good ohmic contact with the second region 106 of the third semiconductor layer 104. The back electrode 112 is made of, for example, Au, AuGe, or Ni from the viewpoint that a good ohmic contact can be obtained with the semiconductor substrate 101 or when the substrate 101 is made of a nonconductive material. Used.

  Next, optimization of the band gap and impurity concentration of each of the semiconductor layers 102, 103, 104, and 107 of the light-emitting thyristor 115, which is a feature of the present embodiment, will be described. The impurity concentration and the band gap in each semiconductor layer are determined so as to be optimal in light of the object of the present invention to improve the light emission intensity to the outside without reducing the light receiving sensitivity.

  As specific dopants, silicon, tellurium, or the like can be used for the N-type semiconductor in this embodiment, and zinc, carbon, magnesium, or the like can be used as the dopant for the P-type semiconductor. Silicon and zinc are used for the actual device fabrication.

The band gap value is controlled by controlling the type and composition of the semiconductor material constituting each of the semiconductor layers 102, 103, 104, and 107. Aluminum gallium arsenide (Al _x Ga _1-x As) can change the band gap according to the Al composition ratio x while maintaining the lattice matching condition. Even when aluminum gallium indium phosphide ((Al _y Ga _1-y ) _0.5 In _0.5 P) is used, the band gap is changed in a lattice-matched state with GaAs by changing the Al composition ratio y. be able to.

  Moreover, the impurity concentration of the semiconductor layer being substantially the same means that the difference in impurity concentration is within 20% when the above-described materials are used. In addition, the band gaps being substantially the same means that the band gap difference is within 5% when the above-described materials are used. This is because, even if the design values are the same, when a light-emitting thyristor is actually manufactured, it may differ depending on the controllability of the device and the manufacturing conditions. In particular, for impurity doping, diffusion may occur in the film, and re-evaporation of the dopant may depend on the substrate temperature, and reproducibility is difficult to obtain. Therefore, when the above-described materials are used, if the impurity concentration is within 20% and the band gap is within 5%, there is no substantial difference.

  As shown in FIG. 1, the feature of the present embodiment is that the band gaps of the second semiconductor layer (P type) 103 and the third semiconductor layer (N type) 104 are substantially the same. In other words, the first semiconductor layer (N-type) 102 and the fourth semiconductor layer (P-type) 107 having a wider band gap than the first semiconductor layer are used. With respect to the impurity concentration in the thermal equilibrium state, the third semiconductor layer (N-type) 103 is arranged such that the first region 105 on the substrate side (side in contact with the second semiconductor layer 102) and the opposite side of the substrate (side in contact with the fourth semiconductor layer 107). The second region 106 is divided into two layers so that the impurity concentration of the second region 106 is higher than the impurity concentration of the first region 105. Further, the impurity concentration of the second semiconductor layer (P-type) 103 is set to be substantially the same as or higher than the impurity concentration of the first region 102, and the first semiconductor layer (N-type) 102 includes the second semiconductor layer (P-type). The density is higher than that of mold 103. Further, the impurity concentration of the fourth semiconductor layer (P type) 107 is characterized by being set to be substantially the same as or higher than the impurity concentration of the second region 106 of the third semiconductor layer (N type) 104. .

  Table 1 shows the impurity concentration, band gap, and film thickness values of the semiconductor layers 102, 103, 104 (105, 106), 107 and the ohmic contact layer 109 in the present embodiment. Note that this value is an example of a preferable value, and the same effect as this embodiment can be obtained if the above-described relationship is satisfied with respect to the band gap and impurity concentration of each semiconductor layer.

  The first reason for setting the band gap and the impurity concentration of each of the semiconductor layers 102, 103, 104, and 107 is that the main light emitting layer is placed in the second region 106 in the third semiconductor layer (N-type) 104. This is because both the internal quantum efficiency and the light extraction efficiency can be improved.

  In order to increase the internal quantum efficiency, it is necessary to recombine the injected carriers effectively. Since an N-type semiconductor substrate is used as the substrate 101, holes are injected from the fourth semiconductor layer (P-type) 107 side through the junction J3 in the light-emitting thyristor 101. In this case, in order to effectively recombine the injected holes with the electrons, it is effective to increase the electron density in the second region 106 near the junction J3. Therefore, in the second region 106, settings were made to increase both the electron density in the thermal equilibrium state and the electron density increased by injection.

  In order to increase the electron density by injection from the junction, as shown in FIG. 1, the second semiconductor layer (P type) 103, the first region 105 in the third semiconductor layer (N type) 104, and the third semiconductor layer The band gaps of the respective layers of the second region 106 in the (N-type) 104 are made substantially the same, and the band gap of the fourth semiconductor layer 107 is made larger than those band gaps. Since the band gap of the fourth semiconductor layer (P-type) 107 is larger than the band gap of the second region (N-type) 106, the fourth gap is equal to the difference between the band gaps as compared with the case where the band gaps of both are equal. The lower end of the conduction band in the semiconductor layer (P-type) 107 rises and forms a potential barrier against electrons. Electrons injected from the first semiconductor layer (N-type) 102 through the junction J1 are bounced back by this potential barrier in the junction J3, so that the electron density in the second region (N-type) 106 in the vicinity of the junction J3. The effect which increases is obtained.

  In order to increase the electron density in the thermal equilibrium state, the third semiconductor layer (N-type) 104 is divided into two layers, and the impurity concentration of the first region 105 on the substrate side is set low, while the second region close to the junction J3. The impurity concentration of the two regions 106 was increased. Setting the impurity concentration of the first region 105 to be low is necessary to ensure a breakdown voltage between the gate electrode 112 and the back electrode (cathode electrode) 111. The impurity concentration of the first region 105 is the lowest in all layers.

  In order to confirm by experiments that increasing the carrier density in the thermal equilibrium state of the second region 106 is effective for increasing the emission intensity, several samples with different impurity concentrations in the second region 106 were prepared. The emission intensity was compared.

  FIG. 2 is a graph showing the light emission intensity of a plurality of light-emitting thyristors 115 produced by changing the impurity concentration of the second region 106. The light emission intensity was measured by setting the gate electrode 112 of the light emitting thyristor 115 to a low level and switching the light emitting thyristor 115 to the on state, and then setting the operating voltage to 5V. In FIG. 2, the vertical axis represents the measured emission intensity in arbitrary units, and the horizontal axis represents the impurity concentration in the second region 106. As is apparent from FIG. 2, the emission intensity is increased by about five times by increasing the impurity concentration (carrier density in the thermal equilibrium state) in the second region 106 by one digit. The effect has been demonstrated.

  In order to further increase the internal light emission efficiency, the impurity concentration of the fourth semiconductor layer (P-type) 107 may be set substantially the same as or higher than that of the second region. This is for increasing the density of holes injected into the second region 106 which is the main light emitting layer.

  On the other hand, in terms of light extraction efficiency, the band gap of each semiconductor layer in the light extraction direction may be increased so that emitted light is not reabsorbed. Normally, when the light-emitting thyristor is used as a light-emitting element, the light extraction direction is the ohmic contact layer 109 side (side away from the substrate) in FIG. Therefore, light emitted from the second region 106 passes through the fourth semiconductor layer (P-type) 107 and the ohmic contact layer 109 and is extracted to the outside, but the band of the fourth semiconductor layer (P-type) 107 is extracted. Since the gap is larger than the band gap of the second region 106 which is a main light emitting layer, the fourth semiconductor layer (P-type) 107 does not absorb light. Further, the thickness of the ohmic contact layer 109 is selected from 0.01 μm to 0.02 μm, and is so thin that the absorption of light emission in this layer is negligible.

  Further, in the present embodiment, by selecting the impurity concentration and the band gap of each of the semiconductor layers 102, 103, 104, and 107 as described above, the film thickness of the second region that is the main light emitting layer is 0.5 μm to 1 μm. It can be set relatively thick as 0.0 μm. In the present embodiment, holes injected through the junction J3 from the fourth semiconductor layer (P-type) 107 side mainly recombine with electrons in the second region 106 to emit light. Among the second regions 106, it is considered that the strongest light emission occurs in the vicinity of the junction J3 having the highest injected hole density. The emitted light is transmitted from the junction J3 side to the fourth semiconductor layer (P-type) 107 side. Since it is taken out through, absorption in the second region itself does not matter. Therefore, when the thickness of the main light emitting layer is made sufficient and the volume of the light emitting place is increased, the light emission intensity as a whole can be increased.

  As is clear from the above, setting the impurity concentration and the band gap so that the second region 106 on the opposite side of the substrate in the third semiconductor layer 104 becomes the main light emitting layer is also effective from the viewpoint of internal quantum efficiency. It is the best also from the point of taking out efficiency. Note that increasing the impurity concentration of the second region 106 has a secondary effect of reducing the contact resistance with the gate electrode 112.

  Next, it will be described that it is optimal from the viewpoint of increasing the light receiving sensitivity of the light emitting thyristor if the relationship shown in the present embodiment is satisfied with respect to the impurity concentration and the band gap of each of the semiconductor layers 102, 103, 104, and 107.

  The threshold voltage change due to light irradiation of the light emitting thyristor 115 is shown in FIG. 1 by the NPN layer formed by the first semiconductor layer (N-type) 102, the second semiconductor layer (P-type) 103, and the third semiconductor layer (N-type) 104. However, it can be described as functioning as a phototransistor as a light receiving element. In this case, the first semiconductor layer (N type) 102 corresponds to the emitter, the second semiconductor layer (P type) 103 corresponds to the base, and the third semiconductor layer (N type) 104 corresponds to the collector. Therefore, it can be seen that in order to increase the light receiving sensitivity of the light emitting thyristor 115, the emitter injection efficiency of the NPN transistor should be set to be increased.

  In order to increase the emitter injection efficiency, first, the heterojunction in which the band gap of the first semiconductor layer (N type) 102 corresponding to the emitter is larger than the band gap of the second semiconductor layer (P type) 103 corresponding to the base. I have to. Second, the impurity concentration of the first semiconductor layer (N-type) 102 corresponding to the emitter is set higher than the impurity concentration of the second semiconductor layer (P-type) 103 corresponding to the base. Third, the thickness of the second semiconductor layer (P-type) 103 corresponding to the base is reduced. The thickness of the second semiconductor layer (P-type) 103 is desirably about 0.01 μm to 0.5 μm. The settings of the impurity concentration and the band gap in the first semiconductor layer (N-type) 102 and the second semiconductor layer performed to increase the light receiving sensitivity are compatible with the settings performed in order to improve the light emission efficiency. ing.

  As described above, according to the light-emitting thyristor of the embodiment of the present invention, it is possible to provide a light-emitting thyristor excellent in both light emission efficiency and light receiving sensitivity.

  FIG. 3 shows a cross-sectional view of the light-emitting thyristor 116 according to the second embodiment of the present invention, and the impurity concentration and band gap of each layer. Note that the impurity concentration and band gap values in FIG. 3 show a desirable example, and the effects of the present invention are not limited to these values. The following description will be made on the case where the substrate is a general N-type semiconductor substrate. As described in the first embodiment, the effect is the same even if the conductivity types of the substrate 101, the semiconductor layers 102, 103, 104, 107, 108, and the ohmic contact layer 109 are reversed.

  The difference between the thyristor 116 of the present embodiment shown in FIG. 3 and the light-emitting thyristor 115 of the first embodiment shown in FIG. 1 is the difference between the fourth semiconductor layer (P-type) 107 and the ohmic contact layer 109. In addition, a fifth semiconductor layer (P type) 108 having the same conductivity type as the fourth semiconductor layer (P type) 107 is laminated. In FIG. 3, the part of the NPNP structure peculiar to the thyristor includes a first semiconductor layer (N-type) 102, a second semiconductor layer (P-type) 103, a third semiconductor layer (N-type) 104, and a fourth semiconductor layer (P This part is common to the first embodiment. The band gap of the fifth semiconductor layer (P type) 108 is set to be substantially the same as or wider than the band gap of the fourth semiconductor layer (P type) 107, and the impurity concentration of the fifth semiconductor layer (P type) 108 is set. Is set to be substantially the same as or higher than the impurity concentration of the fourth semiconductor layer (P-type) 106. For each of the semiconductor layers 102, 103, 104, 107 and the ohmic contact layer 109 other than the fifth semiconductor layer (P-type) 108, the values of the band gap, impurity concentration, and film thickness of those layers are shown in FIG. It is set similarly to the first embodiment. In the following description, parts other than the fifth semiconductor layer (P-type) 108 shown in FIG. 3 are the same as those in the embodiment shown in FIG. The description is omitted to avoid duplication.

In the present embodiment, the specific value of the band gap of the fifth semiconductor layer (P-type) 108 is substantially the same as that of the fourth semiconductor layer (P-type) 107, and is about 1.75 eV to 1.88 eV. Was used. The value of the impurity concentration of the fifth semiconductor layer (P type) 108 was set to 1 × 10 ^{19 to} 3 × 10 ¹⁹ larger than that of the fourth semiconductor layer (P type). The thickness of the fifth semiconductor layer 108 is set to 0.1 to 0.5 μm. Since the material, formation method, and dopant material of the fifth semiconductor layer (P-type) 108 are the same as those of the other semiconductor layers 102, 103, 104, and 107 described in the first embodiment, description thereof is omitted.

  The feature of this embodiment is that an ohmic contact with the surface electrode (anode electrode) 110 can be easily made by providing the fifth semiconductor layer (P-type). As described in the first embodiment, the ohmic contact layer is usually formed by doping a high-concentration impurity using a material such as GaAs or InGaP that does not contain aluminum. Since GaAs and InGaP have a small band gap, it is necessary to form the ohmic contact layer as extremely thin as 0.01 μm to 0.02 μm so as not to be an absorption layer for emitted light. However, if the ohmic contact layer is thinned, good ohmic contact with the surface electrode (anode electrode) 110 may not be obtained, so that there is a problem between the fourth semiconductor layer (P-type) 107 and the ohmic contact layer 109. A fifth semiconductor layer (P-type) 108 having a relatively large film thickness is provided. The impurity concentration of the fifth semiconductor layer (P-type) 108 is substantially the same as or higher than the impurity concentration of the fourth semiconductor layer (P-type) 107 so that good ohmic contact can be obtained. At the same time, the band gap of the fifth semiconductor layer (P type) 108 is set to be substantially the same as or wider than the band gap of the fourth semiconductor layer (P type) 107, and the band of the third semiconductor layer (N type). By making it larger than the gap, it is prevented from becoming a reabsorption layer of light emitted inside. By doing so, a reliable ohmic contact can be obtained.

  Next, a light emitting device 10 according to an embodiment of the present invention configured using the light emitting thyristor of the present invention will be described.

  FIG. 4 is a plan view showing a basic configuration of the light-emitting device 10, and shows a plan view of the light-emitting device 10 arranged with the light emitting direction of each light-emitting element constituting the light-emitting element array as a front side perpendicular to the paper surface. Yes. In the figure, for easy illustration, the light emission signal transmission path 12, the scanning signal transmission path 15, the start signal transmission path 16, the gate electrode 19 of the light emitting element, the gate electrode 24 of the switch element, and the scanning start switch element are shown. The gate electrode 26, the connection means 14, the light-emitting element light-shielding portion 23, and the surface electrode 25 are shown by hatching. In the same figure, the horizontal direction of the paper, which is the arrangement direction of the switch element array, is defined as the X direction, the right side is the X1 direction, and the left side is the X2 direction. The direction perpendicular to the paper surface, which is the substrate vertical direction, is defined as the Z direction, and the near side is defined as the Z1 direction and the far side is defined as the Z2 direction. The vertical direction of the drawing, which is perpendicular to the X direction and the Z direction, is defined as the Y direction, the upper side is the Y1 direction, and the lower side is the Y2 direction. Further, in the drawing, the insulating layer 17 is omitted for easy illustration.

  The light emitting device 10 includes a light emitting element array 11, a light emission signal transmission path 12, a switch element array 13, a connection means 14, first to third scanning signal transmission paths 15a, 15b, and 15c, and a scan start switch element. T0, the start signal transmission path 16, the insulating layer 17, the light shielding layer 18, and the light emitting element light shielding portion 23 are configured to be integrated on one substrate 31. The light emission signal transmission path 12, the first to third scanning signal transmission paths 15a, 15b, and 15c, and the start signal transmission path 16 are wirings for transmitting signals. In the light emitting device 10, a light emitting thyristor is used for each light emitting element constituting the light emitting element array 11, each switch element constituting the switch element array 13, and the scanning start switch element T0. Although the light-emitting thyristor 116 shown in the second embodiment is used for the light-emitting thyristor of the present embodiment, the same light-emitting device 10 can be configured by using the light-emitting thyristor 115 shown in the first embodiment. be able to. Since each light emitting element, each switch element, and scanning start switch element T0 are simultaneously formed on the same substrate 31 in the manufacturing process, they have the same layer structure.

  The light emitting element array 11 includes a plurality of light emitting elements L1, L2,..., Li-1, Li (the symbol i is a positive integer of 2 or more), and each light emitting element L1, L2,. 1, Li are arranged at a distance W1 from each other. Hereinafter, when the light emitting elements L1, L2,..., Li-1, Li are collectively referred to, and when an unspecified one among the light emitting elements L1, L2,. May be described. The light emitting element L uses the light emitting thyristor 116 as a light emitting element for exposure. Note that the threshold voltage of the light-emitting thyristor included in the light-emitting element L may be simply referred to as the threshold voltage of the light-emitting element L. In addition, when the light-emitting thyristor constituting the light-emitting element L is turned on to emit light, the light-emitting element L is sometimes turned on to emit light. In the present embodiment, the light emitting elements L are arranged at regular intervals and in a straight line.

  The interval W1 between the light emitting elements L in the X direction and the length W2 in the X direction of the light emitting elements L are determined by the resolution of an image to be formed in an image forming apparatus 87 to be described later on which the light emitting device 10 is mounted. When the resolution of the image is 600 dot per inch (dpi), the interval W1 is selected to be about 24 μm (micrometer), and the length W2 is selected to be about 18 μm. The length W2 is selected so that the light-emitting element light-shielding portion 23 can be formed between the adjacent light-emitting elements L. The dimension in the X direction of the light emitting element L is selected to be smaller than the dimension in the Y direction of the light emitting element L. This prevents the light quantity of the light emitting elements L from becoming insufficient when the light emitting elements L are brought close to each other in the X direction to increase the integration density.

  The light emission signal transmission path 12 is connected to each light emitting element L, and transmits the light emission signal φE to each light emitting element L. Here, transmitting the light emission signal φE to the light emitting element L means giving the light emission signal φE between the anode electrode and the cathode electrode of the light emitting thyristor constituting the light emitting element. In the light emitting thyristor 116 shown in FIG. 3, it means that the voltage of the light emission signal φE is applied between the front surface electrode (anode electrode) 110 and the back surface electrode (cathode electrode) 111. The surface electrode (anode electrode) 110 in FIG. 3 corresponds to the element connection portion 22 in the light emission signal transmission path 12 in FIG.

  The light emission signal transmission path 12 is formed by a conductive material such as a metal material or an alloy material so as to reflect light having a wavelength emitted from the light emitting element L. Specifically, the light emission signal transmission path 12 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like. .

  The light emission signal transmission path 12 is adjacent to the light emitting element L in the Y direction and extends along the light emitting element array 11, and the signal path extending section is spaced from each other in the X direction. 21 has an element connecting portion 22 that protrudes in the Y1 direction and is connected to one end in the thickness direction of each light emitting element L.

  The switch element array 13 includes a plurality of switch elements T1, T2,..., Tj-1, Tj (the symbol j is a positive integer of 2 or more), and each switch element T1, T2,. 1 and Tj are arranged at an interval W3 so as to receive light from adjacent switch elements T1, T2,..., Tj−1, Tj. Hereinafter, when the switch elements T1, T2,..., Tj-1, Tj are collectively referred to and when an unspecified one of the switch elements T1, T2,. May be described. The switch element T uses the light emitting thyristor 116 as a switching element by optical excitation. In some cases, the threshold voltage of the light emitting thyristor constituting the switch element T is simply referred to as the threshold voltage of the switch element T. In addition, when the light-emitting thyristor constituting the switch element T is turned on to emit light, the switch element T is sometimes turned on to emit light. In the present embodiment, the switch elements T are arranged at equal intervals. Each switch element T is adjacent to the light emitting element array 11 in the Y direction, and is arranged linearly along the light emitting element array 11 so as to face the plurality of light emitting elements L. Therefore, the arrangement direction of the switch elements is the same as the X direction of the light emitting elements L. The dimension of the switch element T in the Y direction is selected to be larger than the dimension of the switch element T in the X direction. Thus, when the switch elements T are brought close to each other in the X direction to increase the integration density, it is possible to prevent the amount of light necessary to shift the adjacent light emitting thyristors for the switch elements to the ON state by light excitation. Is done.

  In the present embodiment, the numbers of light emitting elements L and switch elements T are equal, i.e., i and symbol j are selected to be equal.

  Since the interval W3 between the switch elements T in the X direction is limited in the manufacturing process, it is formed at least twice the height in the thickness direction Z of the switch element T, but is selected to be less than 20 μm, preferably 10 μm or less. Chosen. In the present embodiment, the height of the switch element T is about 4 μm, and in this case, the interval W3 is about 8 μm. When the interval W3 is 20 μm or more, it becomes difficult to transfer the light emission state by light excitation.

  The length W4 in the X direction of the switch element T is determined by the interval W1 between the light emitting elements L in the X direction, the length W2 in the X direction of the light emitting elements L, and the interval W3 between the switch elements T in the X direction. Is done. That is, the length obtained by adding the interval W1 between the light emitting elements L in the X direction and the length W2 in the X direction of the light emitting elements L, and the interval W3 between the switch elements T in the X direction and the length in the X direction of the switch elements T. The length obtained by adding W4 is selected equally.

  The connection means 14 electrically connects the gate electrode 19 of each light emitting element L and the gate electrode 24 of each switch element T corresponding to each light emitting element L. In the present embodiment, the connecting means 14 electrically connects the gate electrode 19 of the light emitting element L1 and the gate electrode 24 of the switch element T1, and connects the gate electrode 19 of the light emitting element L2 and the gate of the switch element T2. The electrode 24 is electrically connected, and thereafter, similarly, the gate electrode 19 of the light emitting element Li and the gate electrode 24 of the switch element Tj are electrically connected (i = j in the present embodiment). Note that the gate electrode 19 of the light emitting element L and the gate electrode 24 of the switch element T correspond to the third semiconductor layer (N-type) 104 in FIG. 3 showing the configuration of the light emitting thyristor 116, and the connecting means 14 is connected to the gate electrode 112. Correspond.

  The connection means 14 is realized by a conductive path formed of a conductive material such as a metal material and an alloy material. Specifically, the connecting means 14 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like.

  The first, second, and third scanning signal transmission paths 15a, 15b, 15c are connected to the surface electrode 25 of each switch element T, and are given at different timings for each switch element T adjacent in the X direction. ... Transmit third scanning signals [phi] 1- [phi] 3. Here, the transmission of the scanning signal to the switch element T means that the scanning signal is given between the anode electrode and the cathode electrode of the light emitting thyristor constituting the switch element. In the light emitting thyristor 116 shown in FIG. 3, it means that the voltage of the scanning signal is applied between the front surface electrode (anode electrode) 110 and the back surface electrode (cathode electrode) 111. The surface electrode 25 of each switch element T corresponds to the surface electrode (anode electrode) 110 in FIG. 3 showing the configuration of the light emitting thyristor 116.

  In the present embodiment, the first scanning signal transmission path 15a transmits the first scanning signal φ1, the second scanning signal transmission path 15b transmits the second scanning signal φ2, and the third scanning signal transmission path 15c The third scanning signal φ3 is transmitted. When generically referring to the first, second and third scanning signal transmission lines 15a, 15b and 15c, and when indicating an unspecified one among the first, second and third scanning signal transmission lines 15a, 15b and 15c, When it is simply described as the scanning signal transmission line 15 and generically refers to the first to third scanning signals φ1, φ2, and φ3, and when it indicates an unspecified one among the first to third scanning signals φ1, φ2, and φ3, In some cases, it is simply described as a scanning signal φ. The scanning signal transmission path 15 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like.

  The first, second, and third scanning signal transmission paths 15a, 15b, and 15c are formed to overlap each switch element T via the insulating layer 17 in the Z1 direction of each switch element T, and extend along the X direction. The first, second, and third scanning signal transmission paths 15a, 15b, and 15c are arranged with an interval W5 in the Y direction. The interval W5 is selected as a distance that does not cause a short circuit between the first, second, and third scanning signal transmission lines 15a, 15b, and 15c, and is selected to be 10 μm, for example.

  The first, second, and third scanning signal transmission lines 15a, 15b, and 15c are sequentially connected to the surface electrode 25 of each switch element T one by one, and every three along the arranged switch elements T. Are connected to the switch element T. That is, the first scanning signal transmission path 15a is connected to the switch elements T1, T4,..., Tj-2 (the symbol j is an integer and 3 × m, and the symbol m is a natural number), and the second scanning signal transmission path. 15b is connected to the switch elements T2, T5,..., Tj-1, and the third scanning signal transmission path 15c is connected to the switch elements T3, T6,. Therefore, among the switch elements T, the switch element Tn arranged at the nth position in the X direction (symbol n is a positive integer of 2 or more and j or less), and the switch element adjacent to the X1 direction side of the switch element Tn Tn−1 and the switch element Tn + 1 adjacent to the switch element Tn on the X2 direction side are respectively connected to different scanning signal transmission paths 15.

  The scanning start switch element T0 is composed of a light emitting thyristor 116, and is arranged to irradiate the light emitted from the light emitting thyristor on the switch element T arranged at the end of the switch element array 13 in the X direction. The Note that the threshold voltage of the light-emitting thyristor constituting the scan start switch element T0 may be simply referred to as the threshold voltage of the scan start switch element T0. Further, when the light-emitting thyristor constituting the scan start switch element T0 is turned on to emit light, the scan start switch element T0 may be simply turned on to emit light. In the present embodiment, the scanning start switch element T0 is arranged to irradiate the switch element T1 with light. Accordingly, one X1 in the X direction in which the scanning start switch element T0 is disposed is upstream in the light scanning direction in the optical scanning device.

  The start signal transmission path 16 is connected to the gate electrode 26 of the scanning start switch element T0, and transmits a start signal φS serving as a trigger signal to the scanning start switch element T0. The gate electrode 26 of the scanning start switch element T0 corresponds to the third semiconductor layer (N-type) 104 of FIG. A part of the start signal transmission path 26 corresponds to the gate electrode 112 of FIG. The start signal transmission line 16 is formed of a conductive material such as a metal material and an alloy material. Specifically, the start signal transmission path 16 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like. .

  The light emitting element L, the switch element T, and the scan start switch element T0 described above are covered with the insulating layer 17.

  The light shielding layer 18 covers each switch element T from one side in the thickness direction Z of each switch element T, that is, from the front side perpendicular to the paper surface of FIG. The light emitted from the switch element T is shielded so that the light emitted from T does not interfere.

  The light-emitting element light-shielding portions 23 are provided between the light-emitting elements L and at the X-direction outside of the light-emitting elements L at both ends in the X direction of the light-emitting element array 11. Shield from light. The light emitting element light shielding portion 23 is provided apart from the light emission signal transmission path 12 and is electrically insulated from the light emission signal transmission path 12 by the insulating layer 17.

Hereinafter, each configuration of the light emitting device 10 will be described more specifically.
FIG. 5 is a partial cross-sectional view showing the basic configuration of the light-emitting device 10 as viewed from the section line A1-A1 of FIG. In the present embodiment, an N-type semiconductor substrate is used as the substrate 31. The light emitting element L is composed of a light emitting thyristor 116, and a first semiconductor layer (N type) 32, a second semiconductor layer (P type) 33, and a third semiconductor layer (N type) 34 are formed on the surface of the substrate 31 in the Z1 direction. The first region 34a, the second region 34b, the fourth semiconductor layer (P-type) 35, the fifth semiconductor layer (P-type) 36, and the ohmic contact layer 37 are stacked in this order. The material, band gap, impurity concentration, and film thickness of each semiconductor layer 32, 33, 34a, 34b, 35, 36, 37 are the same as those of the light emitting thyristor 116 exemplified in the second embodiment. 3 and FIG. 5, reference numerals are different, but corresponding configurations are described with the same names. For example, the substrate 31 of FIG. 5 corresponds to the substrate 101 of FIG. 3 described above, and the first to fifth semiconductor layers 32, 33, 34, 35, and 36 of FIG. This corresponds to the fifth semiconductor layers 102, 103, 104, 107, and 108, respectively.

  A back electrode 99 is formed on the surface of the substrate 31 in the Z2 direction. The back electrode 99 is formed over the entire surface of the substrate 31 in the Z2 direction, and corresponds to the back electrode 111 of FIG. 3 showing the configuration of the light emitting thyristor 116. The back electrode 99 is formed of a conductive material such as a metal material and an alloy material. Specifically, the back electrode 99 is made of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), or the like.

  A first semiconductor layer (N-type) 32, a second semiconductor layer (P-type) 33, a third semiconductor layer (N-type) 34, a fourth semiconductor layer (P-type) 35, a fifth semiconductor layer (P-type) 36, and The stacked body in which the ohmic contact layer 37 is stacked has a substantially rectangular parallelepiped shape. These semiconductor layers 32, 33, 34, 35, 36, and 37 are covered with the insulating layer 17. The insulating layer 17 is formed of a resin material having electrical insulation, translucency, and flatness. The insulating layer 17 is formed of polyimide, benzocyclobutene (BCB), or the like.

  A portion of the insulating layer 17 between adjacent light emitting elements L is formed with a groove 38 that is V-shaped and reaches the surface of the substrate 31 in the Z1 direction on a virtual plane perpendicular to the Y direction. The light-emitting element light-shielding portion 23 is formed at 38. The light emitting element light-shielding portion 23 is formed along the surface of the groove portion 38 and is provided from the surface of the substrate 31 in the Z1 direction to the side of the ohmic contact layer 37 in the X direction. The light emitting element light shielding portion 23 is formed between one end and the other end in the Y direction of the light emitting element L, and extends from the end of the light emitting element L in the Y direction to the Y1 direction and the Y2 direction of the light emitting element L. By forming such a light emitting element light-shielding portion 23, it is possible to prevent the adjacent light emitting element L from receiving this light, and even if the adjacent light emitting element L emits light, the light emission is accompanied by this light emission. Since the threshold voltage of the light emitting element L does not change, the light emitting element L can selectively and stably emit light.

  The element connection portion 22 of the light emission signal transmission path 12 is connected to the surface of the ohmic contact layer 37 in the Z1 direction. A through hole 39 is formed in a portion of the insulating layer 17 formed on the surface in the Z1 direction of the ohmic contact layer 37, and a part of the element connection portion 22 is formed in the through hole 39, thereby forming an element. The connecting portion 22 is in contact with the ohmic contact layer 37. The through hole 39 is formed at the center of the light emitting element L in the X direction and at the center of the light emitting element L in the Y direction, and efficiently supplies the current from the light emitting signal transmission path 12 to the center of the light emitting element L. , Make it emit light.

  The length W6 in the X direction of the element connecting portion 22 of the light emitting signal transmission path 12 is formed to be 1/3 or less of the length W2 in the X direction of the light emitting element L. The element connecting portion 22 covers a part of the light emitting direction of the light emitting element L, but by selecting the length W6 as described above, the element connecting portion 22 blocks the light emitted from the light emitting element L and traveling in the Z1 direction. As much as possible. Further, a part of the light emitted from the light emitting element L and directed in the Z1 direction and reflected by the light emitting signal transmission path 12 is rereflected by the light emitting element light-shielding portion 23 and the substrate 31 to move in the Z1 direction. .

  FIG. 6 is a partial cross-sectional view showing the basic configuration of the light emitting device 10 as viewed from the section line A2-A2 of FIG. The switch element T is configured by a light emitting thyristor 116, and includes a first semiconductor layer (N type) 42, a second semiconductor layer (P type) 43, and a third semiconductor layer (N type) 44 on the surface of the substrate 31 in the Z1 direction. The first region 44a, the second region 44b, the fourth semiconductor layer (P-type) 45, the fifth semiconductor layer (P-type) 46, and the ohmic contact layer 47 are stacked in this order. Further, a surface electrode 25 is formed on the surface in the Z1 direction of the ohmic contact layer. Each of the semiconductor layers 42, 43, 44a, 44b, 45, 46, the ohmic contact layer 47, and the surface electrode 25 has a substantially rectangular parallelepiped shape. The material, band gap, impurity concentration, and film thickness of each of the semiconductor layers 42, 43, 44a, 44b, 45, 46, and the ohmic contact layer 47 are the same as those of the light emitting thyristor 116 exemplified in the second embodiment.

  A surface electrode 25 is formed on the surface of the ohmic contact layer 47 in the Z1 direction. The surface electrode 25 is formed in a region about half the surface area near the downstream side in the scanning direction, in other words, near the X2 direction, except for the peripheral portion of the surface in the Z1 direction of the ohmic contact layer 47. By forming the surface electrode 25 in this manner, the electric field applied to each semiconductor layer of the switch element T is made as nonuniform as possible to increase the light emission intensity of light emitted from the switch element T, and in the X1 direction. The light which is emitted from the switch element T adjacent to the light source and is reflected by the light shielding layer 18 and arrives from the Z1 direction is made to enter more into each semiconductor layer. As a result, in the X2 direction downstream of the scanning direction of the switch element T, the light is reflected by the surface electrode 25, whereby strong light can be given to the switch element T in the X2 direction, and the scanning direction of the switch element T Since the surface electrode 25 is not formed in the X1 direction, which is the upstream side, the light reflected from the scanning signal transmission path 15 or the light shielding layer 18 and coming from the Z1 direction can be efficiently received. The surface electrode 25 is formed of a conductive material such as a metal material and an alloy material. Specifically, the surface electrode 25 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), or the like.

  Each of the semiconductor layers 42, 43, 44 a, 44 b, 45, 46, the ohmic contact layer 47 and the surface electrode 25 are covered with the insulating layer 17 and electrically insulated from the adjacent switch element T. As described above, since the insulating layer 17 has translucency, when the switch element T emits light, the light passes through the insulating layer 17 and enters the switch element T adjacent in the X direction. The insulating layer 17 is formed of a resin material that transmits 95% or more of light having a wavelength emitted from the switch element T.

  As indicated by the arrows in FIG. 6, the switch element T is near the third semiconductor layer (N-type) 44 near the interface between the third semiconductor layer (N-type) 44 and the fourth semiconductor layer (P-type) 45. Light is emitted mainly from the second region 44b. Further, light is emitted slightly in the vicinity of the interface between the first semiconductor layer (N type) 42 and the second semiconductor layer (P type) 43. The switch element T emits light in all directions.

  The insulating layer 17 is formed by applying a resin material and curing the resin material. By forming the insulating layer 17 with the resin material having flatness when the insulating layer 17 is applied, the insulating material 17 is filled between the switch elements T when the insulating layer 17 is formed. It can be reliably formed between the elements T. Further, when the resin material shrinks during curing, a recess 48 extending in the Y direction is formed on the surface portion in the Z1 direction of the insulating layer 17 formed between the switch elements T.

  Furthermore, by forming the insulating layer 17 from polyimide, benzocyclobutene (BCB), etc., the insulating layer 17 can be reliably formed in this gap even if the interval W3 between the switch elements T is selected as described above. The insulating layer 17 can be formed in close contact with the semiconductor layers 42, 43, 44, 45, 46, the ohmic contact layer 47, the surface electrode 25 and the substrate 31. If the insulating layer 17 is peeled off from the surface of the switch element T, light is reflected by the interface of the peeled portion, and the amount of light received from the adjacent switch element T may be reduced. There is no such problem.

  Any one of the first to third scanning signal transmission paths 15a, 15b, and 15c is connected to the surface of the surface electrode 25 in the Z1 direction. A through hole 49 is formed in a portion of the insulating layer 17 formed on the surface of the surface electrode 25 in the Z1 direction, and the first to third scanning signal transmission paths 15a, 15b, Any one of 15 c is connected, and the switch element T and the other two scanning signal transmission paths 15 of the first to third scanning signal transmission paths 15 a, 15 b, 15 c are electrically connected by an insulating layer 17. Insulated. Since the switch element T is covered with the insulating layer 17, the first to third scanning signal transmission lines 15a, 15b, and 15c can be stacked on the Z1 direction side of the switch element T.

  In this embodiment, since an N-type semiconductor substrate is used, the light emission signal transmission path 12 and the scanning signal transmission path 15 are connected to the anode of each element, and the cathode potential is set to 0 volts (V). Then, since a positive power supply can be used for the power supply which applies a voltage or an electric current to the light emitting element L and the switch element T, it is preferable. In the present embodiment, in the light emitting element L, the light emission signal transmission path 12 functions as an anode electrode, and the back electrode 99 functions as a cathode electrode. In the switch element T, the front surface electrode 25 functions as an anode electrode together with the scanning signal transmission path 15, and the back surface electrode 99 functions as a cathode electrode.

  The Z1 direction side of each switch element T is covered by the insulating layer 17 or the scanning signal transmission path 15, and the insulating layer 17 and the scanning signal transmission path 15 are further covered by the light shielding layer 18. Various materials can be used as the material of the light shielding layer 18 as long as they are electrically insulating and absorb light of a wavelength emitted from the switch element T almost completely with a thickness of about 2 μm to 3 μm. is there. In the present embodiment, the light shielding layer 18 is formed of green polyimide. The thickness of the light shielding layer 18 is selected to be about 5 μm to 10 μm.

  Light emitted from the switch element T and traveling in the Z1 direction is reflected by the insulating layer 17 and the interface between the scanning signal transmission path 15, the scanning signal transmission path 15, the interface between the insulating layer 17 and the light shielding layer 18, or the like. Absorbed by layer 18. Each scanning signal transmission line 15 and the insulating layer 17 form a reflecting means. This prevents light from the switch element T from interfering with light emitted from the light emitting element L in the Z1 direction. Therefore, when the light emitting device 10 is used as an exposure device of an image forming apparatus 87 described later, an image of excellent quality can be formed without causing image degradation due to leakage light from the switch element T.

  FIG. 7 is a partial cross-sectional view showing the basic configuration of the light-emitting device 10 as seen from the section line A3-A3 in FIG. The light emitting element L and the switch element T are disposed adjacent to each other in the Y direction. The ends of the first semiconductor layer (N type) 32, the second semiconductor layer (P type) 33, and the third semiconductor layer (N type) 34 of the light emitting element L near the switch element T are the fourth semiconductor layer. The light emitting element connection portion 51 is formed by projecting toward the switch element T from the end of the (P type) 35, the fifth semiconductor layer (P type) 36, and the ohmic contact layer 37 near the switch element T. . The length of the light emitting element connection portion 51 in the X direction is slightly smaller than the length W2 described above.

  The end of the switch element T near the light emitting element L of the first semiconductor layer (N-type) 42, the second semiconductor layer (P-type) 43, and the third semiconductor layer (N-type) 44 is a fourth element. The end of the semiconductor layer (P-type) 45, the fifth semiconductor layer (P-type), and the ohmic contact layer 47 near the light-emitting element L protrudes toward the switch element T to form the switch element connection portion 52. To do. The length of the switch element connection portion 52 in the X direction is selected to be equal to the length of the light emitting element connection portion 51 in the arrangement direction.

  Of the third semiconductor layer (N-type) 34 of the light-emitting element L, the portion 340A constituting the light-emitting element connection portion 51 is formed to be thinner than the portion 340B where the fourth semiconductor layer (P-type) 35 is stacked. The Of the third semiconductor layer (N type) 44 of the light emitting element switch T, the portion 440A constituting the switch element connecting portion 52 has a smaller thickness than the portion 440B where the fourth semiconductor layer (P type) 45 is laminated. It is formed. This is because when the light emitting element connection portion 51 and the switch element connection portion 52 are formed in the etching process, the fourth semiconductor layer (P type) is over-etched so as not to remain.

  The insulating layer 17 is formed along the surfaces of the light emitting element L and the switch element T, and is also formed between the light emitting element L and the switch element T. The light emitting element L and the switch element T are electrically connected by the insulating layer 17. Insulated. The thickness of the insulating layer 17 provided between the light emitting element L and the switch element T is substantially equal to the thickness of the light emitting element connection portion 51 and the switch element connection portion 52 from the substrate 31. In the insulating layer 17, a portion provided between the light emitting element L and the switch element T is formed with a recess 53 extending along the X direction, with the substrate 31 side serving as a bottom. A through hole 54 is formed in a portion of the insulating layer 17 laminated on the surface of the third semiconductor layer (N-type) 34 of the light emitting element connection portion 51 in the Z1 direction. Through holes 55 are respectively formed in portions of the three semiconductor layers (N-type) 44 stacked on the surface in the Z1 direction.

  The connecting means 14 for connecting the gate electrode 19 of the light emitting element L and the gate electrode 24 of the switch element T corresponding to the light emitting element L extends between the light emitting element L and the switch element connecting part 52. The insulating layer 17 is stacked between the switch element T and the switch element T. In the connection means 14, a part of the connection means 14 is formed in the through holes 54 and 55, the surface of the third semiconductor layer (N-type) 34 of the light emitting element connection portion 51 in the Z1 direction, and the switch element connection portion 52. The third semiconductor layer (N-type) 44 is connected to the surface in the Z1 direction. The resistance value of the connecting means 14 is selected to be 1 kΩ (ohms) or less. If the resistance value is too high, the trigger signal from the switch element T to the light emitting element L may be attenuated. However, by selecting the resistance value of the connecting means 14 within the above range, the switch element T to the light emitting element L is likely to be attenuated. Attenuation when the trigger signal is transmitted can be suppressed.

  The third semiconductor layer (N type) 34 of the light emitting element L is the gate electrode 19 of the light emitting element L, and the third semiconductor layer (N type) 44 of the switch element T is the gate electrode 24 of the switch element T. Therefore, the connection means 14 electrically connects the gate electrodes of the light emitting element L and the switch element T.

  The ends of the fourth semiconductor layer (P-type) 35 and the ohmic contact layer 37 of the light emitting element L near the switch element T are covered with the light emitting signal transmission path 12 described above via the insulating layer 17. As a result, light traveling from the light emitting element L toward the switch element T can be shielded. The signal path extending portion 21 of the light emitting signal transmission path 12 is provided facing the side of the fourth semiconductor layer (P type) 35 and the ohmic contact layer 37 facing the switch element T, and The end portion near the fourth semiconductor layer (P-type) 35 is covered.

  The ends of the fourth semiconductor layer (P type) 45 of the switch element T and the ohmic contact layer 47 near the light emitting element L are covered with the light shielding layer 18 laminated on the insulating layer 17. Thereby, the light traveling from the switch element T toward the light emitting element L can be shielded. Further, the end of the switch element T opposite to the light emitting element L is covered with the light shielding layer 18 via the insulating layer 17. The light shielding layer 18 covers the Z1 direction of the switch element connecting portion 52 and extends to the vicinity of the recess 53 formed between the light emitting element L and the switch element T.

  FIG. 8 is a partial cross-sectional view showing the basic configuration of the light emitting device 10 as viewed from the section line A4-A4 of FIG. Since the scanning start switch element T0 and the switch element T have the same configuration, the same parts are denoted by the same reference numerals, and redundant description may be omitted.

  The scanning start switch element T0 includes a light emitting thyristor 116, and a first semiconductor layer (N type) 62, a second semiconductor layer (P type) 63, and a third semiconductor layer (N type) are formed on the surface of the substrate 31 in the Z1 direction. ) 64 of the first region 64a, the second region 64b, the fourth semiconductor layer (P-type) 65, the fifth semiconductor layer (P-type) 66, and the ohmic contact layer 67 are stacked in this order. Further, a surface electrode 25 is formed on the surface in the Z1 direction of the ohmic contact layer. The surface electrode 25 of the scanning start switch element T0 is formed in the entire region except the peripheral portion of the surface in the Z1 direction of the ohmic contact layer 61. The stacked body of the semiconductor layers 62, 63, 64a, 64b, 65, 66, the ohmic contact layer 67, and the surface electrode 25 has a substantially rectangular parallelepiped shape. The materials, band gap, impurity concentration, and film thickness of each of the semiconductor layers 62, 63, 64a, 64b, 65, 66, and the ohmic contact layer 67 are the same as those of the light-emitting thyristor 116 exemplified in the second embodiment. Although reference numerals are different between FIG. 3 and FIG. 8, corresponding layers are described with the same name. For example, the substrate 31 of FIG. 8 corresponds to the substrate 101 of FIG. 3 described above, and the first to fifth semiconductor layers 62, 63, 64, 65, 66 of FIG. This corresponds to the fifth semiconductor layers 102, 103, 104, 107, and 108, respectively.

  Further, end portions of the scanning start switch element T0 near the light emitting element L of the first semiconductor layer (N-type) 62, the second semiconductor layer (P-type) 63, and the third semiconductor layer (N-type) 64 are The fourth semiconductor layer (P-type) 65, the fifth semiconductor layer (P-type) 66, and the ohmic contact layer 67 protrude toward the light-emitting element array 11 side from the ends near the light-emitting element L, and are scanned. A start switch element connecting portion 68 is formed.

  The scanning start switch element T0 is covered with the insulating layer 17 and the light shielding layer 18. A scanning signal transmission path 15 is formed by laminating on the insulating layer 17 laminated in the Z1 direction of the scanning start switch element T0, and formed in a portion of the insulating layer 17 laminated in the Z1 direction of the scanning start switch element T0. A part of the third scanning signal transmission path 15c is formed in the through-hole 69, and the third scanning signal transmission path 15c is connected to the surface electrode 25 of the scanning start switch element T0 through the through-hole 69. Further, in the insulating layer 17, a through hole 71 is formed in a portion where the scanning start switch element connection portion 68 is laminated, and a part of the start signal transmission path 16 is formed in the through hole 71. The start signal transmission line 16 formed by being laminated on the insulating layer 17 is connected via the. The scanning start switch element T 0, the scanning signal transmission path 15, and the start signal transmission path 16 are covered with a light shielding layer 18. The third semiconductor layer (N-type) 64 of the scan start switch element T0 is the gate electrode 26 of the scan start switch element T0.

  Each light emitting element L, each switch element T, and scan start switch element T0 are provided on the surface of the substrate 31 in the Z1 direction on the first semiconductor layer (N-type) 32, 42, 62, and the second semiconductor layer (P-type) 33. , 43, 63, third semiconductor layers (N-type) 34, 44, 64, fourth semiconductor layers (P-type) 35, 45, 65, and ohmic contact layers 37, 47, 67, respectively. Are sequentially stacked by an epitaxial growth method such as metal organic vapor phase epitaxy (MOVPE) and molecular beam epitaxy (MBE), followed by patterning and etching by photolithography. Therefore, since the light emitting element L, the switch element T, and the scan start switch element T0 can be formed simultaneously in a series of manufacturing processes, the manufacturing cost can be reduced. After forming each semiconductor layer, a conductor layer is formed by vapor deposition or the like, and patterning and etching by photolithography are performed to form the surface electrode 25.

  After forming the surface electrode 25, the insulating layer 17 spin-coats the resin material such as polyimide described above, and then cures the applied resin material. Thereafter, the light emission signal transmission path 12, the connection means 14, the first to third scanning signal transmission paths 15a, 15b, 15c, the start signal transmission path 16, the light emitting element L, the switch element T, or the scanning start switch element. Each through-hole 39, 49, 54, 55, 69, 71 required for connection with T0 is formed by patterning by photolithography and an etching process.

  The light emitting signal transmission path 12, the connecting means 14, the first to third scanning signal transmission paths 15a, 15b, 15c, the start signal transmission path 16, and the light emitting element light shielding portion 23 are formed after the insulating layer 17 is formed. A conductive material is laminated on the surface of the insulating layer 17 by vapor deposition or the like, and patterning and etching by photolithography are performed at the same time. Accordingly, the light emitting signal transmission path 12, the connecting means 14, the first to third scanning signal transmission paths 15a, 15b, and 15c, the start signal transmission path 16, and the light emitting element light shielding portion 23 are formed to be substantially equal in thickness. The

  FIG. 9 is a circuit diagram showing a part of an equivalent circuit showing the basic configuration of the light emitting device 10 shown in FIG. The light emitting device 10 is driven by the driving unit 73. The light emitting device 10 may include a driving unit 73. The driving means 73 is connected to the first to third scanning signal transmission paths 15a, 15b, 15c, the light emission signal transmission path 12, and the start signal transmission path 16, and the first to third scanning signal transmission paths 15a, 15b. , 15c, a start signal φS is applied to the start signal transmission path 16, and a light emission signal φE is applied to the light emission signal transmission path 12. The driving means 73 is realized by a driving driver IC (Integrated Circuit).

  The driving means 73 receives a clock pulse signal as a reference from the outside, and outputs the first to third scanning signals φ1 to φ3 and the start signal φS in synchronization with the clock pulse signal to transmit the scanning signal. Are provided to the path 15 and the start signal transmission path 16, respectively. The clock pulse signal is supplied from the control unit 96 of the image forming apparatus 87 described later. The clock cycle of the clock pulse signal is selected to be longer than the control cycle in the control means 96 of the image forming apparatus 87 described later. Further, the driving means 73 outputs the light emission signal φE based on the image information given together with the clock pulse signal and gives it to the light emission signal transmission path 12.

  The first to third scanning signal transmission lines 15a, 15b, and 15c are connected to resistance elements Rφ connected in series with the switch elements T, respectively, and the driving means 73 is connected to the first to the third scanning signal transmission lines 15a, 15b, and 15c via the resistance elements Rφ. The three scanning signal transmission paths 15a, 15b, and 15c are connected. The resistance element Rφ has a function as a voltage dividing resistor that divides the voltage applied to each switch element T while preventing an overcurrent from flowing from the driving means 73 to the scanning signal transmission line 15.

  Also, the light emitting signal transmission path 12 is connected with a resistance element Rφ connected in series with each light emitting element L, and the driving means 73 is connected to the light emission signal transmission path 12 via the resistance element Rφ. The resistance element Rφ has a function as a voltage dividing resistor that divides the voltage applied to each light emitting element L while preventing an overcurrent from flowing from the driving means 73 to the light emitting signal transmission path 12.

  FIG. 10 shows that the drive means 73 supplies a start signal φS to the start signal transmission path 16, a first scanning signal φ1 to be applied to the first scanning signal transmission path 15a, a second scanning signal φ2 to be applied to the second scanning signal transmission path 15b, The third scanning signal φ3 applied to the third scanning signal transmission path 15c and the light emission signal φE applied to the light emission signal transmission path 12, the light emission intensity of the light emitting element L1, and the light emission intensity of the scanning start switch element T0 and the switch elements T1 to T4. FIG. The light emission intensity of the light emitting element L1, the scanning start switch element T0, and the switch elements T1 to T4 indicates that light is emitted when the level is high (H), and indicates that no light is emitted when the level is low (L). . In FIG. 10, the horizontal axis represents time, and represents the elapsed time from the reference time.

  For the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE, the vertical axis represents the signal level. The signal level represents the magnitude of voltage or current. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at a high (H) level, a high voltage or high current is applied to the signal transmission line. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at the low (L) level, a low voltage or a low current is supplied to the signal transmission line. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at the L level, a low voltage or a low current is supplied to the signal transmission path. It becomes smaller than the threshold voltage. In the case of voltage, the H level is, for example, 3 volts (V) to 10 volts (V). The L level is, for example, 0 (zero) volts (V).

  In the present embodiment, the voltage of the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE at the H level is, for example, 5 volts (V), and the L level start signal φS, The voltages of the third scanning signals φ1 to φ3 and the light emission signal φE are set to 0 volts (V), for example. The waveforms of the first to third scanning signals φ1 to φ3 are the same and have different phases.

  In the light emitting device 10, the light emitting state of the switch element T is transferred along the X direction in order to reduce the threshold voltage of the light emitting element L to emit light.

  Hereinafter, the operation of the driving unit 73 will be described. First, at time t0, the driving unit 73 sets the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE to a low level. By setting the start signal φS to the low level, the threshold voltage of the scanning start switch element T0 becomes smaller than the high level of the third scanning signal φ. When the signal level is changed from the low level to the high level for the light emission signal φE, the start signal φS, and the scanning signal φ, the driving unit 73 changes the signal level to the high level until the signal level is changed from the high level to the low level next time. To maintain. Further, when the signal level is changed from the high level to the low level for the light emission signal φE, the start signal φS, and the scanning signal φ, the driving unit 73 sets the signal level to the low level until the signal level is changed from the low level to the high level next time. To keep.

  At time t1, the driving unit 73 changes only the third scanning signal φ3 from the low level to the high level. At time t1, the start signal φS, the first and second scanning signals φ1, φ2, and the light emission signal φE are at a low level. As a result, the scanning start switch element T0 is turned on, that is, turned on and emits light.

  The light of the scanning start switch element T0 is most strongly incident on the switch element T1 disposed at the end of the adjacent switch element array 13 in the X direction. In the other switch elements T of the switch element array 13, the intensity of light emitted from the scan start switch element T0 decreases as the switch element T is arranged at a position spaced apart from the scan start switch element T0 in the X direction. . The threshold voltage drop of the light emitting thyristor constituting the switch element T increases as the received light intensity increases.

  Next, the transfer of the light emission state from the scanning start switch element T0 to the switch element T1 will be described. When the scanning start switch element T0 emits light, the switch element T1 receives this light, and the threshold voltage of the switch element T1 decreases.

At time t2, the threshold voltage of the switch element T1 is V _TH (T1). Switch elements T1, T4,..., Tj-2 are connected to the first scanning signal transmission line 15a, but the switch elements T4,..., Tj-2 are sufficiently separated from the scanning start switch element T0. Therefore, even if light from the scanning start switch element T0 is received, the light is weak, so that the threshold voltage hardly changes.

  At time t2, the driving unit 73 changes the first scanning signal φ1 from the low level to the high level. At time t2, the start signal φS, the second scanning signal φ2, and the light emission signal φE are at a low level, and the third scanning signal φ3 is at a high level. The high level of the first scanning signal φ1 is higher than the lowest value of the threshold voltages of the other switching elements T4,..., Tj-2 except the switching element T1 connected to the first scanning signal transmission line 15a. Or selected for high current.

  The scanning signal transmission path 15 to which the switching element T whose threshold voltage has been lowered by receiving light from the adjacent switching element T is connected is connected to the other switching elements T connected to the scanning signal transmission path 15. When a scanning signal φ having a voltage or current higher than the minimum threshold voltage is applied, the scanning signal φ is applied to the scanning signal transmission line 15 via the resistance element Rφ, and the switching element T is supplied to the switching element T by the resistance element Rφ. A divided voltage is provided. A voltage divided by the resistance element Rφ is gradually applied to each switch element T, and among the plurality of switch elements T connected to the same scanning signal transmission path 15, the adjacent switch element T The voltage applied to the switch element T that has received the light from the earliest is the earliest greater than the threshold voltage of the switch element T. Accordingly, only the switch element T having the lowest threshold voltage emits light, and the other switch elements T do not emit light.

  Accordingly, at time t2, the switch element T1 is turned on, that is, turned on and emits light.

  After the switch element T1 is turned on, the driving unit 73 sets the third scanning signal φ3 to the low level at time t3. Accordingly, the scanning start switch element T0 is turned off, that is, turned off and turned off.

  In this way, the light emission state transitions from the scanning start switch element T0 to the switch element T1. Further, at time t3, the driving means 73 changes the start signal φS from the low level to the high level, and thereafter maintains the high level, thereby changing the third scanning signal φ3 from the low level to the high level after time t3. The scanning start switch element T0 maintains the off state.

  The time between the time t2 and the time t3 is selected to be about 1/10 of the time when the first scanning signal φ1 becomes high level. In this way, the threshold voltage of the adjacent switch element T is reliably reduced by the drive means 73 providing the scan signal φ so that the time when the scan signal φ applied to the adjacent switch element T is at the high level overlaps. During this time, the scanning signal φ can be set to a high level, and optical scanning can be performed reliably.

  In the present embodiment, the time during which the first to third scanning signals φ1 to φ3 are at a high level is selected to be about 1 μsec. Therefore, the time between time t2 and time t3 is selected to be about 0.1 μsec.

  When the threshold voltage is lowered by light reception and the scanning signal φ1 becomes high level and becomes on at time t2, the switch element T1 maintains the on state until the scanning signal φ1 becomes low level. When turned on, the voltage of the gate electrode 24 of the switch element T1 becomes approximately 0 (zero) volts (V). Here, the voltage of the gate electrode 24 of the switch element T1 is a potential difference between the gate electrode 24 and the back electrode 99 grounded. That the voltage of the gate electrode 24 of the switch element T1 becomes 0V means that a trigger signal is generated in the gate electrode 24. Since the gate electrode 24 of the switch element T1 is connected to the gate electrode 19 of the light emitting element L1, the voltage of the gate electrode 24 of the switch element T1 becomes equal to the voltage of the gate electrode 19 of the light emitting element L1. Thus, the switch element T1 can change the voltage applied to the gate electrode 19 and the back electrode 99 of the light emitting element L1, which means that the trigger signal generated at the gate electrode 24 of the switch element T1 is It means that it was given to the gate electrode 19 of the light emitting element L1.

  When the light emitting element L1 emits light, the driving unit 73 changes the light emission signal φE from the low level to the high level at time t4 after the time t3 when the third scanning signal φ3 is changed from the high level to the low level has elapsed.

In the light emitting element L1, since the switch element T1 is in the ON state, as described above, the gate electrode 19 of the light emitting element L1 is approximately 0 (zero) volts (V). At this time, the switch elements T2,..., Tj-1, Tj are in the off state, and the threshold voltage of the light emitting element L1 at time t4 is V _TH (L1), and the light emitting elements L2,. , Li are set to V _TH (L2),..., V _TH (Li-1), V _TH (Li), respectively, the high level V _H of the light emission signal φE is equal to or higher than the threshold voltage of the light emitting element L1. Then, by selecting a threshold voltage of the light emitting elements L2,..., Li-1, Li that is smaller than the lowest value, only the light emitting element L1 is selectively turned on to emit light. Can do.

  At time t5, when the driving unit 73 sets the light emission signal φE to the low level, the light emitting element L1 is turned off and turned off. The amount of exposure to a photosensitive drum 90 to be described later is adjusted according to the light emission time of the light emitting element L while the light emission intensity of the light emitting element L is constant. That is, the exposure amount is determined by determining the time between time t4 and time t5 when the light emission signal φE becomes high level. When changing the exposure amount according to the light emission intensity of the light emitting element L, it is difficult because the voltage or current applied to the light emitting element L1 needs to be finely controlled. However, by changing the exposure amount according to the light emission time, the light emission signal φE is changed. Since it is only necessary to adjust the high level time, it is easy to control the exposure amount, and a constant voltage or constant current is applied to the light emitting element L, so that the light emitting element L1 can emit light stably. The time during which the light emitting element L emits light, in other words, the time during which the light emission signal φE is at the high level is selected to be 80% or less of the time during which the scanning signal φ is at the high level.

  After the time t5 has elapsed, when the driving unit 73 sets the second scanning signal φ2 to the high level at the time t6, the switch element T2 emits light. After the time t6 has elapsed, the driving unit 73 outputs the first scanning signal φ1 at the time t7. When the level is low, the switch element T1 is turned off. As a result, the light emission state shifts from the switch element T1 to the switch element T2.

  After the elapse of time t7, when the driving unit 73 sets the third scanning signal φ3 to the high level at time t8, the switch element T3 emits light. After the elapse of time t8, the driving unit 73 outputs the second scanning signal φ2 at time t9. When the level is low, the switch element T2 is turned off. As a result, the light emission state is shifted from the switch element T2 to the switch element T3.

  After the time t9 has elapsed, when the driving unit 73 sets the first scanning signal φ1 to the high level again at time t10, the switch element T4 emits light.

  The time between the time t6 and the time t7 is selected to be about 1/10 of the time when the second scanning signal φ2 becomes high level, and the time between the time t8 and the time t9 is determined by the third scanning signal φ3. It is selected to be about 1/10 of the time for high level.

  In this way, the driving means 73 repeatedly applies the first to third scanning signals φ1 to φ3, so that the ON state is sequentially transferred along the X direction in the switch elements T4,..., Tj−1, Tj. The When the switch element T emits light, the light emission signal φE of the light emission signal transmission path 12 is changed from low level to high level to correspond to the light emitting switch element T, that is, the light emitting switch element T. Only the light emitting element L connected to can be made to emit light selectively.

  The switch elements T located on both sides in the X direction of the light emitting switch element T are all excited, but as described above by the first to third scanning signal transmission paths 15a, 15b, and 15c. By transmitting the first to third scanning signals φ1 to φ3 and supplying the first to third scanning signals φ1 to φ3 to each switching element T, the switching element T is switched from the X1 direction to the X2 direction in the X direction. The light emission state can be transferred, in other words, optical scanning can be performed.

FIG. 11 is a waveform diagram showing a change in threshold voltage of the switch elements T1, T4, T7 connected to the first scanning signal transmission line 15a. In FIG. 11, the horizontal axis represents time and represents the elapsed time from the reference time. In the figure, a start signal φS and first to third scanning signals φ1 to φ3 are also shown. Times t1, t2, t7, t8, and t10 shown in the figure correspond to the times t1, t2, t7, t8, and t10 shown in FIG. The initial threshold voltage of the switch elements T1, T4, T7 and V _BO, the threshold voltage lowered by receiving from the switch element T, or scan start switch element T0 adjacent to V _1.

Since the scan start switch element T0 emits light at time t1, the threshold voltage of the switch element T1 gradually decreases by receiving the light of the scan start switch element T0, and the threshold of the switch element T1 at time ta. voltage, becomes _{V 1.} Until time t3 at which the light emitting state of the scan start switch element T0 is maintained, threshold voltage of the switching element T1 is maintained at V _1.

At time t2, by the first scan signal φ1 changes from low level to high level, and the light-emitting switch element T1 is the threshold voltage of the switching element T1 is further at time tb decreases, the V _2. At time tb, the threshold voltage of the switch elements T4 and T7 is V _BO .

In time t7, the when the first scan signal φ1 changes from high level to low level, the threshold voltage of the switching element T1 is with time, gradually rises from V _2.

Since the switch element T3 emits light at time t8, the threshold voltage of the switch element T4 gradually decreases by receiving the light of the switch element T3, and the threshold voltage of the switch element T4 becomes V ₁ at time tc. Become.

At time t10, the threshold voltage of the switch element T4 is _{V 1,} the threshold voltage of the switch element T1 is a lower _{V 3} than higher _{V BO} than _{V 1,} the threshold voltage of the switch element T7 is , V _BO .

At time t10, the first scanning signal φ1 is changed from the low level to the high level. This high level voltage is supplied from the adjacent switching element T among the switching elements T connected to the first scanning signal transmission path 15a. in one of the switch element T that is not receiving light, by higher than the threshold voltage V ₃ of the most threshold voltage lower switching element T1, it is possible to emit only the switch element T4. When the switch element T4 emits light, the threshold voltage further decreases and becomes V ₂ at time td.

In time t11, the when the first scan signal φ1 changes from high level to low level, the threshold voltage of the switching element T4 is with the passage of time, gradually rises from V _2.

FIG. 12 shows the forward current-voltage characteristics of the light-emitting thyristors constituting the switch element T and the high-level voltage V _H of the first to third scanning signals φ 1 to φ 3 supplied to each scanning signal transmission line 15. It is a graph which shows a range. In FIG. 12, the horizontal axis represents the anode voltage, and the vertical axis represents the anode current.

The initial threshold voltage of the switch element T is set to V _B0, and the threshold voltage in the state where the threshold voltage is most lowered by irradiating the switch element T with light is set to V _1, and is connected to the same scanning signal transmission line 15. The threshold voltage of the switch element T having the second lowest threshold voltage among the switch elements T is V ₃ . This V ₃ is the level of the switch element T in which the threshold voltage is slightly lowered by receiving light, or the switch element T that is being restored to the initial state at the time of turn-off, that is, once turned on. The threshold voltage.

The high-level voltage V _H of the first to third scanning signals φ 1 to φ 3 supplied to each scanning signal transmission path 15 connected to the switch element T is the switching element T connected to the same scanning signal transmission path 15. Among them, the threshold voltage V ₁ of the switch element T having the lowest threshold voltage by receiving the light emission of the adjacent switch element T and the threshold value of the switch element T having the second lowest threshold voltage V _3. A voltage between the voltages is selected, that is, a voltage in a range indicated by a symbol P2 in FIG. As described above, by selecting the high level voltage of the scanning signal φ, it is possible to selectively emit only the switch element T having the lowest threshold voltage due to light reception.

  As described above, according to the light emitting device 10, each switch element T can reduce the threshold voltage by receiving the light emitted from the adjacent switch element T, and the gate electrode 24 of each switch element T can be reduced. In addition, it is not necessary to connect a load resistor or the like connected between the diode for designating the transfer direction and the power source as in the light emitting device 2 of the second prior art. Therefore, it is possible to selectively emit only a predetermined light emitting element L among a plurality of light emitting elements L arranged using as few signal transmission paths as possible without complicating the structure of the light emitting device 10.

  Further, the scanning start switch element T0 is connected to the scanning signal transmission path 15 and emits light when a scanning signal φ is given through the scanning signal transmission path 15, and therefore supplies power necessary for the light emission of the switching element T. The transmission path and the transmission path for supplying power necessary for the scanning start switch element T0 to emit light can be shared, and a transmission path for supplying the power required for the scanning start switch element T0 is specially provided. There is no need.

  Since the scanning start switch element T0 emits light based on the scanning signal φ from the scanning signal transmission line 15 connected to the switch element T, the driving means 73 determines the timing of light emission with the switch elements T of the switch element array 13. Easy to synchronize. Further, the scanning start switch element T0 does not emit light unless a trigger signal is given to the gate electrode 26 and further the scanning signal φ is not given, so that even if the trigger signal is given undesirably, it is prevented from emitting light. The

  In addition, by using the light emitting thyristor 116 to realize the switch element T, the light emitting element L, and the start switch element T0, the light emitting device 10 can be easily manufactured. The switch element T, the light emitting element L, and the start switch element T0 can be formed on the substrate 31 by the same manufacturing process, and the manufacturing process of the light emitting device 10 can be reduced as much as possible. Further, since the switch element T, the light emitting element L, and the start switch element T0 are integrated on the same substrate 31, each element can be formed with a high density. Adjacent switch elements T can be brought into close contact with each other. Accordingly, each switch element T can efficiently receive light from the adjacent switch element T, and is adjacent to the emitted switch element T even when the light emission intensity of the adjacent switch element T is small. The threshold voltage of the switch element T can be reduced. Therefore, it is possible to reduce the power required for causing the switch element T to emit light, and to realize the light emitting device 10 with lower power consumption. Also in the light emitting element L, since the light emitting elements L adjacent in the arrangement direction can be brought into close contact with each other, the resolution of an image can be improved by using the image forming apparatus 87.

  Since each switch element T emits light in order along the X direction, the light emitting element L emits light by shielding this light by the light shielding layer 18 so as not to interfere with the light emitted by the light emitting element L. When the light is on, the light quantity of the light emitting element L is prevented from being reduced or increased, and a stable light quantity can be obtained. Further, since the bias light is prevented from leaking by the light shielding layer 18, the image forming apparatus 87 can form an image of good quality without degrading the image quality.

  The insulating layer 17 is provided between each light emitting element L and each switch element T and each scanning signal transmission path 15 and light emission signal transmission path 12, and each light emitting element L and each switch element T and each scanning signal transmission path. 15 and the light emission signal transmission path 12 are prevented from being short-circuited.

  Since each scanning signal transmission line 15 and the insulating layer 17 form the reflecting means, it is not necessary to form a reflecting layer or the like in order to produce the reflecting means, and it can be formed using an existing configuration. . Therefore, the reflecting means can be formed without increasing the manufacturing steps of the light emitting device 10.

  FIG. 13 is a partial plan view showing a basic configuration of a light emitting device 120 according to another embodiment of the present invention. The figure shows a plane of the light emitting device 120 arranged with the light emission direction of each light emitting element L as a front side perpendicular to the paper surface. The light emitting signal transmission path 12, the start signal transmission path 16, and the scanning signal transmission path 15 are shown. The gate electrode 19 of the light-emitting element L, the gate electrode 24 of the switch element T, the connection means 14, the light-emitting element light-shielding portion 23, and the surface electrode 25 are shown by hatching for easy illustration. In the same figure, the horizontal direction of the paper, which is the arrangement direction of the switch element array, is defined as the X direction, the right side is the X1 direction, and the left side is the X2 direction. The direction perpendicular to the paper surface, which is the substrate vertical direction, is defined as the Z direction, and the near side is defined as the Z1 direction and the far side is defined as the Z2 direction. The vertical direction of the drawing, which is perpendicular to the X direction and the Z direction, is defined as the Y direction, the upper side is the Y1 direction, and the lower side is the Y2 direction.

  FIG. 14 is a partial cross-sectional view showing the basic configuration of the light emitting device 120 as seen from the section line A5-A5 in FIG. Further, in the drawing, the insulating layer 17 is omitted for easy illustration.

  The light emitting device 120 of the present embodiment and the light emitting device 10 of the embodiment shown in FIG. 4 are connected to connect the light emitting elements L, the switch element array 13 and the switch elements T of the light emitting element array 11. Since only the configuration of the means 14 is different and the other configuration is the same, the same configuration is denoted by the same reference numeral, and the description thereof is omitted.

  In the present embodiment, the connection means 14 includes a portion constituting the light emitting element connection portion 51 in the third semiconductor layer (N type) 34 of the light emitting element L described above and the third semiconductor layer (N of the switch element T described above). Type) 44 and a portion constituting the switch element connecting portion 52. The light emitting element connection part 51 and the switch element connection part 52 are integrally formed. That is, the first semiconductor layer (N type) 32 of the light emitting element L and the first semiconductor layer (N type) 42 of the switch element T are integrally formed, and the second semiconductor layer (P type) of the light emitting element L. 33 and the second semiconductor layer (P type) 43 of the switch element T are integrally formed, the third semiconductor layer (N type) 34 of the light emitting element L and the third semiconductor layer (N type of the switch element T). 44) are integrally formed.

  The signal path extending portion 21 of the light emission signal transmission path 12 is along the surfaces of the third semiconductor layer (N type) 34 of the light emitting element L and the third semiconductor layer (N type) 44 of the switch element T in the Y direction. , And extends to the vicinity of the center between the fourth semiconductor layer (P type) 35 of the light emitting element L and the fourth semiconductor layer (P type) 45 of the switch element T. The light shielding layer 18 extends toward the light emitting element L along the surface of the insulating layer 17 and covers the end of the signal path extending portion 21 on the switch element T side.

  By configuring the connection means 14 in this way, a metal layer is formed as in the light emitting device 10 of the above-described embodiment in order to connect the gate electrode 19 of the light emitting element L and the gate electrode 24 of the switch element T. Therefore, the number of manufacturing steps can be reduced, and the light emitting element L and the switch element T can be brought closer to each other in the Y direction. Therefore, the light emitting chip constituting the light emitting device 120 can be formed smaller. And can be downsized.

  Next, an image forming apparatus 87 according to an embodiment of the present invention configured using the light emitting device of the present invention will be described.

  FIG. 15 is a side view showing a basic configuration of an image forming apparatus 87 having the light emitting device 10 shown in FIG. The image forming apparatus 87 is an electrophotographic image forming apparatus, and the light emitting device 10 is used as an exposure device for the photosensitive drum 90. In the present embodiment, a plurality of light emitting devices 10 and driving means 73 are mounted on a circuit board. The plurality of light emitting devices 10 mounted on the circuit board are simply referred to as the light emitting devices 10.

  The image forming apparatus 87 is an apparatus that employs a tandem system that forms four color images of Y (yellow), M (magenta), C (cyan), and K (black), and is roughly divided into four light emitting elements. Devices 10Y, 10M, 10C, 10K, lens arrays 88Y, 88M, 88C, 88k as condensing means, circuit board 31 on which the light emitting device 10 and driving means 73 are mounted, and a first holder 89Y for holding the lens array 88. 89M, 89C, 89K, four photosensitive drums 90Y, 90M, 90C, 90K, four developer supply means 91Y, 91M, 91C, 91K, a transfer belt 92 as transfer means, and four cleaners 93Y, 93M, 93C. , 93K, four chargers 94Y, 94M, 94C, 94K, a fixing means 95 and a control means 96.

  Each light emitting device 10 is driven by the driving means 73 based on the color image information of each color. The length W11 in the X direction of the four light emitting devices 10 is selected from 200 mm to 400 mm, for example.

  Light from the light emitting element L of each light emitting device 10 is condensed and irradiated onto each of the photosensitive drums 90C, 90M, 90Y, and 90K via the lens array 88. The lens array 88 includes, for example, a plurality of lenses respectively disposed on the optical axis of the light emitting element L, and is configured by integrally forming these lenses.

  The circuit board on which the light emitting device 10 is mounted and the lens array 88 are held by the first holder 89. By the holder 89, the light irradiation direction of the light emitting element L and the optical axis direction of the lens of the lens array 88 are aligned so as to be substantially aligned.

  Each of the photoconductive drums 90Y, 90M, 90C, and 90K is formed, for example, by adhering a photoconductive layer on the surface of a cylindrical substrate, and the outer peripheral surface receives light from the light emitting devices 10Y, 10M, 10C, and 10K. Then, an electrostatic latent image forming position where the electrostatic latent image is formed is set.

  The exposed photosensitive drums 90Y, 90M, 90C, and 90K are sequentially exposed at the periphery of the photosensitive drums 90Y, 90M, 90C, and 90K toward the downstream side in the rotational direction with respect to the electrostatic latent image forming positions. Developer supply means 91Y, 91M, 91C, 91K for supplying developer to the transfer belt 92, cleaners 93C, 93M, 93Y, 93K, and chargers 94Y, 94M, 94C, 94K are arranged, respectively. A transfer belt 92 that transfers an image formed on the photosensitive drum 90 with a developer onto a recording sheet is provided in common to the four photosensitive drums 90Y, 90M, 90C, and 90K.

  The photosensitive drums 90Y, 90M, 90C, and 90K are held by a second holder, and the second holder and the first holder 89 are relatively fixed. The photoconductor drums 90Y, 90M, 90C, and 90K are aligned so that the rotation axis directions of the respective photoconductor drums 90Y and the X direction of the respective light emitter chip assemblies 86 substantially coincide with each other.

  The recording sheet is conveyed by the transfer belt 92, and the recording sheet on which an image is formed by the developer is conveyed to the fixing unit 95. The fixing unit 95 fixes the developer transferred to the recording sheet. The photosensitive drums 90Y, 90M, 90C, and 90K are rotated by a rotation driving unit.

  The control unit 96 provides a clock signal and image information to the driving unit 73 described above, and also includes a rotation driving unit that rotates the photosensitive drums 90Y, 90M, 90C, and 90K, a developer supply unit 91Y, 91M, 91C, and 91K, Each part of the transfer means 92, the charging means 94Y, 94M, 94C, 94K and the fixing means 95 is controlled.

  In the image forming apparatus 87 having such a configuration, bias light and leakage light are not generated from the light emitting device 10 used as the exposure apparatus, so that a high quality image can be formed. In addition, since the light emitting device 10 in which the switch element T and the light emitting element L by the light emitting thyristor are integrated is used for the exposure apparatus, such an exposure apparatus can be manufactured at low cost, thereby manufacturing the image forming apparatus 87. Cost can be reduced. Even if the light emitting device 10 of the image forming apparatus 87 of the present embodiment is replaced with the light emitting device 120, the same effect can be achieved.

  In addition, this invention is not limited to the above-mentioned form, A various change, improvement, etc. are possible in the range which does not deviate from the summary of this invention.

It is sectional drawing which shows the basic composition of the light emitting thyristor 115 of the 1st Embodiment of this invention, and is a figure which shows the impurity concentration and band gap of each layer. In the light emitting thyristor 115 according to the first embodiment of the present invention, it is a diagram showing the light emission intensity of the light emitting thyristor 115 when the impurity concentration of the second region 106 is changed. It is sectional drawing which shows the basic composition of the light emitting thyristor 116 of the 2nd Embodiment of this invention, and is a figure which shows the impurity concentration and band gap of each layer. It is a top view which shows the basic composition of the light-emitting device 10 of one Embodiment of this invention. FIG. 5 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line A1-A1 in FIG. 4. FIG. 5 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line A2-A2 in FIG. 4. FIG. 5 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line A3-A3 in FIG. 4. FIG. 5 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line A4-A4 in FIG. 4. FIG. 5 is a circuit diagram showing a partial equivalent circuit showing a basic configuration of the light emitting device 10 shown in FIG. 4. The drive means 73 supplies the start signal φS to the start signal transmission path 16, the first scanning signal φ1 to be applied to the first scanning signal transmission path 15a, the second scanning signal φ2 to be applied to the second scanning signal transmission path 15b, and the third scanning signal. Waveforms indicating the third scanning signal φ3 applied to the transmission line 15 and the light emission signal φE applied to the light emission signal transmission path 12, the light emission intensity of the light emitting element L1, and the light emission intensity of the scanning start switch element T0 and the switch elements T1 to T4. FIG. It is a wave form diagram showing the change of the threshold voltage of switch element T1, T4, T7 connected to the 1st scanning signal transmission line 15a. 3 is a diagram illustrating forward current-voltage characteristics of a switch element T in the light emitting device 10 and a range of a high level voltage V _H of first to third scanning signals φ1 to φ3 given to each switch element T. FIG. It is a partial top view which shows the basic composition of the light-emitting device 120 of other embodiment of this invention. FIG. 14 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 120 as viewed from a section line A5-A5 in FIG. 13. 2 is a side view showing a basic configuration of an image forming apparatus 87 having a light emitting device 10. FIG. It is sectional drawing which shows the basic composition of the conventional light emitting thyristor 114. 4 is a graph showing current-voltage characteristics when a forward current is applied from a front surface electrode (anode electrode) 110 to a back surface electrode (cathode electrode) 111 of the light emitting thyristor 114. It is a circuit diagram which shows the schematic circuit structure of the basic structure of the light emitting device 1 of the 1st prior art which has a self-scanning function. It is a circuit diagram which shows the schematic circuit structure of the basic structure of the light-emitting device 2 of the 2nd prior art which has a self-scanning function.

Explanation of symbols

115,116 Light-emitting thyristor 10,120 Light-emitting device 101 Substrate (N-type)
102 First semiconductor layer (N-type)
103 Second semiconductor layer (P type)
104 Third semiconductor layer (N-type)
105 1st area | region 106 2nd area | region 107 4th semiconductor layer (P type)
108 Fifth semiconductor layer (P type)
110 Surface electrode (anode electrode)
111 Back electrode (cathode electrode)
DESCRIPTION OF SYMBOLS 112 Gate electrode 11 Light emitting element array 12 Light emission signal transmission path 13 Switch element array 14 Connection means 15 Scan signal transmission path T0 Scan start switch element 16 Start signal transmission path 17 Insulating layer 18 Light-shielding layer L Light emitting element T Switch element

Claims (5)

On the substrate, a first semiconductor layer of either N-type or P-type conductivity, a second semiconductor layer of a conductivity type opposite to the first semiconductor layer, a third semiconductor layer of the same conductivity type as the first semiconductor layer, And a light emitting thyristor in which a fourth semiconductor layer having a conductivity type opposite to that of the first semiconductor layer is laminated in this order,
The band gap of the third semiconductor layer is substantially the same as the band gap of the second semiconductor layer, and is narrower than the band gaps of the first and fourth semiconductor layers,
The third semiconductor layer includes a first region on the substrate side and a second region on the opposite side of the substrate, and the impurity concentration of the first region is lower than the impurity concentration of the second region. Yes,
The impurity concentration of the second semiconductor layer is substantially the same as or higher than the impurity concentration of the first region of the third semiconductor layer, and lower than the impurity concentration of the first semiconductor;
The light emitting thyristor, wherein the impurity concentration of the fourth semiconductor layer is substantially the same as or higher than the impurity concentration of the second region of the third semiconductor layer.   A fifth semiconductor layer having the same conductivity type as the fourth semiconductor layer is stacked on the opposite side of the fourth semiconductor layer from the substrate, and the band gap of the fifth semiconductor layer is equal to the band gap of the fourth semiconductor layer. 2. The light emitting thyristor according to claim 1, wherein the light emitting thyristor is substantially the same or wider, and the impurity concentration of the fifth semiconductor layer is substantially the same as or higher than the impurity concentration of the fourth semiconductor layer. (A) a light emission signal transmission path for transmitting a light emission signal;
(B) A light-emitting element array in which a plurality of light-emitting elements connected to the light-emitting signal transmission path are arranged with a space therebetween,
(B1) The light emitting element includes the light emitting thyristor according to claim 1 or 2,
(B2) When the light emitting thyristor constituting the light emitting element is applied with the light emission signal between the anode electrode and the cathode electrode in a state where the threshold voltage is lowered by applying a trigger signal to the gate electrode, the light emission A light emitting element array that emits light from a thyristor;
(C) a plurality of scanning signal transmission paths for transmitting scanning signals;
(D) A switch element array in which a plurality of switch elements connected to the scanning signal transmission path are arranged one-dimensionally with a space between each other,
(D1) The connection between the plurality of switch elements and the scanning signal transmission path is such that the scanning signals are given at different timings in the switch elements adjacent in the arrangement direction,
(D2) The switch element includes the light-emitting thyristor according to claim 1 or 2,
(D3) The light-emitting thyristor constituting the switch element is disposed so as to receive the light emission of the light-emitting thyristor adjacent in the arrangement direction,
(D4) The scanning signal is applied between the anode electrode and the cathode electrode in a state where the threshold voltage is lowered by the light emitting thyristor constituting the switch element receiving the light emission of the light emitting thyristor adjacent in the arrangement direction. A switch element array for causing the light emitting thyristor to emit light and generating a trigger signal at the gate electrode;
(E) A light emitting device comprising: a connecting means for electrically connecting a gate electrode of a light emitting thyristor constituting the switch element and a gate electrode of the light emitting thyristor constituting the light emitting element.   The light-emitting device according to claim 3, further comprising a light-shielding unit configured to shield light emitted from the switch element so that light emitted from the light-emitting element is not interfered with by light emitted from the switch element. A light emitting device according to claim 3 or 4,
Driving means for driving the light emitting device based on image information;
Condensing means for condensing light from the light emitting element of the light emitting device on the photosensitive drum;
Developer supplying means for supplying the developer to the exposed photosensitive drum by which light from the light emitting device is condensed on the photosensitive drum by the condensing means;
Transfer means for transferring an image formed by a developer on the photosensitive drum to a recording sheet;
An image forming apparatus comprising: fixing means for fixing the developer transferred to the recording sheet.

Images