JP2006286981A - Light-emitting apparatus and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light-emitting apparatus capable of selectively causing only the predetermined light-emitting diode elements among a plurality of arranged light-emitting elements to emit a light with the small number of signal transmission paths as much as possible without complicating the structure of the apparatus and having improved productivity, and to provide an image forming apparatus provided with the same. <P>SOLUTION: A switch element array 13 is configured so that a threshold voltage or a threshold current of another adjacent switch element T is changed by a light generated in an on-state of each of switch elements T formed by laminating a thyristor constituent portion TS and a diode constituent portion TD. With this configuration, the light emission of the switch element T can successively transfer a light-emitting state. A gate 24 of each of the switch elements T is connected to a cathode of each of light-emitting elements L by a connection means 14, a light-emitting signal ϕE is given to the light-emitting element L in a state where the switch element T is on, thereby enabling the light-emitting element L to selectively emit a light, and thus, the entire structure can be simplified. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a light emitting device that selectively emits light from a light emitting diode element that is arranged, and an image forming apparatus including the light emitting device.

  By using a light-emitting thyristor having a PNPN structure as a light-emitting element and realizing self-scanning of light emission by the light-emitting thyristor, light emission that can be easily mounted on a substrate when used in an optical printer head and can be made compact. There is a device (for example, see Patent Documents 1, 2, 3, 4, and 5).

  FIG. 30 is a circuit diagram showing a schematic circuit configuration of a basic structure of the light emitting device 1 of the first conventional technique having a self-scanning function. When the light emitting thyristor T0 and the light emitting thyristors T1, T2,..., Tn-1, Tn are arranged on a substantially straight line and a predetermined light emitting thyristor emits light, It is configured to be incident. The start light emitting thyristor T0 and the light emitting thyristors T1, T2,..., Tn−1, Tn may be collectively referred to simply as the light emitting thyristor T.

The light emitting thyristor T has a characteristic that light is received and a threshold voltage thereof is reduced. For this reason, the threshold voltage of the light emitting thyristor that is close in distance to the light emitting thyristor T that emits light is lowered. Three transfer clock lines CL1, CL2, CL3 are repeatedly connected to the anode of each light emitting thyristor T for each of the three light emitting thyristors. Current sources I ₁ , I ₂ , and I ₃ are connected to the transfer clock lines CL1, CL2, and CL3, respectively, and the amount of current is controlled by the light emission clock pulse φE.

  FIG. 31 is a waveform diagram for explaining the operation of the light-emitting device 1. In FIG. 31, φS represents a start pulse applied to the start light emitting thyristor T0, φ1 to φ3 represent first to third clock pulses applied to the transfer clock lines CL1 to CL3, and L (T0) to L (Tn) represents the light emission intensity of the light emitting thyristor T, respectively.

  First, the start pulse φS changes from the low level to the high level, whereby the start light emitting thyristor T0 changes from the off state to the on state. The light from the start light-emitting thyristor T0 enters the adjacent light-emitting thyristor T1, thereby reducing the threshold voltage of the light-emitting thyristor T1. Since the light emitting thyristor T on the downstream side in the scanning direction from the light emitting thyristor T2 is farther from the start light emitting thyristor T0 than the light emitting thyristor T1, the incident light from the start light emitting thyristor T0 is weak, and the threshold voltage decrease is small. As the distance from the start light-emitting thyristor T0 increases, the incident light becomes weaker and the change in threshold voltage becomes smaller. In this state, when the first clock pulse φ1 next changes from the low level to the high level, the threshold voltage of the light emitting thyristor T1 is lowered by receiving the light from the start light emitting thyristor T0. T1 changes from the off state to the on state. Since the light-emitting thyristor T4 connected to the transfer clock line CL1 is sufficiently away from the start light-emitting thyristor T0, the threshold voltage hardly decreases. Therefore, only the light emitting thyristor T1 is turned on. The start light emission thyristor T0 changes from the on state to the off state by setting the start pulse φS to a low level. As a result, the ON state is transferred from the start light-emitting thyristor T0 to the light-emitting thyristor T1.

  Similarly, when the first to third clock pulses φ1 to φ3 applied to the transfer clock lines CL1 to CL3 change as shown in FIG. 31, the light emitting thyristor T1 to the light emitting thyristor T2, the light emitting thyristor T2 to the light emitting thyristor T3, The on state, that is, the light emission state is transferred over time. Here, when only the third clock pulse φ3 is at a high level and the light-emitting thyristor T3 is in the on state, the light from the light-emitting thyristor T3 is most strongly incident on the adjacent light-emitting thyristors T2 and T4. The threshold voltage of T2 and T4 decreases. Since the light emitting thyristors T1 and T5 are farther from the light emitting thyristor T3 than the light emitting thyristors T2 and T4, the light incident from the light emitting thyristor T3 is weak, and the threshold voltage does not decrease much.

In this state, when the first clock pulse φ1 changes to a high level, the threshold voltage V _TH (T4) of the light emitting thyristor T4 is further lowered as compared with the threshold voltage V _TH (T1) of the light emitting thyristor T1. Therefore, by setting the high level voltage V _H of the clock pulse as V _TH (T4) <V _H <V _TH (T1), only the light emitting thyristor T4 is turned on, and the light emitting thyristor T1 is maintained in the off state. . The light emitting thyristor T3 is turned off by setting the third clock pulse φ3 to a low level, and the on state is transferred from the light emitting thyristor T3 to the light emitting thyristor T4.

  In this way, by setting the high levels of the first to third clock pulses φ1, φ2, and φ3 so as to slightly overlap each other, the ON state of the light emitting thyristor T is sequentially transferred along the arrangement direction of the light emitting thyristors T. It will be done.

  In such a light emitting device 1, as shown in FIG. 31, for example, when the light emitting thyristor T3 emits light strongly, the light emitting clock pulse φE is set to the high level in accordance with the timing at which the light emitting thyristor T3 emits light. As a result, the amount of current increases only in the on-state light-emitting thyristor T3, so that the light emission intensity of the light-emitting thyristor T3 can be increased.

  However, in the light emitting device 1, as is apparent from the waveform diagrams of the light emission intensities L (T0) to L (T5) shown in FIG. 31, the light emitting thyristors T other than the light emitting thyristor T that performs writing also generate a certain amount of bias light. . This is because light emission is caused by the current for maintaining the ON state. However, when the light emitting device 1 is applied to an optical printer head, it causes deterioration in image quality. In view of such a problem, a light emitting device of a second conventional technique in which a light emitting element for writing and a thyristor to which an ON state is transferred to select the light emitting element are separately provided, and the thyristor is electrically controlled. There is.

  In the light emitting device of the first conventional technique, the light emitted from the light emitting thyristor T is received, and the light emitting thyristor T adjacent to the light emitting thyristor T emits light, so that light is transmitted between the light emitting thyristors T. High efficiency is required. Further, as described above, there is a problem that image quality deteriorates when applied to an optical printer head due to generation of bias light for transferring the ON state of the light emitting thyristor T.

  FIG. 32 is a circuit diagram showing a schematic circuit configuration of the basic structure of the light emitting device 2 of the second prior art having a self-scanning function. The light emitting device 2 includes a switch thyristor array in which switch thyristors T1, T2,..., Tn-1, Tn are arranged in a substantially straight line, and light emitting thyristors L1, L2,. And a light emitting thyristor array arranged in a straight line. When the switch thyristors T1, T2,..., Tn−1, Tn are collectively referred to, they are simply referred to as switch thyristors T, and when the light emitting thyristors L1, L2,. May be described.

In the light emitting device 2, the switch thyristor T1, T2,..., Tn-1, Tn and the light emitting thyristor L1, L2,. The gate is connected. For example, the switch thyristor Tn arranged nth from the upstream side in the scanning direction and the gate of the light emitting thyristor Ln arranged nth from the upstream side in the scanning direction are connected. The gate of the switch thyristor T1 is connected to the first signal input line S. The gate of each switch thyristor T is connected to the control power supply V _GK via the load resistor _RL , and two transfer clock lines CL1 and CL2 are repeated for each of the two switch thyristors on the anode electrode. Connected. For example, the switch thyristors T1 and T3 are connected to the transfer clock line CL2, and the switch thyristors T2 and T4 are connected to the transfer clock line CL1, for example.

  Further, the gate of the switch thyristor T2, the gate of the switch thyristor T1, and the transfer direction designation diode D are connected, and thereafter the gates of the adjacent switch thyristors T are similarly connected via the transfer direction designation diode D. . The transfer direction designating diode D has an anode connected to the gate of the switch thyristor on the downstream side in the transfer direction. The anode of the light emitting thyristor L is connected to the second signal input line E, and the cathode is grounded.

  FIG. 33 is a waveform diagram for explaining the operation of the light-emitting device 2. In FIG. 33, φS represents a start pulse applied to the first signal input line S, φ1 and φ2 represent first and second clock pulses applied to the transfer clock lines CL1 and CL2, respectively, and φE represents A light emission clock pulse applied to the second signal input line E is represented, and L represents a light emission intensity of the light emission thyristor T1.

  The transfer starts when the start pulse φS changes from the high level to the low level. As a result, the threshold voltage of the switch thyristor T1 is electrically reduced. At this time, the switch thyristor T1 is turned on by changing the second clock pulse φ2 from the low level to the high level. In the switch thyristor T on the downstream side of the switch thyristor T2, the voltage applied to the gate of the switch thyristor T increases by the forward voltage drop of the diode D as the distance from the switch thyristor T1 increases. For this reason, since the gate of the switch thyristor T3 to which the same transfer clock line CL2 is connected is connected to the gate of the switch thyristor T1 via two diodes D, the threshold voltage of the switch thyristor T3 is the switch thyristor T1. By giving a start pulse that the threshold voltage of the diode D is increased by two voltages from the gate of the transistor D2, and the high level of the second clock pulse φ2 is less than or equal to the threshold voltage of the switch thyristor T3, Only the switch thyristor T1 is turned on.

  When the light emission clock pulse φE is changed from the low level to the high level in this state, the on condition of the light emitting thyristor L1 whose gate is connected to the gate of the switch thyristor T1 becomes the same as the on condition of the switch thyristor T1. L1 is lit. By returning the light emission clock pulse φE from the high level to the low level, the light emission thyristor L1 is turned off and turned off.

  Next, on-state transfer from the switch thyristor T1 to the switch thyristor T2 will be described. If the second clock pulse φ2 remains at a high level even when the light emitting thyristor L1 is turned off, the on state of the switch thyristor T1 is maintained. At this time, in the switch thyristor T2, the voltage applied to the gate is higher by one diode D than in the light emitting thyristor T1, and the switch thyristor T4 to which the same transfer clock line CL1 is connected has two more diodes D. The voltage applied to the gate increases by the amount. In this state, when the first clock pulse φ1 is changed from the low level to the high level, the first clock pulse φ1 is set so as to be between the threshold voltage of the switch thyristor T2 and the threshold voltage of the switch thyristor T4. If the high level is selected, only the switch thyristor T2 is turned on.

After the switch thyristor T2 is turned on, the switch thyristor T1 is turned off similarly to the light emitting thyristor L1 being turned off by changing the second clock pulse φ2 from the high level to the low level. At this time, since the start pulse φS changes from the low level to the high level, the voltage applied to the gate of the switch thyristor T1 by the transfer direction designation diode D becomes substantially equal to the voltage of the control power supply V _GK , Among the switch thyristors T, the threshold voltage of the switch thyristor T2 is the lowest. In this way, the ON state of the switch thyristor T moves from the switch thyristor T1 to the switch thyristor T2. At this time, when the light emission clock pulse φE is changed from the low level to the high level, the light emission thyristor L2 is turned on to emit light.

  By sequentially repeating the above operation in the switch thyristors T1, T2,..., Tn−1, Tn, the ON state of the switch thyristor T is sequentially transferred, and the light emitting thyristor L can selectively emit light with fewer wires. (For example, see Patent Documents 2, 3, 4, and 5).

  As a third conventional technique, there is a light emitting apparatus in which the switch thyristor T is replaced with a laminated structure of a thyristor and a diode in the light emitting apparatus 2 of the second conventional technique (see, for example, Patent Document 6). In the above-described light emitting devices 1 and 2, since it is necessary to prioritize the light receiving sensitivity and the switching operation, which are functions of the thyristor, in order to transfer the switching signal, the light receiving sensitivity or the switching operation is prioritized. The thyristor does not necessarily match the condition that the external light emission output is maximized, but the light output can be increased by replacing the switch thyristor T with a structure in which the thyristor and the diode are stacked.

JP 49-124992 A Japanese Patent No. 2577034 Japanese Patent No. 2577089 Japanese Patent No. 2683781 JP 2003-243696 A JP 2001-308385 A

As described above, the light emitting device 1 according to the first conventional technique has a problem that image quality deteriorates when applied to an optical printer head or the like due to generation of bias light. In the light emitting device 2 of the second prior art and the light emitting device of the third prior art, a switch thyristor or a thyristor and a diode are stacked as a switch element that is electrically driven for transferring a switching signal. Since the light emission state of the light emitting thyristor L as the light emitting element is transferred by using the light emitting element and electrically controlled, the transfer direction designation diode D for designating the transfer direction and the gate terminal of the switch thyristor are applied. A load resistor _RL for controlling the voltage is required, and these are formed by using a part of the thyristor structure. For this reason, there is a problem that demands for each semiconductor layer increase, process control becomes strict in manufacturing, and productivity is inferior.

  Therefore, an object of the present invention is to selectively emit only a predetermined light emitting diode element among a plurality of arranged light emitting elements with as few signal transmission paths as possible without complicating the structure of the apparatus. Another object is to provide a light emitting device with improved productivity and an image forming apparatus including the same.

The present invention includes a plurality of light emitting elements that emit light when a light emission signal is applied to the other of the anode or the cathode in a state where a trigger signal is applied to either the anode or the cathode, and the plurality of light emitting elements are mutually connected. A light emitting diode element array arranged at intervals,
A light-emitting signal transmission path that is connected to either the anode or the cathode of each light-emitting diode element and transmits the light-emitting signal to the light-emitting diode element;
A trigger signal is generated at a predetermined site by light reception, a threshold voltage or a threshold current is lower than a voltage or current of a scanning signal, and a plurality of switch elements emit light when the scanning signal is given, A switch element array arranged so as to be spaced from each other so that the switch elements receive light from adjacent switch elements;
Connection means for connecting the other of the anode and the cathode of each light emitting diode element and a predetermined part of each switch element;
A light emitting device comprising: a plurality of scanning signal transmission paths for transmitting the scanning signal provided at different timings for each switching element connected to each switching element and adjacent in the arrangement direction.

In the present invention, the switch element is
A first conductive semiconductor layer formed on a substrate and formed of a non-light-emitting semiconductor material or a one-conductive semiconductor substrate formed of a non-light-emitting semiconductor material;
A first other-conductivity-type semiconductor layer that is stacked on the first one-conductivity-type semiconductor layer or the one-conductivity-type semiconductor substrate and is formed of a non-light-emitting semiconductor material;
A second one-conductivity-type semiconductor layer stacked on the first other-conductivity-type semiconductor layer and formed of a non-light-emitting semiconductor material;
A second other conductivity type semiconductor layer stacked on the second one conductivity type semiconductor layer and formed of a non-light emitting semiconductor material;
And a third one-conductivity-type semiconductor layer and a third other-conductivity-type semiconductor layer, each of which is sequentially stacked on the second other-conductivity-type semiconductor layer, each formed of a light-emitting semiconductor material. To do.

Further, according to the present invention, the light emitting diode element includes a first conductive semiconductor layer of one conductive type and a second conductive semiconductor layer of the other conductive type, each formed of a light emitting semiconductor material,
The first diode constituent semiconductor layer is formed of the same semiconductor material as the third one-conductivity-type semiconductor layer of the switch element, and the second diode constituent semiconductor layer is the same semiconductor material as the third other-conductivity-type semiconductor layer of the switch element. It is characterized by being formed by.

  Further, according to the present invention, the light emitting diode element is laminated on the substrate, and the first one-conductivity-type semiconductor layer formed of the non-light-emitting semiconductor material or the one-conductivity-type semiconductor substrate formed of the non-light-emitting semiconductor material. A first other-conductivity-type semiconductor layer that is stacked on the first one-conductivity-type semiconductor layer or the one-conductivity-type semiconductor substrate and is formed of a non-light-emitting semiconductor material; and the first other-conductivity-type semiconductor A second one-conductivity-type semiconductor layer formed of a non-light-emitting semiconductor material and a second one-conductivity-type semiconductor layer formed of a non-light-emitting semiconductor material. The other conductive type semiconductor layer is laminated and formed.

  In the invention, it is preferable that the non-light-emitting semiconductor material is silicon containing impurities.

  Further, the present invention is characterized by including a light shielding means for shielding the light emitted from the switch element so that the light emitted from the switch element does not interfere with the light emitted from the light emitting diode element.

The present invention also provides the light emitting device;
Driving means for driving the light emitting device based on image information;
Condensing means for condensing light from the light emitting element of the light emitting device on the photosensitive drum;
Developer supplying means for supplying the developer to the exposed photosensitive drum by which light from the light emitting device is condensed on the photosensitive drum by the condensing means;
Transfer means for transferring an image formed by a developer on the photosensitive drum to a recording sheet;
An image forming apparatus comprising: fixing means for fixing the developer transferred to the recording sheet.

  According to the present invention, when one switch element emits light among the plurality of switch elements of the switch element array, the light of the emitted switch element is transmitted to the adjacent switch elements at intervals in the arrangement direction. Received light. The received switch element has a lower threshold voltage or threshold current than the voltage or current of the scanning signal, and is transmitted by a scanning signal transmission line connected to the switch element having the lowered threshold voltage or threshold current. It emits light when given a scanning signal. Since the scanning signals transmitted by the plurality of scanning signal transmission paths are given at different timings for each switching element adjacent in the arrangement direction, the scanning signal is applied to the switching elements whose threshold voltage or threshold current has been reduced by light reception. Thus, the switch elements can emit light sequentially in the arrangement direction.

  When the switch element receives light, a trigger signal is generated at a predetermined portion of the switch element, and this trigger signal is applied to one of the anode and the cathode of the corresponding light-emitting diode element via the connecting means. The light emitting diode element can emit light when a trigger signal is applied to either the anode or the cathode and a light emission signal is applied to the other of the anode or the cathode.

  Each switch element can reduce its threshold voltage or threshold current by receiving light emitted from an adjacent switch element. A diode for designating a transfer direction and a predetermined direction of each switch element There is no need to connect a load resistor or the like connected to the power source. Therefore, only a predetermined light emitting element among a plurality of light emitting elements arranged can be selectively caused to emit light with as few signal transmission paths as possible without complicating the structure of the apparatus. Further, since the structure of the device is simplified as compared with the light emitting device of the second prior art, the manufacturing process can be reduced and the productivity of the device can be improved.

  According to the present invention, the switch element includes a first one-conductivity-type semiconductor substrate or a first one-conductivity-type semiconductor layer stacked on the substrate, a first other-conductivity-type semiconductor layer, and a second one-conductivity-type semiconductor layer. And a second light emitting thyristor structure formed by four semiconductor layers stacked in this order, and the second other conductive semiconductor layer, and the second other conductive semiconductor layer, On the other hand, a conductive semiconductor layer and a third other conductive semiconductor layer have a light emitting diode structure formed by two semiconductor layers stacked in this order. Thus, by having the portion that becomes the thyristor structure and the portion that becomes the light emitting diode structure, the light receiving characteristics and the switching characteristics are optimized in the thyristor structure portion, and in the light emitting diode structure portion, The switch element can be formed so that the light emission characteristics are optimized.

  According to the present invention, the light-emitting diode element is formed of the same semiconductor material as that of the third one-conductivity-type semiconductor layer and the third other-conductivity-type semiconductor layer of the switch element. be able to. Therefore, productivity can be improved. For example, the parasitic capacitance can be reduced as much as possible by manufacturing the light-emitting diode element directly on the substrate or via the buffer layer.

  According to the present invention, since the light-emitting diode element is stacked on the second other-conductivity-type semiconductor layer, it is reverse-biased with the second other-conductivity-type semiconductor layer, and the insulation from the substrate is improved. . Also, a stacked body of a one-conductivity-type semiconductor substrate or a first one-conductivity-type semiconductor layer, a first other-conductivity-type semiconductor layer, a second one-conductivity-type semiconductor layer, and a second other-conductivity-type semiconductor layer. Is the same structure as the thyristor structure portion of the switch element, so that the light-emitting diode element can be formed as the same structure as the switch element, and the light-emitting diode element and the switch element are manufactured simultaneously in a series of manufacturing processes. Can do.

  According to the present invention, the one-conductivity-type semiconductor substrate or the first one-conductivity-type semiconductor layer, the first other-conductivity-type semiconductor layer, the second one-conductivity-type semiconductor layer, and the second other-conductivity-type semiconductor layer. Is formed of silicon containing impurities. Silicon has a small energy gap and can improve light receiving sensitivity by photoexcitation when light is received.

  Further, according to the present invention, each switch element emits light in order along the arrangement direction. Therefore, the light emitting element emits light by shielding this light by the light shielding means so as not to interfere with the light emitted by the light emitting element. In this case, the light quantity of the light emitting element is prevented from being reduced or increased, and a stable light quantity can be obtained.

  According to the invention, the photosensitive drum is driven by driving the light emitting device by a driving unit based on image information and condensing the light from the light emitting device on the charged photosensitive drum by the condensing unit. It is exposed to form an electrostatic latent image on its surface. When the developer is supplied to the photosensitive drum on which the electrostatic latent image is formed by the developer supplying means, the developer adheres to the photosensitive drum and an image is formed. An image formed with the developer on the photosensitive drum is transferred to the recording sheet by the transfer unit, and the developer transferred to the recording sheet is fixed by the fixing unit, whereby an image is formed on the recording sheet.

  The switch elements emit light in order along the scanning direction, but the switch elements and the light emitting elements are separated from each other, and the photosensitive drum is exposed by light emission of the light emitting elements, and the photosensitive drum is exposed by light emission of the switch elements. Therefore, a recorded image with excellent quality can be obtained.

  In addition, the light-emitting element for exposing the photosensitive drum and the switch element for signal transfer can be integrated so that the circuit board for mounting the light-emitting device can be downsized. In addition, since the number of wire bondings with the circuit board and the number of drive ICs to be mounted on the circuit board can be reduced, downsizing and cost reduction can be realized.

  FIG. 1 is a partial plan view showing a basic configuration of a light emitting device 10 according to a first embodiment of the present invention. The figure shows the plane of the light emitting device 10 arranged with the light emitting direction of each light emitting diode element L as the front side perpendicular to the paper surface. The light emitting signal transmission path 12, the scanning signal transmission path 15, the start signal transmission path. 16, the light emitting diode element of the light emitting diode element L, one conductive type semiconductor layer 19, the gate 24 of the switch element T, the connection means 14, the light emitting element light shielding portion 23, the surface electrode 25, and the second other conductive type semiconductor layer of the switch element T. 44 and the third one-conductivity-type semiconductor layer 45, the switch element conductive path 27, the scan start switch element connecting portion 68, and the substrate connecting portion 74 are shown by hatching for easy illustration.

  The light emitting device 10 includes a light emitting element array 11, a light emission signal transmission path 12, a switch element array 13, a connection means 14, first to third scanning signal transmission paths 15a, 15b, and 15c, and a scan start switch element. T0, the start signal transmission line 16, the insulating layer 17, the light shielding layer 18, and the light emitting element light shielding part 23 are comprised. An optical scanning switch device is configured including the switch element array 13, the first to third scanning signal transmission paths 15 a, 15 b, 15 c, and driving means 73.

  The light emitting element array 11 includes a plurality of light emitting diode elements L1, L2,..., Li-1, Li (the symbol i is a positive integer of 2 or more), and each light emitting diode element L1, L2,. Li-1 and Li are arranged at an interval W1 from each other. Hereinafter, when the light emitting diode elements L1, L2,..., Li-1, Li are collectively referred to, and when an unspecified one among the light emitting diode elements L1, L2,. It may be described as element L. The light emitting diode element L is a light emitting element for exposure. In the present embodiment, the light emitting diode elements L are arranged at equal intervals and in a straight line. The arrangement direction X of the light emitting diode elements L is the left-right direction in FIG. Hereinafter, the arrangement direction X of the light emitting diode elements L may be simply referred to as the arrangement direction X. A direction along the light emission direction of each light emitting diode element L is defined as a thickness direction Z, and a direction perpendicular to the arrangement direction X and the thickness direction Z is defined as a width direction Y. The light emitting diode element L is formed so as to emit light having a wavelength of 600 nm to 800 nm.

  The light emitting diode element L is realized by a light emitting diode element having a PN structure formed by stacking a P-type semiconductor layer and an N-type semiconductor layer. In the light emitting diode element L, the light emitting diode element L is supplied with the light emission signal φE to the second diode constituting semiconductor layer 47 in a state where the trigger signal is given to the first diode constituting semiconductor layer 36, and the light emitting diode element L Light is emitted when a forward bias voltage is applied to or when a forward bias current flows.

  The interval W1 between the light emitting diode elements L in the arrangement direction X and the length W2 of the light emitting diode elements L in the arrangement direction X depend on the resolution of an image to be formed in an image forming apparatus 87 described later on which the light emitting device 10 is mounted. For example, when the resolution of the image is 600 dot per inch (dpi), the interval W1 is selected to be about 24 μm (micrometer), and the length W2 is selected to be about 18 μm. The length W2 is selected so that the light emitting element light-shielding portion 23 can be formed between the adjacent light emitting diode elements L. The dimension in the arrangement direction X of the light emitting diode elements L is selected to be smaller than the dimension in the width direction Y of the light emitting diode elements L. This prevents the light quantity of the light emitting diode elements L from becoming insufficient when the light emitting diode elements L are brought close to each other in the arrangement direction X to increase the integration density.

  The light emission signal transmission path 12 is connected to each light emitting diode element L, and transmits the light emission signal φE to each light emitting diode element L. The light emitting signal transmission path 12 is formed by a conductive material such as a metal material and an alloy material so as to reflect light having a wavelength emitted from the light emitting diode element L. Specifically, the light emission signal transmission path 12 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like. .

  The light emission signal transmission path 12 is adjacent to the width direction Y of each light emitting diode element L, and a signal path extension portion 21 extending along the light emitting element array 11 and a signal path spaced from each other in the arrangement direction X. It has the element connection part 22 which protrudes in the width direction other Y2 from the extension part 21, and is connected to the thickness direction one end part of each light emitting diode element L. As shown in FIG. In the present embodiment, in the width direction Y, the light emitting element transmission path 12 is arranged apart from the light emitting element L in the other width direction Y1 of the light emitting diode element L.

  The switch element array 13 includes a plurality of switch elements T1, T2,..., Tj-1, Tj (the symbol j is a positive integer of 2 or more), and each switch element T1, T2,. 1 and Tj are arranged at an interval W3 so as to receive light from adjacent switch elements T1, T2,..., Tj−1, Tj. Hereinafter, when the switch elements T1, T2,..., Tj-1, Tj are collectively referred to and when an unspecified one of the switch elements T1, T2,. May be described. The switch element T is a light emitting element for switching. In the present embodiment, the switch elements T are arranged at equal intervals. Each switch element T is adjacent to the light emitting element array 11 in the width direction Y, and is linearly arranged along the light emitting element array 11 so as to face the plurality of light emitting diode elements L. Therefore, the arrangement direction of the switch elements is the same as the arrangement direction X of the light emitting diode elements L. The dimension in the arrangement direction X of the switch elements T is selected to be smaller than the dimension in the width direction Y of the switch elements T. Thus, when the switch elements T are brought close to each other in the arrangement direction X and the integration density is increased, it is possible to prevent the switch elements T from being insufficient in light quantity.

  The switch element T includes a thyristor structure portion TS having a PNPN structure formed by alternately stacking P-type semiconductor layers and N-type semiconductor layers, and a diode structure portion TD having a PN structure stacked on the thyristor structure portion TS. And have. The thyris structure portion TS has negative resistance characteristics similar to those of the reverse blocking three-terminal thyristor. The switch element T generates a trigger signal at the gate 24 of the thyristor structure portion TS which is a predetermined portion by light reception, and the threshold voltage is lower than the voltage of the scanning signal φ given through the scanning signal transmission path 15. When the scanning signal φ is given, or when the threshold current is lower than the current of the scanning signal φ and the scanning signal φ is given, light is emitted. The voltage of the scanning signal φ is a voltage applied between the anode and the cathode of the switch element T when the scanning signal φ is given, and the current of the scanning signal φ is a switch when the scanning signal φ is given. This is a current applied to the element T.

  The thyristor structure portion TS and the diode structure portion TD are connected by a switch element conductive path 27. The switch element conductive path 27 electrically connects a semiconductor layer in contact with the diode structure portion TD in the thyristor structure portion TS and a semiconductor layer in contact with the thyristor structure portion TS in the diode structure portion TD.

  In the present embodiment, the numbers of the light emitting diode elements L and the switch elements T are equal, that is, i and the symbol j are selected to be equal numbers.

  Since the interval W3 between the switch elements T in the arrangement direction X is limited in the manufacturing process, it is formed at least twice the height in the thickness direction Z of the switch elements T, but is selected to be less than 20 μm, preferably 10 μm. Selected below. In the present embodiment, the height of the switch element T is about 4 μm, and in this case, the interval W3 is about 8 μm. When the interval W3 is 20 μm or more, the transmission efficiency is greatly reduced.

  The length W4 in the arrangement direction X of the switch elements T is defined by the interval W1 between the light emitting diode elements L in the arrangement direction X, the length W2 in the arrangement direction X of the light emitting diode elements L, and the switch elements T in the arrangement direction X. And the interval W3. That is, the length obtained by adding the interval W1 between the light emitting diode elements L in the arrangement direction X and the length W2 in the arrangement direction X of the light emitting diode elements L, and the interval W3 between the switch elements T in the arrangement direction X and the switch elements T The length obtained by adding the length W4 in the arrangement direction X is selected equally.

  The connection means 14 electrically connects the first diode constituent semiconductor layer 35 of each light emitting diode element L and the gate 24 which is the predetermined portion of each switch element T corresponding to each light emitting diode element L. Specifically, the connecting means 14 electrically connects the first diode-configured semiconductor layer 35 of the light-emitting diode element L1 and the gate 24 of the switch element T1, and connects the first diode-configured semiconductor layer 35 of the light-emitting diode element L2 to the first diode-configured semiconductor layer 35. , Electrically connecting the gate 24 of the switch element T2, and electrically connecting the first diode constituting semiconductor layer 35 of the light emitting diode element Li-1 and the gate 24 of the switch element Tj-1. The first diode constituent semiconductor layer 35 of the diode element Li and the gate 24 of the switch element Tj are electrically connected individually.

  The connection means 14 is realized by a conductive path formed of a conductive material such as a metal material and an alloy material. Specifically, the connecting means 14 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like.

  The first, second, and third scanning signal transmission paths 15a, 15b, and 15c are connected to each switch element T, and are provided at different timings for each switch element T adjacent in the arrangement direction X. Scan signals φ1 to φ3 are transmitted. In the present embodiment, the first scanning signal transmission path 15a transmits the first scanning signal φ1, the second scanning signal transmission path 15b transmits the second scanning signal φ2, and the third scanning signal transmission path 15c The third scanning signal φ3 is transmitted. When generically referring to the first, second and third scanning signal transmission lines 15a, 15b and 15c, and when indicating an unspecified one among the first, second and third scanning signal transmission lines 15a, 15b and 15c, When it is simply described as the scanning signal transmission line 15 and generically refers to the first to third scanning signals φ1, φ2, and φ3, and when it indicates an unspecified one among the first to third scanning signals φ1, φ2, and φ3, In some cases, it is simply described as a scanning signal φ. The scanning signal transmission path 15 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like.

  The first, second, and third scanning signal transmission paths 15a, 15b, and 15c are formed so as to overlap each switch element T through the insulating layer 17 in one thickness direction Z1 of each switch element T, and along the arrangement direction X. Extend. The first, second and third scanning signal transmission paths 15a, 15b and 15c are arranged with a predetermined interval W5 in the width direction Y. The predetermined interval W5 is selected as a distance that does not cause a short circuit between the first, second, and third scanning signal transmission paths 15a, 15b, and 15c, and is selected to be 10 μm, for example.

  Each switch element T has a surface electrode 25 on one end in the thickness direction Z1, that is, on the front side in the direction perpendicular to the paper surface of FIG. The first, second, and third scanning signal transmission paths 15a, 15b, and 15c are sequentially connected to the surface electrode 25 of each switch element T one by one, and three each along the arranged switch elements T. Every other switch element T is connected. That is, the first scanning signal transmission path 15a is connected to the switch elements T1, T4,..., Tj-2 (the symbol j is an integer and 3 × m, and the symbol m is a natural number), and the second scanning signal transmission path. 15b is connected to the switch elements T2, T5,..., Tj-1, and the third scanning signal transmission path 15c is connected to the switch elements T3, T6,. Therefore, among the switch elements T, the switch element Tn arranged at the nth position in the arrangement direction X (the symbol n is a positive integer that is 2 or more and j or less) and the switch element Tn in the arrangement direction one adjacent to the X1 side. The switch element Tn−1 to be connected and the switch element Tn + 1 adjacent to the other X2 side in the arrangement direction of the switch element Tn are connected to different scanning signal transmission paths 15, respectively.

  The scan start switch element T0 has the same structure as the switch element T, and has a thyristor structure portion T0S having a PNPN structure in which P-type semiconductor layers and N-type semiconductor layers are alternately stacked, and a thyristor structure. A diode structure portion T0D having a PN structure is stacked on the portion T0S. The thyristor structure portion T0S has a negative resistance characteristic similar to that of the reverse blocking three-terminal thyristor. The scanning start switch element T0 emits light when the diode structure portion T0S is supplied with a start signal φ that is forward biased. The scanning start switch element T0 has a surface electrode 25 on one end in the thickness direction Z1, that is, on the front side in the direction perpendicular to the paper surface of FIG.

  The scanning start switch element T0 is disposed so as to irradiate the switch element T disposed at the end of the switch element array 13 in the arrangement direction X with light. In the present embodiment, the scanning start switch element T0 is arranged to irradiate the switch element T1 with light. Therefore, one of the arrangement directions X1 in which the scanning start switch element T0 is arranged is the upstream side of the light scanning direction in the optical scanning device.

  The start signal transmission path 16 is connected to the surface electrode 25 of the scanning start switch element T0, and transmits the start signal φS to the scanning start switch element T0. The start signal transmission line 16 is formed of a conductive material such as a metal material and an alloy material. Specifically, the start signal transmission path 16 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like. .

  The light emitting diode element L, the switch element T, and the scan start switch element T0 described above are covered with an insulating layer 17.

  The light shielding layer 18 covers each switch element T from one side in the thickness direction Z of each switch element T, that is, from the front side perpendicular to the paper surface of FIG. The light emitted from the switch element T is shielded so that the light emitted from the element T does not interfere.

  The light-emitting element light-shielding portions 23 are provided between the light-emitting diode elements L and outside the arrangement direction X of the light-emitting diode elements L at the other end in the arrangement direction of the light-emitting element array 11. Blocks light going to X. The light emitting element light shielding portion 23 is provided apart from the light emission signal transmission path 12 and is electrically insulated from the light emission signal transmission path 12 by the insulating layer 17.

  The light emitting diode element L, the light emitting signal transmission path 12, the switch element T, the connection means 14, the scanning signal transmission path 15, the scanning start switch element T0, the start signal transmission path 16, the insulating layer 17, the light shielding layer 18, and the light emitting element. The light shielding part 23 is formed by being integrated on one substrate 30.

Hereinafter, each configuration of the light emitting device 10 will be described more specifically.
FIG. 2 is a partial cross-sectional view showing the basic configuration of the light emitting device 10 as viewed from the section line D1-D1 of FIG. The light emitting element L includes a first diode constituent semiconductor layer 35 and a second diode constituent semiconductor layer 36.

In the present embodiment, the substrate 30 is formed of a one-conductive type semiconductor material. One surface portion of the substrate 30 in the thickness direction Z is formed in a concavo-convex shape, and a portion where the semiconductor layer is laminated is formed so as to protrude in the thickness direction one Z1. Hereinafter, a portion of the substrate 30 that protrudes in the thickness direction and is stacked with the light emitting element L is referred to as a substrate convex portion 30A, and is retracted from the thickness direction one surface 30Aa of the substrate convex portion 30A to the thickness direction other Z2 in the thickness direction. This portion is referred to as a substrate recess 30B. The substrate convex portion 30A is formed in a substantially rectangular shape. One surface 30Aa in the thickness direction Z of the substrate protrusion 30A and one surface 30Ba in the thickness direction Z of the substrate recess 30B are formed in a plane. In the thickness direction Z, the thickness of the substrate convex portion 30A from the one surface 30Ba of the substrate concave portion 30B is selected from 0.1 μm to 1 μm, for example. In the present embodiment, the substrate 30 is a silicon substrate formed of a silicon material. The carrier density of the substrate 30 is preferably about 1 × 10 ¹⁸ cm ⁻³ .

  On the other surface 30b of the thickness direction Z of the substrate 30, a back electrode 29 is formed. The back electrode 29 is formed over the entire surface of the other surface 30 b in the thickness direction Z of the substrate 30. The back electrode 29 is formed of a conductive material such as a metal material and an alloy material. Specifically, the back electrode 29 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), or the like.

  The light emitting element L is formed by being stacked on the light emitting element forming portion 28. The light emitting element forming unit 28 includes a first other conductive type semiconductor layer 32, a second one conductive type semiconductor layer 33, and a second other conductive type, which are sequentially stacked on one surface 30Aa in the thickness direction Z of the substrate convex portion 30A. A type semiconductor layer 34 is included. The first other conductivity type semiconductor layer 32 is stacked on one surface 30Aa in the thickness direction Z of the substrate protrusion 30A, and the second one conductivity type is provided on one surface 32a in the thickness direction Z of the first other conductivity type semiconductor layer 32. The type semiconductor layer 33 is stacked, and the second other conductive type semiconductor layer 34 is stacked on one surface 33a in the thickness direction of the second one conductive type semiconductor layer 33, whereby the light emitting element forming portion 28 is formed.

  The light emitting element L is formed by being stacked on the second other conductivity type semiconductor layer 34 of the light emitting element forming portion 28. The light emitting element L is formed of a light emitting semiconductor material, and includes a first conductive semiconductor layer 35 having one conductivity type, and a second diode semiconductor layer 36 having a second conductive type, which is formed of a light emitting semiconductor material. Consists of. The first diode constituting semiconductor layer 35 of the light emitting element L is stacked on the one surface 34a of the second other conductivity type semiconductor layer 34 in the thickness direction Z, and the second diode constituting semiconductor layer 36 is disposed on the one surface 35a in the thickness direction 35 of the light emitting element L. Are stacked. An ohmic contact layer 37 is stacked on one surface 36 a in the thickness direction of the second diode-configured semiconductor layer 36.

  The first diode constituting semiconductor layer 35 and the second diode constituting semiconductor layer 36 are formed of, for example, gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), indium gallium phosphide (InGaP), or the like.

The ohmic contact layer 37 is a semiconductor layer of the other conductivity type formed of a semiconductor material such as gallium arsenide (GaAs) and indium gallium phosphide (InGaP), and is used for performing an ohmic junction with the light emitting signal transmission path 12. is there. The carrier density of the ohmic contact layer 37 is desirably 1 × 10 ¹⁹ cm ⁻³ or more.

  The first other-conductivity-type semiconductor layer 32, the second one-conductivity-type semiconductor layer 33, the second other-conductivity-type semiconductor layer 34, the third one-conductivity-type semiconductor layer 35, the first diode-constituted semiconductor layer 35, the third The stacked body in which the second diode-configured semiconductor layer 36 and the ohmic contact layer 37 that are the other conductive type semiconductor layers are stacked has a substantially rectangular parallelepiped shape. The first other conductivity type semiconductor layer 32, the second one conductivity type semiconductor layer 33, the second other conductivity type semiconductor layer 34, the first diode configuration semiconductor layer 35, the second diode configuration semiconductor layer 36, and the ohmic contact layer 37 Is covered with an insulating layer 17. The insulating layer 17 is formed of a resin material having electrical insulation, translucency, and flatness. The insulating layer 17 is formed of polyimide, benzocyclobutene (BCB), or the like.

  A portion of the insulating layer 17 between the adjacent light emitting elements L and a portion between the adjacent light emitting element forming portions 28 are V-shaped in a virtual plane perpendicular to the width direction Y, and A groove portion 38 reaching the one surface 30 a is formed, and the light emitting element light-shielding portion 23 is formed in the groove portion 38. The light-emitting element light-shielding part 23 is formed along the surface of the groove part 38, and is provided from one surface 30 a of the substrate 30 to the side in the arrangement direction X of the ohmic contact layer 37. The light emitting element light-shielding portion 23 is formed between one end and the other end in the width direction Y of the light emitting element L, and the width direction one Y1 and the other width direction of the light emitting element L than the end of the light emitting element L in the width direction Y. Extends to Y2. By forming such a light emitting element light-shielding portion 23, when the adjacent light emitting element L emits light, this light does not spread in the arrangement direction X. Therefore, when used as an exposure apparatus in the image forming apparatus 87 described later, Only the portion to be exposed can be more reliably exposed.

  The element connection portion 22 of the light emission signal transmission path 12 is connected to one surface 37 a of the ohmic contact layer 37 in the thickness direction Z. A through hole 39 is formed in a portion of the insulating layer 17 formed on the one surface 37 a of the ohmic contact layer 37 in the thickness direction Z, and a part of the element connection portion 22 is formed in the through hole 39. Thus, the element connection portion 22 is in contact with the ohmic contact layer 37. The through hole 39 is formed so that the center in the arrangement direction X of the light emitting elements L and the center in the width direction Y of the light emitting elements L are exposed from the insulating layer 17. The light emitting element L can be made to emit light by being efficiently supplied to the central portion of the light emitting element L.

  The length W6 in the arrangement direction X of the element connecting portions 22 of the light emission signal transmission path 12 is formed to be 1/3 or less of the length W2 in the arrangement direction X of the light emitting elements L. The element connection portion 22 covers a part of the light emission direction of the light emitting element L, but by selecting the length W6 as described above, the light emitted from the light emitting element L and blocking the light toward the thickness direction one side Z1 is blocked. As much as possible. Further, a part of the light emitted from the light emitting element L and directed to the thickness direction one Z1 and reflected by the light emitting signal transmission path 12 is reflected by the light emitting element light-shielding portion 23, the substrate 30, and the like, thereby causing the thickness direction one Z Head to.

  FIG. 3 is a partial cross-sectional view showing the basic configuration of the light emitting device 10 as viewed from the section line D2-D2 of FIG. A portion of the substrate 30 that protrudes in the thickness direction and where the switch element T is stacked is referred to as a substrate protrusion 40A. The substrate convex portion 40A protrudes in the thickness direction one Z1 from the substrate concave portion 30B. The substrate convex portion 40A is formed in a substantially rectangular shape. The substrate convex portion 40A on which the switch element T is stacked is formed to have the same thickness as the above-described substrate convex portion 30A on which the light emitting element L is stacked. One surface 40Aa in the thickness direction of the substrate convex portion 40A is formed in a plane. The substrate convex portion 40A and the substrate convex portion 30A are provided apart from each other.

  The switch element T includes a first other-conductivity-type semiconductor layer 42, a second one-conductivity-type semiconductor layer 43, and a second other-conductivity-type semiconductor layer 44 that are formed on one surface 40Aa of the substrate protrusion 40A of the substrate 30. , A third one-conductivity-type semiconductor layer 45, and a third other-conductivity-type semiconductor layer 46. In the switch element T, the first other conductivity type semiconductor layer 42 is laminated on the one surface 41Aa of the thickness direction Z of the substrate protrusion 41A of the substrate 30, and the first other conductivity type semiconductor layer 42 in the thickness direction Z is stacked. A second one-conductivity-type semiconductor layer 43 is laminated on one surface 42a, and a second other-conductivity-type semiconductor layer 44 is laminated on one surface 43a in the thickness direction Z of the second one-conductivity-type semiconductor layer 43, A third one-conductivity-type semiconductor layer 45 is stacked on one surface 44a in the thickness direction Z of the second other-conductivity-type semiconductor layer 44, and the one surface 45a in the thickness direction Z of the third one-conductivity-type semiconductor layer 45 is laminated. A third other conductivity type semiconductor layer 46 is laminated, an ohmic contact layer 47 is laminated on one surface 46 a of the thickness direction Z of the third other conductivity type semiconductor layer 46, and one ohmic contact layer 47 has a thickness direction Z. Surface electrode on surface 47a 5 which are stacked. A first other conductivity type semiconductor layer 42, a second one conductivity type semiconductor layer 43, a second other conductivity type semiconductor layer 44, a third one conductivity type semiconductor layer 45, a third other conductivity type semiconductor layer 46, The laminated body of the ohmic contact layer 47 and the surface electrode 25 has a substantially rectangular parallelepiped shape.

  A thyristor structure portion TS is formed including the substrate 30, the first other conductivity type semiconductor layer 42, the second one conductivity type semiconductor layer 43, and the second other conductivity type semiconductor layer 44, and the third one conductivity type semiconductor. A diode structure portion TD is formed including the layer 45 and the third other conductivity type semiconductor layer 46.

  The energy gap and carrier density of the semiconductor material forming each semiconductor layer constituting the switch element T increase the light receiving sensitivity in the thyristor structure portion TS, and increase the light emission efficiency and the external light emission intensity in the diode structure portion TD. Thus, it is preferable to design each. Specifically, compared with the energy gap of the semiconductor material forming the third one-conductivity-type semiconductor layer 45 and the third other-conductivity-type semiconductor layer 46, the substrate 30, the first other-conductivity-type semiconductor layer 42, and the second The energy gap of the semiconductor material forming the one-conductivity-type semiconductor layer 43 may be reduced. By setting such an energy gap, the light generated in the diode structure portion TD including the third one-conductivity-type semiconductor layer 45 and the third other-conductivity-type semiconductor layer 46 is converted into the thyristor structure portion of the adjacent switch element T. It becomes easy to absorb in TS, and the light receiving sensitivity of the switch element T can be increased.

  The substrate 30, the first other conductivity type semiconductor layer 42, the second one conductivity type semiconductor layer 43, and the second other conductivity type semiconductor layer 44 are composed of a third one conductivity type semiconductor layer 45 and a second other conductivity type. The semiconductor layer 46 is formed of a non-light-emitting semiconductor material having an energy gap smaller than that of the semiconductor material. In this embodiment mode, the semiconductor layer 46 is formed of a silicon (Si) material. Since a silicon substrate is used as the substrate 30, the first other conductivity type semiconductor layer 42, the second one conductivity type semiconductor layer 43, and the second other conductivity type semiconductor layer 44 are formed of a silicon material using an epitaxial growth method. As a result, a laminated body of silicon materials with very few crystal defects can be obtained, and the light receiving efficiency can be improved in the thyristor structure portion TS. Further, the first other conductive type semiconductor layer 42 and the second one conductive type semiconductor layer 43 are converted into semiconductors that form the third one conductive type semiconductor layer 45 and the third other conductive type semiconductor layer 46 in the diode structure portion TD. By forming the semiconductor material with a smaller energy gap than the material, the thyristor structure portion TS is easily photoexcited by the energy of light received from the diode structure portion TD, thereby improving the light receiving efficiency in the thyristor structure portion TS. it can.

  The thickness of the first other conductivity type semiconductor layer 42 is selected from 100 to 2000 angstroms. By having such a thickness, the width of the depletion layer is made as thin as possible at the junction between the substrate 30 and the first other conductivity type semiconductor layer 42 and the second one conductivity type semiconductor layer 43. The light receiving efficiency in the thyristor component TS can be improved.

The carrier density of the first other conductivity type semiconductor layer 42 is selected to be about 1 × 10 ¹⁶ cm ⁻³ or less, specifically, 1 × 10 ¹⁴ cm ⁻³ to 1 × 10 ¹⁶ cm ⁻³ . When the substrate 31, the first other-conductivity-type semiconductor layer 42, the second other-conductivity-type semiconductor layer 43, and the second one-conductivity-type semiconductor layer 44 are formed of silicon, the controllability of carrier density is improved, and the first On the other hand, it is easy to control the carrier density of the conductive semiconductor layer 42 within the above-mentioned range.

The carrier density of the third one-conductivity-type semiconductor layer 45 is desirably about 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ¹⁷ cm ⁻³ . By forming the third one-conductivity-type semiconductor layer 45 from a semiconductor material such as aluminum gallium arsenide (AlGaAs) or gallium arsenide (GaAs), high internal quantum efficiency can be obtained. The carrier density of the third other conductivity type semiconductor layer 46 is desirably about 1 × 10 ¹⁸ cm ⁻³ .

The ohmic contact layer 47 is a semiconductor layer of the other conductivity type formed of a semiconductor material such as gallium arsenide (GaAs) or indium gallium phosphide (InGaP), and is used for ohmic contact with the surface electrode 25. The carrier density of the ohmic contact layer 47 is desirably 1 × 10 ¹⁹ cm ⁻³ or more.

  The first other conductivity type semiconductor layer 42 of the switch element T and the first other conductivity type semiconductor layer 32 of the light emitting element formation portion 28 are formed of the same semiconductor material and have the same thickness. The second one-conductivity-type semiconductor layer 43 of the switch element T and the second one-conductivity-type semiconductor layer 33 of the light emitting element formation portion 28 are formed of the same semiconductor material and have the same thickness. Further, the second other conductivity type semiconductor layer 44 of the switch element T and the second one conductivity type semiconductor layer 34 of the light emitting element formation portion 28 are formed of the same semiconductor material and are formed to have the same thickness. The third one-conductivity-type semiconductor layer 45 of the switch element T and the first diode constituent layer 35 of the light-emitting element L are formed of the same semiconductor material and have the same thickness. The third other conductivity type semiconductor layer 46 of the switch element T and the second diode constituent layer 36 of the light emitting element L are formed of the same semiconductor material and have the same thickness. The ohmic contact layer 47 of the switch element T and the ohmic contact layer 37 of the light emitting element L are formed of the same semiconductor material and have the same thickness.

  On the one surface 47a of the thickness direction Z of the ohmic contact layer 47, the surface electrode 25 is provided in ohmic contact. The surface electrode 25 is located in a region about half the area of the one surface 47a near the downstream side in the scanning direction, in other words, near the other X2 in the arrangement direction, except for the peripheral portion of the one surface 47a in the thickness direction Z of the ohmic contact layer 47. It is formed. By forming the surface electrode 25 in this manner, the electric field applied to each semiconductor layer of the switch element T can be made as uniform as possible, and the emission intensity of light emitted from the switch element T can be increased. At the same time, more light that is emitted from the switch element T adjacent to the one side X1 in the arrangement direction, reflected by the light-shielding layer 18, and arrives from one side Z1 in the thickness direction can be incident on each semiconductor layer. Therefore, in the other arrangement direction X2 which is the downstream side of the scanning direction of the switch element T, the light is reflected by the surface electrode 25, whereby stronger light can be given to the switch element T in the other arrangement direction X2. Since the surface electrode 25 is not formed in the arrangement direction one X1, which is the upstream side in the scanning direction, light that is reflected by the scanning signal transmission path 15 or the light shielding layer 18 and that arrives from the thickness direction one Z1 is efficiently received. can do. The surface electrode 25 is formed of a conductive material such as a metal material and an alloy material. Specifically, the surface electrode 25 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), or the like.

  A first other conductivity type semiconductor layer 42, a second one conductivity type semiconductor layer 43, a second other conductivity type semiconductor layer 44, a third one conductivity type semiconductor layer 45, a third other conductivity type semiconductor layer 46, The ohmic contact layer 47 and the surface electrode 25 are covered with the insulating layer 17 and electrically insulated from the adjacent switch element T. As described above, since the insulating layer 17 has translucency, when the switch element T emits light, the light passes through the insulating layer 17 and enters the switch element T adjacent in the arrangement direction X. The insulating layer 17 is formed of a resin material that transmits 95% or more of light having a wavelength emitted from the switch element T.

  As indicated by the arrows in FIG. 3, the switch element T includes the third one-conductive layer in the diode component TD, that is, in the vicinity of the interface between the third one-conductive semiconductor layer 45 and the third other-conductive semiconductor layer 46. Light is emitted in a region near the type semiconductor layer 45. The switch element T emits light in all directions.

  By forming the insulating layer 17 from a resin material having flatness, when the insulating layer 17 is formed, the resin material is also filled between the switch elements T so that the insulating layer 17 is interposed between the switch elements T. Can be reliably formed. The insulating layer 17 is formed by applying a resin material and curing the resin material. When the resin material shrinks during curing, a recess 48 extending in the width direction Y is formed on the surface portion of the thickness direction one Z1 of the insulating layer 17 formed between the switch elements T.

  By forming the insulating layer 17 from polyimide, benzocyclobutene (BCB), etc., the insulating layer 17 can be reliably formed in this gap even if the interval W3 between the switch elements T is selected as described above. The first other conductive semiconductor layer 42, the second one conductive semiconductor layer 43, the second other conductive semiconductor layer 44, the third one conductive semiconductor layer 45, and the third other conductive semiconductor layer 46. The insulating layer 17 can be formed in close contact with the ohmic contact layer 47, the surface electrode 25, and the substrate 30. If the insulating layer 17 is peeled off from the surface of the switch element T, light is reflected by the interface of the peeled portion, and the amount of light received from the adjacent switch element T may be reduced. There is no such problem.

  Any one of the first to third scanning signal transmission lines 15a, 15b, 15c is connected to one surface 25a of the thickness direction Z of the surface electrode 25. A through hole 49 is formed in a portion of the insulating layer 17 formed on one surface 25 a of the thickness direction Z of the surface electrode 25, and the first to third scanning signal transmission paths 15 a are formed through the through hole 49. , 15b, 15c are connected to each other, and the switching element T and the other two scanning signal transmission paths 15 of the first to third scanning signal transmission paths 15a, 15b, 15c are insulated layers. 17 is electrically insulated. Since the switch element T is covered with the insulating layer 17, the first to third scanning signal transmission lines 15a, 15b, and 15c can be stacked on one side Z1 in the thickness direction of the switch element T.

  In the present embodiment, one conductivity type is N-type, and the other conductivity type is P-type. In the light emitting element L and the switch element T, when one conductivity type is N type and the other conductivity type is P type, the light emission signal transmission path 12 and the scanning signal transmission path 15 are connected to each of the light emitting element L and the switch element T. When the cathode potential is set to 0 volt (V), a positive power source can be used as a power source for applying voltage or current to the light emitting element L and the switch element T, which is preferable. In the present embodiment, in the light emitting element L, the light emission signal transmission path 12 functions as an anode terminal, and the back electrode 29 functions as a cathode terminal. In the switch element T, the front electrode 25 functions as an anode terminal together with the scanning signal transmission path 15, and the back electrode 29 functions as a cathode terminal.

  On one side in the thickness direction Z of each switch element T, the insulating layer 17 and the scanning signal transmission line 15 are covered with a light shielding layer 18. Various materials can be used as the material of the light shielding layer 18 as long as they are electrically insulating and absorb light of a wavelength emitted from the switch element T almost completely with a thickness of about 2 μm to 3 μm. is there. In the present embodiment, the light shielding layer 18 is formed of green polyimide. The thickness of the light shielding layer 18 is selected to be about 5 μm to 10 μm.

  Is the light emitted from the switch element T and directed toward one side Z1 in the thickness direction reflected by the interface between the insulating layer 17 and the scanning signal transmission path 15, the scanning signal transmission path 15, the interface between the insulating layer 17 and the light shielding layer 18, or the like? And is absorbed by the light shielding layer 18. Each scanning signal transmission line 15 and the insulating layer 17 form a reflecting means. This prevents the light from the switch element T from interfering with the light emitted from the light emitting element L in the thickness direction one Z1. Therefore, when the light emitting device 10 is used as an exposure device of an image forming apparatus 87 described later, an image of excellent quality can be formed without causing image degradation due to leakage light from the switch element T.

  FIG. 4 is a partial cross-sectional view showing the basic configuration of the light emitting device 10 as viewed from the section line D3-D3 in FIG. The light emitting element L and the switch element T are arranged adjacent to each other in the width direction Y. The first other conductivity type semiconductor layer 32, the second one conductivity type semiconductor layer 33, the second other conductivity type semiconductor layer 34, and the first diode constituting semiconductor layer 35 of the light emitting element L are close to the switch element T. The end of the second diode-constituting semiconductor layer 36 and the ohmic contact layer 37 are projected toward the switch element T from the end of the ohmic contact layer 37 near the switch element T, thereby forming the light emitting element connection portion 51.

  The switch element T includes a first other conductivity type semiconductor layer 42, a second one conductivity type semiconductor layer 43, a second other conductivity type semiconductor layer 44, and a third one conductivity type semiconductor layer 45. The end near the light emitting element L protrudes toward the switch element T from the end near the light emitting element L between the third other conductive type semiconductor layer 46 and the ohmic contact layer 47. The end of the first other conductivity type semiconductor layer 42, the second one conductivity type semiconductor layer 43, and the second other conductivity type semiconductor layer 44 near the light emitting element L is a third one conductivity type semiconductor. The end of the layer 45 near the light emitting element L protrudes toward the switch element T. Further, the end portion of the first other conductivity type semiconductor layer 42 and the second one conductivity type semiconductor layer 43 near the light emitting element L is more than the end portion of the second other conductivity type semiconductor layer 44 near the light emitting element L. Also protrudes towards the switch element T. Since the switch element T is covered with the insulating layer 17, in the width direction Y of the switch element T, at one end on the light emitting element L side, one surface 43a of the second one-conductivity-type semiconductor layer 43 in the thickness direction Z; The insulating layer 17 is also formed on the one surface 44a of the second other conductivity type semiconductor layer 44 in the thickness direction Z and the third one conductivity type semiconductor layer 45 on the one surface in the thickness direction Z of the third one conductivity type semiconductor layer 45. Are stacked.

  In the width direction Y, the portion of the third one-conductivity-type semiconductor layer 45 that protrudes in the width direction one Y1 than the third other-conductivity-type semiconductor layer 46 and the third one of the second other-conductivity-type semiconductor layers 44 On the other hand, a portion protruding in the width direction one Y1 from the conductive semiconductor layer 45 is connected by the switch element conductive path 27. The switch element conductive path 27 is formed of a conductive material such as a metal material or an alloy material. Specifically, the switch element conductive path 27 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like. . The switch element conductive path 27 electrically connects the second other conductive semiconductor layer 44 serving as the anode of the thyristor structure portion TS and the third one conductive semiconductor layer 45 serving as the cathode of the diode structure portion TD. The second other-conductivity-type semiconductor layer 44 and the third one-conductivity-type semiconductor layer 45 are stacked, but the second other-conductivity-type semiconductor layer 44 is formed of a non-light-emitting semiconductor material, and the third The one conductivity type semiconductor layer 45 is made of a light emitting semiconductor material, and the second other conductivity type semiconductor layer 44 and the third one conductivity type semiconductor layer 45 are made of different types of semiconductor materials. Therefore, electrical resistance is large at the interface. The second other conductivity type semiconductor layer 44 and the third one conductivity type semiconductor layer 45 are connected by the switch element conductive path 27 to connect the second other conductivity type semiconductor layer 44 and the third one conductivity type semiconductor layer 45. It is possible to reduce the electric resistance between the layer 45 and facilitate the flow of current.

  A through hole 57 is formed in a portion of the insulating layer 17 that is stacked on a portion of the third one-conductivity-type semiconductor layer 45 that protrudes in the width direction one Y1 from the third other-conductivity-type semiconductor layer 46. A through hole 58 is formed in a portion of the insulating layer 17 that is stacked on a portion of the second other conductive semiconductor layer 44 that protrudes in the width direction one Y1 from the third one conductive semiconductor layer 45. . A part of the switch element conductive path 27 is formed in the through holes 57 and 58, and the switch element conductive path 27 is in contact with the second other conductive type semiconductor layer 44 and the third one conductive type semiconductor layer 45.

  The portion of the first other conductivity type semiconductor layer 42 and the second one conductivity type semiconductor layer 43 that protrudes in the width direction one Y1 from the second other conductivity type semiconductor layer 44 constitutes the switch element connection portion 52. To do. The length of the switch element connecting portion 52 in the arrangement direction X is selected to be equal to the length of the switch element T in the arrangement direction X.

  The insulating layer 17 is formed along the surfaces of the light emitting element L and the switch element T, and is also formed between the light emitting element L and the switch element T. The light emitting element L and the switch element T are electrically connected by the insulating layer 17. Insulated. In the insulating layer 17, a portion provided between the light emitting element L and the switch element T is arranged in the width direction Y from a portion stacked on the first diode constituent semiconductor layer 35 of the light emitting element L to the second of the switch element T. The one of the conductive type semiconductor layers 43 is inclined toward the substrate 30 toward the portion laminated thereon.

  In the insulating layer 17, a through hole 54 is formed in a portion of the light emitting element connection portion 51 that is stacked on the one surface 35 a in the thickness direction Z of the first diode constituting semiconductor layer 35. Through holes 55 are respectively formed in portions of the second one-conductivity-type semiconductor layer 43 that are stacked on the one surface 43a in the thickness direction Z.

  The connection means 14 for connecting the first diode-constituting semiconductor layer 35 of the light emitting element L and the gate 24 of the switch element T corresponding to the light emitting element L emits light over the light emitting element connecting portion 51 and the switch element connecting portion 52. Between the element L and the switch element T, the insulating layer 17 is stacked. A part of the connecting means 14 is formed in the through holes 54 and 55, and the connecting means 14 is connected to the one surface 35 a in the thickness direction Z of the first diode constituting semiconductor layer 35 of the light emitting element connecting portion 51 and the switch element connection. It is connected to one surface 43 a of the thickness direction Z of the second one-conductivity-type semiconductor layer 43 of the part 52. The first diode constituent semiconductor layer 35 of the light emitting element L is a cathode of the light emitting element L, and the second one-conductivity type semiconductor layer 43 of the switch element T is the gate 24 of the switch element T.

  The resistance value of the connecting means 14 is selected to be 10Ω (ohms) or less. If the resistance value is too high, the trigger signal from the switch element T to the light emitting element L is attenuated. In other words, the second one-conductivity-type semiconductor that is the gate 24 of the switch element T when the switch element T becomes conductive. Even if the voltage of the layer 43 becomes substantially zero (0) volts V, there is a possibility that current does not flow through the light emitting diode element L due to the resistance of the connecting means 14, but the resistance value of the connecting means 14 is selected within the above range. Thus, the trigger signal is transmitted from the switching element T to the light emitting element L without being attenuated. In other words, the potential of the gate 24 of the switching element T and the potential of the cathode of the light emitting diode element L can be made substantially equal.

  The end of the other Y2 in the width direction of each semiconductor layer of the light emitting element L is covered with the signal path extending portion 21 of the light emitting signal transmission path 12 described above via the insulating layer 17. The signal path extending portion 21 is provided facing the side portion of the light emitting element L opposite to the switch element T, and in the thickness direction Z, from the vicinity of the one surface 30Aa of the substrate convex portion 30, one of the ohmic contact layers 37 is provided. It extends above the surface 37a. The signal path extending portion 21 can reflect the light traveling from the light emitting element L toward the other side in the width direction Y, whereby the light from the light emitting element L can be collected in one thickness direction Z1. Can be increased as much as possible.

  Further, the end of the diode structure portion TD of the switch element T near the light emitting element L is covered with a light shielding layer 18 laminated on the insulating layer 17. Thereby, the light traveling from the switch element T toward the light emitting element L can be shielded. Further, the end of the switch element T opposite to the light emitting element L is covered with the light shielding layer 18 via the insulating layer 17. The light shielding layer 18 covers one side in the thickness direction Z of the switch element connecting portion 52 and extends from the center between the switch element T and the light emitting element L closer to the light emitting element L.

FIG. 5 is a partial cross-sectional view showing the basic configuration of the light emitting device 10 as seen from the section line D4-D4 in FIG. FIG. 6 is a partial cross-sectional view showing the basic configuration of the light emitting device 10 as viewed from the section line D5-D5 in FIG. A portion of the substrate 30 that protrudes in the thickness direction and is stacked with the scanning start switch element T0 is referred to as a substrate protrusion 60A. The substrate convex portion 60A protrudes from the substrate concave portion 30B in one thickness direction Z1. The substrate convex portion 60A is formed in a substantially rectangular shape. The substrate protrusion 60A on which the scanning start switch element T0 is stacked is formed to have the same thickness as the substrate protrusion 30A on which the light emitting element L is stacked. One surface 60Aa in the thickness direction of the substrate protrusion 60A is formed in a plane. The substrate convex portion 60A includes the substrate convex portion 30A and the substrate convex portion 30.
A is provided apart from A.

  Since the scanning start switch element T0 and the switch element T have the same configuration, the same parts are denoted by the same reference numerals, and redundant description may be omitted. The scanning start switch element T0 includes a first other-conductivity-type semiconductor layer 62, a second one-conductivity-type semiconductor layer 63, and a second other-conductivity-type that are formed on one surface 60Aa of the substrate protrusion 60A of the substrate 30. A semiconductor layer 64, a third one-conductivity-type semiconductor layer 65, and a third other-conductivity-type semiconductor layer 66 are included. In the scanning start switch element T0, the first other conductivity type semiconductor layer 62 is laminated on one surface 60Aa of the substrate protrusion 60A of the substrate 30 in the thickness direction Z, and the thickness of the first other conductivity type semiconductor layer 62 is increased. A second one-conductivity-type semiconductor layer 63 is stacked on one surface 62 a in the direction Z, and a second other-conductivity-type semiconductor layer 64 is formed on the one surface 63 a in the thickness direction Z of the second one-conductivity-type semiconductor layer 63. The third one-conductivity-type semiconductor layer 65 is laminated on one surface 64a of the second other-conductivity-type semiconductor layer 64 in the thickness direction Z. The third other conductivity type semiconductor layer 66 is laminated on the surface 65a, the ohmic contact layer 67 is laminated on the one surface 66a of the thickness direction Z of the third other conductivity type semiconductor layer 66, and the ohmic contact layer 67 in the thickness direction. One surface of Z 6 Configured surface electrode 65 are laminated on a. A first other conductivity type semiconductor layer 62, a second one conductivity type semiconductor layer 63, a second other conductivity type semiconductor layer 64, a third one conductivity type semiconductor layer 65, a third other conductivity type semiconductor layer 66, The laminated body of the ohmic contact layer 67 and the surface electrode 25 has a substantially rectangular parallelepiped shape. The surface electrode 25 of the scanning start switch element T0 is formed in the entire region except the peripheral portion of the one surface 67a of the ohmic contact layer 67.

  The first other conductive semiconductor layer 62 of the scanning start switch element T0 and the first other conductive semiconductor layer 42 of the switch element T are formed of the same semiconductor material and have the same thickness. The second one-conductivity-type semiconductor layer 63 of the scanning start switch element T0 and the second one-conductivity-type semiconductor layer 43 of the switch element T are formed of the same semiconductor material and have the same thickness. The second other conductive semiconductor layer 64 of the scanning start switch element T0 and the second other conductive semiconductor layer 44 of the switch element T are formed of the same semiconductor material and have the same thickness. The third one-conductivity-type semiconductor layer 65 of the scanning start switch element T0 and the third one-conductivity-type semiconductor layer 45 of the switch element T are formed of the same semiconductor material and have the same thickness. The third other conductive semiconductor layer 66 of the scanning start switch element T0 and the third other conductive semiconductor layer 46 of the switch element T are formed of the same semiconductor material and have the same thickness. The ohmic contact layer 67 of the scanning start switch element T0 and the ohmic contact layer 47 of the switch element T are formed of the same semiconductor material and have the same thickness.

  In addition, the first other-conductivity-type semiconductor layer 62, the second one-conductivity-type semiconductor layer 63, the second one-conductivity-type semiconductor layer 63, and the second one-conductivity-type semiconductor layer 63 formed on the one surface 60Aa of the substrate protrusion 60A of the substrate 30 of the scan start switch element T0. The ends of the other conductivity type semiconductor layer 64 and the third one conductivity type semiconductor layer 65 near the light emitting array 11 are closer to the light emitting element array 11 between the third other conductivity type semiconductor layer 66 and the ohmic contact layer 67. This protrudes toward the light emitting element array 11 side from the end portion, and forms a scanning start switch element connecting portion 68.

  The scanning start switch element T0 is covered with the insulating layer 17 and the light shielding layer 18. The scanning signal transmission path 15 and the start signal transmission path 16 are formed by laminating on the insulating layer 17 laminated on one side in the thickness direction of the scanning start switch element T0. The start signal transmission path 16 is provided on the light emitting element L side of the scanning signal transmission path 15 in the width direction Y. The other end of the scanning start switch element T0 in the width direction Y and the other end of each switch element T in the width direction Y are aligned in the arrangement direction X. The third other conductive semiconductor layer 66 and the ohmic contact layer 67 of the scanning start switch element T0 are lighter than the third other conductive semiconductor layer 46 and the ohmic contact layer 47 of the switch element T in the width direction Y. The start signal transmission line 16 is laminated in a portion extending to the L side and extending in the width direction Y to the light emitting element L side from the third other conductive type semiconductor layer 46 and the ohmic contact layer 47 of the switch element T. Is done.

  A through hole 69 is formed in a portion of the insulating layer 17 laminated on one side in the thickness direction of the scanning start switch element T0. A part of the start signal transmission path 16 is formed in the through hole 69, and the start signal transmission path 16 is connected to the surface electrode 25 of the scanning start switch element T 0 through the through hole 69.

  In addition, a through hole 71 is formed in a portion of the insulating layer 17 laminated on the scanning start switch element connecting portion 68, and a part of the substrate connecting portion 74 having conductivity is formed in the through hole 71. The substrate connecting portion 74 is connected to one surface 65 a of the third one-conductivity-type semiconductor layer 65 in the thickness direction Z. The substrate connecting portion 74 extends to the substrate 31 along the surface of the insulating layer 17 and is connected to one surface 30 a of the substrate 30. The board connecting portion 74 is formed of the same conductive material as the light emission signal transmission path 12, the scanning signal transmission path 15, and the start signal transmission path 16. The substrate connection portion 74 is insulated from the first other conductivity type semiconductor layer 62, the second one conductivity type semiconductor layer 63, and the second other conductivity type semiconductor layer 64 by the insulating layer 17, and the substrate connection portion. 74 is covered by the light shielding layer 18. By providing the substrate connecting portion 74, the scan start switch element T0 functions as a diode including the third one-conductivity-type semiconductor layer 65 and the third other-conductivity-type semiconductor layer 66.

  Each light emitting element L, each switch element T, and scanning start switch element T0 are formed on the first surfaces 30Aa, 40Aa, 60Aa of the substrate protrusions 30A, 40A, 60A of the substrate 30 on the first other conductive semiconductor layers 32, 42. , 62, second one-conductivity-type semiconductor layers 33, 43, 63, second other-conductivity-type semiconductor layers 34, 44, 64, first diode-configured semiconductor layer 35, and third one-conductivity-type semiconductor layer 45, 65, a semiconductor material for forming the second diode constituting semiconductor layer 36 and the third other conductivity type semiconductor layers 46, 66, and the ohmic contact layers 37, 47, 67, respectively. After sequentially stacking by a phase growth (CVD) method or the like, patterning and etching are performed by photolithography. Therefore, since the light emitting element L, the switch element T, and the scan start switch element T0 can be formed simultaneously in a series of manufacturing processes, the manufacturing cost can be reduced. After forming each semiconductor layer, a conductor layer is formed by a vapor deposition method or the like, and patterned and etched by photolithography to form the surface electrode 25.

  After the surface electrode 25 is formed, the insulating layer 17 is spin-coated with the above-described resin material such as polyimide, and then the applied resin material is cured, so that the light emitting signal transmission path 12, the connection means 14, the switch element conductive Connection of the path 27, the first to third scanning signal transmission paths 15a, 15b, and 15c, the start signal transmission path 16, the substrate connecting portion 74, the light emitting element L, the switching element T, or the scanning start switching element T0. The through holes 39, 49, 54, 55, 57, 58, 69 and 71 necessary for the above are formed by patterning and etching by photolithography.

  The light emission signal transmission path 12, the connection means 14, the first to third scanning signal transmission paths 15a, 15b, 15c, the start signal transmission path 16, the light emitting element light shielding portion 23, and the substrate connection portion 74 are insulated. After the layer 17 is formed, the light emission signal transmission path 12, the connection means 14, the switch element conductive path 27, the first to third scanning signal transmission paths 15a, 15b, 15c, the start signal transmission path 16, and the substrate A conductive material for forming the connection portion 74 is laminated on the surface of the insulating layer 17 by vapor deposition or the like, and then patterned and etched by photolithography to be simultaneously formed. Therefore, the light emission signal transmission path 12, the connection means 14, the switch element conductive path 27, the first to third scanning signal transmission paths 15a, 15b, 15c, the start signal transmission path 16, and the light emitting element light shielding portion 23 The thickness of the substrate connecting portion 74 is substantially equal.

  FIG. 7 is a graph showing a forward voltage-current characteristic that is a relationship between the anode voltage and the anode current of the switch element T. In FIG. 7, the horizontal axis represents the anode voltage, and the vertical axis represents the anode current. In FIG. 7, a load line 72 is also shown. The switch element T makes a transition between a characteristic curve representing voltage-current characteristics, an off-state point b where the load line 72 intersects, and an on-state point a where the characteristic curve and the load line 72 intersect. The anode voltage represents the anode potential when the cathode potential is 0 (zero) volts (V), and the anode current represents the current flowing through the anode.

An initial threshold voltage (breakover voltage) of the switch element T is set to V _BO . The initial threshold voltage is a threshold voltage in a state where no light is received, and is a threshold voltage in a state where a trigger signal is not applied to the gate 26 in the scanning start switch element T0. In the switch element T, by receiving the threshold voltage _{has V BO,} as indicated by the arrow P1 in FIG. 7 decreases to _{V TH} is smaller voltage than the _{V BO.}

  FIG. 8 is a circuit diagram showing a part of an equivalent circuit showing a basic configuration of the light emitting device 10 shown in FIG. The light emitting device 10 further includes driving means 73. The driving means 73 is connected to the first to third scanning signal transmission paths 15a, 15b, 15c, the light emission signal transmission path 12, and the start signal transmission path 16, and the first to third scanning signal transmission paths 15a, 15b. , 15c, a start signal φS is applied to the start signal transmission path 16, and a light emission signal φE is applied to the light emission signal transmission path 12. The driving means 73 is realized by a driving driver IC (Integrated Circuit).

  The driving means 73 receives a clock pulse signal as a reference from the outside, and outputs the first to third scanning signals φ1 to φ3 and the start signal φS in synchronization with the clock pulse signal to transmit the scanning signal. Are provided to the path 15 and the start signal transmission path 16, respectively. The clock pulse signal is supplied from the control unit 96 of the image forming apparatus 87 described later. The clock cycle of the clock pulse signal is selected to be longer than the control cycle in the control means 96 of the image forming apparatus 87 described later. Further, the driving means 73 outputs the light emission signal φE in synchronization with the first to third scanning signals φ1 to φ3 based on the image information given together with the clock pulse signal, and gives it to the light emission signal transmission path 12.

  The first to third scanning signal transmission lines 15a, 15b, and 15c are connected to resistance elements Rφ connected in series with the switch elements T, respectively, and the driving means 73 is connected to the first to the third scanning signal transmission lines 15a, 15b, and 15c via the resistance elements Rφ. The three scanning signal transmission paths 15a, 15b, and 15c are connected. The resistance element Rφ has a function as a voltage dividing resistor that divides the voltage applied to each switch element T while preventing an overcurrent from flowing from the driving means 73 to the scanning signal transmission line 15.

  Also, the light emitting signal transmission path 12 is connected with a resistance element Rφ connected in series with each light emitting element L, and the driving means 73 is connected to the light emission signal transmission path 12 via the resistance element Rφ. The resistance element Rφ has a function as a voltage dividing resistor that divides the voltage applied to each light emitting element L while preventing an overcurrent from flowing from the driving means 73 to the light emitting signal transmission path 12.

  As shown in the equivalent circuit diagram of FIG. 8, each switch element T is configured by connecting a diode structure portion TD and a thyristor structure portion TS in series. In other words, the diode cathode and the thyristor anode are connected. Thus, the gate 26 of the thyristor is connected to the cathode of the light emitting diode element L.

  FIG. 9 shows that the drive means 73 gives a start signal φS to the start signal transmission path 16, a first scanning signal φ1 to give to the first scanning signal transmission path 15a, a second scanning signal φ2 to give to the second scanning signal transmission path 15b, The third scanning signal φ3 applied to the third scanning signal transmission path 15 and the light emission signal φE applied to the light emission signal transmission path 12, the light emission intensity of the light emitting element L1, and the light emission intensity of the scanning start switch element T0 and the switch elements T1 to T4. FIG. The light emission intensity of the light emitting element L1, the scanning start switch element T0, and the switch elements T1 to T4 indicates that light is emitted when the level is high (H), and indicates that no light is emitted when the level is low (L). . In FIG. 9, the horizontal axis represents time, and represents the elapsed time from the reference time.

  For the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE, the vertical axis represents the signal level. The signal level represents the magnitude of voltage or current. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at a high (H) level, a high voltage or high current is applied to the signal transmission line. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at the low (L) level, a low voltage or a low current is supplied to the signal transmission line. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at the L level, the voltage or current supplied to the transmission line is smaller than the threshold voltage or threshold current of each element. In the case of voltage, the high level is, for example, 3 volts (V) to 10 volts (V). In the case of voltage, the low level is, for example, 0 (zero) volts (V).

  In the present embodiment, the voltage of the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE at the H level is, for example, 5 volts (V), and the L level start signal φS, The voltages of the third scanning signals φ1 to φ3 and the light emission signal φE are set to 0 volts (V), for example. The waveforms of the first to third scanning signals φ1 to φ3 are the same and have different phases.

  In the light emitting device 10, the light emitting state of the switch element T is transferred along the arrangement direction X in order to reduce the threshold voltage or the threshold current of the light emitting element L to emit light.

  Hereinafter, the operation of the driving unit 73 will be described. First, at time t0, the driving unit 73 sets the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE to a low level. When the signal level is changed from the low level to the high level for the light emission signal φE, the start signal φS, and the scanning signal φ, the driving unit 73 changes the signal level to the high level until the signal level is changed from the high level to the low level next time. To maintain. Further, when the signal level is changed from the high level to the low level for the light emission signal φE, the start signal φS, and the scanning signal φ, the driving unit 73 sets the signal level to the low level until the signal level is changed from the low level to the high level next time. To keep.

  At time t1, the driving unit 73 changes only the start signal φS from the low level to the high level. At time t1, the first to third scanning signals φ1, φ2, φ3 and the light emission signal φE are at a low level. As a result, the scanning start switch element T0 emits light.

  The light of the scanning start switch element T0 is most strongly incident on the switch element T1 arranged at the end portion in the arrangement direction X of the adjacent switch element array 13. In the other switch elements T of the switch element array 13, the intensity of light emitted from the scan start switch element T0 is smaller as the switch element T is arranged at a position away from the scan start switch element T0 in the arrangement direction X. Become. In the switch element T, when light is received, carriers corresponding to the received light intensity are generated in each semiconductor layer by photoexcitation. The electrons accumulated in the second one-conductivity-type semiconductor layer 43 due to the generation of carriers lowers the Fermi level of the second one-conductivity-type semiconductor layer 43, and thereby the first other-conductivity-type semiconductor layer 42 and the second one-conductivity-type semiconductor layer 42. The avalanche phenomenon is likely to occur at the junction with the two one-conductivity type semiconductor layer 43. For this reason, the switching element T has a characteristic that the threshold voltage or threshold current decreases by receiving light, and the threshold voltage or threshold current drops more as the received light intensity increases. .

  Next, the transfer of the light emission state from the scanning start switch element T0 to the switch element T1 will be described. When the scanning start switch element T0 emits light, the switch element T1 receives this light, and the threshold voltage of the switch element T1 decreases.

At time t2, the threshold voltage of the switch element T1 is V _TH (T1). Switch elements T1, T4,..., Tj-2 are connected to the first scanning signal transmission line 15a, but the switch elements T4,..., Tj-2 are sufficiently separated from the scanning start switch element T0. Therefore, even if light from the scanning start switch element T0 is received, the light is weak, so that the threshold voltage hardly changes.

  At time t2, the driving unit 73 changes the first scanning signal φ1 from the low level to the high level. At time t2, the start signal φS is at a high level, and the second and third scanning signals φ2, φ3 and the light emission signal φE are at a low level. The high level of the first scanning signal φ1 is lower than the threshold voltage or threshold current of the other switching elements T4,..., Tj-2 except the switching element T1 connected to the first scanning signal transmission line 15a. Is also selected for high voltage or high current.

  The scanning signal transmission path 15 to which the switching element T whose threshold voltage or threshold current has been lowered by receiving light from the adjacent switching element T is connected to the scanning signal transmission path 15 is connected to the scanning signal transmission path 15. When a scanning signal φ having a voltage or current higher than the minimum threshold voltage or threshold current of the switch element T is applied, the scanning signal φ is applied to the scanning signal transmission line 15 via the resistance element Rφ, and the switching element A voltage divided by the resistance element Rφ is applied to T. A voltage divided by the resistance element Rφ is gradually applied to each switch element T, and among the plurality of switch elements T connected to the same scanning signal transmission path 15, the adjacent switch element T The voltage or current applied to the switch element T that has received the light from the first becomes the threshold voltage or threshold current of the switch element T earliest. Thereby, only the switch element T with the lowest threshold voltage or threshold current emits light, and the other switch elements T do not emit light. Accordingly, at time t2, the switch element T1 is turned on, that is, turned on and emits light.

  After the switch element T1 is turned on, at time t3, the drive unit 73 sets the start signal φS to a low level. Accordingly, the scanning start switch element T0 is turned off, that is, turned off and turned off.

  In this way, the light emission state transitions from the scanning start switch element T0 to the switch element T1. At time t3, the drive unit 73 changes the start signal φS from the high level to the low level, and maintains the scanning start switch element T0 in the off state until the switch element T1 is caused to emit light next time.

  The time between the time t2 and the time t3 is selected to be about 1/10 of the time when the first scanning signal φ1 becomes high level. In this way, the drive means 73 provides the scanning signal φ so that the time when the scanning signal φ applied to the adjacent switch element T is at the high level overlaps, whereby the threshold voltage or threshold current of the adjacent switch element T is applied. Is reliably lowered, the scanning signal φ can be set to a high level, and optical scanning can be performed reliably.

  In the present embodiment, the time during which the first to third scanning signals φ1 to φ3 are at a high level is selected to be about 1 μsecond (μsecond). Accordingly, the time between time t2 and time t3 is selected to be about 0.1 μsecond (μsecond).

  When the switch element T1 is turned on at time t2, the switch element T1 is kept on until the high-level scanning signal φ becomes low level.

  The switch element T1 generates a trigger signal at the gate 24 by light reception. When the switch element T1 is turned on at time t2, the switch element T1 maintains the on state until the high-level scanning signal φ becomes the low level. In the on state, the voltage of the gate 24 of the switch element T1 becomes approximately 0 (zero) volts (V). Here, the voltage of the gate 24 of the switch element T1 is a potential difference between the gate 24 and the back electrode 29 grounded. Since the gate 24 of the switch element T1 is connected to the third one-conductivity-type semiconductor layer 35 that is the cathode of the light emitting element L1, the potential of the gate 24 of the switch element T1 is almost equal to the potential of the cathode of the light emitting element L1. Will be equal. Thus, the voltage of the cathode of the light emitting element L1, that is, the voltage applied between the third one-conductivity type semiconductor layer 35 and the back electrode 29 can be changed by the switch element T1.

  When the light emitting element L1 is caused to emit light, the driving unit 73 changes the light emission signal φE from the low level to the high level at time t4 after the time t3 when the light emission signal φE is changed from the high level to the low level has elapsed.

In the light emitting element L1, since the switch element T1 is in the ON state, as described above, the cathode of the light emitting element LL1 is approximately 0 (zero) volts (V). At this time, the switch elements T2,..., Tj−1, Tj are in an off state, and the cathode voltage of the light emitting element L1 at time t4 is V _ca (L1), and the light emitting elements L2,. , Li cathode voltages V _ca (L2),..., V _ca (Li-1), V _ca (Li), respectively, the high level V _H of the light emission signal φE is equal to or higher than the cathode voltage of the light emitting element L. Then, by selecting a value smaller than the lowest value among the cathode voltages of the light emitting elements L2,..., Li-1, Li, only the light emitting element L1 can be selectively turned on to emit light. it can.

  At time t5, when the driving unit 73 sets the light emission signal φE to the low level, the light emitting element L1 is turned off. The amount of exposure to a photosensitive drum 90 to be described later is adjusted according to the light emission time of the light emitting element L while the light emission intensity of the light emitting element L is constant. That is, the exposure amount is determined by determining the time between time t4 and time t5 when the light emission signal φE becomes high level. When changing the exposure amount according to the light emission intensity of the light emitting element L, it is difficult because the voltage or current applied to the light emitting element L1 needs to be finely controlled. However, by changing the exposure amount according to the light emission time, the light emission signal φE is changed. Since it is only necessary to adjust the high level time, it is easy to control the exposure amount, and a constant voltage or constant current is applied to the light emitting element L, so that the light emitting element L1 can emit light stably. The time during which the light emitting element L emits light, in other words, the time during which the light emission signal φE is at the high level is selected to be 80% or less of the time during which the scanning signal φ is at the high level.

  After the time t5 has elapsed, when the driving unit 73 sets the second scanning signal φ2 to the high level at the time t6, the switch element T2 emits light. After the time t6 has elapsed, the driving unit 73 outputs the first scanning signal φ1 at the time t7. When the level is low, the switch element T1 is turned off. As a result, the light emission state shifts from the switch element T1 to the switch element T2.

  After the elapse of time t7, when the driving unit 73 sets the third scanning signal φ3 to the high level at time t8, the switch element T3 emits light. After the elapse of time t8, the driving unit 73 outputs the second scanning signal φ2 at time t9. When the level is low, the switch element T2 is turned off. As a result, the light emission state is shifted from the switch element T2 to the switch element T3.

  After the time t9 has elapsed, when the driving unit 73 sets the first scanning signal φ1 to the high level again at time t10, the switch element T4 emits light.

  The time between the time t6 and the time t7 is selected to be about 1/10 of the time when the second scanning signal φ2 becomes high level, and the time between the time t8 and the time t9 is determined by the third scanning signal φ3. It is selected to be about 1/10 of the time for high level.

  Thus, the driving means 73 repeatedly applies the first to third scanning signals φ1 to φ3, so that the ON state is sequentially transferred along the arrangement direction X also in the switch elements T4,..., Tj−1, Tj. Is done. When the switch element T emits light, the light emission signal φE of the light emission signal transmission path 12 is changed from low level to high level to correspond to the light emitting switch element T, that is, the light emitting switch element T. Only the light emitting element L connected to can be made to emit light selectively.

  The switch elements T positioned on both sides in the arrangement direction X of the switch elements T that are emitting light are all excited, but as described above by the first to third scanning signal transmission paths 15a, 15b, and 15c. The first to third scanning signals φ1 to φ3 are transmitted to the switching elements T and the first to third scanning signals φ1 to φ3 are given to the switching elements T, so that the switching elements T are switched from one to the other in the arrangement direction X. The light emission state can be transferred, in other words, optical scanning can be performed.

FIG. 10 is a waveform diagram showing a change in threshold voltage of the switch elements T1, T4, T7 connected to the first scanning signal transmission line 15. In FIG. 10, the horizontal axis represents time, and represents the elapsed time from the reference time. In the figure, a start signal φS and first to third scanning signals φ1 to φ3 are also shown. Times t1, t2, t7, t8, and t10 shown in the figure correspond to the times t1, t2, t7, t8, and t10 shown in FIG. 9, respectively. The initial threshold voltage of the switch elements T1, T4, T7 and V _BO, the threshold voltage lowered by receiving the switch element T, or scan start switch element T0 adjacent to V _1.

Since the scan start switch element T0 emits light at time t1, the threshold voltage of the switch element T1 gradually decreases by receiving the light of the scan start switch element T0, and the threshold of the switch element T1 at time ta. voltage, it becomes _{V 1.} Until time t3 at which the light emitting state of the scan start switch element T0 is maintained, threshold voltage of the switching element T1 is maintained at V _1.

At time t2, by the first scan signal φ1 changes from low level to high level, and the light-emitting switch element T1 is the threshold voltage of the switching element T1 is further at time tb decreases, the V _2. At time tb, the threshold voltage of the switch elements T4 and T7 is V _BO .

In time t7, the when the first scan signal φ1 changes from high level to low level, the threshold voltage of the switching element T1 is with time, gradually rises from V _2.

Since the switch element T3 emits light at time t8, the threshold voltage of the switch element T4 gradually decreases by receiving light from the switch element T3, and the threshold voltage of the switch element T3 becomes V ₁ at time tc. Become.

At time t10, the threshold voltage of the switch element T4 is _{V 1,} the threshold voltage of the switch element T1 is a lower _{V 3} than higher _{V BO} than _{V 1,} the threshold voltage of the switch element T7 is , V _BO .

At time t10, the first scanning signal φ1 is changed from the low level to the high level. This high level voltage is applied from the adjacent light emitting element L among the switch elements T connected to the first scanning signal transmission path 15a. in one of the light emitting element L which is not receiving light, by higher than the threshold voltage V ₃ of the most the threshold voltage of low luminous element L1, it is possible to emit only the switch element T4. When the switch element T4 emits light, the threshold voltage further decreases and becomes V ₂ at time td.

In time t11, the when the first scan signal φ1 changes from high level to low level, the threshold voltage of the switching element T3 is with the passage of time, gradually rises from V _2.

FIG. 11 is a graph showing the forward voltage-current characteristics of the switch element T and the range of the high-level voltage V _H of the first to third scanning signals φ 1 to φ 3 supplied to each scanning signal transmission line 15. is there. In FIG. 11, the horizontal axis indicates the anode voltage, and the vertical axis indicates the anode current. As shown by the characteristic curve in the figure, the switch element T has an S-shaped negative resistance similar to a general thyristor. The switch element T can reduce the threshold voltage or the threshold current by irradiating the semiconductor layer constituting the switch element T with light. Thus, as described above, the switching element T functions as a switch because it transits from the point b in the off state where the characteristic curve and the load line 72 intersect to the point a in the on state where the characteristic curve and the load line 72 intersect. To do.

The initial threshold voltage of the switch element T is set to V _B0, and the threshold voltage in the state where the threshold voltage is most lowered by irradiating the switch element T with light is set to V _1, and is connected to the same scanning signal transmission line 15. The threshold voltage of the switch element T having the second lowest threshold voltage among the switch elements T is V ₃ . This V ₃ is the level of the switch element T in which the threshold voltage is slightly lowered by receiving light, or the switch element T that is being restored to the initial state at the time of turn-off, that is, once turned on. The threshold voltage.

The high level voltage V _H of the first to third scanning signals φ1 to φ3 supplied to each scanning signal transmission line 15 connected to the switch element T is in the range indicated by the reference symbol P2 in FIG. 11, that is, the voltage V _3. Higher than. The voltage V _H is selected to be lower than the rated voltage of the switch element T. For example, when the voltage V _H is increased, the switching speed of the switch element T from the off state to the on state can be increased, and thereby the transition of the light emission state in the switch element T can be speeded up. The speed can be increased. For example, when operating with a clock signal of 1 megahertz (MHz) at 5 milliamperes (mA), the voltage V _H is selected to be about 10 V, and the resistance value of the resistance element Rφ is selected to be 1.6 kΩ. As the voltage of the scanning signal φ increases, it is necessary to limit the current flowing into the switch element T. Therefore, it is necessary to increase the resistance value of the resistance element Rφ. Therefore, the resistance value of the resistance element Rφ is determined in consideration of the time constant determined by the resistance value of the resistance element Rφ and the capacitance value of the optical switch element T when the speed of optical scanning needs to be further increased. Is done.

  In the present embodiment, since the high level voltage of the scanning signal φ is set as described above, the threshold voltage or threshold current when the switch element T receives light and is photoexcited is the initial threshold voltage. Or even if it is only about 80% of the threshold current, transfer of the light emission state can be realized by the switch element T. Therefore, even if the switch element T does not have a high light receiving sensitivity, the light emitting state can be transferred.

  FIG. 12 is a plan view showing a configuration of the light emitter chip 75 constituting the light emitting device 10 of FIG. 1 is a part surrounded by a1, a2, a3, a4, a5, and a6 in the same drawing. FIG. 12 shows a plane of the light-emitting chip 75 arranged with the light emission direction of each light-emitting element L as a front side perpendicular to the paper surface. The light-emitting element L, the switch element T, the connection means 14 and the signal transmission path connection portion 76 is shown with diagonal lines for ease of illustration.

  The light emitter chip 75 includes a first light emitter chip portion 77, a second light emitter chip portion 78, and a signal transmission path connection portion 76. The first light emitting chip portion 77 is the portion shown in FIG. 1 described above, and is the portion surrounded by a1, a2, a3, a4, a5 and a6. The second light emitting chip portion 78 has the same configuration as that of the first light emitting chip portion 77, and has a shape in which the first light emitting chip portion 77 is angularly displaced by 180 degrees around an axis extending in the Z direction perpendicular to the paper surface. Have The light emitting element array 11 of the first light emitter chip portion 77 and the second light emitter chip portion 78 is arranged linearly at the center in the width direction Y of the light emitter chip 75. Accordingly, each switching element T of the light emitting chip 75 is divided and arranged on one side and the other side of the light emitting element array 11 in the arrangement direction X of each light emitting element L and the width direction Y perpendicular to the arrangement direction X. Yes. The light emitter chip 75 is obtained by displacing a part showing the basic structure of the light emitting device 10 shown in FIG. 1 and a part showing the basic structure by 180 degrees around an axis extending in the Z direction perpendicular to the paper surface. It has a shape in which the light emitting element array 11 is arranged in a straight line.

  The switch element array 13 of the first light emitter chip portion 77 disposed on the other side in the width direction Y of the light emitting element array 11 is referred to as a first switch element array 13a and is disposed on one side of the light emitting element array 11 in the width direction. The switch element array 13 of the second light emitter chip portion 78 disposed is referred to as a second switch element array 13b. In the present embodiment, the number of switch elements T in the first and second switch element arrays 13a and 13b is selected to be equal. The first switch element array 13 a extends from the other end portion 75 b of the light emitting chip 75 in the arrangement direction X to the center portion 75 c of the arrangement direction X. The second switch element array 13 b extends from the one end portion 75 a of the light emitting chip 75 in the arrangement direction X to the center portion 75 c of the arrangement direction X.

  The first scanning start switch element T0 is provided on one side in the arrangement direction X of the first switch element array 13a, and the second scanning start switch element T0 is provided on the other side in the arrangement direction X of the second switch element array 13b. In the first switch element array 13a, the switch elements T1, T2,..., Tj−1, Tj are arranged in this order from one end portion to the other end portion in the arrangement direction X. In the second switch element array 13b, the arrangement is arranged. T1, T2,..., Tj−1, Tj are arranged in this order from the other end in the direction X toward one end.

  The light emitting chip 75 has a substantially rectangular parallelepiped shape, and a signal transmission path connecting portion 76 is provided on one surface portion 79 in the thickness direction Z.

  The light emitting element array 11 in which the light emitting element arrays 11 of the first and second light emitting chip portions 77 and 78 are arranged is formed across the one end 75a and the other end 75b of the light emitting chip 75 in the arrangement direction X. The The distance from one end of the light emitting chip 75 in the arrangement direction X to the light emitting element L at one end in the arrangement direction X, and the distance from the other end of the light emitting chip 75 in the arrangement direction X to the light emitting element L at the other end in the arrangement direction X Is selected to be the distance W7 and smaller than the distance W1 between the adjacent light emitting elements L, and is preferably about ½ of the distance W1.

  In the width direction Y, the distance W8 from the end of each of the first and second light emitter chip portions 77 and 78 opposite to the light emitting element L to one end of the light emitter chip 75 in the width direction Y is The insulating layer 17 and the light shielding layer 18 that cover the end of the switch element T opposite to the light emitting element L are selected.

  In areas 80A and 80B adjacent to each other along the arrangement direction X of the first and second switch element arrays 13a and 13b, signal transmission path connection portions 76 are provided along the first and second light emitting element arrays 11, respectively. The signal transmission path connection unit 76 is a part for connecting the scanning signal transmission path 15, the light emission signal transmission path 12, the start signal transmission path 16, and a bonding wire that is a signal transmission path from the outside, and is used for wire bonding. It is a bonding pad.

  The signal transmission path connection portion 76 is formed of a conductive material such as a metal material or an alloy material, and specifically, gold (Au), an alloy of gold and germanium (AuGe), and an alloy of gold and zinc. (AuZn) or the like.

  The signal transmission line connection unit 76 includes first and second start signal transmission line connection units 81a and 81b, first and second scanning signal transmission line connection units 82a and 82b, and first and second light emission signal transmission line connections. Parts 83a and 83b. The first and second start signal transmission line connection parts 81a and 81b, the first and second scanning signal transmission line connection parts 82a and 82b, and the first and second light emission signal transmission line connection parts 83a and 83b have a thickness. They are formed in a rectangular shape when viewed from one side in the direction Z, and are formed in the same size.

  In the region 80A adjacent to the one X1 in the arrangement direction of the first switch element array 13a, a first start signal transmission line connection part 81a, a first scanning signal transmission line connection part 82a, and a second light emission signal transmission line connection part 83b are provided. And are provided. A first start signal transmission line connection portion 81a is provided on one side X1 of the first switch element array 13 at a distance W9 from one end of the scan start switch element T0 in the arrangement direction X in the arrangement direction X. A first scanning signal transmission line connection part 82a is provided on one side X1 in the arrangement direction of the first start signal transmission line connection part 81a. The first scanning signal transmission line connection unit 82a includes first to third transmission line connection units 84a, 84b, and 84c. The first start signal transmission line connection part 81a and the first to third transmission line connection parts 84a, 84b, 84c are provided with an interval in the arrangement direction X, and are provided at equal intervals.

  In the present embodiment, the first transmission line connection part 84a, the second transmission line connection part 84b, and the third transmission line connection part 84c are arranged in this order from one arrangement direction X1 to the other arrangement direction X2. The start signal transmission line 16 of the first light emitter chip part 77 is connected to the first start signal transmission line connection part 81a, and the first scanning signal transmission line 15a of the first light emitter chip part 77 is connected to the first transmission line. The second scanning signal transmission path 15b of the first light emitter chip section 77 is connected to the second transmission path connection section 84b, and the third scanning signal transmission path 15c of the first light emitter chip section 77 is connected to the section 84a. , Connected to the third transmission line connection portion 84c. By connecting in this way, the dispersion | variation in the length of the transmission line from each transmission path connection part 84a, 84b, 84c to each switch element T can be suppressed.

  A second light emission signal transmission line connection portion 83b is provided at one end portion 75a of the light emitting chip 75 in the arrangement direction X on the one side in the arrangement direction X of the first scanning signal transmission line connection portion 82a. The second light emission signal transmission path connection portion 83 b is connected to the light emission signal transmission path 12 of the second light emitter chip portion 78. The second light emission signal transmission line connection portion 83b is provided at a distance W10 from one end of the light emitting chip 75 in the arrangement direction X. The distance W10 is selected to be greater than the distance W7.

  The first start signal transmission line connection part 81a, the first scanning signal transmission line connection part 82a, and the second light emission signal transmission line connection part 83b are provided outside the region where the light emitting element L is provided. A distance W11 is provided in the width direction Y. The distance W11 is selected so that when the light emitting element L emits light, the light is blocked by the signal transmission path connecting portion 76 and the light quantity does not decrease.

  In the region 80B adjacent to the other X2 of the second switch element array 13 in the arrangement direction, the second start signal transmission path connection portion 81b, the second scanning signal transmission path connection portion 82b, and the first light emission signal transmission path connection portion 83a. And are provided. A second start signal transmission line connection portion 81b is provided in the other arrangement direction X2 of the second switch element array 13 with a distance W9 from the one end in the arrangement direction X of the scanning start switch elements T in the arrangement direction X. A second scanning signal transmission line connection part 82b is provided on the other X2 side in the arrangement direction of the second start signal transmission line connection part 81b. The second scanning signal transmission line connection unit 82b includes fourth to sixth transmission line connection units 85a, 85b, and 85c. The second start signal transmission line connection part 82b and the fourth to sixth transmission line connection parts 85a, 85b, 85c are provided at intervals in the arrangement direction X. Here, they are provided at equal intervals.

  In the present embodiment, the fourth transmission line connection unit 85a, the fifth transmission line connection unit 85b, and the sixth transmission line connection unit 85c are arranged in this order from the other arrangement direction X2 toward the arrangement direction one X1. The start signal transmission line 16 of the second light emitter chip part 78 is connected to the second start signal transmission line connection part 81b, and the first scanning signal transmission line 15a of the second light emitter chip part 78 is connected to the fourth transmission line. The second scanning signal transmission path 15b of the second light emitter chip section 78 is connected to the fifth transmission path connection section 85b, and the third scanning signal transmission path 15c of the second light emitter chip section 78 is connected to the section 85a. , Connected to the sixth transmission line connection portion 85c. By connecting in this way, the dispersion | variation in the length of the transmission line from each signal transmission line connection part 76 to each switch element T can be suppressed.

  A first light emission signal transmission line connection portion 83a is provided at the other end portion 75b in the arrangement direction X of the light emitting chips 75 in the other arrangement direction X2 of the second scanning signal transmission line connection portion 82b. The first light emission signal transmission path connection portion 83 a is connected to the light emission signal transmission path 12 of the first light emitter chip portion 77. The first light emission signal transmission line connection portion 83a is provided at a distance W10 from the other end in the arrangement direction of the light emitting chips 75.

  The second start signal transmission path connection portion 81b, the second scanning signal transmission path connection portion 82b, and the first light emission signal transmission path connection portion 83a are provided outside the region where the light emitting element L is provided. A distance W11 is provided in the width direction.

  In the regions 80A and 80B in which the signal transmission path connection portion 76 is formed, the light emission signal transmission paths 12, the first to third scanning signal transmission paths 15a, 15b, and 15c, and the start signal transmission paths 16 are provided. Each signal transmission path is insulated from each other by an insulating film having electrical insulation. The signal transmission path connecting portion 76 and each signal transmission path are connected through a through hole formed in the insulating film.

  As described above, each switch element array 13 of the light emitter chip 75 in the light emitting device 10 of the present embodiment has the light emitting element array 11 in the arrangement direction X of the light emitting element array 11 and the width direction Y perpendicular to the arrangement direction X. Since the signal transmission path connecting portion 76 is provided along the light emitting element array 11 in the regions 80A and 80B which are arranged separately on one side and the other side and which are adjacent to each other along the arrangement direction X of each switch element array 13. The end portions of the light emitting element array 11 in the arrangement direction X can be arranged at the end portions of the light emitter chip 75, and the signal transmission path connecting portions are arranged on one side and the other side of the light emitting element array 11 in the width direction Y. When the structure 76 is provided, the size of the light emitting chip 75 in the direction perpendicular to the arrangement direction X can be reduced as much as possible.

  When the light emitting element array 11 is formed at one end in the width direction Y of the light emitting chip 75, when the light emitting chip 75 is cut out from the wafer, the shape of the long side portion that is the arrangement direction X of the light emitting elements L is emitted. In order to prevent damage to the element L, it is necessary to add a process such as dicing precisely so as not to cause chipping or lapping after cutting. In the present embodiment, since the light emitting element array 11 is formed at the central portion in the width direction Y of the light emitting chip 75, the light emitting element L is not easily damaged when cut out from the wafer, so that dicing is easy. In addition, the yield can be improved and the manufacturing process is not increased.

  FIG. 13 is a partial plan view showing a basic configuration of a light emitter chip assembly 86 having a plurality of light emitter chips 75. This figure shows a plane of the light-emitting chip assembly 86 arranged with the light emitting direction of each light-emitting element L as a front side perpendicular to the paper surface, and shows the light-emitting element array 11, the first and second switch element arrays 13a. , 13b and the signal transmission line connecting portion 76 are indicated by hatching for easy illustration.

  The light emitter chip assembly 86 includes a plurality of light emitter chips 75 shown in FIG. 12 and is configured by linearly arranging the light emitting elements L of the light emitter chips 75. The light emitter chip assembly 86 is mounted by arranging the light emitting elements L of the light emitter chips 75 in a straight line with the back electrode 29 of the light emitter chip 75 facing a circuit board such as a printed wiring board.

  In the plurality of light emitter chips 75, since the light emitting elements L are arranged at the one end portion 75a and the other end portion 75b in the arrangement direction X, when the light emitting element array 11 is arranged along the arrangement direction X, adjacent light emitters are arranged. The light emitting elements L at the ends in the arrangement direction X of the chips 75 can be made as close as possible, and even if the light emitting chips 75 are arranged in a line, the distance W12 between the light emitting elements L of the adjacent light emitting chips 75 is set. Since it can be within the predetermined range, it is not necessary to arrange the light emitting chips 75 in a staggered manner, and the process of arranging the light emitting chips 75 on the circuit board can be simplified. The distance W12 is selected to be about the interval W1. To be precise, W12 = W1-2 × W7.

  Further, when the light emitting chips 75 are arranged and used as an exposure device of an image forming apparatus 87 to be described later, the light emitting elements L of the respective light emitting chips 75 can be arranged in a line, so that the photoconductor via the lens array 88 is used. In the exposure to the drum 90, the optical axis shift does not occur for each light emitting chip 75. As a result, the exposure characteristics of the plurality of light emitting chips 75 to the photosensitive drum 90 can be made uniform, so that the image quality of the formed image can be improved. Further, when the photosensitive drum 90 is exposed, the plurality of light emitting chips 75 only need to read the same line data along the arrangement direction. Therefore, the light emitting device 10 has a memory function for storing a plurality of line data. The configuration of the apparatus can be simplified without necessity.

  The light emitting chip assembly 86 is used in an exposure apparatus as a line head such as an optical printer head for an electrophotographic image forming apparatus. The width W13 of the light emitting chip assembly 86 in the arrangement direction X is determined by the width of the image formed in the image forming apparatus 87.

  The signal transmission path connection portion 76 of each light emitting chip 75 is electrically connected to a portion to be connected to the circuit board by a bonding wire that is an external signal transmission path. The driving means 73 described above is mounted on the circuit board. The drive means 73 gives a signal to each signal transmission line connection part 76 via a bonding wire. By providing the drive means 73 on the circuit board on which the light emitting chip 75 is mounted, the distance of the signal transmission path from the drive means 73 to each light emitting element L, each switch element T, and the scan start switch element T0 is shortened. Thus, it is possible to suppress noise from being superimposed on a signal transmitted through the signal transmission path from the driving unit 73 to the signal transmission path connection unit 76.

  FIG. 14 is a side view showing a basic configuration of an image forming apparatus 87 having the light emitting device 10. The image forming apparatus 87 is an electrophotographic image forming apparatus, and the light emitting device 10 is used as an exposure device for the photosensitive drum 90. The light emitting device 10 includes a light emitting chip assembly 86 and driving means 73. The light emitting chip assembly 86 and the driving means 73 are mounted on a circuit board.

  The image forming apparatus 87 is an apparatus that employs a tandem system that forms four color images of Y (yellow), M (magenta), C (cyan), and K (black), and is roughly divided into four light emitting elements. The devices 10Y, 10M, 10C, and 10K, the lens arrays 88C, 88M, 88Y, and 88k as the light condensing means, the circuit board 31 on which the light emitting chip assembly 86 and the driving means 73 are mounted, and the lens array 88 are held. One holder 89C, 89M, 89Y, 89K, four photosensitive drums 90C, 90M, 90Y, 90K, four developer supply means 91C, 91M, 91Y, 91K, a transfer belt 92 as transfer means, four cleaners 93C, 93M, 93Y, 93K, four chargers 94C, 94M, 94Y, 94K, fixing means 95 and control means 96.

  Each light emitting chip assembly 86 is driven by the driving means 73 based on the color image information of each color. For example, the length W11 of the four light emitter chip assemblies 86 in the arrangement direction X is selected from 200 mm to 400 mm, for example.

  The light from the light emitting element L of each light emitting chip assembly 86 is condensed and irradiated onto the respective photosensitive drums 90C, 90M, 90Y, and 90K via the lens array 88. The lens array 88 includes, for example, a plurality of lenses respectively disposed on the optical axis of the light emitting element L, and is configured by integrally forming these lenses.

  The circuit board on which the light emitting chip assembly 86 is mounted and the lens array 88 are held by the first holder 89. By the holder 89, the light irradiation direction of the light emitting element L and the optical axis direction of the lens of the lens array 88 are aligned so as to be substantially aligned.

  Each of the photoconductor drums 90C, 90M, 90Y, and 90K is formed by, for example, attaching a photoconductor layer to the surface of a cylindrical substrate, and the outer peripheral surface receives light from each of the light emitting devices 10Y, 10M, 10C, and 10K. Then, an electrostatic latent image forming position where the electrostatic latent image is formed is set.

  In the peripheral portions of the photosensitive drums 90C, 90M, 90Y, and 90K, the exposed photosensitive drums 90C, 90M, 90Y, and 90K are sequentially exposed toward the downstream side in the rotation direction with reference to the electrostatic latent image forming positions. Developer supply means 91C, 91M, 91Y, 91K for supplying developer to the transfer belt 92, cleaners 93C, 93M, 93Y, 93K, and chargers 94C, 94M, 94Y, 94K are arranged, respectively. A transfer belt 92 that transfers an image formed on the photosensitive drum 90 with a developer onto a recording sheet is provided in common to the four photosensitive drums 90C, 90M, 90Y, and 90K.

  The photosensitive drums 90C, 90M, 90Y, and 90K are held by a second holder, and the second holder and the first holder 89 are relatively fixed. The photoconductor drums 90C, 90M, 90Y, and 90K are aligned so that the rotational axis directions of the photoconductor drum assemblies 86 and the array direction X of the light-emitting body chip assemblies 86 substantially coincide with each other.

  The recording sheet is conveyed by the transfer belt 92, and the recording sheet on which an image is formed by the developer is conveyed to the fixing unit 95. The fixing unit 95 fixes the developer transferred to the recording sheet. The photosensitive drums 90C, 90M, 90Y, and 90K are rotated by a rotation driving unit.

  The control unit 96 supplies a clock signal and image information to the driving unit 73 described above, and also rotates and drives the photosensitive drums 90C, 90M, 90Y, and 90K, developer supply units 91C, 91M, 91Y, and 91K, Each part of the transfer means 92, the charging means 94C, 94M, 94Y, 94K and the fixing means 95 is controlled.

  In the image forming apparatus 87 having such a configuration, bias light and leakage light are not generated from the light emitting device 10 used as the exposure apparatus, so that a high quality image can be formed. In addition, since the light emitting device 10 in which the switch element T and the light emitting element L by the light emitting thyristor are integrated is used for the exposure apparatus, such an exposure apparatus can be manufactured at low cost, thereby manufacturing the image forming apparatus 87. Cost can be reduced.

  As described above, according to the light emitting device 10, each switch element T can reduce the threshold voltage or threshold current by receiving light emitted from the adjacent switch element T, and each switch element T can be reduced. It is not necessary to connect a load resistor or the like connected between the diode 24 for designating the transfer direction and the power supply to the gate 24 of the first gate. Therefore, only a predetermined light emitting element L among the plurality of light emitting elements L arranged can be selectively caused to emit light with as few signal transmission paths as possible without complicating the structure of the light emitting device 10.

  The switch element T includes a first other-conductivity-type semiconductor layer 42, a second one-conductivity-type semiconductor layer 43, and a second other-conductivity-type semiconductor layer 44 that are stacked on the substrate 30 in this order. A third one-conductivity-type semiconductor layer 45 and a third other-conductivity-type semiconductor layer 46 are stacked in this order on the non-light-emitting thyristor structure portion TS and the second other-conductivity-type semiconductor layer 44. The light-emitting diode structure portion TD formed by the two semiconductor layers formed so that the light receiving characteristics and the switching characteristics are optimized in the thyristor structure portion TS, and the light-emitting diode structure portion TD emits light. It can be formed so that the characteristics are optimal.

  On the substrate 30, the light emitting diode element L is stacked on the second other conductive semiconductor layer 34 of the light emitting element forming portion 28, that is, the first diode forming layer 35 and the second other conductive semiconductor. Since the layer 34 is reverse-biased, the insulation with the substrate 30 is improved. Further, when the light emitting diode element L is formed, the light emitting element forming portion 28 has the same structure as the thyristor structure portion TS of the switch element T. Therefore, the light emitting element forming portion 28, the light emitting element L, and the switch element T are connected to each other. They can be formed simultaneously by a series of manufacturing processes.

  Further, the light emitting device 10 can be easily manufactured by realizing the switch element T, the light emitting element L, and the start switch element T0 with a simple configuration in which P-type semiconductor layers and N-type semiconductor layers are alternately stacked. . The switch element T, the light emitting element L, and the start switch element T0 can be formed on the substrate 31 by the same manufacturing process, and the manufacturing process of the light emitting device 10 can be reduced as much as possible.

  Further, since the switch element T, the light emitting element L, and the start switch element T0 are integrated on the same substrate 31, each element can be formed with high density. In the switch element array 13, the arrangement direction X Switch elements T adjacent to each other can be brought into close contact with each other. Accordingly, each switch element T can efficiently receive light from the adjacent switch element T, and is adjacent to the emitted switch element T even when the light emission intensity of the adjacent switch element T is small. The threshold voltage or threshold current of the switch element T can be reduced. Therefore, it is possible to reduce the power required for causing the switch element T to emit light, and to realize the light emitting device 10 with lower power consumption. Also in the light emitting element L, since the light emitting elements L adjacent in the arrangement direction can be brought into close contact with each other, the resolution of an image can be improved by using the image forming apparatus 87.

  Since each switch element T emits light in order along the arrangement direction X, the light emitting element L emits light by shielding this light by the light shielding layer 18 so as not to interfere with the light emitted by the light emitting element L. In this case, the light quantity of the light emitting element L is prevented from being reduced or increased, and a stable light quantity can be obtained. Further, since the bias light is prevented from leaking by the light shielding layer 18, the image forming apparatus 87 can form an image of good quality without degrading the image quality.

  The insulating layer 17 is provided between each light emitting element L and each switch element T and each scanning signal transmission path 15 and light emission signal transmission path 12, and each light emitting element L and each switch element T and each scanning signal transmission path. 15 and the light emission signal transmission path 12 are prevented from being short-circuited.

  Since each scanning signal transmission line 15 and the insulating layer 17 form the reflecting means, it is not necessary to form a reflecting layer or the like in order to produce the reflecting means, and it can be formed using an existing configuration. . Therefore, the reflecting means can be formed without increasing the manufacturing steps of the light emitting device 10.

  Further, in the light emitting device 10, the threshold voltage or threshold current when light from the adjacent switch element T is received is the threshold voltage or threshold current when light from the adjacent switch element T is not received. If the switch element T can be lowered to about 80% of the switch element T, the switch element T whose threshold voltage or threshold current has been reduced by light reception can be selectively emitted, so that the switch element does not have high light receiving sensitivity. The elements T can be made to emit light in order along the arrangement direction. Therefore, the light emission state of the switch element T can be sequentially shifted along the arrangement direction of the switch elements T without being influenced by the light receiving sensitivity of the switch element T, and the reliability of optical scanning is improved.

  FIG. 15 shows a start signal φS given to the start signal transmission line 16 by the driving means 73 and first to third scan signals φ1, φ2 given to the scan signal transmission path 15 in the light emitting device of the second embodiment of the present invention. , Φ3, the light emission signal φE given to the light emission signal transmission path 12, the light emission intensity of the light emitting element L1, and the light emission intensity of the scan start switch element T0 and the switch elements T1 to T4. The light emission intensity of the light emitting element L1, the scanning start switch element T0, and the switch elements T1 to T4 indicates that light is emitted when the level is high (H), and indicates that no light is emitted when the level is low (L). . In FIG. 15, the horizontal axis represents time and represents the elapsed time from the reference time.

  The light emitting device of the present embodiment and the light emitting device 10 of the first embodiment shown in FIG. 1 differ only in the driving method of the device, that is, the timing of each signal output from the driving means 73 is different. Since only the differences are the same as those of the light emitting device 10, the description of the same configuration is omitted.

  For the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE, the vertical axis represents the signal level. The signal level represents the magnitude of voltage or current. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at a high (H) level, a high voltage or high current is applied to the signal transmission line. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at the low (L) level, a low voltage or a low current is supplied to the signal transmission line. When the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE are at the L level, the voltage or current supplied to the transmission line is smaller than the threshold voltage or threshold current of each element. In the case of voltage, the high level is, for example, 3V to 10V. In the case of voltage, the low level is, for example, 0V.

  In the present embodiment, the voltage of the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE at the H level is, for example, 5 volts (V), and the L level start signal φS, The voltages of the third scanning signals φ1 to φ3 and the light emission signal φE are set to 0 (zero) volts (V), for example. The waveforms of the first to third scanning signals φ1 to φ3 are the same and have different phases.

  In the present embodiment, the driving means 73 applies the first to third scanning signals φ1 to φ3 to the scanning signal transmission line 15 so that the high level portions of the first to third scanning signals φ1 to φ3 do not overlap. give. That is, when the first scanning signal φ1 is at a high level, the second and third scanning signals φ2 and φ3 are at a low level, and when the second scanning signal φ2 is at a high level, the first and third scanning signals φ1, φ3 is at a low level, and when the third scanning signal φ3 is at a high level, the driving means 73 outputs each signal so that the first and second scanning signals φ1 and φ2 are at a low level.

  Hereinafter, the operation of the driving unit 73 will be described. First, at time t0, the driving unit 73 sets the start signal φS, the first to third scanning signals φ1 to φ3, and the light emission signal φE to a low level. When the signal level is changed from the low level to the high level for the light emission signal φE, the start signal φS, and the scanning signal φ, the driving unit 73 changes the signal level to the high level until the signal level is changed from the high level to the low level next time. To maintain. Further, when the signal level is changed from the high level to the low level for the light emission signal φE, the start signal φS, and the scanning signal φ, the driving unit 73 sets the signal level to the low level until the signal level is changed from the low level to the high level next time. To keep.

  At time t1, the driving unit 73 changes only the start signal φS from the low level to the high level. As a result, the scanning start switch element T0 is turned on, that is, turned on and emits light.

  The light of the scanning start switch element T0 is most strongly incident on the switch element T1 arranged at the end portion in the arrangement direction X of the adjacent switch element array 13. In the other switch elements T of the switch element array 13, the intensity of light emitted from the scan start switch element T0 is smaller as the switch element T is arranged at a position away from the scan start switch element T0 in the arrangement direction X. Become. In the switch element T, when light is received, carriers corresponding to the received light intensity are generated in each semiconductor layer by photoexcitation. Electrons accumulated in the second one-conductivity-type semiconductor layer 44 due to the generation of carriers lowers the Fermi level of the second one-conductivity-type semiconductor layer 44, and thereby the first other-conductivity-type semiconductor layer 43 and the second one-conductivity-type semiconductor layer 43. The avalanche phenomenon is likely to occur at the junction with the two one-conductivity type semiconductor layer 44. For this reason, the switching element T has a characteristic that the threshold voltage or threshold current decreases by receiving light, and the threshold voltage or threshold current drops more as the received light intensity increases. .

  Next, the transfer of the light emission state from the scanning start switch element T0 to the switch element T1 will be described. When the scanning start switch element T0 emits light, the switch element T1 receives this light, and the threshold voltage of the switch element T1 decreases.

At time t2, the threshold voltage of the switch element T1 is V _TH (T1). Switch elements T1, T4,..., Tj-2 are connected to the first scanning signal transmission line 15a, but the switch elements T4,..., Tj-2 are sufficiently separated from the scanning start switch element T0. Therefore, the threshold voltage hardly changes by receiving light from the scanning start switch element T0.

  At time t2, the start signal φS is changed from the high level to the low level. Accordingly, at time t2, the scanning start switch element T0 is turned off, that is, turned off and extinguished.

  After the elapse of time t2, at time t3, the driving unit 73 changes the first scanning signal φ1 from the low level to the high level. Although the scanning start switch element T0 is turned off, the threshold voltage decreased by the light received by the switch element T1 gradually increases from time t2 as time elapses. In the switch element T adjacent to the light-emitting switch element T, when the threshold voltage or threshold current decreases due to light reception, and the light-emitting switch element T changes from the light-emitting state to the non-light-emitting state, the adjacent switch element T Since no light is received, the lowered threshold voltage or threshold current gradually increases. Another switch connected to the same scanning signal transmission line 15 when the threshold voltage or threshold current of the switch element T adjacent to the switch element T in the light emitting state rises for a predetermined time from time t2 to time t3. By selecting a time shorter than the time until the time when the threshold voltage or threshold current of the element T becomes equal to the minimum value, the scanning signal φ is applied to the switch element T in which the threshold voltage or threshold current has decreased due to this light reception. Can be emitted.

  The high level of the first scanning signal φ1 is the threshold voltage of the other switching elements T4,..., Tj-2 except the switching element T1 connected to the first scanning signal transmission line 15a, as in the above-described embodiment. Alternatively, a higher voltage or higher current than the lowest threshold current is selected.

  In this way, the light emission state transitions from the scanning start switch element T0 to the switch element T1. At time t2, the driving unit 73 changes the start signal φS from the high level to the low level, and thereafter, the scanning start switch element T0 maintains the off state until the switch element T1 needs to emit light.

  When the switch element T1 is turned on at time t3, the switch element T1 is kept on until the high-level scanning signal φ becomes low level.

  The switch element T1 generates a trigger signal at the gate 24 by light reception. When the switch element T1 is turned on at time t3, the switch element T1 is kept on until the high-level scanning signal φ becomes low level. In the on state, the voltage of the gate 24 of the switch element T1 becomes approximately 0 (zero) volts (V). Here, the voltage of the gate 24 of the switch element T1 is a potential difference between the gate 24 and the back electrode 29 grounded. Since the gate 24 of the switch element T1 is connected to the third one-conductivity-type semiconductor layer 35 that is the cathode of the light emitting element L1, the voltage of the gate 24 of the switch element T1 is almost equal to the voltage of the cathode of the light emitting element L1. Will be equal. In this way, the switch element T1 can change the voltage applied to the cathode and the back electrode 29 of the light emitting element L1.

  When the light emitting element L1 emits light, the driving unit 73 changes the light emission signal φE from the low level to the high level at time t4 after the time t3 when the first scanning signal φ1 is changed from the low level to the high level has elapsed.

In the light emitting element L1, since the switch element T1 is in the ON state, as described above, the cathode of the light emitting element LL1 is approximately 0 (zero) volts (V). At this time, the switch elements T2,..., Tj−1, Tj are in an off state, and the cathode voltage of the light emitting element L1 at time t4 is V _ca (L1), and the light emitting elements L2,. , Li cathode voltages V _ca (L2),..., V _ca (Li-1), V _ca (Li), respectively, the high level V _H of the light emission signal φE is equal to or higher than the cathode voltage of the light emitting element L. Then, by selecting a value smaller than the lowest value among the cathode voltages of the light emitting elements L2,..., Li-1, Li, only the light emitting element L1 can be selectively turned on to emit light. it can.

  At time t5, when the driving unit 73 sets the light emission signal φE to the low level, the light emitting element L1 is turned off and turned off. The exposure amount to the photosensitive drum 90 is adjusted according to the time during which the light emitting element L1 emits light, with the light emission intensity of the light emitting element L1 being constant. That is, the exposure amount is determined by determining the time between time t4 and time t5 when the light emission signal φE becomes high level. When changing the exposure amount according to the light emission intensity of the light emitting element L1, it is difficult because the voltage or current applied to the light emitting element L1 needs to be finely controlled. However, by changing the exposure amount according to the light emission time, the light emission signal φE is changed. Since it is only necessary to adjust the high level time, it is easy to control the exposure amount, and a constant voltage or constant current is applied to the light emitting element L, so that the light emitting element L1 can emit light stably. The time during which the light emitting element L emits light, in other words, the time during which the light emission signal φE is at the high level, is selected to be 80% or less of the time during which the scanning signal φ is at the high level.

  After the time t5 has elapsed, when the driving unit 73 sets the first scanning signal φ1 to the low level at the time t6, the switch element T1 is turned off. After the time t6 has elapsed, the driving unit 73 outputs the second scanning signal φ2 at the time t7. When the level is high, the switch element T2 is lit. As a result, the light emission state shifts from the switch element T1 to the switch element T2.

  After the time t7 has elapsed, when the driving unit 73 sets the second scanning signal φ2 to the low level at the time t8, the switch element T2 is turned off. After the time t8 has elapsed, the driving unit 73 outputs the third scanning signal φ3 at the time t9. When the level is high, the switch element T3 is lit. As a result, the light emission state is shifted from the switch element T2 to the switch element T3.

  After the time t9 has elapsed, when the driving unit 73 sets the third scanning signal φ3 to the low level at the time t10, the switch element T3 is turned off, and after the time t10 has elapsed, the driving unit 73 outputs the first scanning signal φ1 again at the time t11. When set to high level, the switch element T4 emits light.

  The time during which the first to third scanning signals φ1 to φ3 are at the high level is selected, for example, as 1 μsec.

  The time between the time t6 and the time t7, the time between the time t8 and the time t9, and the time between the time t10 and the time t11 are selected to be equal to the time between the time t2 and the time t3 described above. For example, it is selected from about 0.1 μsec to 1 μsec.

  Thus, the driving means 73 repeatedly applies the first to third scanning signals φ1 to φ3, so that the ON state is sequentially transferred along the arrangement direction X also in the switch elements T4,..., Tj−1, Tj. Is done. When the switch element T emits light, the light emission signal φE of the light emission signal transmission path 12 is changed from low level to high level to correspond to the light emitting switch element T, that is, the light emitting switch element T. Only the light emitting element L connected to can be made to emit light selectively.

  The switch elements T positioned on both sides in the arrangement direction X of the switch elements T that are emitting light are all excited, but as described above by the first to third scanning signal transmission paths 15a, 15b, and 15c. The first to third scanning signals φ1 to φ3 are transmitted to the switching elements T and the first to third scanning signals φ1 to φ3 are given to the switching elements T, so that the switching elements T are switched from one to the other in the arrangement direction X. The light emission state can be transferred.

  16 and 17 measure the voltage applied to two adjacent switch elements T when the first and second scanning signals φ1 and φ2 are applied to the first and second scanning signal transmission lines 15a and 15b, respectively. It is a wave form diagram which shows the experimental result which carried out. FIG. 16 shows the waveforms of the first and second scanning signals φ 1 and φ 2 output from the driving unit 73 to the scanning signal transmission path 15. As shown in FIG. 16, the first scanning signal transmission path 15a is supplied with a first scanning signal φ1 that repeats a high level and a low level at a predetermined first period Ta, and the second scanning signal transmission path 15b Then, the second scanning signal φ2 that repeats the high level and the low level at a predetermined second period Tb is given. Here, for the experiment, the interval is different from the predetermined first period Ta and the predetermined second period Tb, and the high-level voltage Va of the first scanning signal φ1 is higher than the threshold voltage of the switch element T. The high level voltage Vb of the second scanning signal φ2 is set lower than the initial threshold voltage of the switch element T. The predetermined first period Ta is 5 μs, and the predetermined second period Tb is 2.5 μs. The time during which the first and second scanning signals φ1 and φ2 are at the high level is 1 μsec.

  17 shows that when the first scanning signal φ1 and the second scanning signal φ shown in FIG. 16 are relatively displaced, that is, the phase is changed and applied to each scanning signal transmission line 15, the scanning signal transmission line 15 The waveforms of the first scanning signal φ1 and the second scanning signal φ2 measured in FIG.

  When the first scanning signal φ1 is changed from the low level to the high level at time t1, the switch element T to which the first scanning signal φ1 is applied is turned on at time t2, and the first scanning signal φ1 is changed from the high level at time t3. When the level is low, the switch element T to which the first scanning signal φ1 is applied is turned off.

  When the second scanning signal φ2 is changed from the low level to the high level and the switch element T is turned on, the voltage of the second scanning signal φ2 is Vc, and when the second scanning signal φ2 is changed from the low level to the high level. The voltage of the second scanning signal φ2 measured when the switch element T remains off is Vd.

  When the second scanning signal φ2 is set to the high level between the time t2 and the time t3, the switch element T to which the second scanning signal φ2 is applied is turned on, and the voltage of the second scanning signal φ2 to be measured is Vc Met. This is a natural result because the switch element T to which the first scanning signal φ1 is applied is lit until time t3.

  However, even if the second scanning signal φ2 is changed from the low level to the high level at the time t4 after the time t3 has elapsed, the switch element T to which the second scanning signal φ2 is applied is lit and measured for the second scanning. The voltage of the signal φ2 is Vc.

  From time t3 to time t4, the switch element T to which the first scanning signal φ1 is applied is turned off. However, at time t4, the switch element T to which the second scanning signal φ2 is applied is lit.

  Therefore, between time t3 and time t4, the threshold voltage of the switch element T to which the second scanning signal φ2 is applied is lower than the voltage of the second scanning signal φ2 even though no light is received. You can see that

Therefore, the first scanning signal φ1 and the second scanning signal φ2 do not overlap with each other, that is, after the voltage of the first scanning signal φ1 is changed from the high level to the low level, the voltage of the second scanning signal φ2 is changed from the low level. Even if the level is high, the light emission state of the switch element T is transferred.
The time Td from the time t3 to the time t4 is about 1 μsec.

  The light emitting device of the present embodiment can achieve the same effect as the light emitting device 10 of the above-described embodiment. Furthermore, according to the light emitting device of the present embodiment, when the driving unit 73 supplies voltage or current to the plurality of scanning signal transmission lines 15, the voltage applied to one switch element T in the two adjacent switch elements T. Alternatively, after the supply of current is stopped, supply of voltage or current to the other switch element T is started after a predetermined time, so that voltage and current are not supplied to two adjacent switch elements T at the same time. . Therefore, the power consumption in the switch element T can be reduced, and the power consumption of the apparatus can be reduced.

  FIG. 18 is a diagram illustrating forward voltage-current characteristics of the switch elements T and a voltage range of the scanning signal φ applied to each switch element T in the light emitting device according to the third embodiment of the present invention. . The light emitting device of this embodiment is different from the light emitting device of the first or second embodiment described above only in the high level range of the scanning signal φ output by the driving means 73, and the other configurations are the same. Therefore, the description is omitted.

In the present embodiment, among the switch elements T connected to the same scanning signal transmission line 15, the adjacent switch element T emits light, so that this light is received and the threshold voltage decreases most. the threshold voltage V _1, the voltage between the threshold voltage of the switch element T having a low threshold voltage V ₃ to the second, i.e., the range of the voltage indicated by reference numeral P3 in Fig. 18, the scanning signal φ Choose a high-level voltage.

  As described above, by selecting the high level voltage of the scanning signal φ, it is possible to selectively emit only the switch element T having the lowest threshold voltage due to light reception. Even if it is such a structure, the effect similar to the light-emitting device of each embodiment mentioned above can be acquired.

  FIG. 19 is a plan view showing a basic configuration of the light-emitting chip 101 in the light-emitting device 100 according to the fourth embodiment of the present invention. The light emitting device 100 of the present embodiment and the light emitting device 10 of the first embodiment shown in FIG. 1 described above have the same basic configuration, and the light emitting element array 11 and the switch element in the light emitting chip. Since only the arrangement configuration of the array 13 and the scanning start switch element T0 and the configuration of the signal transmission path connection portion 72 are different, the same configurations as those of the light-emitting device 10 are denoted by the same reference numerals and the description thereof will be given. Omitted.

  1 is a part surrounded by b1, b2, b3, b4, b5 and b6 in the same drawing. FIG. 19 shows a plane of the light-emitting chip 101 arranged with the light emitting direction of each light-emitting element L as a front side perpendicular to the paper surface. The light-emitting element L, the switch element T, the connection means 14, and the signal transmission path connection portion 104 is shown with diagonal lines for ease of illustration.

  The light emitter chip 101 includes a first light emitter chip portion 102, a second light emitter chip portion 103, and a signal transmission path connection portion 104. The first light emitting chip portion 102 is the portion shown in FIG. 1 described above, and is the portion surrounded by b1, b2, b3, b4, b5 and b6. The second light emitting chip portion 103 has the same configuration as that of the first light emitting chip portion 102, and the scanning start switch element T0 is arranged not in the arrangement direction X1 of the light emitting element array 13 but in the other arrangement direction of the light emitting element array 13. The configuration is arranged on the X2 side. The light emitting element array 11 of the first light emitter chip portion 102 is described as a first light emitting element array 11a, the switch element array 13 of the first light emitter chip portion 102 is described as a first switch element array 13a, and a second light emitter. The light emitting element array 11 of the chip part 103 is referred to as a second light emitting element array 11b, and the switch element array 13 of the second light emitter chip part 103 is referred to as a second switch element array 13b.

  The first light emitting element array 11a and the second light emitting element array 11b are arranged linearly along the arrangement direction X. The first switch element array 13a and the second switch element array 13b are arranged linearly along the arrangement direction X.

  The light emitting chip 101 has a substantially rectangular parallelepiped shape, and a signal transmission path connection portion 104 is provided on one surface portion 105 of the thickness direction Z.

  The first light emitter chip portion 102 is provided at the other end portion 101b of the light emitter chip 101 in the arrangement direction X, and the second light emitter chip portion 103 is provided at the one end portion 101a of the light emitter chip 101 in the arrangement direction X. .

  A length W14 in the arrangement direction X of the first light emitting element array 11, a length W15 in the arrangement direction X of the second light emitting element array 11, and a light emitting element L at the other end in the arrangement direction X of the first light emitting element array 11. The light emitting element arrays 11 are arranged so that the distance W16 between the light emitting elements L at one end in the arrangement direction of the second light emitting element array 11 is equal. In the arrangement direction X, the signal transmission path connection unit 104 is provided in the central portion 101c of the light emitter chip 101 between the first and second light emitting element arrays 11a and 11b.

  The signal transmission path connection unit 104 includes a scanning signal transmission path connection unit 106, a light emission signal transmission path connection unit 107, and a start signal transmission path connection unit 108. The scanning signal transmission path connection unit 106, the light emission signal transmission path connection unit 107, and the start signal transmission path connection unit 108 are bonding pads to which bonding wires as external signal transmission paths are connected by wire bonding. The signal transmission path connecting portion 104 is formed of a conductive material such as a metal material and an alloy material, and specifically, gold (Au), an alloy of gold and germanium (AuGe), and an alloy of gold and zinc. (AuZn) or the like. The scanning signal transmission line connection part 106, the light emission signal transmission line connection part 107, and the start signal transmission line connection part 108, which are the signal transmission line connection parts 104, are formed in a substantially rectangular shape when viewed from one side in the thickness direction Z. .

  The scanning signal transmission path connection unit 106, the light emission signal transmission path connection unit 107, and the start signal transmission path connection unit 108 are arranged at intervals in the arrangement direction X, and are provided outside the region where the light emitting element L is provided. A scanning signal transmission path connection unit 106 is provided in the central portion 101 c of the light emitting chip 101.

  The scanning signal transmission line connection unit 106 includes first to third scanning signal transmission line connection units 106a, 106b, and 106c. The first to third scanning signal transmission path connecting portions 106a, 106b, and 106c are arranged at intervals in the arrangement direction X. The light emitting chip 101 is formed with the above-described resistance element Rφ, and the first scanning signal transmission path 15a of the first and second light emitting chip sections 102 and 103 is provided in the first scanning signal transmission path connecting section 106a, respectively. Connection is made via a resistance element Rφ. The second scanning signal transmission path connection portion 106b is connected to the second scanning signal transmission path 15b of the first and second light emitting chip portions 102 and 103 via a resistance element Rφ. The third scanning signal transmission path 15c of the first and second light emitter chip sections 102 and 103 is connected to the third scanning signal transmission path connection section 106c via a resistance element Rφ.

  Each resistance element Rφ is formed by a signal transmission path that connects the first to third scanning signal transmission paths 15a, 15b, and 15c and the first to third scanning signal transmission path connections 106a, 106b, and 106c, respectively. The resistance value is determined by the cross-sectional area of the current flow path. By forming the resistance element Rφ on the light emitting chip 101, it is not necessary to separately form the resistance element Rφ on a circuit board or the like on which the light emitting chip 101 is mounted, and the apparatus can be miniaturized. The resistance element Rφ is formed of the same material as the first to third scanning signal transmission paths 15a, 15b, and 15c, and at the same time when the first to third scanning signal transmission paths 15a, 15b, and 15c are formed by photolithography. It is formed.

  The first light emitter chip part 102 and the second light emitter chip part 103 are provided in plane symmetry with respect to a virtual plane that is perpendicular to the arrangement direction X. That is, in the first switch element array 13a, the switch elements T1, T2,..., Tj−1, Tj are arranged in this order from one end portion in the arrangement direction X to the other end portion, and in the second switch element array 13b, The switch elements T1, T2,..., Tj−1, Tj are arranged in this order from the other end in the arrangement direction X toward one end.

  The second scanning signal transmission line connection unit 106b is provided at the center of the light emitting chip 101 in the arrangement direction X, and the third scanning signal transmission line connection unit 106c is provided in one arrangement direction X1 of the second scanning signal transmission line connection unit 106b. The first scanning signal transmission line connection portion 106a is provided in the other X2 in the arrangement direction of the second scanning signal transmission line connection portions 106b.

  When the first to third scanning signals φ1 to φ3 from the driving unit 73 are respectively supplied to the first to third scanning signal transmission path connecting portions 106a, 106b, and 106c, the first to third scanning signals φ1 to φ3. Are simultaneously applied to the first to third scanning signal transmission paths 15a, 15b, 15c of the first and second light emitting chip portions 102, 103. Therefore, the number of scanning signal transmission line connection units 106 can be reduced as much as possible.

  The light emission signal transmission line connection unit 107 includes first and second light emission signal transmission line connection units 107a and 107b, and is connected to the other of the scanning signal transmission line connection unit 106 in the arrangement direction X. Part 107 a is provided, and the second light emission signal transmission line connection part 107 b is provided on one side in the arrangement direction X of the scanning signal transmission line connection part 106. The first light emission signal transmission path connection unit 107 a is connected to the light emission signal transmission path 12 of the first light emitter chip unit 102. The second light emission signal transmission path connection portion 107 b is connected to the light emission signal transmission path 12 of the second light emitter chip portion 103.

  A start signal transmission path connection section 108 is provided between the scanning signal transmission path connection section 106 and the light emission signal transmission path connection section 107 on the other side in the arrangement direction X. The start signal transmission path 16 of the first and second light emitting chip units 102 and 103 is connected to the start signal transmission path connection unit 108. When the start signal φS is supplied from the driving means 73 to the start signal transmission path connecting portion 108, the start signal φS is simultaneously supplied to the start signal transmission paths 16 of the first and second light emitting chip portions 102 and 103. Therefore, the number of start signal transmission line connection sections 108 can be reduced as much as possible.

  In the region between the first light emitting chip portion 102 and the second light emitting chip portion 103 where the signal transmission path connecting portion 104 is formed, each light emitting signal transmission path 12 and each of the first to third scanning signal transmission paths 15a. , 15b, 15c and each start signal transmission line 16 are insulated from each other by an insulating film having electrical insulation. The signal transmission path connecting portion 104, each light emission signal transmission path 12, each of the first to third scanning signal transmission paths 15a, 15b, 15c, and each signal transmission path of each start signal transmission path 16 are formed in an insulating film. It is connected through a through hole.

  In the light emitting device 100, the scanning signal transmission line connection unit 106 and the start signal transmission line connection unit 108 are commonly used in the first light emitting chip unit 102 and the second light emitting chip unit 103, and the light emission signal transmission line connection unit 107. Are separately provided on the first light emitter chip portion 102 and the second light emitter chip portion 103. As a result, the first light-emitting chip unit 102 and the second light-emitting chip unit 103 transfer the ON state of the switch element T using the common scanning signal φ between the first light-emitting chip unit 102 and the second light-emitting chip unit 103, and Since the light emitting signal φE can be separately given to the light emitting chip portion 103, each light emitting element L of the first light emitting chip portion 102 and the second light emitting chip portion 103 can emit light individually. . As a result, the time for exposing the photosensitive drum in the image forming apparatus can be shortened.

  The dimension of the light emitting chip 101 in the width direction Y is slightly larger than the distance from one end of the light emitting element L in the width direction Y to the other end of the switch element T in the width direction Y. The distance W17 from one end of the light emitting element L in the width direction Y to one end of the light emitting chip 101 in the width direction Y, and the other end of the switching element T in the width direction Y to the other end of the light emitting chip 101 in the width direction Y. The distance W18 is selected to be approximately equal, and is selected to have a size necessary for providing the insulating layer 17 and the light shielding layer 18 described above. The signal transmission path connecting portion 104 is formed in a region in the width direction from one end of the light emitting element L in the width direction Y to the other end of the switch element T in the width direction Y.

  FIG. 20 is a partial plan view showing a basic configuration of a light emitter chip assembly 109 having a plurality of light emitter chips 101. This figure shows a plane of the light emitting chip assembly 109 arranged with the light emitting direction of each light emitting element L as a front side perpendicular to the paper surface, and the first and second light emitting element arrays 11a, 11b, first In addition, the second switch element arrays 13a and 13b and the signal transmission line connection unit 104 are indicated by hatching for easy illustration.

  The light emitting chip assembly 109 has a plurality of light emitting chips 101 shown in FIG. 19, and each light emitting chip 101 aligns the arrangement direction X of the light emitting elements L, and the arrangement direction X of the light emitting element array 11. Are arranged in two rows with an interval W19 substantially equal to the lengths W14 and W15, and the light emitting element array 11 of the light emitting chip 101 in the other row faces the region 111 between the light emitting chips 101 in one row. Are arranged in a staggered manner. The light emitting chip assembly 109 is mounted on a circuit board such as a printed wiring board with the back electrode 29 of the light emitting chip 101 facing the circuit board. The interval W19 is adjacent to one end in the arrangement direction X of the predetermined light emitter chips 101 from one end in the arrangement direction X of the light emitting elements L provided at one end in the arrangement direction X of the predetermined light emitter chips 101. This is the distance to the other end in the arrangement direction X of the light emitting elements L provided at the other end in the arrangement direction X of the arranged light emitting chips 101. Each light emitting chip 101 has a width direction Y end of the light emitting chip 101 in one row in the width direction Y1 and a width direction Y end portion of the light emitting chip 101 in the other width direction Y2 row. They are arranged in the direction Y with a predetermined interval, for example, the interval W1.

  Each light emitting chip 101 arranged in one width direction Y1 of the light emitting chip 101 of the light emitting chip assembly 109 is provided with the light emitting element array 11 in the other width direction Y2, and the switch element array 13 in one width direction Y1. Arranged as provided. The light emitting chips 101 arranged in the other width direction Y2 of the light emitting chip 101 of the light emitting chip assembly 109 are provided with the light emitting element array 11 in one width direction Y1, and the switch element array 13 in the other width direction Y2. Arranged as provided. The semiconductor chips 101 in each column are arranged with the light emitting elements L facing the other column side. Thereby, the light emitting element array 11 of the light emitting chip 101 in one column and the light emitting element array 11 of the light emitting chip 101 in the other column can be brought as close as possible. The interval ΔY between the light emitting element arrays 11 of the light emitting chips 101 adjacent to each other in the width direction Y is selected to be about 1 or twice the interval W1 in the arrangement direction X of the light emitting elements L. For example, at 600 dpi, the interval ΔY is selected to be 42.3 μm. The interval ΔY is a distance between the optical axes of the light emitting elements L.

  The light emitting chip assembly 109 is formed by arranging the light emitting chips 101 on a circuit board such as a printed wiring board as described above. The light emitting chip assembly 109 is used in an exposure apparatus as a line head such as an optical printer head for an electrophotographic image forming apparatus. The width W20 of the light emitting chip assembly 109 in the arrangement direction X is determined by the width of the image formed in the image forming apparatus 87.

  The signal transmission path connection portion 104 of each light emitting chip 101 is electrically connected to a portion to be connected to the circuit board by a bonding wire that is an external signal transmission path. The driving means 73 described above is mounted on the circuit board. The drive means 73 gives a signal to each signal transmission line connection part 104 via a bonding wire. By providing the drive means 73 on the circuit board on which the light emitting chip 101 is mounted, the distance of the signal transmission path from the drive means 73 to each light emitting element L, each switch element T, and the scan start switch element T0 is shortened. Thus, it is possible to suppress noise from being superimposed on the signal transmitted through the signal transmission path from the driving unit 73 to the signal transmission path connection unit 104.

  21 and 22 are cross-sectional views showing the light emitting chip 101 adsorbed by the collet 112. FIG. When the light emitter chip 101 is mounted on the circuit board 113 in order to produce the light emitter chip assembly 109, that is, when the die pickup and die bonding are performed, the light emitter chip 101 is transported by the attachment device 114. The attachment device 114 includes a collet 112, a suction source 115 such as a vacuum pump that guides the suction force to the collet 112, and a transport unit 116 such as a robot arm that moves the collet 112.

  21 is a diagram schematically showing a cross section in a virtual one plane perpendicular to the arrangement direction X of the light emitter chips 101, and FIG. 22 is a schematic cross section in a virtual one plane perpendicular to the width direction Y of the light emitter chips 101. FIG.

  As shown in FIG. 22, the light emitting chip 101 is provided with a region where the light emitting element L and the switch element T do not exist in the central portion 101 c in the arrangement direction X. The collet 112 is brought into contact with the surface portion 105 in the thickness direction Z of the central portion 101c where the light emitting element L and the switch element T are not provided, and the suction force from the suction source 115 is guided to the collet 112 and is attracted to the collet 112. By doing so, the collet 112 can be adsorbed and held without damaging the light emitting element L and the switch element T. Further, even if the side surface portion 117 of the central portion 101c of the light emitting chip 101 is missing due to the contact of the collet 112, the light emitting element L and the switch element T are not damaged.

  As the dimension W22 in the width direction Y is smaller than the dimension W21 in the thickness direction Z of the light emitting chip L, the light emitting chip 101 is more likely to fall down when arranged on the circuit board 113. However, in the present invention, a plurality of light emitting chips 101 are used. Are arranged in two rows in a zigzag pattern and mounted on the circuit board 31, each light emitter chip 101 in one row and each light emitter chip 101 in the other row are arranged in the arrangement direction X. Since the 2/3 region overlaps in the width direction Y, when the light emitter chip 101 is placed on the circuit board 31 by the collet 112, the light emitter chip 101 is unlikely to fall down. As a result, the assembly time of the light emitter chip assembly 109 can be shortened, and the productivity can be improved.

  The light emitting chip 101 is formed by cutting a plurality of light emitting chip 101 precursors formed on a wafer by dicing. For this reason, in order to make the above-described interval ΔY as small as possible, the end in the width direction Y of each light emitting element L of the light emitting element array 11 of the light emitting chip 101 is located on the end surface of the light emitting chip 101 in the width direction Y. It must be cut out as close as possible. Therefore, as shown in FIGS. 21 and 22, when the central portion 101c of the light-emitting chip 101 is vacuum-adsorbed by the collet 112 in order to die-pick up and mount the light-emitting chip 101, the surface of the light-emitting element L is The light emitting element L is not damaged by being contaminated or having the side surface portion 117 of the light emitting chip 101 missing.

  FIG. 23 is a partial plan view showing the basic configuration of the light-emitting device 120 according to the fifth embodiment of the present invention. The figure shows a plane of the light emitting device 120 arranged with the light emitting direction of each light emitting diode element L as the front side perpendicular to the paper surface. The light emitting signal transmission path 12, the scanning signal transmission path 15, and the start signal transmission path. 16, the light emitting diode element of the light emitting diode element L, one conductive type semiconductor layer 19, the gate 24 of the switch element T, the connection means 14, the light emitting element light shielding portion 23, the surface electrode 25, and the second other conductive type semiconductor layer of the switch element T. 44 and the third one-conductivity-type semiconductor layer 45, the switch element conductive path 27, the scan start switch element connecting section 68, the substrate connecting section 74, and the common conductive path 122 are hatched for ease of illustration. It is shown.

  Since the light-emitting device 120 of the present embodiment and the light-emitting device 10 of the above-described embodiment have the same configuration, the same parts may be denoted by the same reference numerals and the description thereof may be omitted. is there.

  In the light emitting device 120 of the present embodiment, the substrate 30 is realized by a substrate having a high resistance value, such as a high-resistance one-conductivity type semiconductor substrate or a semi-insulating semiconductor substrate. Therefore, the substrate 30 hardly conducts current. Also in the present embodiment, one conductivity type is N-type, and the other conductivity type is P-type. The substrate 30 is made of, for example, semi-insulating gallium arsenide (GaAs), gallium nitride (GaN), sapphire, or the like.

  Each switch element T and scan start switch element T0 of the switch element array 13 of the light emitting device 120 are provided with a common conductive path connection portion 123 protruding to the opposite side of the light emitting element T. A common conductive path 122 is connected to the common conductive path connecting portion 123. The common conductive path 122 is provided in the other width direction Y2 of the scanning signal transmission path 15 in the width direction Y and extends along the arrangement direction X. The common conductive path 122 serves as a cathode electrode of the switch element T and the scan start switch element T0.

  FIG. 24 is a partial cross-sectional view showing the basic configuration of the light emitting device 120 as seen from the section line D6-D6 of FIG. In the present embodiment, one surface 30a of the substrate 30 is formed in a plane. In the present embodiment, the back electrode 29 is not formed on the other surface 30 b of the substrate 30. In the light emitting device 10 of the above-described embodiment, the light emitting element L is formed by being stacked on the light emitting element forming portion 28. However, in the light emitting device 120 of the present embodiment, the light emitting element L is the light emitting element forming portion 28. Rather than being laminated, they are laminated on one surface 30a of the substrate 30.

  The first diode constituent semiconductor layer 35 of the light emitting element L is stacked on the one surface 30a of the thickness direction Z of the substrate 30a, and the second diode constituent semiconductor layer is formed on the one surface 35a of the thickness direction Z of the first diode constituent semiconductor layer 35. 36 are stacked. An ohmic contact layer 37 is stacked on one surface 36 a of the second diode constituent semiconductor layer 36 in the thickness direction Z. The first diode constituent semiconductor layer 35, the second diode constituent semiconductor layer 36 and the ohmic contact layer 37 are covered with the insulating layer 17. A groove portion 38 is formed between the light emitting elements L, and the element light-shielding portion 23 is provided in the groove portion 38.

  FIG. 25 is a partial cross-sectional view showing the basic configuration of the light emitting device 120 as seen from the section line D7-D7 in FIG. In the light emitting device 10 of the above-described embodiment, the substrate 30 forms a part of the thyristor component TS of the switch element T. However, in the light emitting device 120 of the present embodiment, the substrate 30 is the switch element T. A first one-conductivity-type semiconductor layer 41 is provided between the switch element T and the first other-conductivity-type semiconductor layer 42 without constituting a part of the thyristor component TS.

  In the present embodiment, the switch element T includes a first one-conductivity-type semiconductor layer 41, a first other-conductivity-type semiconductor layer 42, and a second one-conductivity-type semiconductor layer that are formed on one surface 30a of the substrate 30. 43, a second other conductivity type semiconductor layer 44, a third one conductivity type semiconductor layer 45, and a third other conductivity type semiconductor layer 46. In the switch element T, a first one-conductivity-type semiconductor layer 41 is stacked on one surface 30a in the thickness direction Z of the substrate 30, and the first one-conductivity-type semiconductor layer 41 has a first surface in the thickness direction 41a. The other conductivity type semiconductor layer 42 is laminated, the second one conductivity type semiconductor layer 43 is laminated on the one surface 42a of the thickness direction Z of the first other conductivity type semiconductor layer 42, and the second one conductivity type semiconductor layer. The second other conductivity type semiconductor layer 44 is stacked on one surface 43a of the thickness direction Z of 43, and the third one conductivity type semiconductor is disposed on the one surface 44a of the thickness direction Z of the second other conductivity type semiconductor layer 44. The layer 45 is laminated, the third other conductive type semiconductor layer 46 is laminated on one surface 45a of the third one conductive type semiconductor layer 45 in the thickness direction Z, and the third other conductive type semiconductor layer 46 is arranged in the thickness direction Z. An ohmic contact layer 47 is formed on one surface 46a. Is a layer composed surface electrode 25 on one surface 47a in the thickness direction Z of the ohmic contact layer 47 are laminated. A first other conductivity type semiconductor layer 42, a second one conductivity type semiconductor layer 43, a second other conductivity type semiconductor layer 44, a third one conductivity type semiconductor layer 45, a third other conductivity type semiconductor layer 46, The laminated body of the ohmic contact layer 47 and the surface electrode 25 has a substantially rectangular parallelepiped shape.

  A thyristor structure portion TS is formed including the first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, the second one-conductivity-type semiconductor layer 43, and the second other-conductivity-type semiconductor layer 44, A diode structure portion TD is formed including the third one-conductivity-type semiconductor layer 45 and the third other-conductivity-type semiconductor layer 46.

  The energy gap and carrier density of the semiconductor material forming each semiconductor layer constituting the switch element T increase the light receiving sensitivity in the thyristor structure portion TS, and increase the light emission efficiency and the external light emission intensity in the diode structure portion TD. Thus, it is preferable to design each. Specifically, the first one conductivity type semiconductor layer 41 and the first other conductivity type are compared with the energy gap of the semiconductor material forming the third one conductivity type semiconductor layer 45 and the third other conductivity type semiconductor layer 46. What is necessary is just to make small the energy gap of the semiconductor material which forms the type | mold semiconductor layer 42 and the 2nd one conductivity type semiconductor layer 43. FIG. By setting such an energy gap, the light generated in the diode structure portion TD including the third one-conductivity-type semiconductor layer 45 and the third other-conductivity-type semiconductor layer 46 is converted into the thyristor structure portion of the adjacent switch element T. It becomes easy to absorb in TS, and the light receiving sensitivity of the switch element T can be increased.

  The first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, the second one-conductivity-type semiconductor layer 43, and the second other-conductivity-type semiconductor layer 44 are the third one-conductivity-type semiconductor layer 45. The semiconductor material forming the second other-conductivity-type semiconductor layer 46 has a smaller energy gap and is a non-light emitting semiconductor material, and in this embodiment, is formed of a silicon (Si) material. Since a silicon substrate is used as the substrate 30, the first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, the second one-conductivity-type semiconductor layer 43 and the second one are used by epitaxial growth. On the other hand, by forming the conductive semiconductor layer 44 from a silicon material, a stacked body of silicon materials with extremely few crystal defects can be obtained, and the light receiving efficiency can be improved in the thyristor structure portion TS. In addition, the first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, and the second one-conductivity-type semiconductor layer 43 are combined with the third one-conductivity-type semiconductor layer 45 and the third one-conductivity-type semiconductor layer 45 of the diode structure portion TD. On the other hand, by forming the conductive type semiconductor layer 46 in a semiconductor material having an energy gap smaller than that of the semiconductor material, the thyristor structure portion TS is easily photoexcited by the energy of light received from the diode structure portion TD. The light receiving efficiency in the part TS can be improved.

When the substrate 30, the first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, the second other-conductivity-type semiconductor layer 43, and the second one-conductivity-type semiconductor layer 44 are formed of silicon, It is also easy to control the carrier density of one other conductivity type semiconductor layer 42 to about 1 × 10 ¹⁶ cm ⁻³ or less, specifically, 1 × 10 ¹⁴ cm ⁻³ to 1 × 10 ¹⁶ cm ⁻³ . By forming the substrate 30, the first one conductivity type semiconductor layer 41, the first other conductivity type semiconductor layer 42, the second one conductivity type semiconductor layer 43, and the second other conductivity type semiconductor layer 44 from a silicon material. Thus, the controllability of the carrier density is improved, and the first other conductivity type semiconductor layer 42 can be accurately formed to the above-mentioned carrier density.

  FIG. 26 is a partial cross-sectional view showing the basic configuration of the light emitting device 120 as seen from the section line D8-D8 in FIG. The light emitting element L and the switch element T are arranged adjacent to each other in the width direction Y. The end portion of the first diode constituent semiconductor layer 35 of the light emitting element L near the switch element T is more than the end portion of the second second diode constituent semiconductor layer 36 and the ohmic contact layer 37 near the switch element T. Projecting toward the switch element T constitutes the light emitting element connection portion 51.

  The switch element T includes a first one-conductivity-type semiconductor layer 41, a first other-conductivity-type semiconductor layer 42, a second one-conductivity-type semiconductor layer 43, a second other-conductivity-type semiconductor layer 44, The end of the third one-conductivity-type semiconductor layer 45 near the light-emitting element L is closer to the switch element T than the end of the third other-conductivity-type semiconductor layer 46 and the ohmic contact layer 47 near the light-emitting element L. Protrusively toward. Ends of the first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, the second one-conductivity-type semiconductor layer 43, and the second other-conductivity-type semiconductor layer 44 near the light emitting element L The portion protrudes toward the switch element T from the end portion of the third one-conductivity-type semiconductor layer 45 near the light emitting element L. The ends of the first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, and the second one-conductivity-type semiconductor layer 43 near the light emitting element L are the second other-conductivity-type semiconductor layer. It protrudes toward the switch element T from the end portion near the light emitting element L of 44. Since the switch element T is covered with the insulating layer 17, in the width direction Y of the switch element T, at one end on the light emitting element L side, one surface 43a of the second one-conductivity-type semiconductor layer 43 in the thickness direction Z; The insulating layer 17 is also laminated on the one surface 44 a of the second other conductivity type semiconductor layer 44 in the thickness direction Z and the one surface 45 a of the third one conductivity type semiconductor layer 45 in the thickness direction Z. In the width direction Y, the portion of the third one-conductivity-type semiconductor layer 45 that protrudes in the width direction one Y1 than the third other-conductivity-type semiconductor layer 46 and the third one of the second other-conductivity-type semiconductor layers 44 On the other hand, a portion protruding in the width direction one Y1 from the conductive semiconductor layer 45 is connected by the switch element conductive path 27.

  The first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layer 42, and the second one-conductivity-type semiconductor layer 43 protrude in the width direction one Y1 from the second other-conductivity-type semiconductor layer 44. The portion to be configured constitutes the switch element connecting portion 52. The length of the switch element connecting portion 52 in the arrangement direction X is selected to be equal to the length of the switch element T in the arrangement direction X.

  The insulating layer 17 is formed along the surfaces of the light emitting element L and the switch element T, and is also formed between the light emitting element L and the switch element T. The light emitting element L and the switch element T are electrically connected by the insulating layer 17. Insulated. In the insulating layer 17, a portion provided between the light emitting element L and the switch element T is arranged in the width direction Y from a portion stacked on the first diode constituent semiconductor layer 35 of the light emitting element L to the second of the switch element T. One of the conductive type semiconductor layers 43 is inclined in a direction away from the substrate 30 toward the portion laminated on the conductive type semiconductor layer 43.

  In the insulating layer 17, a through hole 54 is formed in a portion of the light emitting element connection portion 51 that is stacked on the one surface 35 a in the thickness direction Z of the first diode constituting semiconductor layer 35. Through holes 55 are respectively formed in portions of the second one-conductivity-type semiconductor layer 43 that are stacked on the one surface 43a in the thickness direction Z.

  The connection means 14 for connecting the first diode-constituting semiconductor layer 35 of the light emitting element L and the gate 24 of the switch element T corresponding to the light emitting element L emits light over the light emitting element connecting portion 51 and the switch element connecting portion 52. Between the element L and the switch element T, the insulating layer 17 is stacked. A part of the connecting means 14 is formed in the through holes 54 and 55, and the connecting means 14 is connected to the one surface 35 a in the thickness direction Z of the first diode constituting semiconductor layer 35 of the light emitting element connecting portion 51 and the switch element connection. It is connected to one surface 45a of the thickness direction Z of the third one-conductivity-type semiconductor layer 45 of the part 52.

  The end of one side Y <b> 1 in the width direction of each semiconductor layer of the light emitting element L is covered by the signal path extending portion 21 of the light emitting signal transmission path 12 described above via the insulating layer 17. The signal path extending portion 21 is provided to face the side portion of the light emitting element L opposite to the switch element T, and in the thickness direction Z, from the vicinity of the one surface 35a of the first diode constituting semiconductor layer 35, the ohmic contact layer. The one surface 37a extends upward from the one surface 37a. The signal path extending portion 21 can reflect the light traveling from the light emitting element L toward the other side in the width direction Y, whereby the light from the light emitting element L can be collected in one thickness direction Z1. Can be increased as much as possible.

  Further, an end portion of the diode structure portion TD of the switch element T near the light emitting element L is covered with a light shielding layer 18 laminated on the insulating layer 17. Thereby, the light traveling from the switch element T toward the light emitting element L can be shielded. Of the end of the switch element T opposite to the light emitting element L, the thickness direction Z from one side of the switch element T in the thickness direction to the vicinity of the second one-conductivity-type semiconductor layer 43 is interposed via the insulating layer 17. And is covered with the light shielding layer 18. The light shielding layer 18 covers one side in the thickness direction Z of the switch element connecting portion 52 and extends from the center between the switch element T and the light emitting element L closer to the light emitting element L.

  The end of the first one-conductivity-type semiconductor layer 41 opposite to the light emitting element T has a first other-conductivity-type semiconductor layer 42, a second one-conductivity-type semiconductor layer 43, and a second other-conductivity that are stacked. Type semiconductor layer 44, third one-conductivity-type semiconductor layer 45, third other-conductivity-type semiconductor layer 46, ohmic contact layer 47, protrudes in the width direction other Y 2 from the opposite end surface to light emitting element T, and is common The conductive path connection part 123 is configured. In the first one-conductivity-type semiconductor layer 41, the common conductive path 122 is laminated and provided on the one surface 44 a of the common conductive path connection portion 123 in the thickness direction Z. The common conductive path 122 is electrically connected to the common transmission path connection portion 123 of each switch element T.

  The common conductive path 122 is formed of a conductive material such as a metal material and an alloy material. Specifically, the common conductive path 122 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like. The common conductive path 122 functions as a cathode electrode of each switch element T.

  The scanning start switch element T0 has the same configuration as that of the switch element T0, and the first one-conductivity-type semiconductor layer 41 is formed between the substrate 30 and the first other-conductivity-type semiconductor layer 62. Therefore, the description thereof is omitted. Also in the scan start switch element T0, the common conductive path connection portion 123 is provided at the other end portion in the width direction Y of the first one-conductivity-type semiconductor layer 41, and the common conductive path 122 is laminated.

  In the light emitting device 120 of the present embodiment, first, the first one-conductivity-type semiconductor layer 41, the first other-conductivity-type semiconductor layers 42 and 62, and the second one-conductivity-type semiconductor are formed on one surface 30a of the substrate 30. A semiconductor material for forming the layers 43 and 63 and the second other conductivity type semiconductor layers 44 and 64 is sequentially stacked by epitaxial growth, chemical vapor deposition (CVD), or the like, and then patterned by photolithography. In addition, the semiconductor layer is formed by etching and the semiconductor layer stacked on the portion where the light emitting element L is to be formed is removed. The first diode constituting semiconductor layer 35 and the third one conductive type semiconductor layers 45 and 65, the second diode constituting semiconductor layer 36 and the third other conductive type semiconductor layers 46 and 66, and the ohmic contact layers 37 and 47 , 67 are sequentially stacked by epitaxial growth, chemical vapor deposition (CVD), or the like, and then patterned and etched by photolithography to form each light emitting element L, each switch element T, and A scanning start switch element T0 is formed.

  In the light emitting device 120 of the present embodiment, the light emitting diode element L includes the switch element T and the third one-conductivity-type semiconductor layers 45 and 65 and the third other-conductivity-type semiconductor layers 46 and 66 of the scan start switch element T0. Can be manufactured simultaneously in a series of manufacturing steps. Therefore, productivity can be improved.

  Further, by directly laminating the light emitting diode element L on the one surface 30a of the substrate 30, the parasitic capacitance of the light emitting diode element L can be reduced as much as possible, and the responsiveness when the light emitting signal φE is given. Can be improved. As a result, the reaction speed of turning on and off the light emitting diode element L can be improved. Therefore, when used as an exposure apparatus of the image forming apparatus, the controllability of the exposure amount is improved. An image with improved image quality can be formed.

  FIG. 27 is a partial plan view showing the basic configuration of the light-emitting device 130 according to the sixth embodiment of the present invention. This figure shows a plane of the light emitting device 130 arranged with the light emitting direction of each light emitting diode element L as the front side perpendicular to the paper surface. The light emitting signal transmission path 12, the scanning signal transmission path 15, the start signal transmission path. 16, the light emitting diode element of the light emitting diode element L, one conductive type semiconductor layer 19, the gate 24 of the switch element T, the connection means 14, the light emitting element light shielding portion 23, the surface electrode 25, and the second other conductive type semiconductor layer of the switch element T. 44 and the third one-conductivity type semiconductor layer 45, the switch element conductive path 27, the scanning start switch element connecting portion 68, the substrate connecting portion 74, and the reflecting means 131 are shown by hatching for ease of illustration. ing.

  The light emitting device 130 of the present embodiment has a configuration in which the reflecting means 131 is added to the configuration of the light emitting device 10 shown in FIG. 1 described above, and the other configurations are the same as the light emitting device 10 and thus have the same configuration. Are denoted by the same reference numerals and the description thereof is omitted.

  The reflection means 131 reflects the light emitted from each switch element T and guides it to the adjacent switch element T. The reflection means 131 is formed on the opposite side of the light emitting element array 11 in the width direction Y of the switch element array 13 along the arrangement direction X of the switch element array 13. In FIG. 27, the reflecting means 131 is disposed on the other side Y2 in the width direction between the switch element array 13 and the scan start switch element T0. The reflection means 131 is formed between one end and the other end in the arrangement direction X of the switch element array 13.

  FIG. 28 is a partial cross-sectional view showing the basic configuration of the light emitting device 130 as viewed from the section line D9-D9 in FIG. The reflecting means 131 rises from one portion of the insulating layer 17 laminated in the substrate recess 30B of the substrate 31 to one side Z1 in the thickness direction Z, and from one surface 31a of the substrate 31, the switch element T and the scan start switch element. One end portion 131a in the thickness direction Z extends from the surface electrode 25 formed at one end portion in the thickness direction Z of T0 to the thickness direction Z. One end portion 131a in the thickness direction Z is one thickness direction Z1 of the switch element T and the scanning start switch element T0. The first to third scanning signal transmission lines 15a, 15b, 15c formed in the first to third positions extend to positions facing the width direction Y. The end of the reflecting means 131 near the substrate 30 is formed on the side of the first other conductivity type semiconductor layer 42.

  The reflection means 131 is formed of a material having a high reflectance of light having a wavelength emitted from the switch element T. Specifically, the reflecting means 131 is formed of gold (Au), an alloy of gold and germanium (AuGe), an alloy of gold and zinc (AuZn), nickel (Ni), aluminum (Al), or the like.

  The reflection means 131 is formed apart from the switch element T and the scan start switch element T0 in the width direction Y. The insulating layer 17 described above is formed between the reflecting means 131 and the switch element T and the scan start switch element T0. The reflection means 131 is covered with the insulating layer 17. That is, the reflecting means 131 is formed between the insulating layer 17 and the light shielding layer 18 described above.

  In the present embodiment, the reflection means 131 is formed at the same time when the light emission signal transmission path 12, the connection means 14, the scanning signal transmission path 15, the switch element conductive path 27, and the substrate connection portion 78 are formed. That is, after the insulating layer 17 is formed, a layer made of a conductive material is laminated, and the light emission signal transmission path 12, the connection means 14, the scanning signal transmission path 15, the switch element conductive path 27, and the substrate connection are formed by photolithography. Simultaneously with the portion 74, the reflecting means 131 is formed. Therefore, since the reflection means 131 is formed of the same material as the light emission signal transmission path 12, the connection means 14, the scanning signal transmission path 15, the switch element conductive path 27, and the substrate connection portion 74, it has conductivity but an insulating layer. 17 is electrically insulated from the switch element T and the scan start switch element T0. Although the reflecting means 131 shown in FIG. 28 extends substantially parallel to the thickness direction Z, in reality, the switch element T and the scan start switch element T0 move toward the Z1 in the thickness direction from the substrate 31. Inclined in the direction of heading. For this reason, the reflecting means 131 is manufactured by being laminated on the insulating layer 17 at the same time when the light emission signal transmission path 12, the connection means 14, the scanning signal transmission path 15, the switch element conductive path 27, and the substrate connection portion 74 are manufactured. Can do.

  The reflecting means 131 is separated from the scanning signal transmission path 15 and is electrically insulated by the light shielding layer 18. Since the reflecting means 131 is formed between the insulating layer 17 and the light shielding layer 18, the reflecting means 131 is not peeled off, and the insulating layer 17 and the light shielding layer 18 have electrical insulation properties. There is no problem of charging, which affects the operating characteristics of the switch element T and the scan start switch element T0.

  FIG. 29 is an enlarged plan view showing a region 132 surrounded by a one-dot chain line in FIG. In the figure, the surface electrode 25 is indicated by hatching for easy understanding. The reflecting means 131 has a reflecting surface 133. The reflecting surface 133 is formed by a surface that contacts the insulating layer 17 of the reflecting means 131. The reflective surface 133 has a first reflective surface 133a and a second reflective surface 133b. The first reflecting surface 133a and the second reflecting surface 133b are formed in a substantially flat surface. The first reflecting surface 133a is perpendicular to the arrangement direction X and is separated from the switch element T in the width direction Y from the virtual plane that passes through the center of the arrangement direction X of the switch elements T toward the one side X1 in the arrangement direction. , Extending to a virtual plane that is perpendicular to the arrangement direction X and passes through the center of the gap between adjacent switch elements T. The second reflecting surface 133b is perpendicular to the arrangement direction X and extends from the switch element T in the width direction Y toward the other arrangement direction X2 from the first virtual one plane passing through the center of the arrangement direction X of the switch elements T. It is spaced apart and extends to a virtual plane that is perpendicular to the arrangement direction X and passes through the center of the gap between adjacent switch elements T.

  The first reflecting surface 133a and the second reflecting surface 133b are continuously formed in the arrangement direction X, and face each switch element T and the scan start switch element T0. An end portion 134 of the other X2 in the arrangement direction of the first reflection surface 133a, part of which faces the switch element Tk (k is an integer of 2 or more), is an arrangement of the second reflection surface 133b, part of which faces the switch element Tk. One end of the direction X1 is continuous with the end portion 135. The end 134 of the first reflection surface 133a in the arrangement direction one side X1 facing part of the switch element Tk is the end of the second reflection surface 133b in the arrangement direction other side X2 of part of the first reflection surface 133a facing the switch element Tk-1. It continues to part 137. Further, the end portion 138 of the second reflecting surface 133b in the arrangement direction other side X2 that partially faces the switch element Tk is the end portion 139 in the arrangement direction one X of the first reflecting surface 133a that partly faces the switch element Tk + 1. It continues to.

  When the switch element Tk emits light, as shown in FIG. 27, the switch element Tk emits light as indicated by arrows F1 and F2 from the end in the arrangement direction X of the switch element Tk toward the adjacent switch element T. At the same time, light is emitted from the end in the width direction Y of the switch element Tk toward the outside in the width direction Y. Of the light emitted from the end in the width direction Y of the switch element Tk, the light traveling toward the reflecting means 131 is transmitted through the light-transmitting insulating layer 17 and a part thereof faces the switch element Tk. Reflected by the first reflecting surface 133a and the second reflecting surface 133b.

  A part of the light reflected by the first reflecting surface 133a, a part of which faces the switch element Tk, is directly directed to the adjacent switch element Tk-1, and a part of the light reflected by the first reflecting surface 133a. Is reflected by the second reflecting surface 133b toward the second reflecting surface 133b, part of which faces the switch element Tk-1, and heads toward the switching device Tk-1.

  A part of the light reflected by the second reflecting surface 133b, a part of which faces the switch element Tk, is directly directed to the adjacent switch element Tk + 1, and a part of the light reflected by the second reflecting surface 133b is The light is reflected by the second reflective surface 133b toward the switch element Tk + 1 toward the second reflective surface 133b partially facing the switch element Tk + 1.

  Here, the portion of the reflecting means 131 that faces the switch element T has been described. However, the scan start switch element T0 has the same configuration as the switch element T, and in the above description, the switch element Tk-1 or This is the same as the configuration in which the switch element Tk + 1 is replaced with the scan start switch element T0.

  In this way, in the light emitting device 130, the light from the switch element T that has emitted light is reflected by the reflecting means 131 and guided to the switch element T adjacent to the switch element T that has emitted light. The transmission efficiency of light transmitted to the switch element T adjacent to the switched switch element T can be improved, and the switch element T adjacent to the emitted switch element T can receive as much light as possible. . As a result, the threshold voltage or threshold current of the switch element T adjacent to the emitted switch element T can be more reliably reduced, and the optical scanning of the switch element T can be performed more stably. In addition, since the threshold voltage and threshold current of the switch element T adjacent to the switch element T that has emitted light can be quickly reduced, the optical scanning speed of the switch element T that causes the switch elements T to emit light sequentially in the arrangement direction. Can be improved.

  Further, even if the amount of light emitted by the switch element T is small, the threshold voltage or threshold current of the adjacent switch element T can be lowered, so that the power required for light emission of the switch element T can be suppressed as much as possible. Scanning can be performed and power consumption of the light emitting device 130 can be suppressed.

  The angle θ1 formed by the first reflecting surface 133a partially facing the switch element T and the second reflecting surface 133b partially facing the switch element T adjacent to the switch element T is selected from 90 ° to 140 °, for example. It is. When the angle θ1 is larger than 140 °, the light from the light emitting switch element T is reflected by the reflecting means 131, and the light incident on the light emitting switch element T again increases. When the angle θ1 is smaller than 90 °, the dimension in the width direction Y of the reflecting means 131 that emits light increases, and from the switch element T that emits light, as in the case where the reflection angle is smaller than the lower limit value. Is reflected by the reflecting means 131, and more light is incident on the emitting switch element T again. By selecting the angle θ1 within the above-described range, it is possible to further improve the transmission efficiency of light transmitted to the switch element T adjacent to the emitted switch element T.

  The amount of light emitted from the switch element T that emits light to the adjacent switch element T by the reflecting means 131 is 20% to that of the structure that is similar to the light emitting device 130 and that does not include the reflecting means 131. It can be improved by 40%.

  The first reflecting surface 133a and the second reflecting surface 133b of the reflecting means 131 are directed in the direction toward the switch element T and the scan start switch element T0 from the substrate 31 toward one side in the thickness direction Z, that is, in the width direction. Since it is inclined to one Y1 of Y, the light is emitted from the vicinity of the interface between the third one-conductivity-type semiconductor layers 45 and 65 and the third other-conductivity-type semiconductor layers 46 and 66 of the switch element T and the scan start switch element T0. The reflected light can be reflected toward the thyristor structure portion TS provided closer to the substrate 31 than the vicinity of the interface. In the switch element T, the light receiving part is formed by the thyristor structure part TS close to the substrate 31, so that more light can be guided to the light receiving part by the reflecting means 131.

  In order to form the reflecting means 131, the surface portion of the insulating layer 17 covering one of the switching element array 13 and the scanning start switch element T0 in the width direction Y is formed in a waveform along the reflecting surface 133. deep. As a result, the metal layer can be laminated on the insulating layer 17, and the reflective surface 133 can be formed by photolithography. By forming the insulating layer 17 by photolithography, the reflecting surface 133 can be accurately formed.

  According to the light emitting device 130 of the present embodiment, the same effect as that of the light emitting device 10 of the above-described embodiment can be achieved, and the reflected light 131 reflects the emitted light from the switch element T. Since the light is transmitted to the switch element T adjacent to the emitted switch element T, the transmission efficiency of light transmitted from the emitted switch element T to the switch element T adjacent to the emitted switch element T can be improved. The switch element T adjacent to the switch element T can receive as much light as possible. Thereby, the threshold voltage or threshold current of the switch element T adjacent to the emitted switch element T can be reliably reduced, and the optical scanning of the switch element T can be performed more stably. In addition, since the threshold voltage and threshold current of the switch element T adjacent to the light-emitting switch element can be quickly reduced, the scanning speed of the switch element T that causes the switch elements T to emit light sequentially in the arrangement direction is improved. be able to.

  Even if the amount of light emitted by the switch element T is small, the threshold voltage or threshold current of the adjacent switch element can be lowered, so that the power required for the light emission of the switch element T is suppressed as much as possible to perform optical scanning. And the power consumption of the apparatus can be suppressed.

  Further, since the reflecting means 10 can be formed at the same time in the process of forming the light emission signal transmission path 12, the connection means 14, and the scanning signal transmission path 15, the manufacturing process is increased to form the reflecting means 131. There is no.

  In still another embodiment of the present invention, in the light-emitting device of each of the above-described embodiments, at least one of the first and second diode-configured semiconductor layers 35 and 36 of the light-emitting element L is a two-layer semiconductor. The light emitting element L may be formed of a layer and may have a multilayer structure having a quantum confinement effect, such as a double hetero structure. With such a configuration, it is possible to realize the light emitting element L in which the effect of confining electrons and holes is enhanced and the external light emission intensity is improved.

  In still another embodiment of the present invention, the third one-conductivity-type semiconductor layer 45 and the third other-conductivity-type semiconductor layer 46 of the diode structure portion TD of the switch element T in the light emitting device of each of the above-described embodiments. Of these, at least one of them may be formed of two semiconductor layers, and the diode structure portion TD may have a multilayer structure having a quantum confinement effect such as a double hetero structure. With such a configuration, it is possible to realize a switch element T in which the effect of confining electrons and holes is enhanced and the external light emission intensity is improved.

  In still another embodiment of the present invention, in the light emitting device of each of the above-described embodiments, the third one-conductivity-type semiconductor layer 65 and the third other-conductivity-type in the diode structure portion TD of the scan start switch element T0. At least one of the semiconductor layers 66 may be formed of two semiconductor layers, and the diode structure portion TD may have a multilayer structure having a quantum confinement effect such as a double hetero structure. With such a configuration, it is possible to realize the scanning start switch element T0 in which the effect of confining electrons and holes is enhanced and the external light emission intensity is improved.

  In the light emitting device according to still another embodiment of the present invention, the light emitting signal transmission path 12 and the light emitting element light shielding portion 23 may be integrally formed in the light emitting device according to each of the embodiments described above. In this case, the light emitting signal transmission path 12 is formed by forming the bottom portion of the groove portion 23 where the light emitting element light shielding portion 23 is formed by a part of the insulating layer 17 so that the light emitting element light shielding portion 23 and the substrate 31 are not in contact with each other. And short circuit with the substrate 31 are prevented. If the light emitting element light-shielding portion 23 is formed so as to extend from the ohmic contact layer 37 to the substrate 31 side with respect to the light emitting element L in the thickness direction Z, the same effect can be achieved.

  In the light emitting device according to still another embodiment of the present invention, in the light emitting device according to each embodiment described above, between the second other conductivity type semiconductor layer 34 and the first diode constituting semiconductor layer 35 of the light emitting element L, In addition, a buffer layer formed of a one-conductivity-type semiconductor material may be provided between the second other-conductivity-type semiconductor layers 44 and 64 and the third one-conductivity-type semiconductor layers 45 and 65. By providing the buffer layer, the second other-conductivity-type semiconductor layers 34, 44, and 64 formed of a non-light-emitting semiconductor material, the first diode-configured semiconductor layer 35 formed of a light-emitting semiconductor material, and the first The first diode-structured semiconductor layer 35 and the third one-conductivity type semiconductor layers 45 and 65 with improved crystallinity can be obtained by suppressing lattice mismatch with the one-conductivity-type semiconductor layers 45 and 65 as much as possible. Thus, the light emission intensity of the light emitting element L, the switch element T, and the scanning start switch element T0 can be improved.

  In the light emitting device according to still another embodiment of the present invention, the first one is disposed between the substrate 30 and the first one-conductivity-type semiconductor layers 31, 41, 61 in the light emitting device according to each of the embodiments described above. A buffer layer made of a conductive semiconductor may be provided, and a buffer layer made of the first other conductive semiconductor is provided between the substrate 30 and the first other conductive semiconductor layers 32, 42, 62. It is good. With this configuration, a semiconductor layer with improved crystallinity can be formed on the substrate 31, and the characteristics of the light emitting element L, the switch element T, and the scan start switch element T0 can be made more uniform. Can do.

  In the light emitting device according to yet another embodiment of the present invention, the metal functioning as the anode terminal together with the light emitting signal transmission path 12 by being stacked on the ohmic contact layer 37 of the light emitting element L in the light emitting device of each of the embodiments described above. A layer may be formed. With such a configuration, the electric field to each semiconductor layer of the light emitting element L can be made uniform, and the emission intensity of light emitted from the light emitting element L can be increased.

  In the light emitting device according to yet another embodiment of the present invention, in the light emitting device according to each of the embodiments described above, the light shielding layer 18 has a higher reflectance of light having a wavelength emitted from the switch element T and is refracted than the insulating layer 17. You may form with a material with a low rate. For example, the insulating layer 17 is made of polyimide. Since the light is not absorbed but reflected by the light shielding layer 18, the light from the switch element T is prevented from interfering with the light emitted from the switch element T in the thickness direction Z1. In addition, since the amount of light incident on the adjacent switch element T is increased, the light receiving efficiency of the switch element T can be increased.

  In the light emitting device of still another embodiment of the present invention, in the light emitting device of each of the embodiments described above, one conductivity type may be a P type and the other conductivity type may be an N type. On the other hand, even if the conductivity type is P type and the other conductivity type is N type, the polarity of the bias voltage is opposite to that when the one conductivity type is N type and the other conductivity type is P type. The same effect as that of the light emitting device of the form can be obtained.

  In still another embodiment of the present invention, in the light emitting device of each embodiment described above, the high level of the scanning signal φ output by the driving means 73 is obtained by receiving light from the adjacent switch element T. The average value of the threshold voltage or threshold current of the other switching elements T connected to the scanning signal transmission path 15 is connected to the scanning signal transmission path 15 to which the switching element T having a reduced threshold voltage or threshold current is connected. Higher voltage or current is chosen. The scanning signal transmission path 15 to which the switching element T whose threshold voltage or threshold current has been lowered by receiving light from the adjacent switching element T is connected to the scanning signal transmission path 15 is connected to the scanning signal transmission path 15. When a scanning signal φ having a voltage or current higher than the average value of the threshold voltage or threshold current of the switch element T is applied, the scanning signal φ is applied to the scanning signal transmission line 15 via the resistance element Rφ. A voltage divided by the resistance element Rφ is applied to T. A voltage divided by the resistance element Rφ is gradually applied to each switch element T, and among the plurality of switch elements T connected to the same scanning signal transmission path 15, the adjacent switch element T The voltage or current applied to the switch element T that has received the light from the first becomes the threshold voltage or threshold current of the switch element T earliest. Thereby, only the switch element T with the lowest threshold voltage or threshold current emits light, and the other switch elements T do not emit light.

  Since the high level of the scanning signal φ output from the driving unit 73 is set to a voltage or current higher than the average value as described above, a higher voltage or higher voltage is applied to the switch element T whose threshold voltage or threshold current has decreased. A current can be applied to shift to the on state, and the speed of optical scanning can be improved.

  In the light emitting device according to yet another embodiment of the present invention, the high level of the scanning signal φ output from the driving unit 73 in all the light emitting devices of the above embodiments is the same for all the scanning signal transmission lines 15 connected. It may be selected to be higher than the threshold voltage or threshold current of the switch element L. Even with such a configuration, the same effect can be achieved, and the high-level voltage or current of the scanning signal φ is changed by the driving unit 73 to the threshold voltage or threshold current that fluctuates in the switch element T. Since it can be determined regardless, the design of the driving means 73 is facilitated.

  In the light emitting device according to still another embodiment of the present invention, in the light emitting device according to each of the above embodiments, the driving unit 73 is not provided on the circuit board on which the light emitting chips 75 and 101 are mounted, but the image forming apparatus main body. It may be configured to be provided on a circuit board on which the control means 96 is provided. By providing the driving means 73 at a location different from the circuit board on which the light emitting chips 75 and 101 are provided, the circuit board on which the light emitting chips 75 and 101 are provided can be further reduced in size, and the periphery of the photosensitive drum 90 It becomes easy to arrange in.

  In the light emitting device of each embodiment of the present invention, the numbers of the light emitting elements Li and the switch elements Tj are configured to be equal. However, in the light emitting device of still another embodiment of the present invention, a plurality of switch elements T are provided. The light emitting elements L may be made to correspond. That is, the gate 24 of one switch element T and the cathodes of a plurality of light emitting elements L may be connected. With such a configuration, a plurality of light emitting elements L can emit light simultaneously.

  In still another embodiment of the present invention, each semiconductor layer may be formed in multiple layers in the light emitting device of each of the above embodiments. For example, the first one-conductivity-type semiconductor layer may be formed by laminating a plurality of one-conductivity-type semiconductor layers, and the first other-conductivity-type semiconductor layer is composed of a plurality of other-conductivity-type semiconductor layers. The second one-conductivity-type semiconductor layer may be formed by stacking a plurality of one-conductivity-type semiconductor layers, and the second other-conductivity-type semiconductor layer may be composed of the other-conductivity-type semiconductor layer. A plurality of semiconductor layers may be stacked.

  The light emitting device according to still another embodiment of the present invention may be configured by combining the configurations of the light emitting devices according to the respective embodiments described above. For example, the driving means of the light emitting devices of the third to sixth embodiments may be the driving means in the light emitting device of the second embodiment, and the light emitting devices of the fifth and sixth embodiments are The light emitting device of the fourth embodiment may have a configuration like a light emitting chip. Moreover, the light-emitting device of each embodiment may have the reflection means 131 of 6th Embodiment.

  In the light emitting device according to still another embodiment of the present invention, the light emitting element light shielding unit 23 may not be provided in the light emitting device according to each embodiment described above.

  In addition, this invention is not limited to the above-mentioned form, A various change, improvement, etc. are possible in the range which does not deviate from the summary of this invention.

It is a partial top view which shows the basic composition of the light-emitting device 10 of the 1st Embodiment of this invention. FIG. 2 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line D1-D1 in FIG. FIG. 2 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line D2-D2 in FIG. FIG. 2 is a partial cross-sectional view illustrating a basic configuration of the light emitting device 10 as viewed from a section line D3-D3 in FIG. 1. FIG. 2 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line D4-D4 in FIG. FIG. 2 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 10 as viewed from a section line D5-D5 in FIG. 4 is a graph showing a forward voltage-current characteristic that is a relationship between an anode voltage and an anode current of a switch element T. It is a circuit diagram which shows a part of equivalent circuit which shows the basic composition of the light-emitting device 10 shown by FIG. The drive means 73 supplies the start signal φS to the start signal transmission path 16, the first scanning signal φ1 to be applied to the first scanning signal transmission path 15a, the second scanning signal φ2 to be applied to the second scanning signal transmission path 15b, and the third scanning signal. Waveforms indicating the third scanning signal φ3 applied to the transmission line 15 and the light emission signal φE applied to the light emission signal transmission path 12, the light emission intensity of the light emitting element L1, and the light emission intensity of the scanning start switch element T0 and the switch elements T1 to T4. FIG. 6 is a waveform diagram showing changes in threshold voltages of switch elements T1, T4, T7 connected to a first scanning signal transmission line 15. FIG. 3 is a graph showing forward voltage-current characteristics of a switch element T and a range of a high-level voltage V _H of first to third scanning signals φ1 to φ3 supplied to each scanning signal transmission line 15. It is a top view which shows the structure of the light-emitting body chip | tip 75 which comprises the light-emitting device 10 of FIG. 4 is a partial plan view showing a basic configuration of a light emitter chip assembly 86 having a plurality of light emitter chips 75. FIG. 2 is a side view showing a basic configuration of an image forming apparatus 87 having a light emitting device 10. FIG. In the light emitting device according to the second embodiment of the present invention, the start signal φS given to the start signal transmission path 16 by the driving means 73, the first to third scanning signals φ1, φ2, φ3 given to the scanning signal transmission path 15, light emission It is a wave form diagram which shows the light emission signal (phi) E given to the signal transmission path 12, the light emission intensity of the light emitting element L1, and the light emission intensity of the switch element T0 for scanning start, and switch elements T1-T4. Waveform diagram showing experimental results of measuring the voltage applied to two adjacent switch elements T when the first and second scanning signals φ1 and φ2 are applied to the first and second scanning signal transmission lines 15a and 15b, respectively. It is. Waveform diagram showing experimental results of measuring the voltage applied to two adjacent switch elements T when the first and second scanning signals φ1 and φ2 are applied to the first and second scanning signal transmission lines 15a and 15b, respectively. It is. It is a figure which shows the forward voltage-current characteristic of the switch element T in the light-emitting device of the 3rd Embodiment of this invention, and the voltage range of the scanning signal (phi) given to each switch element T. It is a top view which shows the basic composition of the light-emitting device chip | tip 101 in the light-emitting device 100 of the 4th Embodiment of this invention. 4 is a partial plan view showing a basic configuration of a light emitter chip assembly 109 having a plurality of light emitter chips 101. FIG.

It is sectional drawing which shows the light-emitting body chip | tip 101 made to adsorb | suck to the collet 112. FIG. It is sectional drawing which shows the light-emitting body chip | tip 101 made to adsorb | suck to the collet 112. FIG. It is a partial top view which shows the basic composition of the light-emitting device 120 of the 5th Embodiment of this invention. FIG. 24 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 120 as seen from a section line D6-D6 of FIG. FIG. 24 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 120 as viewed from a section line D7-D7 in FIG. FIG. 24 is a partial cross-sectional view illustrating a basic configuration of the light-emitting device 120 as viewed from a section line D8-D8 in FIG. It is a partial top view which shows the basic composition of the light-emitting device 130 of the 6th Embodiment of this invention. FIG. 28 is a partial cross-sectional view showing the basic configuration of the light emitting device 130 as viewed from the section line D9-D9 in FIG. It is a top view which expands and shows the area | region 132 enclosed with the dashed-dotted line of FIG. It is a circuit diagram which shows the schematic circuit structure of the basic structure of the light emitting device 1 of the 1st prior art which has a self-scanning function. FIG. 6 is a waveform diagram for explaining the operation of the light emitting device 1. It is a circuit diagram which shows the schematic circuit structure of the basic structure of the light-emitting device 2 of the 2nd prior art which has a self-scanning function. FIG. 6 is a waveform diagram for explaining the operation of the light emitting device 2.

Explanation of symbols

10, 100, 120, 130 Light-emitting device 11 Light-emitting element array 12 Light-emitting signal transmission path 13 Switch element array 14 Connection means 15 Scan signal transmission path 16 Start signal transmission path 17 Insulating layer 18 Light-shielding layer L Light-emitting element T Switch element T0 Scan start Switch element

Claims (7)

A plurality of light emitting elements that emit light when a light emission signal is applied to the other of the anode or the cathode while a trigger signal is applied to either the anode or the cathode, and the plurality of light emitting elements are spaced apart from each other. An array of light emitting diode elements arranged
A light-emitting signal transmission path that is connected to either the anode or the cathode of each light-emitting diode element and transmits the light-emitting signal to the light-emitting diode element;
A trigger signal is generated at a predetermined site by light reception, a threshold voltage or a threshold current is lower than a voltage or current of a scanning signal, and a plurality of switch elements emit light when the scanning signal is given, A switch element array arranged so as to be spaced from each other so that the switch elements receive light from adjacent switch elements;
Connection means for connecting the other of the anode and the cathode of each light emitting diode element and a predetermined part of each switch element;
A light emitting device comprising: a plurality of scanning signal transmission paths for transmitting the scanning signal provided at different timing for each switching element connected to each switching element and adjacent in the arrangement direction. The switch element is
A first conductive semiconductor layer formed on a substrate and formed of a non-light-emitting semiconductor material or a one-conductive semiconductor substrate formed of a non-light-emitting semiconductor material;
A first other-conductivity-type semiconductor layer that is stacked on the first one-conductivity-type semiconductor layer or the one-conductivity-type semiconductor substrate and is formed of a non-light-emitting semiconductor material;
A second one-conductivity-type semiconductor layer stacked on the first other-conductivity-type semiconductor layer and formed of a non-light-emitting semiconductor material;
A second other conductivity type semiconductor layer stacked on the second one conductivity type semiconductor layer and formed of a non-light emitting semiconductor material;
And a third one-conductivity-type semiconductor layer and a third other-conductivity-type semiconductor layer, each of which is sequentially stacked on the second other-conductivity-type semiconductor layer, each formed of a light-emitting semiconductor material. The light-emitting device according to claim 1. Each of the light emitting diode elements has a first conductive semiconductor layer of one conductivity type and a second semiconductor semiconductor layer of the other conductive type, each formed of a light emitting semiconductor material,
The first diode constituent semiconductor layer is formed of the same semiconductor material as the third one-conductivity-type semiconductor layer of the switch element, and the second diode constituent semiconductor layer is the same semiconductor material as the third other-conductivity-type semiconductor layer of the switch element. The light emitting device according to claim 2, wherein the light emitting device is formed by:   The light-emitting diode element is laminated on a substrate, and the first one-conductivity-type semiconductor layer formed of a non-light-emitting semiconductor material or the one-conductivity-type semiconductor substrate formed of a non-light-emitting semiconductor material; A first conductive semiconductor layer stacked on the first conductive semiconductor layer or the first conductive semiconductor substrate and formed of a non-light emitting semiconductor material; and the first other conductive semiconductor layer; A second one-conductivity-type semiconductor layer formed of a non-light-emitting semiconductor material and a second other-conductivity-type semiconductor layer formed on the second one-conductivity-type semiconductor layer and formed of a non-light-emitting semiconductor material The light-emitting device according to claim 2, wherein the light-emitting device is formed by being laminated in a laminate with a layer.   The light-emitting device according to claim 2, wherein the non-light-emitting semiconductor material is silicon containing impurities.   6. The light-emitting device according to claim 1, further comprising: a light-shielding unit configured to shield light emitted from the switch element so that light emitted from the switch element does not interfere with light emitted from the light-emitting diode element. The light-emitting device of description. The light emitting device according to any one of claims 1 to 6,
Driving means for driving the light emitting device based on image information;
Condensing means for condensing light from the light emitting element of the light emitting device on the photosensitive drum;
Developer supplying means for supplying the developer to the exposed photosensitive drum by which light from the light emitting device is condensed on the photosensitive drum by the condensing means;
Transfer means for transferring an image formed by a developer on the photosensitive drum to a recording sheet;
An image forming apparatus comprising: fixing means for fixing the developer transferred to the recording sheet.

Images