JP2007149957A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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Abstract
【解決手段】GaAs基板1の上に、高周波用トランジスタのゲート電極12が形成されている。ゲート電極12の上には、空洞部7を介してエアブリッジ5が延在している。開口部9は第2配線10の先端に設けられたボール10aにより塞がれている。さらに、半導体装置全体が封止樹脂31により覆われている。上記構造とすることにより、封止樹脂31を形成する工程において、空洞部7に封止樹脂31が入り込むことを防ぐことができる。従って、高周波素子の寄生容量の増大を抑制することができる。
【選択図】図9
Description
を含むことを特徴とする。本発明のその他の特徴については、以下において詳細に説明する。
本実施の形態に係る半導体装置の製造方法について説明する。まず、図1に示すように、GaAs基板1上に、高周波で用いられるトランジスタ等の素子、ボンディングパッドなどの電極を形成し、さらに各電極を接続するエアブリッジを形成し、その表面に開口部9を形成する。
本実施の形態に係る半導体装置の製造方法について説明する。本実施の形態では、実施の形態1と異なる点を中心に説明する。まず、図示しないが、GaAs基板1の上にトランジスタ等の素子を形成する工程から、第1配線を形成するまでの工程を、実施の形態1と同様にして行う。
本実施の形態に係る半導体装置の製造方法について説明する。本実施の形態では、実施の形態1、2と異なる点を中心に説明する。まず、図16に示すように、GaAs基板の上に、ゲート電極12、ソース電極15、ドレイン電極16からなる電界効果トランジスタ(以下、「FET」という)を形成する。次に、FET上を覆い、ゲート電極12とドレイン電極16が対向する部分の活性領域、およびゲート電極12とソース電極15が対向する部分の活性領域の外側を覆うように、第1レジストパターン17(一点鎖線部の領域)を形成する。
Claims (7)
- 基板上に設けられた素子と、
前記基板上で前記素子と所定間隔で延在するエアブリッジ構造の第1配線と、
前記第1配線の端部の外側部分と前記基板との間で、前記素子が設けられている領域を覆う絶縁膜と、
前記第1配線および前記絶縁膜を覆う封止材とを備え、
前記第1配線は開口部を有し、前記開口部は、第2配線により塞がれていることを特徴とする半導体装置。 - 前記第1配線の上面と前記封止材との間に、前記第1配線より機械的強度が大きい絶縁膜が設けられていることを特徴とする請求項1に記載の半導体装置。
- 基板上に設けられた素子と、
前記基板上で前記素子と所定間隔で延在するエアブリッジ構造の第1配線と、
前記第1配線の端部の外側部分と前記基板との間で、前記素子が設けられている領域を覆う絶縁膜と、
前記第1配線および前記絶縁膜を覆う封止材とを備え、
前記絶縁膜の比誘電率は、前記封止材の比誘電率よりも低いことを特徴とする半導体装置。 - 基板上に設けられた素子と、
空洞を介して前記素子を覆い、開口部を有する絶縁膜と、
前記開口部を塞ぐ配線と、
を有することを特徴とする半導体装置。 - 基板上に素子を形成する工程と、
前記基板上で前記素子と所定間隔で延在するエアブリッジ構造の第1配線を形成する工程と、
前記第1配線に開口部を形成する工程と、
前記第1配線の端部の外側部分と前記基板との間で、前記素子が設けられている領域を覆う絶縁膜を形成する工程と、
前記開口部を塞ぐ第2配線を形成する工程と、
前記第1配線および前記絶縁膜を覆う封止材を形成する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 基板上に素子を形成する工程と、
前記基板上で前記素子と所定間隔で延在するエアブリッジ構造の第1配線を形成する工程と、
前記第1配線の端部の外側部分と前記基板との間で、前記素子が設けられている領域を覆う絶縁膜を形成する工程と、
前記第1配線および前記絶縁膜を覆い、前記絶縁膜より比誘電率が高い封止材を形成する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 基板上に素子を形成する工程と、
前記素子を覆うレジストパターンを形成する工程と、
前記レジストパターンを覆う絶縁膜を形成する工程と、
前記絶縁膜に開口部を形成する工程と、
前記開口部を介して前記レジストパターンを除去し、前記絶縁膜と前記素子との間に空洞を形成する工程と、
前記開口部を塞ぐ配線を形成する工程と、
を含むことを特徴とする半導体装置の製造方法。
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US11/487,503 US7768043B2 (en) | 2005-11-28 | 2006-07-17 | Semiconductor device having high frequency components and manufacturing method thereof |
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JPH01245530A (ja) * | 1988-03-28 | 1989-09-29 | Rohm Co Ltd | 半導体装置のパッケージ方法 |
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JPH05335343A (ja) | 1992-05-27 | 1993-12-17 | Sony Corp | 電界効果トランジスタ |
US5561085A (en) * | 1994-12-19 | 1996-10-01 | Martin Marietta Corporation | Structure for protecting air bridges on semiconductor chips from damage |
US6798064B1 (en) * | 2000-07-12 | 2004-09-28 | Motorola, Inc. | Electronic component and method of manufacture |
JP2003273279A (ja) | 2002-03-18 | 2003-09-26 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP4229122B2 (ja) * | 2003-05-26 | 2009-02-25 | 株式会社村田製作所 | 圧電電子部品、およびその製造方法、通信機 |
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