JP2007142255A - Method of manufacturing circuit board - Google Patents

Method of manufacturing circuit board Download PDF

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Publication number
JP2007142255A
JP2007142255A JP2005335694A JP2005335694A JP2007142255A JP 2007142255 A JP2007142255 A JP 2007142255A JP 2005335694 A JP2005335694 A JP 2005335694A JP 2005335694 A JP2005335694 A JP 2005335694A JP 2007142255 A JP2007142255 A JP 2007142255A
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dam
circuit board
insulating substrate
manufacturing
underfill
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JP2005335694A
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Japanese (ja)
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Tomoo Koseki
智夫 小関
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Alps Alpine Co Ltd
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Alps Electric Co Ltd
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Priority to JP2005335694A priority Critical patent/JP2007142255A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a circuit board by which a small circuit board is obtained. <P>SOLUTION: The method of manufacturing the circuit board removes a dam 9 after forming an underfill 7, so that the dam 9 does not exist after manufacturing the circuit board. Thus, on the surface of an insulation board 1 where the dam 9 is positioned conventionally, a land 2b, a cover 8 etc. can be arranged, so that the surface of an insulation board 1 where the dam 9 is positioned conventionally is utilized effectively, and the small circuit board is obtained. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、種々の電気機器や電子回路ユニット等に使用して好適な回路基板の製造方法に関するものである。   The present invention relates to a method of manufacturing a circuit board suitable for use in various electric devices, electronic circuit units, and the like.

従来の回路基板の製造方法に係る図面を説明すると、図8は従来の回路基板の製造方法を説明するための絶縁基板の平面図、図9は従来の回路基板の製造方法を説明するための要部断面図である。   FIG. 8 is a plan view of an insulating substrate for explaining a conventional circuit board manufacturing method, and FIG. 9 is a diagram for explaining a conventional circuit board manufacturing method. It is principal part sectional drawing.

次に、従来の製造方法によって製造された回路基板を電子回路ユニットに適用した場合の構成を図8,図9に基づいて説明すると、絶縁基板51上には、配線パターンの一部を形成し、半導体部品54を取り付けるためのランド部52a、及びチップ部品(図示せず)を取り付けるためのランド部52bと、半導体部品54の取付領域S3を囲むように設けられたダム53を有する。   Next, a configuration when a circuit board manufactured by a conventional manufacturing method is applied to an electronic circuit unit will be described with reference to FIGS. 8 and 9. A part of a wiring pattern is formed on an insulating substrate 51. A land portion 52a for mounting the semiconductor component 54, a land portion 52b for mounting a chip component (not shown), and a dam 53 provided so as to surround the mounting region S3 of the semiconductor component 54.

また、ここでは図示しないが、チップ部品がランド部52bに半田付によって取り付けられると共に、図9に示すように、半導体部品54は、取付領域S3に配置されて、ランド部52aに半田55付によって取り付けられる。   Although not shown here, the chip component is attached to the land portion 52b by soldering, and as shown in FIG. 9, the semiconductor component 54 is disposed in the attachment region S3 and soldered to the land portion 52a by soldering 55. It is attached.

そして、取付領域S3の範囲内には、絶縁基板51と半導体部品54間を含む状態で、アンダーフィル56が設けられ、このアンダーフィル56によって、半導体部品54の取付を強固にすると共に、アンダーフィル56は、ダム53によって流出が防止されて、従来の電子回路ユニットが形成されている(例えば、特許文献1参照)。   An underfill 56 is provided within the range of the attachment region S3 so as to include the space between the insulating substrate 51 and the semiconductor component 54. The underfill 56 strengthens the attachment of the semiconductor component 54 and also provides an underfill. 56 is prevented from flowing out by the dam 53 to form a conventional electronic circuit unit (see, for example, Patent Document 1).

次に、従来の回路基板の製造方法を図8,図9に基づいて説明すると、先ず、図8に示すように、ランド部52a、52bとダム53を設けた絶縁基板51を用意し、次に、図9に示すように、ランド部52aには、半田55によて半導体部品54が取り付けられると共に、ランド部52bには、半田によってチップ部品が取り付けられる。   Next, a conventional circuit board manufacturing method will be described with reference to FIGS. 8 and 9. First, as shown in FIG. 8, an insulating substrate 51 provided with lands 52a and 52b and a dam 53 is prepared. In addition, as shown in FIG. 9, a semiconductor component 54 is attached to the land portion 52a by solder 55, and a chip component is attached to the land portion 52b by solder.

次に、絶縁基板51と半導体部品54との間には、アンダーフィル56が注入され、このアンダーフィル56によって、半導体部品54の取付を強固にすると共に、アンダーフィル56は、ダム53によって流出が防止されて、従来の回路基板の製造が完了する(例えば、特許文献1参照)。
特開2004−179576号公報
Next, an underfill 56 is injected between the insulating substrate 51 and the semiconductor component 54, and the attachment of the semiconductor component 54 is strengthened by the underfill 56, and the underfill 56 flows out by the dam 53. This prevents the conventional circuit board from being manufactured (see, for example, Patent Document 1).
JP 2004-179576 A

しかし、従来の回路基板の製造方法にあっては、製造後にもダム53が絶縁基板51上に存在して、絶縁基板51は、ダム53のスペース分、大きくなる上に、チップ部品を半田付けするためのランド部52bは、ダム53から離して設ける必要が生じて、絶縁基板51が更に大きくなって、回路基板が大型になるという問題がある。   However, in the conventional method of manufacturing a circuit board, the dam 53 exists on the insulating substrate 51 after the manufacturing, and the insulating substrate 51 becomes larger by the space of the dam 53, and the chip component is soldered. Therefore, it is necessary to provide the land portion 52b away from the dam 53, and there is a problem that the insulating substrate 51 becomes larger and the circuit board becomes larger.

本発明は、このような従来技術の実情に鑑みてなされたもので、その目的は、小型の回路基板が得られる回路基板の製造方法を提供することにある。   The present invention has been made in view of the actual situation of the prior art, and an object thereof is to provide a method of manufacturing a circuit board from which a small circuit board can be obtained.

上記の目的を達成するために、本発明は、絶縁基板に設けられたランド部に半導体部品を取り付ける取付工程と、半導体部品の外周を囲むように、絶縁基板上にダムを形成するダム形成工程と、ダムに囲まれた範囲内で、絶縁基板と半導体部品との間にアンダーフィルを設けるアンダーフィル形成工程と、このアンダーフィル形成工程後に、ダムを除去するダム除去工程を有したことを特徴としている。   In order to achieve the above object, the present invention provides a mounting step for attaching a semiconductor component to a land portion provided on the insulating substrate, and a dam forming step for forming a dam on the insulating substrate so as to surround the outer periphery of the semiconductor component. And an underfill forming step of providing an underfill between the insulating substrate and the semiconductor component within a range surrounded by the dam, and a dam removing step of removing the dam after the underfill forming step. It is said.

このように構成した本発明は、回路基板の製造後にダムが存在しないため、ダムが位置した絶縁基板面には、ランド部やカバー等を配置できて、ダムが位置した絶縁基板面を有効に活用でき、小型の回路基板を得ることができる。   In the present invention configured as described above, since the dam does not exist after the circuit board is manufactured, the land portion, the cover, or the like can be arranged on the insulating substrate surface on which the dam is located, and the insulating substrate surface on which the dam is positioned can be effectively used. A small circuit board can be obtained.

また、本発明は、上記発明において、ダム除去工程は、アンダーフィルが固化した後に行うようにしたことを特徴としている。このように構成した本発明は、ダム除去工程において、アンダーフィルの流出が無くなって、アンダーフィルの確実な形成ができる。   Moreover, the present invention is characterized in that, in the above invention, the dam removing step is performed after the underfill is solidified. According to the present invention configured as described above, underfill does not flow out in the dam removing step, and the underfill can be reliably formed.

また、本発明は、上記発明において、絶縁基板のランド部には、チップ部品が半田付によって取り付けられており、ダム形成工程において、ダムが半田上に跨って形成されたことを特徴としている。   Further, the present invention is characterized in that, in the above-described invention, the chip component is attached to the land portion of the insulating substrate by soldering, and the dam is formed over the solder in the dam forming step.

このような構成した本発明は、ダムが位置した絶縁基板面までランド部を突入できて、回路基板の小型化を図ることができると共に、半田上には、ダムが存在しないため、この回路基板を更にマザー基板に端子を使用して半田付けされる場合に、リフロー炉の熱によりダム剤や絶縁基板に含まれる水分及びフラックス残渣等が膨張し、チップ部品を取り付けている半田を押し出すことによる不具合がない。   In the present invention configured as described above, the land portion can be pierced to the surface of the insulating substrate where the dam is located, so that the circuit board can be reduced in size and the dam does not exist on the solder. When the solder is further soldered to the mother board using the terminals, the heat of the reflow furnace expands the moisture and flux residue contained in the dam agent and the insulating board, and pushes out the solder attaching the chip component. There are no defects.

また、本発明は、上記発明において、絶縁基板には、カバーを取り付けるための領域を有しており、ダム形成工程において、ダムが領域上に跨って形成されたことを特徴としている。このような構成した本発明は、カバーがダムの位置したカバー領域に取り付けできて、回路基板の小型化を図ることができる。   Moreover, the present invention is characterized in that, in the above invention, the insulating substrate has a region for attaching a cover, and the dam is formed over the region in the dam forming step. In the present invention configured as described above, the cover can be attached to the cover region where the dam is located, and the circuit board can be miniaturized.

また、本発明は、上記発明において、ダムはシリコンゴム系樹脂で形成されると共に、アンダーフィルはエポキシ樹脂で形成されたことを特徴としている。このような構成した本発明は、アンダーフィルによって半導体部品の取付を強固にできると共に、ダムによってアンダーフィルの流出を確実に防止できる上に、ダムの除去の容易なものが得られる。   The present invention is characterized in that, in the above-mentioned invention, the dam is formed of a silicon rubber-based resin and the underfill is formed of an epoxy resin. According to the present invention configured as described above, the semiconductor component can be firmly attached by the underfill, and the outflow of the underfill can be surely prevented by the dam, and the dam can be easily removed.

また、本発明は、上記発明において、ダム除去工程において、ダムが洗浄によって除去されたことを特徴としている。このような構成した本発明は、ダムがフロン系有機溶剤の洗浄によって容易に除去できて、生産性の良好なものが得られる。   The present invention is characterized in that, in the above-mentioned invention, the dam is removed by cleaning in the dam removing step. In the present invention configured as described above, the dam can be easily removed by washing the fluorocarbon organic solvent, and a product with good productivity can be obtained.

本発明は、回路基板の製造後にダムが存在しないため、ダムが位置した絶縁基板面には、ランド部やカバー等を配置できて、ダムが位置した絶縁基板面を有効に活用でき、小型の回路基板を得ることができる。   In the present invention, since the dam does not exist after the circuit board is manufactured, the land portion, the cover, etc. can be arranged on the insulating substrate surface where the dam is located, and the insulating substrate surface where the dam is located can be used effectively, and the small size A circuit board can be obtained.

発明の実施の形態について図面を参照して説明すると、図1は本発明の製造方法によって製造された回路基板が電子回路ユニットに適用された要部断面図、図2は本発明の製造方法によって製造された回路基板が電子回路ユニットに適用され、カバーを取り去った状態を示す平面図である。   An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view of a main part in which a circuit board manufactured by the manufacturing method of the present invention is applied to an electronic circuit unit, and FIG. It is a top view which shows the state in which the manufactured circuit board was applied to the electronic circuit unit, and the cover was removed.

また、図3は本発明の回路基板の製造方法の第1工程を示す正面図、図4は本発明の回路基板の製造方法の第2工程を示す正面図、図5は本発明の回路基板の製造方法の第2工程を示す平面図、図6は本発明の回路基板の製造方法の第3工程を示す正面図、図7は本発明の回路基板の製造方法の第3工程を示す平面図である。   3 is a front view showing a first step of the circuit board manufacturing method of the present invention, FIG. 4 is a front view showing a second step of the circuit board manufacturing method of the present invention, and FIG. 5 is a circuit board of the present invention. FIG. 6 is a front view showing a third step of the circuit board manufacturing method of the present invention, and FIG. 7 is a plan view showing the third step of the circuit board manufacturing method of the present invention. FIG.

次に、本発明の製造方法によって製造された回路基板を電子回路ユニットに適用した場合の構成を図1,図2に基づいて説明すると、絶縁基板1には、配線パターン2と、この配線パターン2の一部を形成し、絶縁基板1の上面に設けられた半導体部品3を取り付けるためのランド部2a、及びチップ部品4を取り付けるためのランド部2bと、絶縁基板1の下面に設けられた端子2cを有する。   Next, the configuration when the circuit board manufactured by the manufacturing method of the present invention is applied to an electronic circuit unit will be described with reference to FIGS. 1 and 2. The insulating substrate 1 includes a wiring pattern 2 and the wiring pattern. 2, a land portion 2 a for attaching the semiconductor component 3 provided on the upper surface of the insulating substrate 1, a land portion 2 b for attaching the chip component 4, and a lower surface of the insulating substrate 1. A terminal 2c is provided.

ベアチップ等からなる半導体部品3は、絶縁基板1の半導体部品3の取付領域S1に配置されて、ランド部2aに半田5付けされて取り付けられると共に、チップコンデンサやチップ抵抗器等からなるチップ部品4は、ランド部2bに半田6付けされて取り付けられて、回路基板である絶縁基板1には、所望の電気回路が形成されている。   The semiconductor component 3 made of a bare chip or the like is disposed in the mounting region S1 of the semiconductor component 3 of the insulating substrate 1 and attached by being soldered 5 to the land portion 2a, and the chip component 4 made of a chip capacitor, a chip resistor or the like. The solder 6 is attached to the land portion 2b, and a desired electric circuit is formed on the insulating substrate 1 which is a circuit board.

アンダーフィル7は、エポキシ樹脂で形成され、絶縁基板1と半導体部品3間を含む半導体部品3の周囲に位置する絶縁基板1上に設けられ、このアンダーフィル7によって、半導体部品3の取付を強固にしている。   The underfill 7 is formed of an epoxy resin and is provided on the insulating substrate 1 positioned around the semiconductor component 3 including the space between the insulating substrate 1 and the semiconductor component 3. The underfill 7 firmly attaches the semiconductor component 3. I have to.

金属板からなる箱形のカバー8は、覆い部8aと、この覆い部8aから下方に延びる複数の脚部8bを有し、このカバー8は、覆い部8aで半導体部品3やチップ部品4を覆い、脚部8bが絶縁基板1の孔1aに挿入され、覆い部8aの下端部が絶縁基板1のカバー8の取付領域S2に位置した状態で、絶縁基板1に適宜手段によって取り付けられて、本発明の電子回路ユニットが形成されている。
このような構成を有する本発明の電子回路ユニットは、ここでは図示しないが、絶縁基板1に設けられた端子2cがマザー基板のランド部に設けられたクリーム半田上に載置された後、リフロー炉に搬送されて、マザー基板に半田付けされるようになっている。
The box-shaped cover 8 made of a metal plate has a cover 8a and a plurality of legs 8b extending downward from the cover 8a. The cover 8 covers the semiconductor component 3 and the chip component 4 with the cover 8a. Covering, the leg portion 8b is inserted into the hole 1a of the insulating substrate 1, and the lower end portion of the covering portion 8a is positioned in the mounting region S2 of the cover 8 of the insulating substrate 1, and is attached to the insulating substrate 1 by appropriate means, The electronic circuit unit of the present invention is formed.
The electronic circuit unit of the present invention having such a configuration is not shown here, but the terminal 2c provided on the insulating substrate 1 is placed on the cream solder provided on the land portion of the mother substrate, and then reflowed. It is transported to the furnace and soldered to the mother board.

次に、本発明の回路基板の製造方法を図3〜図7に基づいて説明すると、先ず、第1工程として図3に示すように、ランド部2aに半導体部品3を半田5付して取り付けると共に、ランド部2bにチップ部品4を半田6付けして取り付ける取付工程を行う。   Next, a method of manufacturing a circuit board according to the present invention will be described with reference to FIGS. 3 to 7. First, as shown in FIG. 3 as a first step, the semiconductor component 3 is attached to the land portion 2a with solder 5 attached thereto. At the same time, an attachment process is performed in which the chip component 4 is attached to the land portion 2b by soldering.

次に、第2工程として図4,図5に示すように、半導体部品3の外周の近傍に位置する絶縁基板1上には、半導体部品3の外周を囲むように、シリコンゴム系樹脂からなるダム9を形成するダム形成工程を行う。   Next, as shown in FIG. 4 and FIG. 5 as a second step, the insulating substrate 1 located in the vicinity of the outer periphery of the semiconductor component 3 is made of a silicon rubber resin so as to surround the outer periphery of the semiconductor component 3. A dam formation process for forming the dam 9 is performed.

この時、ダム9は、チップ部品4を取り付けた半田6上とカバー8の取付領域S2上に跨って形成されている。   At this time, the dam 9 is formed over the solder 6 to which the chip component 4 is attached and the attachment region S2 of the cover 8.

次に、第3工程として図6,図7に示すように、ダム9で囲まれた領域内で、絶縁基板1と半導体部品3間を含む絶縁基板1上に、エポキシ樹脂からなるアンダーフィル7を形成するアンダーフィル形成工程を行った後、アンダーフィル7を加熱等して固化する固化工程を行う。   Next, as shown in FIGS. 6 and 7 as a third step, an underfill 7 made of an epoxy resin is formed on the insulating substrate 1 including the space between the insulating substrate 1 and the semiconductor component 3 in the region surrounded by the dam 9. After performing the underfill forming step for forming the underfill 7, a solidifying step for solidifying the underfill 7 by heating or the like is performed.

そして、このアンダーフィル7によって、半導体部品3の取付を強固にすると共に、アンダーフィル7は、ダム9によって流出が防止される。   The underfill 7 strengthens the mounting of the semiconductor component 3 and the underfill 7 is prevented from flowing out by the dam 9.

次に、フロン系有機溶剤による洗浄によって、シリコンゴム系樹脂からなるダム9を除去するダム除去工程を行うと、図2に示すように、チップ部品4を取り付ける半田6上、及びカバー8の取付領域S2上を含む絶縁基板1上のダム9が除去された状態となって、本発明の回路基板の製造が完了する。   Next, when a dam removing process for removing the dam 9 made of silicon rubber resin is performed by cleaning with a fluorocarbon organic solvent, as shown in FIG. 2, the solder 6 to which the chip component 4 is attached and the cover 8 are attached. The dam 9 on the insulating substrate 1 including the region S2 is removed, and the manufacture of the circuit board of the present invention is completed.

なお、本発明の電子回路ユニットを製造する場合は、ダム9が存在した位置を含む取付領域S2において、カバー8を配置して取り付ければ、本発明の電子回路ユニットの製造が完了する。   When the electronic circuit unit of the present invention is manufactured, if the cover 8 is disposed and mounted in the mounting region S2 including the position where the dam 9 is present, the manufacturing of the electronic circuit unit of the present invention is completed.

また、ダム9の除去方法として、ピンセットやカッターナイフによって、ダム9を除去しても良い。   Further, as a method for removing the dam 9, the dam 9 may be removed by tweezers or a cutter knife.

本発明の製造方法によって製造された回路基板が電子回路ユニットに適用された要部断面図である。It is principal part sectional drawing by which the circuit board manufactured by the manufacturing method of this invention was applied to the electronic circuit unit. 本発明の製造方法によって製造された回路基板が電子回路ユニットに適用され、カバーを取り去った状態を示す平面図である。It is a top view which shows the state which the circuit board manufactured by the manufacturing method of this invention was applied to the electronic circuit unit, and the cover was removed. 本発明の回路基板の製造方法の第1工程を示す正面図である。It is a front view which shows the 1st process of the manufacturing method of the circuit board of this invention. 本発明の回路基板の製造方法の第2工程を示す正面図である。It is a front view which shows the 2nd process of the manufacturing method of the circuit board of this invention. 本発明の回路基板の製造方法の第2工程を示す平面図である。It is a top view which shows the 2nd process of the manufacturing method of the circuit board of this invention. 本発明の回路基板の製造方法の第3工程を示す正面図である。It is a front view which shows the 3rd process of the manufacturing method of the circuit board of this invention. 本発明の回路基板の製造方法の第3工程を示す平面図である。It is a top view which shows the 3rd process of the manufacturing method of the circuit board of this invention. 従来の回路基板の製造方法を説明するための絶縁基板の平面図である。It is a top view of the insulated substrate for demonstrating the manufacturing method of the conventional circuit board. 従来の回路基板の製造方法を説明するための要部断面図である。It is principal part sectional drawing for demonstrating the manufacturing method of the conventional circuit board.

符号の説明Explanation of symbols

1 絶縁基板
1a 孔
2 配線パターン
2a、2b ランド部
2c 端子
3 半導体部品
4 チップ部品
5、6 半田
7 アンダーフィル
8 カバー
8a 覆い部
8b 脚部
9 ダム
S1 半導体部品の取付領域
S2 カバーの取付領域
DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 1a Hole 2 Wiring pattern 2a, 2b Land part 2c Terminal 3 Semiconductor component 4 Chip component 5, 6 Solder 7 Underfill 8 Cover 8a Cover part 8b Leg part 9 Dam S1 Semiconductor component attachment area S2 Cover attachment area

Claims (6)

絶縁基板に設けられたランド部に半導体部品を取り付ける取付工程と、前記半導体部品の外周を囲むように、前記絶縁基板上にダムを形成するダム形成工程と、前記ダムに囲まれた範囲内で、前記絶縁基板と前記半導体部品との間にアンダーフィルを設けるアンダーフィル形成工程と、このアンダーフィル形成工程後に、前記ダムを除去するダム除去工程を有したことを特徴とする回路基板の製造方法。 A mounting step of attaching a semiconductor component to a land portion provided on the insulating substrate, a dam forming step of forming a dam on the insulating substrate so as to surround an outer periphery of the semiconductor component, and a range surrounded by the dam An underfill forming step of providing an underfill between the insulating substrate and the semiconductor component, and a dam removing step of removing the dam after the underfill forming step . 前記ダム除去工程は、前記アンダーフィルが固化した後に行うようにしたことを特徴とする請求項1記載の回路基板の製造方法。 2. The circuit board manufacturing method according to claim 1, wherein the dam removing step is performed after the underfill is solidified. 前記絶縁基板の前記ランド部には、チップ部品が半田付によって取り付けられており、前記ダム形成工程において、前記ダムが前記半田上に跨って形成されたことを特徴とする請求項1、又は2記載の回路基板の製造方法。 3. The chip part is attached to the land portion of the insulating substrate by soldering, and the dam is formed over the solder in the dam forming step. The manufacturing method of the circuit board of description. 前記絶縁基板には、カバーを取り付けるための領域を有しており、前記ダム形成工程において、前記ダムが前記領域上に跨って形成されたことを特徴とする請求項1から3の何れか1項に記載の回路基板の製造方法。 The insulating substrate has a region for attaching a cover, and the dam is formed across the region in the dam formation step. The manufacturing method of the circuit board as described in a term. 前記ダムはシリコンゴム系樹脂で形成されると共に、前記アンダーフィルはエポキシ樹脂で形成されたことを特徴とする請求項1から4の何れか1項に記載の回路基板の製造方法。 5. The method of manufacturing a circuit board according to claim 1, wherein the dam is formed of a silicon rubber-based resin, and the underfill is formed of an epoxy resin. 6. 前記ダム除去工程において、前記ダムが洗浄によって除去されたことを特徴とする請求項5記載の回路基板の製造方法。 6. The method of manufacturing a circuit board according to claim 5, wherein, in the dam removing step, the dam is removed by cleaning.
JP2005335694A 2005-11-21 2005-11-21 Method of manufacturing circuit board Withdrawn JP2007142255A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012142436A (en) * 2010-12-28 2012-07-26 Toshiba Corp Mounting structure and mounting method
CN111128767A (en) * 2018-10-31 2020-05-08 台湾积体电路制造股份有限公司 Semiconductor device and method of formation

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012142436A (en) * 2010-12-28 2012-07-26 Toshiba Corp Mounting structure and mounting method
CN111128767A (en) * 2018-10-31 2020-05-08 台湾积体电路制造股份有限公司 Semiconductor device and method of formation
US11424174B2 (en) 2018-10-31 2022-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of forming the same
CN111128767B (en) * 2018-10-31 2023-05-05 台湾积体电路制造股份有限公司 Semiconductor device and forming method
US11901255B2 (en) 2018-10-31 2024-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of forming the same

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