JP2007059443A - Wiring board for taking a plurality of boards - Google Patents

Wiring board for taking a plurality of boards Download PDF

Info

Publication number
JP2007059443A
JP2007059443A JP2005239690A JP2005239690A JP2007059443A JP 2007059443 A JP2007059443 A JP 2007059443A JP 2005239690 A JP2005239690 A JP 2005239690A JP 2005239690 A JP2005239690 A JP 2005239690A JP 2007059443 A JP2007059443 A JP 2007059443A
Authority
JP
Japan
Prior art keywords
wiring board
wiring
region
sections
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2005239690A
Other languages
Japanese (ja)
Inventor
Shunsuke Chisaka
俊介 千阪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2005239690A priority Critical patent/JP2007059443A/en
Publication of JP2007059443A publication Critical patent/JP2007059443A/en
Withdrawn legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board for taking a plurality of wiring boards capable of taking a plurality of wiring boards excellent in mountability on an electronic component or packaging ability onto an external electric circuit board by inhibiting a warpage. <P>SOLUTION: The wiring board X1 for taking the plurality of wiring boards has a first region 10a consisting of a plurality of matrix sections 11 and a second region 10b surrounding the first region 10a. Sections 11a located at least four corners among the plurality of sections 11 of the first region 10a constitute disposable margins A together with the second region 10b, and remaining sections 11b constitute wiring board parts B each including a wiring conductor 20. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、各々配線導体を有する複数の区画からなる配線基板部と、この配線基板部を取り囲む捨代部とを有する複数個取り用配線基板に関する。   The present invention relates to a plurality of wiring board having a wiring board part composed of a plurality of sections each having a wiring conductor and a surplus part surrounding the wiring board part.

従来、半導体素子などの電子部品の搭載用基板となる配線基板は、一般に、配線導体が形成された絶縁基体の主面に電子部品の搭載部を設けた構造を有している。このような配線基板は、通常、その1辺の長さが数mm程度の矩形板状であり、いわゆる複数個取り用配線基板から作製される。このような複数個取り用配線基板は、例えば特許文献1に開示されている。   2. Description of the Related Art Conventionally, a wiring board serving as a mounting board for electronic components such as semiconductor elements generally has a structure in which an electronic component mounting portion is provided on the main surface of an insulating base on which wiring conductors are formed. Such a wiring board is usually a rectangular plate having a length of one side of about several millimeters, and is manufactured from a so-called multiple-wiring wiring board. Such a multiple wiring substrate is disclosed in Patent Document 1, for example.

図3は、従来の複数個取り用配線基板90を表す平面図である。複数個取り用配線基板90は配線基板部91および捨代部92を有する。配線基板部91は、配線基板を構成する区画91aを行列状に複数含んでいる。区画91aには、各々、配線導体93が設けられている。配線導体93は、その一端部において搭載される電子部品の電極と電気的に接続し、且つ、その他端部において外部の電気回路と電気的に接続することにより、該電子部品と該電気回路との電気的導通を図るためのものである。捨代部92は、配線基板部91を取り囲むように設けられており、複数個取り用配線基板90自体の取扱い容易にするための機能を担う部位である。
特開1999−54886号公報
FIG. 3 is a plan view showing a conventional multiple-wiring wiring board 90. The plurality of wiring board 90 has a wiring board part 91 and a discarding part 92. The wiring board portion 91 includes a plurality of sections 91a constituting the wiring board in a matrix. A wiring conductor 93 is provided in each of the sections 91a. The wiring conductor 93 is electrically connected to an electrode of an electronic component mounted at one end thereof, and is electrically connected to an external electric circuit at the other end thereof, whereby the electronic component and the electric circuit are electrically connected. It is for aiming at electrical conduction. The disposal part 92 is provided so as to surround the wiring board part 91, and is a part having a function for facilitating the handling of the wiring board 90 for taking plural pieces.
Japanese Patent Laid-Open No. 1999-54886

しかしながら、複数個取り用配線基板90では、配線基板部91の本体を構成するセラミックグリーンシートと、配線導体93を構成する導体ペーストとの焼成時における収縮率が異なるため、同時焼成時に、この収縮率差に起因して両者間に応力が発生してしまう。この応力は配線基板部91における外周部に位置する区画91aほど大きくなる傾向があるため、複数個取り用配線基板90では、その外周部に沿って反りなどが発生し易い傾向があった。このように、複数個取り用配線基板90自体に反りが発生すると、配線基板部91を各区画91aに分割して得られる配線基板にも反りが生じてしまうため、配線基板に対する電子部品の搭載や外部電気回路基板に対する配線基板の実装を適切に行うことが困難となる場合がある。特に、近年においては、高機能化や多様化する電子部品の機能に対応すべく配線導体の高密度化が進んでいるため、セラミックグリーンシートと導体ペーストとの間の収縮率差に起因する応力がより大きくなる傾向にあり、上述のような反りの問題が顕著となってきている。   However, in the multi-wiring wiring board 90, the ceramic green sheet constituting the main body of the wiring board portion 91 and the conductor paste constituting the wiring conductor 93 have different shrinkage rates at the time of firing. Stress is generated between the two due to the rate difference. Since this stress tends to increase as the section 91a located at the outer peripheral portion of the wiring board portion 91, the wiring board 90 for multiple-taken tends to be warped along the outer peripheral portion. As described above, when the plurality of wiring board 90 itself is warped, the wiring board obtained by dividing the wiring board portion 91 into the respective sections 91a is also warped. It may be difficult to properly mount the wiring board on the external electric circuit board. In particular, in recent years, since the density of wiring conductors has been increasing in order to cope with higher functionality and diversified functions of electronic components, the stress caused by the shrinkage rate difference between the ceramic green sheet and the conductor paste Tends to become larger, and the problem of warping as described above has become prominent.

本発明は、このような事情のもとで考え出されたものであって、反りの発生を抑制することにより、電子部品の搭載性や外部電気回路基板への実装性に優れた配線基板を複数個取り出すことが可能な複数個取り用配線基板を提供することを、目的とする。   The present invention has been conceived under such circumstances, and by suppressing the occurrence of warping, a wiring board excellent in mountability of electronic parts and mountability on an external electric circuit board is obtained. It is an object of the present invention to provide a wiring board for taking out plural pieces.

本発明に係る複数個取り用配線基板は、行列状の複数の区画からなる第1領域、および、該第1領域の周囲を取り囲む第2領域を有し、第1領域の複数の区画のうち、少なくとも四隅に位置する区画は第2領域とともに捨代部を構成し、残りの区画は各々配線導体を有する配線基板部を構成することを特徴としている。   The wiring board for multi-cavity according to the present invention has a first area composed of a plurality of matrix-like sections, and a second area surrounding the periphery of the first area, and among the plurality of sections of the first area The sections located at least at the four corners constitute a surplus part together with the second region, and the remaining sections constitute a wiring board part having a wiring conductor.

好ましくは、捨代部は、四隅に位置する区画と行方向または列方向において隣り合う区画を含む。ここで、「四隅に位置する区画と行方向または列方向において隣り合う区画」とは、四隅に位置する区画と行方向において隣り合う区画、または、四隅に位置する区画と列方向において隣り合う区画のいずれか一方を少なくとも含んでいることを意味しているので、両方とも含んでいてもよい。   Preferably, the surrendering unit includes a section adjacent to the section located at the four corners in the row direction or the column direction. Here, "a section adjacent to the four corners in the row direction or the column direction" means a section adjacent to the four corners in the row direction, or a section adjacent to the four corners in the column direction. It is meant that any one of these is included, and therefore both may be included.

本発明に係る複数個取り用配線基板では、第1領域の複数の区画のうち、少なくとも四隅に位置する区画に配線導体を設けなくてもよい。そのため、配線基板の本体を構成するもの(例えば、セラミックグリーンシート)と、配線導体を構成するもの(例えば、導体ペースト)との収縮率差に起因する応力が第1領域の四隅に集中するのを緩和することができる。したがって、本複数個取り用配線基板では、第1領域の四隅において上記応力が集中することに起因する反りの発生を抑制することができる。すなわち、本複数個取り用配線基板から取り出される配線基板は、電子部品の搭載性や外部電気回路基板への実装性に優れているのである。   In the multiple wiring substrate according to the present invention, it is not necessary to provide the wiring conductor in at least the four corners among the plurality of sections in the first region. For this reason, the stress caused by the difference in shrinkage rate between the constituent of the main body of the wiring board (for example, ceramic green sheet) and the constituent of the wiring conductor (for example, conductor paste) is concentrated at the four corners of the first region. Can be relaxed. Therefore, in this multiple wiring substrate, it is possible to suppress the occurrence of warping due to the concentration of the stress at the four corners of the first region. That is, the wiring board taken out from the multiple wiring board is excellent in mountability of electronic components and mountability on an external electric circuit board.

捨代部が四隅に位置する区画と行方向または列方向において隣り合う区画を含む複数個取り用配線基板では、四隅に加えて、それに隣り合う区画にも配線導体を設けなくてよい。そのため、上記応力が第1領域の四隅に集中するのをより効果的に緩和することができる。したがって、本複数個取り用配線基板では、第1領域の四隅において上記応力が集中することに起因する反りの発生をより効果的に抑制することができる。すなわち、本複数個取り用配線基板から取り出される配線基板は、電子部品の搭載性や外部電気回路基板への実装性に優れているのである。   In the multi-wiring wiring board including the section where the disposal portion is located at the four corners and the section adjacent in the row direction or the column direction, it is not necessary to provide the wiring conductor in the section adjacent to the four corners. Therefore, it is possible to more effectively alleviate the stress concentration on the four corners of the first region. Therefore, in this multiple wiring substrate, the occurrence of warpage due to the concentration of the stress at the four corners of the first region can be more effectively suppressed. That is, the wiring board taken out from the multiple wiring board is excellent in mountability of electronic components and mountability on an external electric circuit board.

図1は、本発明の第1の実施形態に係る複数個取り用配線基板X1示す平面図である。複数個取り用配線基板X1は、絶縁基体10および配線導体20を有する。   FIG. 1 is a plan view showing a plurality of wiring boards X1 according to the first embodiment of the present invention. The multiple wiring substrate X1 has an insulating base 10 and a wiring conductor 20.

絶縁基体10は、第1領域10aおよび第2領域10bを有し、平面視において略矩形状の平板である。第1領域10aは、行列状の複数(本実施形態では100個)の区画11からなり、絶縁基体10の中央部に位置している。複数の区画11は、四隅に位置する区画11aおよび残りの区画11bからなり、区画11bには各々配線導体20が設けられている。区画11の形状としては、例えば四角板状の電子部品の搭載に適した四角形状(例えば、正方形状や長方形状など)が好適であるが、これには限られず、搭載される電子部品の形状や実装される外部電気回路基板における実装領域の形状などに応じて適宜設定すればよい。第2領域10bは、第1領域10aの周囲を取り囲むように設けられており、本実施形態においては四角枠状である。なお、絶縁基体10を構成する材料としては、セラミックスが挙げられる。セラミックスとは、酸化アルミニウム質焼結体(アルミナセラミックス)、窒化アルミニウム質焼結体(窒化アルミニウムセラミックス)、炭化珪素質焼結体(炭化珪素セラミックス)、窒化珪素質焼結体(窒化珪素セラミックス)、ガラスセラミック焼結体、ムライト質焼結体などである。   The insulating base 10 has a first region 10a and a second region 10b and is a substantially rectangular flat plate in plan view. The first region 10 a is composed of a plurality of (in the present embodiment, 100) sections 11 in a matrix and is located in the center of the insulating substrate 10. The plurality of sections 11 are composed of sections 11a located at the four corners and the remaining sections 11b, and wiring conductors 20 are provided in the sections 11b. The shape of the compartment 11 is preferably a quadrangular shape (for example, a square shape or a rectangular shape) suitable for mounting a square plate-shaped electronic component, but is not limited thereto, and the shape of the electronic component to be mounted is not limited thereto. And may be set as appropriate according to the shape of the mounting area on the external electric circuit board to be mounted. The second region 10b is provided so as to surround the first region 10a, and in the present embodiment, has a rectangular frame shape. In addition, as a material which comprises the insulating base | substrate 10, ceramics are mentioned. Ceramics are aluminum oxide sintered bodies (alumina ceramics), aluminum nitride sintered bodies (aluminum nitride ceramics), silicon carbide based sintered bodies (silicon carbide ceramics), and silicon nitride based sintered bodies (silicon nitride ceramics). Glass ceramic sintered body, mullite sintered body, and the like.

ここで、絶縁基体10を構成する材料としてガラスセラミック焼結体を採用した場合における絶縁基体10の作製方法の一例について説明する。まず、ホウ珪酸系ガラスなどのガラスや酸化アルミニウム(アルミナ)、酸化珪素(シリカ)などの原料粉末を有機溶剤やバインダなどとともにシート状に成形して複数のセラミックグリーンシートを作製する。次に、作製されたセラミックグリーンシートに対して切断加工や打抜き加工を施すことにより、該セラミックグリーンシートを所定の寸法や形状に加工する。次に、加工されたセラミックグリーンシートを所定寸法まで積層し、還元雰囲気中において所定の焼成温度(例えば1000℃)で焼成する。以上のようにして、絶縁基体10は作製される。なお、絶縁基体10は、その外辺部や角部における破損発生の防止や取扱い性の観点から、外辺部に凹凸を有する構成としてもよいし、角部に丸みを有する構成としてもよい。   Here, an example of a method for manufacturing the insulating substrate 10 in the case where a glass ceramic sintered body is employed as a material constituting the insulating substrate 10 will be described. First, glass such as borosilicate glass, or raw material powder such as aluminum oxide (alumina) or silicon oxide (silica) is formed into a sheet shape together with an organic solvent, a binder, or the like to produce a plurality of ceramic green sheets. Next, the ceramic green sheet is processed into a predetermined size and shape by cutting or punching the manufactured ceramic green sheet. Next, the processed ceramic green sheets are laminated to a predetermined size and fired at a predetermined firing temperature (for example, 1000 ° C.) in a reducing atmosphere. As described above, the insulating base 10 is manufactured. Note that the insulating base 10 may have a configuration having irregularities on the outer side portion or a rounded corner portion from the viewpoint of prevention of damage at the outer side portion and the corner portion and handling.

第1領域10aの区画11aと第2領域10bとは捨代部Aを構成し、第1領域10aの区画11bは配線基板部Bを構成する。   The section 11a and the second area 10b of the first area 10a constitute a surplus part A, and the section 11b of the first area 10a constitutes a wiring board part B.

捨代部Aは、例えば搬送や梱包、電子部品の実装作業などの取扱い中に配線基板部Bに作用する外力の影響を低減するための機能を担う部位であり、複数個取り用基板X1の取扱い性を高めることができる。   The surrendering part A is a part that bears a function for reducing the influence of an external force that acts on the wiring board part B during handling such as transportation, packing, and mounting of electronic components, for example. Handleability can be improved.

配線基板部Bは、個片に分割されることにより、複数の配線基板Baが取り出される部位である。各配線基板Baは電子部品搭載用などの用途に使用される。ここで、配線基板Baに搭載される電子部品としては、CCD型やCMOS型のラインセンサ、エリアセンサなどの光半導体素子を含む半導体素子、水晶振動子や弾性表面波素子などの圧電素子、コンデンサ、抵抗器、インダクタなどが挙げられる。なお、電子部品を搭載してから配線基板部Bを個片に分割するようにしてもよい。   The wiring board part B is a part from which a plurality of wiring boards Ba are taken out by being divided into pieces. Each wiring board Ba is used for applications such as mounting electronic components. Here, examples of electronic components mounted on the wiring board Ba include semiconductor elements including optical semiconductor elements such as CCD and CMOS line sensors and area sensors, piezoelectric elements such as crystal resonators and surface acoustic wave elements, capacitors, and the like. , Resistors and inductors. The wiring board part B may be divided into individual pieces after mounting electronic components.

ここで、配線基板部Bを複数の配線基板Baに分割する方法の一例について説明する。まず、第1領域10aおよび第2領域10bの境界と、各区画11の境界とに沿って分割用溝を形成する。次に、この分割用溝に沿って絶縁基体10に曲げ応力を加えることにより、該分割用溝に沿って破断させる。以上のようにして、複数の配線基板Baは取り出される。   Here, an example of a method for dividing the wiring board portion B into a plurality of wiring boards Ba will be described. First, a dividing groove is formed along the boundary between the first region 10 a and the second region 10 b and the boundary between the sections 11. Next, by applying a bending stress to the insulating substrate 10 along the dividing grooves, the insulating base 10 is broken along the dividing grooves. As described above, the plurality of wiring boards Ba are taken out.

配線導体20は、例えば複数個取り用配線基板X1から取り出される配線基板に搭載される電子部品と該配線基板を実装する外部電気回路基板との間の電気的導通を得るための部材である。配線導体20の形態としては、メタライズ層状、メッキ層状、蒸着層状、金属箔層状、ビア状などが挙げられる。配線導体20を構成する材料としては、タングステン、モリブデン、マンガン、銅、銀、パラジウム、白金、金などの金属材料が挙げられる。   The wiring conductor 20 is a member for obtaining electrical continuity between, for example, an electronic component mounted on a wiring board taken out from the plurality of wiring boards X1 and an external electric circuit board on which the wiring board is mounted. Examples of the form of the wiring conductor 20 include a metallized layer shape, a plating layer shape, a vapor deposition layer shape, a metal foil layer shape, and a via shape. Examples of the material constituting the wiring conductor 20 include metal materials such as tungsten, molybdenum, manganese, copper, silver, palladium, platinum, and gold.

ここで、配線導体20を構成する材料として銅を採用する場合における配線導体20の形成方法の一例について説明する。まず、銅粉末を有機溶剤やバインダなどとともに混練して導体ペーストを作製する。次に、作製された導体ペーストを所定の印刷方法(例えば、スクリーン印刷法)により絶縁基体10を構成するセラミックグリーンシートに対して印刷する。以上のようにして、配線導体20は形成される。なお、区画11bに対して選択的に配線導体20を形成するには、例えば配線導体20を構成する導体ペーストをスクリーン印刷法で印刷する際に使用される印刷用の製版パターンを、区画11aと対応する部位を非形成部(印刷されないように構成された部位)とすればよい。   Here, an example of a method for forming the wiring conductor 20 when copper is used as the material constituting the wiring conductor 20 will be described. First, a copper paste is kneaded with an organic solvent, a binder, etc. to produce a conductor paste. Next, the produced conductor paste is printed on the ceramic green sheet constituting the insulating substrate 10 by a predetermined printing method (for example, screen printing method). The wiring conductor 20 is formed as described above. In order to selectively form the wiring conductor 20 with respect to the section 11b, for example, a plate-making pattern for printing used when printing a conductor paste constituting the wiring conductor 20 by screen printing is used as the section 11a. The corresponding part may be a non-formed part (part configured not to be printed).

本実施形態に係る複数個取り用配線基板X1では、第1領域10aの区画11aに配線導体20を設けない。そのため、絶縁基体10を構成する材料(例えば、ガラスセラミック焼結体)と、配線導体20を構成する材料(例えば、銅)との収縮率差に起因する応力が第1領域10aの四隅に集中するのを緩和することができる。したがって、複数個取り用配線基板X1では、第1領域10aの四隅において上記応力が集中することに起因する反りの発生を抑制することができる。すなわち、複数個取り用配線基板X1から取り出される配線基板Baは、電子部品の搭載性や外部電気回路基板への実装性に優れているのである。   In the multiple wiring substrate X1 according to the present embodiment, the wiring conductor 20 is not provided in the section 11a of the first region 10a. Therefore, the stress caused by the difference in shrinkage between the material constituting the insulating base 10 (for example, a glass ceramic sintered body) and the material constituting the wiring conductor 20 (for example, copper) is concentrated at the four corners of the first region 10a. You can ease it. Therefore, in the multiple wiring substrate X1, it is possible to suppress the occurrence of warping due to the concentration of the stress at the four corners of the first region 10a. That is, the wiring board Ba taken out from the plurality of wiring boards X1 is excellent in mountability of electronic components and mountability on an external electric circuit board.

図2は、本発明の第2の実施形態に係る複数個取り用配線基板X2を表す平面図である。複数個取り用配線基板X2は、捨代部Aが第1領域10aの区画11aおよび第2領域10bに加えて、区画11aと行方向または列方向において隣り合う区画11cを含む点において、複数個取り用配線基板X1と異なる。複数個取り用配線基板X2の他の構成については、複数個取り用配線基板X1に関して上述したのと同様である。   FIG. 2 is a plan view showing a multi-chip wiring board X2 according to the second embodiment of the present invention. The plurality of wiring board X2 are plural in that the separation portion A includes the section 11c adjacent to the section 11a in the row direction or the column direction in addition to the section 11a and the second area 10b of the first region 10a. It differs from the wiring board X1 for taking. Other configurations of the multi-cavity wiring board X2 are the same as those described above for the multi-cavity wiring board X1.

本実施形態に係る複数個取り用配線基板X2では、第1領域10aの区画11aに加えて、区画11cにも配線導体を設けない。そのため、上記応力が第1領域10aの四隅に集中するのをより効果的に緩和することができる。したがって、複数個取り用配線基板X2では、第1領域10aの四隅において上記応力が集中することに起因する反りの発生をより効果的に抑制することができる。すなわち、複数個取り用配線基板X2から取り出される配線基板Baは、電子部品の搭載性や外部電気回路基板への実装性に、より優れているのである。   In the multiple wiring substrate X2 according to the present embodiment, no wiring conductor is provided in the section 11c in addition to the section 11a of the first region 10a. Therefore, it is possible to more effectively alleviate the stress concentration at the four corners of the first region 10a. Therefore, in the multiple wiring substrate X2, it is possible to more effectively suppress the occurrence of warping due to the concentration of the stress at the four corners of the first region 10a. That is, the wiring board Ba taken out from the plurality of wiring boards X2 is more excellent in mountability of electronic components and mountability on an external electric circuit board.

以上、本発明の具体的な実施形態を示したが、本発明はこれに限定されるものではなく、発明の思想から逸脱しない範囲内で種々の変更が可能である。   Although specific embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and various modifications can be made without departing from the spirit of the invention.

複数個取り用配線基板X1において、第1領域10aの区画11aの行方向の長さと、第1領域10aの区画11aの列方向の長さとを異ならせてもよい。同様に、複数個取り用配線基板X2において、第1領域10aの区画11a,11cからなる配線導体20を形成していない部位の行方向の長さと、第1領域10aの区画11a,11cからなる配線導体20を形成していない部位の列方向の長さとを異ならせてもよい。   In the multiple wiring substrate X1, the length in the row direction of the section 11a of the first region 10a may be different from the length in the column direction of the section 11a of the first region 10a. Similarly, in the multiple wiring substrate X2, the length in the row direction of the portion where the wiring conductor 20 composed of the sections 11a and 11c of the first area 10a is not formed and the sections 11a and 11c of the first area 10a are formed. The length in the column direction of the part where the wiring conductor 20 is not formed may be different.

複数個取り用配線基板X2において、第1領域10aの区画11aと行方向に隣り合う区画11c、または、第1領域10aの区画11aと列方向に隣り合う区画11cのいずれか一方を、配線導体20を有する区画11bとしてもよい。   In the multiple wiring board X2, one of the section 11c adjacent to the section 11a in the row direction in the first area 10a or the section 11c adjacent to the section 11a in the first area 10a in the column direction is connected to the wiring conductor. It is good also as the section 11b which has 20.

本発明の第1の実施形態に係る複数個取り用配線基板を表す平面図である。It is a top view showing the wiring board for multiple acquisition which concerns on the 1st Embodiment of this invention. 本発明の第2の実施形態に係る複数個取り用配線基板を表す平面図である。It is a top view showing the wiring board for multiple acquisition which concerns on the 2nd Embodiment of this invention. 従来の複数個取り用配線基板を表す平面図である。It is a top view showing the conventional wiring board for multiple picking.

符号の説明Explanation of symbols

X1,X2 複数個取り用配線基板
A 捨代部
B 配線基板部
10 絶縁基体
10a 第1領域
10b 第2領域
11 区画
11a (四隅に位置する)区画
11b (残りの)区画
20 配線導体
X1, X2 Plural wiring board A Abandonment part B Wiring board part 10 Insulating base 10a First area 10b Second area 11 Section 11a Section 11b (located at the four corners) Section 11b (Remaining section) Section 20 Wiring conductor

Claims (2)

行列状の複数の区画からなる第1領域、および、該第1領域の周囲を取り囲む第2領域を有し、
前記第1領域の複数の区画のうち、少なくとも四隅に位置する区画は前記第2領域とともに捨代部を構成し、残りの区画は各々配線導体を有する配線基板部を構成することを特徴とする、複数個取り用配線基板。
A first region composed of a plurality of matrix-like sections, and a second region surrounding the first region;
Of the plurality of sections of the first region, at least the sections located at the four corners constitute a surrogate part together with the second area, and the remaining sections each constitute a wiring board part having a wiring conductor. , Multiple wiring board.
前記捨代部は、前記四隅に位置する区画と行方向または列方向において隣り合う区画を含む、請求項1に記載の複数個取り用配線基板。 The wiring board according to claim 1, wherein the discarding portion includes a section adjacent to the section located at the four corners in a row direction or a column direction.
JP2005239690A 2005-08-22 2005-08-22 Wiring board for taking a plurality of boards Withdrawn JP2007059443A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005239690A JP2007059443A (en) 2005-08-22 2005-08-22 Wiring board for taking a plurality of boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005239690A JP2007059443A (en) 2005-08-22 2005-08-22 Wiring board for taking a plurality of boards

Publications (1)

Publication Number Publication Date
JP2007059443A true JP2007059443A (en) 2007-03-08

Family

ID=37922698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005239690A Withdrawn JP2007059443A (en) 2005-08-22 2005-08-22 Wiring board for taking a plurality of boards

Country Status (1)

Country Link
JP (1) JP2007059443A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013033904A (en) * 2011-06-28 2013-02-14 Kyocera Corp Multi-piece wiring board
JP2017045820A (en) * 2015-08-26 2017-03-02 京セラ株式会社 Aggregate substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013033904A (en) * 2011-06-28 2013-02-14 Kyocera Corp Multi-piece wiring board
JP2017045820A (en) * 2015-08-26 2017-03-02 京セラ株式会社 Aggregate substrate
CN106488644A (en) * 2015-08-26 2017-03-08 京瓷株式会社 assembly substrate

Similar Documents

Publication Publication Date Title
JP2007059443A (en) Wiring board for taking a plurality of boards
JP2013077739A (en) Wiring board, electronic device provided with the wiring board, and electronic module device
JP7145739B2 (en) Wiring boards, electronic devices and electronic modules
JP6121860B2 (en) Wiring board and electronic device
JP2001144437A (en) Multilayer ceramic board and method of production
JP4458974B2 (en) Multiple wiring board
JP2010056498A (en) Multi-piece wiring substrate
JP4557786B2 (en) Multiple wiring board
JP6114102B2 (en) Multi-wiring board
JP2002033555A (en) Multiple-piece ceramic substrate
JP2007095866A (en) Manufacturing method of ceramic substrate
JP2007234662A (en) Multipiece wiring board
JP5178595B2 (en) Multi-cavity wiring board, wiring board, electronic component storage package, and electronic device
JP2005136172A (en) Wiring substrate capable of being divided into a multitude of pieces
JP2003273274A (en) Multicavity ceramic board
JP2004063501A (en) Ceramic substrate for many chips and method of manufacturing the same
JP2004022958A (en) Multiple-demarcated ceramic substrate
JP4303539B2 (en) Multiple wiring board
JP4550525B2 (en) Multiple wiring board
JP5254946B2 (en) Package for storing semiconductor elements
JP3801935B2 (en) Electronic component mounting board
JP2005340562A (en) Multiple patterning substrate
JP6258679B2 (en) Wiring board and electronic device
JP2016103585A (en) Multi-piece wiring board
JP2003249725A (en) Multiple-pattern ceramic substrate

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080314

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20100622