JP2007048962A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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JP2007048962A
JP2007048962A JP2005232040A JP2005232040A JP2007048962A JP 2007048962 A JP2007048962 A JP 2007048962A JP 2005232040 A JP2005232040 A JP 2005232040A JP 2005232040 A JP2005232040 A JP 2005232040A JP 2007048962 A JP2007048962 A JP 2007048962A
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die pad
passive component
insulating adhesive
adhesive
semiconductor device
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JP4852276B2 (en
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Takao Nishimura
隆雄 西村
Yoshiaki Narisawa
良明 成沢
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Fujitsu Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To prevent that a passive component is brought into contact with a die pad in a semiconductor device, constituted by connecting a semiconductor chip and the passive component with bonding wires, wherein the passive component is mounted via insulating paste-like adhesives on the die pad mounting the semiconductor chip. <P>SOLUTION: After applying a first insulating adhesive on the die pad, the first insulating adhesive is made to harden. On the hardened first insulating adhesives, a second insulating adhesive is applied further so that the passive component may be attached fixedly. Even if stress is added at the time of arranging the passive component on the die pad, passive component is prevented from coming into direct contact with the die pad due to the first insulating adhesive. Then, the connection is carried out between the electrode pad of the semiconductor device on the die pad and the terminal of the passive component by wire bonding. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、半導体装置および半導体装置の製造方法に関し、特に、ダイパッド上に半導体素子と受動部品とが搭載され、半導体素子と受動部品とがボンディングワイヤにより電気的に接続されて構成される半導体装置の製造方法および半導体装置に関する。   The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and in particular, a semiconductor device in which a semiconductor element and a passive component are mounted on a die pad, and the semiconductor element and the passive component are electrically connected by a bonding wire. The present invention relates to a manufacturing method and a semiconductor device.

ＬＳＩ等の半導体チップ（半導体素子）の電源回路と接地回路との間にキャパシタ（コンデンサ）を挿入接続して、安定した給電を行うことが行われる。かかるキャパシタの配設により、例えば半導体チップ内の回路の同時スイッチングにより生じる電源バウンス或いはＧＮＤ（グラウンド）バウンスを抑制することができる。このようなキャパシタはバイパスコンデンサ（略してパスコン）と称される。また、電源ラインに入ってくる高周波ノイズをカットするために、電源ラインに対して直列にインダクタを挿入接続することも行われる。このようなインダクタは電源フィルタと称される。   A stable power supply is performed by inserting and connecting a capacitor between a power supply circuit and a ground circuit of a semiconductor chip (semiconductor element) such as an LSI. By providing such a capacitor, for example, power bounce or GND (ground) bounce caused by simultaneous switching of circuits in the semiconductor chip can be suppressed. Such a capacitor is called a bypass capacitor (abbreviated as a bypass capacitor). In addition, in order to cut high-frequency noise entering the power supply line, an inductor is inserted and connected in series with the power supply line. Such an inductor is called a power supply filter.

このようにパスコン或いは電源フィルタ等の受動素子を、半導体チップを搭載した半導体装置に内蔵して半導体チップと接続することにより、半導体チップ内の回路により近接してパスコンや電源フィルタを配置することができ、半導体チップの動作を安定させ、電気特性を向上させることができる。また、半導体装置を搭載するシステムボードに個別にパスコン或いは電源フィルタ等の受動素子を搭載する必要がなくなり、システムボード上の部品点数を低減することができ、かかるシステムの小形化を図ることができる。   In this way, by connecting a passive element such as a bypass capacitor or a power supply filter in a semiconductor device on which a semiconductor chip is mounted and connecting to the semiconductor chip, the bypass capacitor and the power supply filter can be arranged closer to the circuit in the semiconductor chip. Thus, the operation of the semiconductor chip can be stabilized and the electrical characteristics can be improved. In addition, it is not necessary to individually mount a passive device such as a bypass capacitor or a power supply filter on the system board on which the semiconductor device is mounted, the number of parts on the system board can be reduced, and the size of the system can be reduced. .

このような半導体装置において、内蔵される受動素子としてチップ部品状の受動部品を用いて、半導体チップと受動部品との接続をボンディングワイヤにより行う構成が知られている。チップ部品状の受動部品を用いることで、例えば、所謂０６０３部品、０４０２部品と称されるような外形寸法が規格化されたチップコンデンサやチップキャパシタ等の汎用のチップ部品を利用できるため、半導体装置を安価に製造することができる。尚、０６０３部品は外形寸法が０．６ｍｍ×０．３ｍｍ×０．３ｍｍであり、０４０２部品は外形寸法が０．４ｍｍ×０．２ｍｍ×０．２ｍｍであり、いずれも図１０に示すように長辺部の両端に電極端子を設けた形状を有する。   In such a semiconductor device, a configuration is known in which a chip-shaped passive component is used as a built-in passive element, and the semiconductor chip and the passive component are connected by a bonding wire. By using a passive component in the form of a chip component, for example, a general-purpose chip component such as a chip capacitor or a chip capacitor whose outer dimensions are standardized as so-called 0603 component and 0402 component can be used. Can be manufactured at low cost. The 0603 part has an outer dimension of 0.6 mm × 0.3 mm × 0.3 mm, and the 0402 part has an outer dimension of 0.4 mm × 0.2 mm × 0.2 mm. As shown in FIG. It has a shape in which electrode terminals are provided at both ends of the long side portion.

かかるチップ部品状の受動部品は、一般に、半田或いは導電性接着剤等を用いてリードフレームのインナーリード部或いは配線基板の電極パッド等の導体パターン部に搭載されることが多いが、この場合、半田或いは導電性接着剤の濡れ広がる領域を考慮した面積の導体パターンが必要となり、さらにはこの導体パターンと半導体チップとの間をボンディングワイヤによって接続を行うためのボンディング領域が必要となる。   In general, such a passive component in the form of a chip component is often mounted on a conductor pattern portion such as an inner lead portion of a lead frame or an electrode pad of a wiring board using a solder or a conductive adhesive. A conductor pattern having an area in consideration of the area where the solder or conductive adhesive spreads out is required, and further, a bonding area for connecting the conductor pattern and the semiconductor chip with a bonding wire is required.

しかし、受動部品と半導体チップとをボンディングワイヤを用いて相互に接続することにより、前記導体パターン部の面積を縮小でき、これにより半導体装置を小型化することができる。また、前記導体パターンを介することなくボンディングワイヤにより半導体チップと受動部品とを相互に接続するため、半導体装置の動作をより安定させ、電気特性を向上させることができる。
特開平８−１６２６０７号公報 （図２） 特開２００４−４７８１１号公報 （第１８頁、図５、図６） However, by connecting the passive component and the semiconductor chip to each other using a bonding wire, the area of the conductor pattern portion can be reduced, and thus the semiconductor device can be miniaturized. In addition, since the semiconductor chip and the passive component are connected to each other by the bonding wire without using the conductor pattern, the operation of the semiconductor device can be further stabilized and the electrical characteristics can be improved.
JP-A-8-162607 (FIG. 2) JP 2004-47811 A (Page 18, FIGS. 5 and 6)

特許文献１の実施例２にあっては、リードフレームのダイパッド上に、半導体チップとコンデンサが近接して搭載・固着され、かかる半導体チップ、コンデンサ及びリードフレーム間がワイヤにより相互に接続されて、モールド樹脂により封止された構成が開示されている。尚、半導体チップ、コンデンサなどの固着手段については詳述されていない。   In Example 2 of Patent Document 1, a semiconductor chip and a capacitor are mounted and fixed close to each other on a die pad of a lead frame, and the semiconductor chip, the capacitor, and the lead frame are mutually connected by a wire, A configuration sealed with a mold resin is disclosed. Incidentally, fixing means such as a semiconductor chip and a capacitor are not described in detail.

一方、特許文献２に記載された技術にあっては、リードフレームのダイパッド（ステージ）上に、半導体チップと受動部品を並んで搭載し、半導体チップと受動部品とをボンディングワイヤで接続している。ダイパッドの受動部品を搭載部位には、エッチング等により凹部を形成し、受動部品はこの凹部上に絶縁テープを介して搭載されている。このような構成とすることで、絶縁テープを介して受動部品を搭載するため受動部品の両端の電極端子がダイパッドに接触することを防止し、受動部品は半導体チップの回路に近い部分に配置されることで半導体装置の電気特性を向上、動作を安定させることができる。また、ダイパッドに凹部を構成しているため、受動部品を搭載する高さを低くすることができる。   On the other hand, in the technique described in Patent Document 2, a semiconductor chip and a passive component are mounted side by side on a die pad (stage) of a lead frame, and the semiconductor chip and the passive component are connected by a bonding wire. . A recessed part is formed by etching or the like in a part where the passive part of the die pad is mounted, and the passive part is mounted on the recessed part via an insulating tape. By adopting such a configuration, the passive component is mounted via the insulating tape, so that the electrode terminals at both ends of the passive component are prevented from coming into contact with the die pad, and the passive component is disposed in a portion close to the circuit of the semiconductor chip. Thus, the electrical characteristics of the semiconductor device can be improved and the operation can be stabilized. Moreover, since the recessed part is comprised in the die pad, the height which mounts a passive component can be made low.

かかる先行例にあっては、受動部品をダイパッドに搭載・固着する際、接着物として絶縁テープを用いているが、所定の大きさに加工されたテープ部材を準備し、テープ部材を凹部に貼り付ける工程を要する。前記絶縁テープ部材に代えて、ペースト状の絶縁性接着剤を用いる方法も考えられるが、この方法は半導体装置の製造時に次のような問題が生じる可能性が大きい。   In such a prior example, an insulating tape is used as an adhesive when a passive component is mounted and fixed to a die pad. However, a tape member processed to a predetermined size is prepared, and the tape member is attached to the recess. The process of attaching is required. A method of using a paste-like insulating adhesive instead of the insulating tape member is also conceivable, but this method is highly likely to cause the following problems during the manufacture of a semiconductor device.

即ち、ダイパッド上にディスペンサ等により塗布供給されたペースト状の絶縁性接着剤上に、受動部品を載置する際、かかる受動部品に付与する荷重が過大になった場合には、受動部品の電極端子とダイパッドとが接触してショートしてしまう場合がある。逆に受動部品に付与する荷重が過少になった場合には、受動部品がダイパッド上に傾斜して搭載されてしまい、受動部品の電極端子にワイヤボンディングを行う際に、ワイヤ先端が電極端子に確実に接続されない場合がある。   That is, when a passive component is placed on a paste-like insulating adhesive applied and supplied onto a die pad by a dispenser or the like, if the load applied to the passive component becomes excessive, the electrode of the passive component The terminal and the die pad may come into contact with each other and cause a short circuit. Conversely, when the load applied to the passive component becomes too small, the passive component is inclined and mounted on the die pad, and when wire bonding is performed on the electrode terminal of the passive component, the tip of the wire becomes the electrode terminal. It may not be connected securely.

一方、半導体装置の動作を安定させ、電気特性を向上させるために、半導体チップを、導電性接着剤を介して、ダイパッド上に搭載・固着してなる半導体装置がある。このような半導体装置においては、エポキシ系樹脂をバインダとして銀の粒子を含んだような導電性接着剤が、製造時の作業性の観点では扱いやすく、ある程度の接着力が得られやすいために広く用いられている。しかし、導電性接着剤は、導電性を確保するために導電粒子を多数含むため、導電粒子を含まない絶縁性接着剤に比べて、一般に接着力が低い場合が多い。このため、導電性接着剤を用いて半導体チップをダイパッドに接続搭載した半導体装置においては、熱応力が加わった場合、或いは半導体装置が高湿度の環境下に置かれた場合に、導電性接着剤と半導体チップとの界面、或いは導電性接着剤とダイパッドとの界面において剥離が生じる場合がある。   On the other hand, there is a semiconductor device in which a semiconductor chip is mounted and fixed on a die pad via a conductive adhesive in order to stabilize the operation of the semiconductor device and improve electrical characteristics. In such a semiconductor device, a conductive adhesive containing silver particles with an epoxy resin as a binder is easy to handle from the viewpoint of workability at the time of manufacture, and it is easy to obtain a certain degree of adhesive force. It is used. However, since the conductive adhesive contains a large number of conductive particles in order to ensure conductivity, the adhesive strength is generally lower than that of an insulating adhesive that does not include conductive particles. Therefore, in a semiconductor device in which a semiconductor chip is connected and mounted on a die pad using a conductive adhesive, the conductive adhesive is applied when thermal stress is applied or when the semiconductor device is placed in a high humidity environment. In some cases, peeling occurs at the interface between the semiconductor chip and the semiconductor chip or at the interface between the conductive adhesive and the die pad.

とりわけ、近年、環境対応の要請から、半導体装置をシステムボードにリフローソルダリング等によって実装する際には、錫（Ｓｎ）−銀（Ａｇ）半田或いは錫−銀−銅（Ｃｕ）半田など鉛（Ｐｂ）を含有しない半田が使用されるため、従来の錫−鉛半田のような鉛を含有する半田を用いて実装する場合に比べて、実装する際の温度がより高くなることから、かかる温度に耐える高い信頼性を有する半導体装置が望まれている。   In particular, in recent years, when a semiconductor device is mounted on a system board by reflow soldering or the like due to a demand for environment, lead (such as tin (Sn) -silver (Ag) solder or tin-silver-copper (Cu) solder) Since solder that does not contain Pb) is used, the temperature at the time of mounting becomes higher compared to the case of mounting using solder containing lead such as conventional tin-lead solder. There is a demand for a semiconductor device having high reliability that can withstand the above.

本発明は、上記の点に鑑みてなされたものであり、半導体チップを搭載したダイパッド上にペースト状の絶縁性接着剤を介して受動部品を搭載し、半導体チップと受動部品とをボンディングワイヤにより接続した構成の半導体装置において、受動部品とダイパッドとの接触を防止するとともに、受動部品へワイヤボンディングを確実にすることを目的とする。   The present invention has been made in view of the above points. A passive component is mounted on a die pad mounted with a semiconductor chip via a paste-like insulating adhesive, and the semiconductor chip and the passive component are bonded by a bonding wire. In a connected semiconductor device, an object is to prevent contact between a passive component and a die pad and to ensure wire bonding to the passive component.

また、本発明は、半導体チップを導電性接着剤を介して搭載したダイパッド上に絶縁性接着剤を介して受動部品を搭載し、半導体チップと受動部品とをボンディングワイヤにより接続した構成の半導体装置において、導電性接着剤部での剥離の発生を防止した高信頼性の半導体装置を提供することを目的とする。   Further, the present invention provides a semiconductor device having a configuration in which a passive component is mounted via an insulating adhesive on a die pad on which a semiconductor chip is mounted via a conductive adhesive, and the semiconductor chip and the passive component are connected by a bonding wire. An object of the present invention is to provide a highly reliable semiconductor device in which the occurrence of peeling at the conductive adhesive portion is prevented.

上記の課題を解決するために、本発明によれば、導体からなるダイパッドに半導体素子と受動部品とを搭載し、ボンディングワイヤにて前記受動部品と前記半導体素子とを接続してなる半導体装置の製造方法において、前記ダイパッド上に接着剤を介して前記半導体素子を搭載する工程と、前記ダイパッド上に第１のペースト状絶縁性接着剤を供給する工程と、前記第１のペースト状絶縁性接着剤を前記ダイパッド上に略均一の厚さに流動する工程と、前記第１のペースト状絶縁性接着剤を硬化する工程と、前記第１のペースト状絶縁性接着剤上に第２の絶縁性ペーストを供給する工程と、前記第２のペースト状絶縁性接着剤および前記第１のペースト状絶縁性接着剤を介して前記受動部品を加圧しながら前記ダイパッドに搭載する工程と、前記第２のペースト状絶縁性接着剤を硬化させる工程と、
前記半導体素子と前記受動部品をボンディングワイヤにより接続する工程と、前記半導体素子と前記受動部品と前記ボンディングワイヤを樹脂により一体的に封止する工程とを含むことを特徴とする半導体装置の製造方法が提供される。 In order to solve the above problems, according to the present invention, a semiconductor device in which a semiconductor element and a passive component are mounted on a die pad made of a conductor, and the passive component and the semiconductor element are connected by a bonding wire. In the manufacturing method, a step of mounting the semiconductor element on the die pad via an adhesive, a step of supplying a first paste-like insulating adhesive on the die pad, and the first paste-like insulating adhesion A step of flowing an agent on the die pad to a substantially uniform thickness, a step of curing the first paste-like insulating adhesive, and a second insulating property on the first paste-like insulating adhesive. A step of supplying a paste; a step of mounting the passive component on the die pad while pressing the second paste-like insulating adhesive and the first paste-like insulating adhesive; and Curing the serial second pasty insulating adhesive,
A method of manufacturing a semiconductor device, comprising: connecting the semiconductor element and the passive component with a bonding wire; and sealing the semiconductor element, the passive component and the bonding wire with a resin. Is provided.

上記の課題を解決するために、本発明の別の観点によれば、導体からなるダイパッド、
前記ダイパッド上に、導電性接着剤を介して固着された半導体素子、及び前記ダイパッド上にあって、前記半導体素子近傍に固着された受動部品を具備する半導体装置であって、
前記受動部品は、前記ダイパッド上に配置された第１の絶縁性接着剤、および第１の絶縁性接着材上に配設された第２の絶縁性接着剤により固着され、前記受動部品と前記半導体素子とは、ボンディングワイヤにより電気的に接続され、前記受動部品の電極端子は前記第１の絶縁性接着剤により前記ダイパッドとは離間せしめられ、前記第２の絶縁性接着剤は前記導電性接着剤を被覆していることを特徴とする半導体装置が提供される。 In order to solve the above problems, according to another aspect of the present invention, a die pad made of a conductor,
A semiconductor device having a semiconductor element fixed on the die pad via a conductive adhesive, and a passive component on the die pad and fixed in the vicinity of the semiconductor element,
The passive component is fixed by a first insulating adhesive disposed on the die pad and a second insulating adhesive disposed on a first insulating adhesive, and the passive component and the passive component The semiconductor element is electrically connected by a bonding wire, the electrode terminal of the passive component is separated from the die pad by the first insulating adhesive, and the second insulating adhesive is the conductive material. A semiconductor device is provided which is coated with an adhesive.

本発明によれば、半導体チップを搭載したダイパッド上にペースト状の絶縁性接着剤を介して受動部品を搭載し、半導体チップと受動部品とをボンディングワイヤにより接続した構成の半導体装置において、受動部品とダイパッドとの接触を防止するとともに、受動部品へワイヤボンディングを確実にした半導体装置の製造方法を提供することができる。   According to the present invention, a passive component is mounted on a die pad on which a semiconductor chip is mounted via a paste-like insulating adhesive, and the semiconductor chip and the passive component are connected by a bonding wire. It is possible to provide a method for manufacturing a semiconductor device in which contact between the semiconductor device and the die pad is prevented and wire bonding to the passive component is ensured.

また、本発明によれば、半導体チップを導電性接着剤を介して搭載したダイパッド上に絶縁性接着剤を介して受動部品を搭載し、半導体チップと受動部品とをボンディングワイヤにより接続した構成の半導体装置において、導電性接着剤部での剥離の発生を防止する半導体装置を提供することができる。   According to the present invention, the passive component is mounted on the die pad on which the semiconductor chip is mounted via the conductive adhesive via the insulating adhesive, and the semiconductor chip and the passive component are connected by the bonding wire. In the semiconductor device, it is possible to provide a semiconductor device that prevents the occurrence of peeling at the conductive adhesive portion.

以下、本発明について実施例をもって詳細に説明する。   Hereinafter, the present invention will be described in detail with reference to examples.

図１は、本発明の第１の実施例における半導体装置の製造方法を表す断面図（その１）、図２は本発明の第１の実施例における半導体装置の製造方法を表す断面図（その２），図３は本発明の第１実施例における半導体装置の製造方法を表す平面図である。図１１はリードフレームを表す部分平面図、図１２は図１１のリードフレームの部分拡大図である。   FIG. 1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention (part 1), and FIG. 2 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention. 2) and FIG. 3 are plan views showing a method of manufacturing a semiconductor device in the first embodiment of the present invention. 11 is a partial plan view showing the lead frame, and FIG. 12 is a partially enlarged view of the lead frame in FIG.

リードフレーム２０のダイパッド２１上に、ペースト状の接着剤３２をノズル２００等を用いて（介して）塗布する。ここでリードフレーム２０は、図１１および図１２を参照して、例えば鉄−ニッケル合金、銅および銅合金等の導体からなり、複数のダイパッド２１と、各ダイパッド２１の周りに形成されたインナーリード２２およびアウターリード２３を有するものであり、ダイパッド２１は支持部２４により周辺フレーム部分２５に支持されている。尚、図１、図２を参照する以降の説明においては、図１２のＸ−Ｘ'での断面部位における製造方法を示す。接着剤３２は、エポキシ樹脂、ポリイミド樹脂等からなる熱硬化性または熱可塑性の樹脂接着剤であってよく、銀、ニッケル、カーボン等の導電性粒子を含んでもよい（図１（Ａ）参照。）。   A paste adhesive 32 is applied onto (via) the die pad 21 of the lead frame 20 using the nozzle 200 or the like. Here, referring to FIG. 11 and FIG. 12, the lead frame 20 is made of a conductor such as iron-nickel alloy, copper and copper alloy, for example, and includes a plurality of die pads 21 and inner leads formed around each die pad 21. 22 and an outer lead 23, and the die pad 21 is supported by a peripheral frame portion 25 by a support portion 24. In the following description with reference to FIGS. 1 and 2, a manufacturing method in a cross-sectional portion taken along the line XX ′ of FIG. The adhesive 32 may be a thermosetting or thermoplastic resin adhesive made of an epoxy resin, a polyimide resin, or the like, and may include conductive particles such as silver, nickel, and carbon (see FIG. 1A). ).

次いで、接着剤３２を介して、複数の電極パッド１２を有する半導体チップ１１をダイパッド２１に搭載する（図１（Ｂ）参照。）。   Next, the semiconductor chip 11 having the plurality of electrode pads 12 is mounted on the die pad 21 through the adhesive 32 (see FIG. 1B).

次いで、ダイパッド２１上ににあって、前記半導体チップ１１の近傍に、ペースト状の第１の絶縁性接着剤３３をノズル２００等を用いて塗布する。第１の絶縁性接着剤は、エポキシ樹脂、ポリイミド樹脂等からなる熱硬化性の樹脂接着剤であり、流動性が高い特性であることが好ましい。塗布する際には、ダイパッド２１と第１の絶縁性接着剤３３のいずれかまたは両方を、５０℃〜１００℃程度に加熱しておいてもよく、これにより第１の第１の絶縁性接着剤３３は粘度が低下して流動性が高まる。ダイパッド２１の加熱はホットプレート等により行い、第１の絶縁性接着剤３３の加熱は、ノズル２００を含む図示しないディスペンサ装置を用いてヒータにより行なってもよい（図１（Ｃ）参照。）。   Next, a paste-like first insulating adhesive 33 is applied on the die pad 21 in the vicinity of the semiconductor chip 11 using the nozzle 200 or the like. The first insulating adhesive is a thermosetting resin adhesive made of an epoxy resin, a polyimide resin, or the like, and preferably has a high fluidity. At the time of application, either or both of the die pad 21 and the first insulating adhesive 33 may be heated to about 50 ° C. to 100 ° C., whereby the first first insulating adhesion is achieved. The agent 33 decreases in viscosity and increases in fluidity. The die pad 21 may be heated by a hot plate or the like, and the first insulating adhesive 33 may be heated by a heater using a dispenser device (not shown) including the nozzle 200 (see FIG. 1C).

次いで、ダイパッド２１上に塗布した第１の絶縁性接着剤３３を流動せしめ、ダイパッド２１上に例えば５μｍ〜２０μｍ程度の均一な厚みになるように薄く塗り広げる。かかる第１の絶縁性接着剤３３は、後の工程で載置される受動部品の固着に要する面積よりも大きな面積をもって配設される。第１の絶縁性接着剤３３の流動は、図１（Ｃ）に示す工程で加熱した場合には、そのまま所定の時間放置することで行なってよい。または、乾燥窒素等の圧縮気体を、ダイパッド２１に塗布した第１の絶縁性接着剤３３上に吹き付けて、押し広げることで流動させてもよい。また、圧縮気体を吹き付ける際には、第１の絶縁性接着剤３３を５０℃〜１００℃程度に加熱しながら行なってもよい（図１（Ｄ）参照。）。   Next, the first insulating adhesive 33 applied on the die pad 21 is caused to flow and spread thinly on the die pad 21 so as to have a uniform thickness of, for example, about 5 μm to 20 μm. The first insulating adhesive 33 is disposed with an area larger than an area required for fixing a passive component placed in a later process. When the first insulating adhesive 33 is heated in the process shown in FIG. 1C, it may be left as it is for a predetermined time. Or you may make it flow by spraying compressed gas, such as dry nitrogen, on the 1st insulating adhesive agent 33 apply | coated to the die pad 21, and expanding. Moreover, when spraying compressed gas, you may carry out, heating the 1st insulating adhesive 33 to about 50 to 100 degreeC (refer FIG.1 (D)).

次いで、第１の絶縁性接着剤３３を、恒温槽、ホットプレート等を用いて加熱して硬化する。この場合の加熱温度および加熱時間は、第１の絶縁性接着剤３３の特性に応じた所定の温度および時間となるが、例えば加熱温度は１５０℃〜２００℃程度、加熱時間は１５分〜６０分程度としてよい。また、このときに、接着剤３２が熱硬化性接着剤である場合には、同時に接着剤３２を硬化させてもよい（図１（Ｅ）参照。）。   Next, the first insulating adhesive 33 is cured by heating using a thermostatic bath, a hot plate, or the like. The heating temperature and heating time in this case are a predetermined temperature and time according to the characteristics of the first insulating adhesive 33. For example, the heating temperature is about 150 ° C. to 200 ° C., and the heating time is 15 minutes to 60 minutes. It may be about minutes. At this time, when the adhesive 32 is a thermosetting adhesive, the adhesive 32 may be cured at the same time (see FIG. 1E).

次いで、第１の絶縁性接着剤３３上に、ペースト状の第２の絶縁性接着剤３４をノズル２００等を用いて塗布する。第２の絶縁性接着剤は、エポキシ樹脂、ポリイミド樹脂等からなる熱硬化性の樹脂接着剤であってよい（図２（Ｆ）参照。）。   Next, a paste-like second insulating adhesive 34 is applied onto the first insulating adhesive 33 using the nozzle 200 or the like. The second insulating adhesive may be a thermosetting resin adhesive made of an epoxy resin, a polyimide resin, or the like (see FIG. 2F).

次いで、受動部品１５を、矢印で示した方向に圧力を加えながら、第２の絶縁性接着剤３４および第１の絶縁性接着剤３３を介してダイパッド２１上に搭載する（図２（Ｊ）参照。）。ここで受動部品１５は、図１０に示されるように、例えば、略直方体形状をしており、長辺部の両端に一対の電極端子１６を有している。   Next, the passive component 15 is mounted on the die pad 21 via the second insulating adhesive 34 and the first insulating adhesive 33 while applying pressure in the direction indicated by the arrow (FIG. 2J). reference.). Here, as shown in FIG. 10, the passive component 15 has, for example, a substantially rectangular parallelepiped shape, and has a pair of electrode terminals 16 at both ends of the long side portion.

受動部品１５をダイパッド２１上に搭載する際には、かかる受動部品１５の固着面積に比して大きな面積を有する第１の絶縁性接着剤３３を介しているため、受動部品１５の電極端子１６とダイパッド２１とが接触することを確実に防止できる。また、第１の絶縁性接着剤３３がダイパッド２１上に均一の厚みに制御されて形成されており、受動部品１５を加圧しながら搭載するため、受動部品１５はダイパッド１５に水平に、即ちダイパッドの表面にほぼ平行に搭載される。   When the passive component 15 is mounted on the die pad 21, the first insulating adhesive 33 having a larger area than the fixed area of the passive component 15 is interposed, so that the electrode terminal 16 of the passive component 15 is interposed. And die pad 21 can be reliably prevented from contacting each other. In addition, the first insulating adhesive 33 is formed on the die pad 21 so as to have a uniform thickness. Since the passive component 15 is mounted while being pressed, the passive component 15 is placed horizontally on the die pad 15, that is, the die pad. It is mounted almost parallel to the surface of the.

次いで、第２の絶縁性接着剤３４を、恒温槽、ホットプレート等を用いて加熱し、硬化せしめる。この場合の加熱温度および加熱時間は、第２の絶縁性接着剤３４の特性に応じた所定の温度および時間となるが、例えば加熱温度は１５０℃〜２００℃程度、加熱時間は１５分〜６０分程度としてよい。また、このときに、接着剤３２が熱硬化性接着剤であって、前記図１（Ｅ）における処理でなお未硬化である場合には、同時に接着剤３２を硬化させてもよい（図２（Ｈ）参照。）。   Next, the second insulating adhesive 34 is heated and cured using a thermostatic bath, a hot plate, or the like. In this case, the heating temperature and the heating time are a predetermined temperature and time according to the characteristics of the second insulating adhesive 34. For example, the heating temperature is about 150 to 200 ° C., and the heating time is 15 to 60 minutes. It may be about minutes. At this time, if the adhesive 32 is a thermosetting adhesive and is still uncured in the process in FIG. 1E, the adhesive 32 may be simultaneously cured (FIG. 2). (See (H).)

次いで、半導体チップ１１の電極パッド１２と受動部品１５の電極端子１６とを、金、アルミニウム等からなるボンディングワイヤ１８により電気的に接続し、また同様に半導体チップ１１の電極パッド１２とインナーリード２２とをボンディングワイヤ１８により電気的に接続する。必要に応じて受動部品１５の一方の電極端子とインナーリードとをワイヤにより接続してもよい（図２（Ｉ）および図３参照。）。   Next, the electrode pad 12 of the semiconductor chip 11 and the electrode terminal 16 of the passive component 15 are electrically connected by a bonding wire 18 made of gold, aluminum or the like. Similarly, the electrode pad 12 of the semiconductor chip 11 and the inner lead 22 are connected. Are electrically connected by a bonding wire 18. If necessary, one electrode terminal of the passive component 15 and the inner lead may be connected by a wire (see FIGS. 2I and 3).

受動部品１５はダイパッド２１上に傾くことなく水平に搭載されていることから、受動部品１５の両端に在る電極端子は等しい高さを有している。従って、受動部品１５の電極端子１６にワイヤボンディングを行う際、ボンディングワイヤ１８の先端は電極端子に確実に接続され、高い信頼性をもってワイヤボンディングを行うことができる。   Since the passive component 15 is mounted horizontally on the die pad 21 without tilting, the electrode terminals at both ends of the passive component 15 have the same height. Therefore, when wire bonding is performed to the electrode terminal 16 of the passive component 15, the tip of the bonding wire 18 is securely connected to the electrode terminal, and wire bonding can be performed with high reliability.

次いで、半導体チップ１１、受動部品１５、ボンディングワイヤ１８、ダイパッド２１、インナーリード２２を、エポキシ等の封止樹脂３０を用いてトランスファー成型法等の方法により一体的に封止する。尚、封止樹脂により封止する際には、封止樹脂３０を熱硬化させるが、このときに、接着剤３２が熱硬化性接着剤であって、図２（Ｈ）における処理でなお未硬化である場合には、同時に接着剤３２を硬化させてもよい。（図２（Ｊ）参照）
その後、封止樹脂３０から図示しない突出したリードフレーム２０のアウターリード部２３の切断および曲げ金型等により成型加工して外部接続端子を形成する。 Next, the semiconductor chip 11, the passive component 15, the bonding wire 18, the die pad 21, and the inner lead 22 are integrally sealed by a transfer molding method or the like using a sealing resin 30 such as epoxy. When sealing with the sealing resin, the sealing resin 30 is thermoset. At this time, the adhesive 32 is a thermosetting adhesive and has not been processed in the process in FIG. In the case of curing, the adhesive 32 may be cured at the same time. (See Fig. 2 (J))
After that, the external connection terminal is formed by cutting the outer lead portion 23 of the lead frame 20 (not shown) from the sealing resin 30 and molding it by a bending die or the like.

このようにして、図１３に示す半導体装置１０が完成する。尚、図１３に示す本実施例１では、半導体装置１０はガルウィング型の形状をした外部端子を２方向に配置したＳＯＰ（Ｓｍａｌｌ Ｏｕｔｌｉｎｅ Ｐａｃｋａｇｅ）型の半導体装置であるが、Ｊリード型の形状をした外部端子のＳＯＪ（Ｓｍａｌｌ Ｏｕｔ−ｌｉｎｅ Ｊ−ｌｅａｄｅｄ Ｐａｃｋａｇｅ）や、外部端子を４方向に配置したＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐａｃｋａｇｅ）等の半導体装置であってもよい。   In this way, the semiconductor device 10 shown in FIG. 13 is completed. In the first embodiment shown in FIG. 13, the semiconductor device 10 is a SOP (Small Outline Package) type semiconductor device in which external terminals having a gull-wing shape are arranged in two directions. It may be a semiconductor device such as an SOJ (Small Out-line J-leaded Package) of external terminals or a QFP (Quad Flat Package) having external terminals arranged in four directions.

また、リードフレーム型の半導体装置に限らず、半導体チップおよび受動部品を搭載するダイパッド部が導体からなる半導体装置であれば本発明を適用することができる。   The present invention is not limited to a lead frame type semiconductor device, but may be any semiconductor device in which a die pad portion on which a semiconductor chip and passive components are mounted is made of a conductor.

尚、上述した説明では、半導体チップをダイパッド上に搭載した後で、第１の絶縁性接着剤を塗布しているが、第１の絶縁性接着剤をダイパッド上に塗布して流動した後に半導体チップを接着剤を介してダイパッド上に搭載してもよい。また、接着剤３２としてペースト状のものを用いたが、フィルム状の接着剤３２を用いて、ダイパッド２１に貼り付けるようにしてもよく、更に予めフィルム状の接着剤３２を半導体チップ１１の下面に貼り付けるようにしてもよい。   In the above description, the first insulating adhesive is applied after the semiconductor chip is mounted on the die pad. However, after the first insulating adhesive is applied on the die pad and flows, the semiconductor is applied. The chip may be mounted on the die pad via an adhesive. Further, although a paste-like material is used as the adhesive 32, it may be attached to the die pad 21 using a film-like adhesive 32, and the film-like adhesive 32 is previously attached to the lower surface of the semiconductor chip 11. You may make it stick to.

図４は、本発明の第２の実施例における半導体装置の内部を表す平面図、図５は本発明の第２の実施例における半導体装置を表す断面図である。   4 is a plan view showing the inside of the semiconductor device according to the second embodiment of the present invention, and FIG. 5 is a cross-sectional view showing the semiconductor device according to the second embodiment of the present invention.

本実施例にあっては、半導体装置１０は、導体からなるダイパッド２１上に導電性接着剤３２を介して搭載された半導体チップ１１と、前記第パッド上に第１の絶縁性接着剤３３および第２の絶縁性接着剤３４を介して搭載された受動部品１５とを具備している。
半導体チップ１１は、複数の電極パッド１２を有しており、受動部品１５は対抗する端部に一対の電極端子１６を有する。半導体チップ１１の電極パッド１２と、受動部品１５の電極端子１６とは、ボンディングワイヤ１８により電気的に接続されている。 In this embodiment, the semiconductor device 10 includes a semiconductor chip 11 mounted on a die pad 21 made of a conductor via a conductive adhesive 32, a first insulating adhesive 33 and a first pad on the first pad. And a passive component 15 mounted via a second insulating adhesive 34.
The semiconductor chip 11 has a plurality of electrode pads 12, and the passive component 15 has a pair of electrode terminals 16 at opposite ends. The electrode pad 12 of the semiconductor chip 11 and the electrode terminal 16 of the passive component 15 are electrically connected by a bonding wire 18.

第１の絶縁性接着剤３３は、ダイパッド２１上に均一な厚さで形成されており、受動部品１５とダイパッド２１とはかかる第１の絶縁性接着剤３３により離間している。一方、前記第２の絶縁性接着剤３４は、半導体チップ１１を固着する導電性接着剤３２の露出部を被覆して、半導体チップ１１の外周部をダイパッド２１上に固着している。   The first insulating adhesive 33 is formed on the die pad 21 with a uniform thickness, and the passive component 15 and the die pad 21 are separated by the first insulating adhesive 33. On the other hand, the second insulating adhesive 34 covers the exposed portion of the conductive adhesive 32 that fixes the semiconductor chip 11, and fixes the outer periphery of the semiconductor chip 11 on the die pad 21.

かかる構造を得るための製造方法は、前記図１乃至図２に記した製造方法に若干の変更を加える。図８乃至図９に、かかる構造を得る製造工程を示す。   The manufacturing method for obtaining such a structure is slightly modified from the manufacturing method shown in FIGS. 8 to 9 show a manufacturing process for obtaining such a structure.

即ち、本実施例にあっては、図９（Ｆ）に示される様に、前記第１の絶縁性接着剤３３上に、ペースト状の第２の絶縁性接着剤３４を塗布するに先駆けて、導電性接着剤３２の露出部を覆ってかかる第２の絶縁性接着剤３４を被覆する。   That is, in this embodiment, as shown in FIG. 9 (F), prior to applying the paste-like second insulating adhesive 34 on the first insulating adhesive 33. Then, the second insulating adhesive 34 is covered over the exposed portion of the conductive adhesive 32.

次いで、第１の絶縁性接着剤３３上に、第２の絶縁性接着剤３４を塗布する。しかる後、受動部品１５を、矢印で示した方向に圧力を加えながら、第２の絶縁性接着剤３４および第１の絶縁性接着剤３３を介してダイパッド２１上に搭載する（図９（Ｇ）参照。）。   Next, a second insulating adhesive 34 is applied on the first insulating adhesive 33. Thereafter, the passive component 15 is mounted on the die pad 21 via the second insulating adhesive 34 and the first insulating adhesive 33 while applying pressure in the direction indicated by the arrow (FIG. 9G )reference.).

尚、図８（Ａ）乃至図８（Ｅ）に示す工程は、前記図１（Ａ）乃至図１（Ｅ）に対応している。また図９（Ｆ） 乃至図９（Ｅ）に示す工程は、前記第２の絶縁性接着剤３４の形成形態を除いて、前記第２図（Ｆ）乃至図２（Ｅ）に対応している。   Note that the steps shown in FIGS. 8A to 8E correspond to FIGS. 1A to 1E. Also, the steps shown in FIGS. 9F to 9E correspond to FIGS. 2F to 2E except for the formation of the second insulating adhesive 34. Yes.

図６は、本発明の第３の実施例における半導体装置の内部を表す平面図、図７は本発明の第２の実施例における半導体装置を表す断面図である。   FIG. 6 is a plan view showing the inside of the semiconductor device according to the third embodiment of the present invention, and FIG. 7 is a cross-sectional view showing the semiconductor device according to the second embodiment of the present invention.

本実施例にあっては、半導体装置１０は、導体からなるダイパッド２１上に導電性接着剤３２を介して搭載された半導体チップ１１と、前記第パッド上に第１の絶縁性接着剤３３および第２の絶縁性接着剤３４を介して搭載された受動部品１５とを具備している。   In this embodiment, the semiconductor device 10 includes a semiconductor chip 11 mounted on a die pad 21 made of a conductor via a conductive adhesive 32, a first insulating adhesive 33 and a first pad on the first pad. And a passive component 15 mounted via a second insulating adhesive 34.

半導体チップ１１は、複数の電極パッド１２を有しており、受動部品１５は対抗する端部に一対の電極端子１６を有する。半導体チップ１１の電極パッド１２と、受動部品１５の電極端子１６とは、ボンディングワイヤ１８により電気的に接続されている。第１の絶縁性接着剤３３は、ダイパッド２１上に均一な厚さで形成されており、受動部品１５とダイパッド２１とはかかる第１の絶縁性接着剤３３により離間している。   The semiconductor chip 11 has a plurality of electrode pads 12, and the passive component 15 has a pair of electrode terminals 16 at opposite ends. The electrode pad 12 of the semiconductor chip 11 and the electrode terminal 16 of the passive component 15 are electrically connected by a bonding wire 18. The first insulating adhesive 33 is formed on the die pad 21 with a uniform thickness, and the passive component 15 and the die pad 21 are separated by the first insulating adhesive 33.

一方、前記第２の絶縁性接着剤３４は、前記第１の絶縁性接着剤３３上から半導体チップ１１を固着する導電性接着剤３２の露出部を被覆して、受動部品１５を第１の絶縁性接着剤３３上に固着すると共に、半導体チップ１１の外周部をダイパッド２１上に固着している。   On the other hand, the second insulating adhesive 34 covers the exposed portion of the conductive adhesive 32 that fixes the semiconductor chip 11 on the first insulating adhesive 33, and the passive component 15 is covered with the first part. While being fixed on the insulating adhesive 33, the outer peripheral portion of the semiconductor chip 11 is fixed on the die pad 21.

は、本発明による半導体装置の製造工方法を示す断面図。These are sectional drawings which show the manufacturing method of the semiconductor device by this invention.

は、本発明による半導体装置の製造工方法を示す断面図。These are sectional drawings which show the manufacturing method of the semiconductor device by this invention.

は本発明による半導体装置の構成を示す平面図。FIG. 2 is a plan view showing a configuration of a semiconductor device according to the present invention.

は本発明による半導体装置の第２の実施例を示す平面図。These are top views which show the 2nd Example of the semiconductor device by this invention.

は、図４に示す本発明による半導体装置の構造を示す断面図。[FIG. 5] is sectional drawing which shows the structure of the semiconductor device by this invention shown in FIG.

は、発明による半導体装置の第３の実施例を示す平面図。These are top views which show the 3rd Example of the semiconductor device by invention.

は、図５に示す本発明による半導体装置の構造を示す断面図。[FIG. 6] is sectional drawing which shows the structure of the semiconductor device by this invention shown in FIG.

は、本発明による半導体装置の製造工方法の第２の実施例を示す断面図。These are sectional drawings which show the 2nd Example of the manufacturing method of the semiconductor device by this invention.

は、本発明による半導体装置の製造工方法の第２の実施例を示す断面図。These are sectional drawings which show the 2nd Example of the manufacturing method of the semiconductor device by this invention.

は、チップ状の受動部品の例を表す外観斜視図。FIG. 3 is an external perspective view illustrating an example of a chip-like passive component.

は、リードフレームの一例を示す平面図。FIG. 3 is a plan view showing an example of a lead frame.

は、リードフレームの分拡大図。Fig. 4 is an enlarged view of the lead frame.

は、ＳＯＰ型半導体装置を示す外観斜視図。FIG. 2 is an external perspective view showing an SOP type semiconductor device.

符号の説明Explanation of symbols

１０：半導体装置
１１：半導体チップ
１２：電極パッド
１５：受動部品
１６：電極端子
１８：ボンディングワイヤ
２０：リードフレーム
２１：ダイパッド
２２：インナーリード
２３：アウターリード
２４：支持部
２５：周辺フレーム部分
３０：封止樹脂
３２：接着剤
３３：第１の絶縁性接着剤
３４：第２の絶縁性接着剤
２００：ノズル 10: Semiconductor device 11: Semiconductor chip 12: Electrode pad 15: Passive component 16: Electrode terminal 18: Bonding wire 20: Lead frame 21: Die pad 22: Inner lead 23: Outer lead 24: Support part 25: Peripheral frame part 30: Sealing resin 32: Adhesive 33: First insulating adhesive 34: Second insulating adhesive 200: Nozzle

Claims (5)

導体からなるダイパッドに半導体素子と受動部品とを搭載し、ボンディングワイヤにて前記受動部品と前記半導体素子とを接続してなる半導体装置の製造方法において、
前記ダイパッド上に接着剤を介して前記半導体素子を搭載する工程と、
前記ダイパッド上に第１のペースト状絶縁性接着剤を供給する工程と、
前記第１のペースト状絶縁性接着剤を前記ダイパッド上において略均一の厚さとする工程と、
前記第１のペースト状絶縁性接着剤を硬化する工程と、
前記第１のペースト状絶縁性接着剤上に第２の絶縁性ペーストを供給する工程と、
前記第２のペースト状絶縁性接着剤および前記第１のペースト状絶縁性接着剤を介して前記受動部品を加圧しながら前記ダイパッドに搭載する工程と、
前記第２のペースト状絶縁性接着剤を硬化させる工程と、
前記半導体素子と前記受動部品をボンディングワイヤにより接続する工程と、
前記半導体素子と前記受動部品と前記ボンディングワイヤを樹脂により一体的に封止する工程と
を含むことを特徴とする半導体装置の製造方法。 In a semiconductor device manufacturing method in which a semiconductor element and a passive component are mounted on a die pad made of a conductor, and the passive component and the semiconductor element are connected by a bonding wire.
Mounting the semiconductor element on the die pad via an adhesive;
Supplying a first paste-like insulating adhesive on the die pad;
The first paste-like insulating adhesive having a substantially uniform thickness on the die pad;
Curing the first pasty insulating adhesive;
Supplying a second insulating paste on the first paste-like insulating adhesive;
Mounting the passive component on the die pad while pressing the second paste-like insulating adhesive and the first paste-like insulating adhesive; and
Curing the second pasty insulating adhesive;
Connecting the semiconductor element and the passive component by a bonding wire;
And a step of integrally sealing the semiconductor element, the passive component, and the bonding wire with a resin. 請求項１記載の半導体装置の製造方法において、
前記接着剤が導電性接着剤であり、
前記ダイパッド上に第１のペースト状絶縁性接着剤を供給する工程が、該導電性接着剤を介して前記半導体素子を前記ダイパッドに接続搭載した後に行われることを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 1,
The adhesive is a conductive adhesive;
A method of manufacturing a semiconductor device, wherein the step of supplying the first paste-like insulating adhesive onto the die pad is performed after the semiconductor element is connected and mounted on the die pad via the conductive adhesive. . 請求項１乃至２いずれかに記載の半導体装置の製造方法において、
前記第１のペースト状絶縁性接着剤と前記第２のペースト状絶縁性接着剤とが同一の材料からなることを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 1,
The method of manufacturing a semiconductor device, wherein the first paste-like insulating adhesive and the second paste-like insulating adhesive are made of the same material. 請求項１乃至３いずれかに記載の半導体装置の製造方法において、
前記第２のペースト状絶縁性接着剤を前記接着剤を被覆するように供給する工程を含むことを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 1,
A method of manufacturing a semiconductor device, comprising a step of supplying the second pasty insulating adhesive so as to cover the adhesive. 導体からなるダイパッド、
前記ダイパッド上に、導電性接着剤を介して固着された半導体素子、及び
前記ダイパッド上にあって、前記半導体素子近傍に固着された受動部品
を具備する半導体装置であって、
前記受動部品は、前記ダイパッド上に配置された第１の絶縁性接着剤、および第１の絶縁性接着材上に配設された第２の絶縁性接着剤により固着され、
前記受動部品と前記半導体素子とは、ボンディングワイヤにより電気的に接続され、
前記受動部品の電極端子は前記第１の絶縁性接着剤により前記ダイパッドとは離間せしめられ、
前記第２の絶縁性接着剤は前記導電性接着剤を被覆している
ことを特徴とする半導体装置。 Die pad made of conductor,
A semiconductor device comprising a semiconductor element fixed on the die pad via a conductive adhesive, and a passive component on the die pad and fixed in the vicinity of the semiconductor element,
The passive component is fixed by a first insulating adhesive disposed on the die pad and a second insulating adhesive disposed on the first insulating adhesive;
The passive component and the semiconductor element are electrically connected by a bonding wire,
The electrode terminal of the passive component is separated from the die pad by the first insulating adhesive,
The semiconductor device, wherein the second insulating adhesive covers the conductive adhesive.
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WO2016076162A1 (en) * 2014-11-12 2016-05-19 株式会社村田製作所 Composite electronic component, circuit module, and dc-dc converter module
CN114271038A (en) * 2019-08-23 2022-04-01 株式会社富士 Electronic circuit device and method for manufacturing the same
CN114271038B (en) * 2019-08-23 2024-05-03 株式会社富士 Electronic circuit device and method for manufacturing the same

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