WO2009093825A3 - Semiconductor package and fabricating method thereof - Google Patents
Semiconductor package and fabricating method thereof Download PDFInfo
- Publication number
- WO2009093825A3 WO2009093825A3 PCT/KR2009/000223 KR2009000223W WO2009093825A3 WO 2009093825 A3 WO2009093825 A3 WO 2009093825A3 KR 2009000223 W KR2009000223 W KR 2009000223W WO 2009093825 A3 WO2009093825 A3 WO 2009093825A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor package
- fabricating method
- semiconductor chip
- lead frames
- lead
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49537—Plurality of lead frames mounted in one device
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49589—Capacitor integral with or on the leadframe
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
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Abstract
A semiconductor package disclosed in an embodiment of this invention includes; a semiconductor chip; a first lead frame to which said semiconductor chip is bonded; plural second lead frames in at least one side of said first lead frame; a passive device mounted at some of said second lead frames; and a wire which connects said semiconductor chip to said second lead frames electrically.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080006599A KR101469975B1 (en) | 2008-01-22 | 2008-01-22 | Multi chip module and manufacturing method thereof |
KR10-2008-0006599 | 2008-01-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009093825A2 WO2009093825A2 (en) | 2009-07-30 |
WO2009093825A3 true WO2009093825A3 (en) | 2009-11-05 |
Family
ID=40901531
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/KR2009/000223 WO2009093825A2 (en) | 2008-01-22 | 2009-01-15 | Semiconductor package and fabricating method thereof |
Country Status (2)
Country | Link |
---|---|
KR (1) | KR101469975B1 (en) |
WO (1) | WO2009093825A2 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004047811A (en) * | 2002-07-12 | 2004-02-12 | Fujitsu Ltd | Semiconductor device with built-in passive element |
JP2004119882A (en) * | 2002-09-27 | 2004-04-15 | Sony Corp | Semiconductor device |
KR20050095552A (en) * | 2004-03-26 | 2005-09-29 | 산요덴키가부시키가이샤 | Circuit device |
JP2007048962A (en) * | 2005-08-10 | 2007-02-22 | Fujitsu Ltd | Semiconductor device and manufacturing method thereof |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100618541B1 (en) * | 1999-07-06 | 2006-08-31 | 삼성전자주식회사 | Method for fabricating multi-chip semiconductor package |
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2008
- 2008-01-22 KR KR1020080006599A patent/KR101469975B1/en active IP Right Grant
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2009
- 2009-01-15 WO PCT/KR2009/000223 patent/WO2009093825A2/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004047811A (en) * | 2002-07-12 | 2004-02-12 | Fujitsu Ltd | Semiconductor device with built-in passive element |
JP2004119882A (en) * | 2002-09-27 | 2004-04-15 | Sony Corp | Semiconductor device |
KR20050095552A (en) * | 2004-03-26 | 2005-09-29 | 산요덴키가부시키가이샤 | Circuit device |
JP2007048962A (en) * | 2005-08-10 | 2007-02-22 | Fujitsu Ltd | Semiconductor device and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
KR101469975B1 (en) | 2014-12-11 |
KR20090080696A (en) | 2009-07-27 |
WO2009093825A2 (en) | 2009-07-30 |
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