JP2007048920A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2007048920A5 JP2007048920A5 JP2005231473A JP2005231473A JP2007048920A5 JP 2007048920 A5 JP2007048920 A5 JP 2007048920A5 JP 2005231473 A JP2005231473 A JP 2005231473A JP 2005231473 A JP2005231473 A JP 2005231473A JP 2007048920 A5 JP2007048920 A5 JP 2007048920A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- back surface
- wafer
- manufacturing
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 26
- 238000004519 manufacturing process Methods 0.000 claims 8
- 230000001681 protective Effects 0.000 claims 8
- 238000000034 method Methods 0.000 claims 2
Claims (8)
(b)リング状の搬送治具の内周が前記半導体ウエハの外周を取り囲むように前記搬送治具の第2主面が前記保護テープに固定された状態で、前記半導体ウエハの前記第1裏面を研削する工程、
(c)前記保護テープに固定された前記搬送治具の前記第1主面とは反対側の第2裏面と、前記半導体ウエハの前記第1裏面にダイシングテープを貼り付ける工程、
(d)前記半導体ウエハの前記第1主面と、前記搬送治具の前記第2主面から、前記保護テープを剥離する工程、
(e)前記半導体ウエハの前記分割領域に沿って、前記半導体ウエハを分割する工程、
を含むことを特徴とする半導体装置の製造方法。 (A) A protective tape is affixed to the first main surface of a semiconductor wafer having a first main surface in which a plurality of chip regions are defined by divided regions and a first back surface opposite to the first main surface. Process,
(B) The first back surface of the semiconductor wafer in a state where the second main surface of the transfer jig is fixed to the protective tape so that the inner periphery of the ring-shaped transfer jig surrounds the outer periphery of the semiconductor wafer. Grinding process,
(C) a step of attaching a dicing tape to the second back surface opposite to the first main surface of the transport jig fixed to the protective tape, and the first back surface of the semiconductor wafer;
(D) peeling the protective tape from the first main surface of the semiconductor wafer and the second main surface of the transfer jig;
(E) dividing the semiconductor wafer along the divided region of the semiconductor wafer;
A method for manufacturing a semiconductor device, comprising:
前記半導体ウエハの前記複数のチップ領域のそれぞれには、半導体素子が形成されていることを特徴とする半導体装置の製造方法。 In claim 1,
A semiconductor device manufacturing method , wherein a semiconductor element is formed in each of the plurality of chip regions of the semiconductor wafer .
前記(b)工程では、前記半導体ウエハが固定された前記保護テープをウエハステージ上に配置し、前記保護テープに固定され、前記半導体ウエハの厚さよりも厚く形成された前記搬送治具の前記第2裏面を前記半導体ウエハの前記第1裏面より低くし、グラインディングホイールを用いて前記半導体ウエハの前記第1裏面を研削することを特徴とする半導体装置の製造方法。 In claim 1,
In the step (b), the protective tape to which the semiconductor wafer is fixed is disposed on a wafer stage, and is fixed to the protective tape, and the transfer jig is formed thicker than the thickness of the semiconductor wafer. 2. A method of manufacturing a semiconductor device, comprising lowering a back surface lower than the first back surface of the semiconductor wafer and grinding the first back surface of the semiconductor wafer using a grinding wheel .
前記(b)工程では、回転する前記グラインディングホイールを、回転する前記ウエハステージ上に配置された前記半導体ウエハの一部と前記搬送治具の一部を覆うように接触させることで、前記半導体ウエハの前記第1裏面を研削することを特徴とする半導体装置の製造方法。 In claim 3,
In the step (b), the rotating grinding wheel is brought into contact so as to cover a part of the semiconductor wafer disposed on the rotating wafer stage and a part of the transfer jig. A method of manufacturing a semiconductor device , comprising grinding the first back surface of a wafer .
前記ウエハステージは、前記半導体ウエハの下側に位置する第1保持面と、前記第1保持面よりも低く、前記搬送治具の下側に位置する第2保持面とを有し、
前記搬送治具を前記第2保持面に向かって引き下げることで、前記搬送治具の前記第2裏面を前記半導体ウエハの前記第1裏面より低くすることを特徴とする半導体装置の製造方法。 In claim 4,
The wafer stage has a first holding surface located below the semiconductor wafer, and a second holding surface located lower than the first holding surface and below the transfer jig,
A method of manufacturing a semiconductor device, characterized in that the second back surface of the transport jig is made lower than the first back surface of the semiconductor wafer by lowering the transport jig toward the second holding surface .
前記保護テープは、前記ウエハステージの前記第1保持面に吸着されていることを特徴とする半導体装置の製造方法。The method for manufacturing a semiconductor device, wherein the protective tape is adsorbed to the first holding surface of the wafer stage.
前記ウエハステージの前記第1保持面は、傾斜していることを特徴とする半導体装置の製造方法。The method of manufacturing a semiconductor device, wherein the first holding surface of the wafer stage is inclined.
前記(c)工程では、前記搬送治具の前記第2裏面に前記ダイシングテープを貼り付け、前記保護テープ側から前記半導体ウエハを前記ダイシングテープに押し付けることで、前記ダイシングテープに前記半導体ウエハの前記第1裏面を貼り付けることを特徴とする半導体装置の製造方法。In the step (c), the dicing tape is attached to the second back surface of the transport jig, and the semiconductor wafer is pressed against the dicing tape from the protective tape side, whereby the semiconductor wafer is applied to the dicing tape. A method for manufacturing a semiconductor device, comprising attaching a first back surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005231473A JP4848153B2 (en) | 2005-08-10 | 2005-08-10 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005231473A JP4848153B2 (en) | 2005-08-10 | 2005-08-10 | Manufacturing method of semiconductor device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2007048920A JP2007048920A (en) | 2007-02-22 |
JP2007048920A5 true JP2007048920A5 (en) | 2008-09-18 |
JP4848153B2 JP4848153B2 (en) | 2011-12-28 |
Family
ID=37851506
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005231473A Expired - Fee Related JP4848153B2 (en) | 2005-08-10 | 2005-08-10 | Manufacturing method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4848153B2 (en) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006000687B4 (en) | 2006-01-03 | 2010-09-09 | Thallner, Erich, Dipl.-Ing. | Combination of a carrier and a wafer, device for separating the combination and methods for handling a carrier and a wafer |
JP2007294748A (en) * | 2006-04-26 | 2007-11-08 | Tokyo Seimitsu Co Ltd | Wafer transporting method |
JP4729003B2 (en) * | 2007-06-08 | 2011-07-20 | リンテック株式会社 | Processing method for brittle members |
JP5276823B2 (en) * | 2007-10-04 | 2013-08-28 | 株式会社ディスコ | Wafer grinding equipment |
JP5272397B2 (en) * | 2007-12-13 | 2013-08-28 | 日立化成株式会社 | Adhesive film application apparatus and adhesive film application method |
JP5253996B2 (en) * | 2008-12-26 | 2013-07-31 | 株式会社ディスコ | Work dividing method and tape expansion device |
EP2230683B1 (en) | 2009-03-18 | 2016-03-16 | EV Group GmbH | Device and method for releasing a wafer from a holder |
JP5415181B2 (en) * | 2009-08-19 | 2014-02-12 | 株式会社ディスコ | Wafer grinding equipment |
EP2667407B1 (en) | 2009-09-01 | 2019-01-23 | EV Group GmbH | Method for releasing a product substrate (e.g., a semiconductor wafer) from a support substrate using a solvent and acoustic waves by deformation of a flexible film mounted on a frame |
EP2523209B1 (en) | 2010-04-23 | 2017-03-08 | EV Group GmbH | Device and method for releasing a product substrate from a holder substrate |
JP2012160515A (en) * | 2011-01-31 | 2012-08-23 | Disco Abrasive Syst Ltd | Workpiece processing method |
JP6087565B2 (en) * | 2012-10-03 | 2017-03-01 | 株式会社ディスコ | Grinding apparatus and grinding method |
JP5580439B2 (en) * | 2013-01-29 | 2014-08-27 | アギア システムズ インコーポレーテッド | Method for separating a semiconductor wafer into individual semiconductor dies using implanted impurities |
JP6822857B2 (en) * | 2017-01-17 | 2021-01-27 | 株式会社ディスコ | Carry-out mechanism |
JP7404073B2 (en) * | 2018-02-07 | 2023-12-25 | リンテック株式会社 | Adhesive tape for semiconductor processing |
KR20200102612A (en) | 2019-02-21 | 2020-09-01 | 세메스 주식회사 | Substrate treating apparatus and substrate treating method |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3097619B2 (en) * | 1997-10-02 | 2000-10-10 | 日本電気株式会社 | Method of manufacturing field emission cold cathode |
JP4731050B2 (en) * | 2001-06-15 | 2011-07-20 | 株式会社ディスコ | Processing method of semiconductor wafer |
JP4152295B2 (en) * | 2003-10-23 | 2008-09-17 | Necエンジニアリング株式会社 | Tape applicator |
-
2005
- 2005-08-10 JP JP2005231473A patent/JP4848153B2/en not_active Expired - Fee Related
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2007048920A5 (en) | ||
JP2005340423A5 (en) | ||
TW201719814A (en) | Method of processing wafer | |
EP1681713A4 (en) | Surface-protecting sheet and semiconductor wafer lapping method | |
US7914694B2 (en) | Semiconductor wafer handler | |
TW200605227A (en) | Semiconductor device and manufacturing method thereof | |
JP2003309221A5 (en) | ||
JP2009076658A5 (en) | ||
JP2009202259A5 (en) | ||
JP2010251632A5 (en) | ||
JP5933448B2 (en) | High temperature chuck and method of using the same | |
TW200634918A (en) | Fabrication process of semiconductor device and polishing method | |
JP2007294748A (en) | Wafer transporting method | |
JP2009246195A (en) | Adhesive sheet and processing method of semiconductor wafer using the same | |
JP2012204545A (en) | Manufacturing method of semiconductor device and manufacturing apparatus | |
JP5197037B2 (en) | Wafer processing method for processing a wafer on which bumps are formed | |
JP2004288725A (en) | Method of manufacturing semiconductor device, sealing member used for method, and feeder of sealing member | |
JP2005340431A5 (en) | ||
US7749866B2 (en) | Method for sawing a wafer and method for manufacturing a semiconductor package by using a multiple-type tape | |
WO2013152296A1 (en) | Semiconductor wafer processing | |
JP2007036129A5 (en) | ||
TW201921545A (en) | Substrate processing system and substrate processing method | |
JP4041344B2 (en) | Brittle material transfer equipment | |
JP2008543088A (en) | Release tape carrier | |
JPS6323655B2 (en) |