JP2006525750A5 - - Google Patents
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- Publication number
- JP2006525750A5 JP2006525750A5 JP2006509997A JP2006509997A JP2006525750A5 JP 2006525750 A5 JP2006525750 A5 JP 2006525750A5 JP 2006509997 A JP2006509997 A JP 2006509997A JP 2006509997 A JP2006509997 A JP 2006509997A JP 2006525750 A5 JP2006525750 A5 JP 2006525750A5
- Authority
- JP
- Japan
- Prior art keywords
- periodic waveform
- gated
- periodic
- generates
- enable signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000737 periodic effect Effects 0.000 claims 10
- 230000003111 delayed effect Effects 0.000 claims 2
- 230000001960 triggered effect Effects 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/426,263 US6882206B2 (en) | 2003-04-30 | 2003-04-30 | Enabling method to prevent glitches in waveform of arbitrary phase |
| PCT/US2004/011415 WO2004100373A1 (en) | 2003-04-30 | 2004-04-14 | Enabling method to prevent glitches in waveform |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006525750A JP2006525750A (ja) | 2006-11-09 |
| JP2006525750A5 true JP2006525750A5 (enExample) | 2007-06-14 |
Family
ID=33309828
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006509997A Pending JP2006525750A (ja) | 2003-04-30 | 2004-04-14 | 波形グリッチ防止方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6882206B2 (enExample) |
| EP (1) | EP1618660B1 (enExample) |
| JP (1) | JP2006525750A (enExample) |
| WO (1) | WO2004100373A1 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102004063199B4 (de) * | 2004-12-23 | 2010-11-25 | Atmel Automotive Gmbh | Pulsgenerator und Verfahren zur Erzeugung einer Pulsfolge |
| EP1705815B1 (en) * | 2005-03-22 | 2011-08-24 | Infineon Technologies AG | A digital clock switching means |
| JP4803298B2 (ja) * | 2009-11-10 | 2011-10-26 | エプソンイメージングデバイス株式会社 | クロック発生回路 |
| US9337820B1 (en) * | 2015-02-23 | 2016-05-10 | Qualcomm Incorporated | Pulse width recovery in clock dividers |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62180607A (ja) * | 1986-02-04 | 1987-08-07 | Fujitsu Ltd | 半導体集積回路 |
| JPH02296410A (ja) * | 1989-05-11 | 1990-12-07 | Mitsubishi Electric Corp | 遅延回路 |
| JP3101315B2 (ja) * | 1990-10-23 | 2000-10-23 | 富士通株式会社 | 時間自動調整回路 |
| JPH05233091A (ja) * | 1992-02-18 | 1993-09-10 | Nec Corp | クロック発生回路 |
| JP2573787B2 (ja) * | 1993-05-18 | 1997-01-22 | 株式会社メガチップス | パルス幅変調回路 |
| US5574753A (en) * | 1993-12-23 | 1996-11-12 | Unisys Corporation | Glitch free clock start/stop control circuit for outputting a single clock signal and a single sync signal from a plurality of sync signal inputs and a plurality of clock signal inputs |
| JP3477803B2 (ja) * | 1994-03-18 | 2003-12-10 | ソニー株式会社 | ディレー用デバイス及び遅延位相出力装置 |
| JP3292584B2 (ja) * | 1994-04-08 | 2002-06-17 | 株式会社東芝 | タイミング発生装置 |
| US5481230A (en) | 1994-11-14 | 1996-01-02 | Tektronix, Inc. | Phase modulator having individually placed edges |
| US5652536A (en) * | 1995-09-25 | 1997-07-29 | Cirrus Logic, Inc. | Non-glitch clock switching circuit |
| US5808486A (en) * | 1997-04-28 | 1998-09-15 | Ag Communication Systems Corporation | Glitch free clock enable circuit |
| JPH11218564A (ja) * | 1998-01-30 | 1999-08-10 | Ando Electric Co Ltd | タイミング信号発生回路 |
-
2003
- 2003-04-30 US US10/426,263 patent/US6882206B2/en not_active Expired - Lifetime
-
2004
- 2004-04-14 WO PCT/US2004/011415 patent/WO2004100373A1/en not_active Ceased
- 2004-04-14 EP EP04760541.5A patent/EP1618660B1/en not_active Expired - Lifetime
- 2004-04-14 JP JP2006509997A patent/JP2006525750A/ja active Pending