JP2007226942A5 - - Google Patents

Download PDF

Info

Publication number
JP2007226942A5
JP2007226942A5 JP2007008412A JP2007008412A JP2007226942A5 JP 2007226942 A5 JP2007226942 A5 JP 2007226942A5 JP 2007008412 A JP2007008412 A JP 2007008412A JP 2007008412 A JP2007008412 A JP 2007008412A JP 2007226942 A5 JP2007226942 A5 JP 2007226942A5
Authority
JP
Japan
Prior art keywords
clock
write
module
hdc
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007008412A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007226942A (ja
Filing date
Publication date
Priority claimed from US11/481,109 external-priority patent/US7646555B2/en
Application filed filed Critical
Publication of JP2007226942A publication Critical patent/JP2007226942A/ja
Publication of JP2007226942A5 publication Critical patent/JP2007226942A5/ja
Pending legal-status Critical Current

Links

JP2007008412A 2006-01-17 2007-01-17 ループバックを用いたストレージシステムエレクトロニクスのテスティング Pending JP2007226942A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US75943106P 2006-01-17 2006-01-17
US80879906P 2006-05-26 2006-05-26
US11/481,109 US7646555B2 (en) 2006-01-17 2006-07-05 Testing storage system electronics using loopback

Publications (2)

Publication Number Publication Date
JP2007226942A JP2007226942A (ja) 2007-09-06
JP2007226942A5 true JP2007226942A5 (enExample) 2010-02-25

Family

ID=37964115

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007008412A Pending JP2007226942A (ja) 2006-01-17 2007-01-17 ループバックを用いたストレージシステムエレクトロニクスのテスティング

Country Status (6)

Country Link
US (2) US7646555B2 (enExample)
EP (1) EP1808860A1 (enExample)
JP (1) JP2007226942A (enExample)
CN (1) CN101004919B (enExample)
SG (1) SG134249A1 (enExample)
TW (1) TWI406272B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7716540B2 (en) * 2007-01-03 2010-05-11 Dell Products L.P. Standalone data storage device electromagnetic interference test setup and procedure
TWI402671B (zh) * 2008-09-05 2013-07-21 Hon Hai Prec Ind Co Ltd 一種sata介面測試系統及方法
US8607104B2 (en) * 2010-12-20 2013-12-10 Advanced Micro Devices, Inc. Memory diagnostics system and method with hardware-based read/write patterns
US20240205172A1 (en) * 2022-12-20 2024-06-20 Dell Products L.P. Packet forwarding in an information handling system with loopback configuration

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5729511A (en) * 1991-02-15 1998-03-17 Discovision Associates Optical disc system having servo motor and servo error detection assembly operated relative to monitored quad sum signal
US5479098A (en) * 1993-03-15 1995-12-26 Trace Mountain Products, Inc. Loop-back circuit for testing a magnetic recording system with simultaneous read and write functions
JP2882245B2 (ja) * 1993-07-29 1999-04-12 日本電気株式会社 磁気ディスク制御装置の自己診断方式
TW299439B (enExample) * 1995-04-11 1997-03-01 Discovision Ass
JP3790329B2 (ja) * 1997-06-27 2006-06-28 富士通株式会社 信号ループバック装置
US6397042B1 (en) * 1998-03-06 2002-05-28 Texas Instruments Incorporated Self test of an electronic device
US7099278B2 (en) * 2001-08-10 2006-08-29 Broadcom Corporation Line loop back for very high speed application
JP2004030797A (ja) * 2002-06-26 2004-01-29 Nec Micro Systems Ltd リードチャネル半導体集積回路
JP2004030827A (ja) * 2002-06-27 2004-01-29 Fujitsu Ltd 記録データ読み取り装置及び記録データ読み取り方法
JP2005158107A (ja) * 2003-11-21 2005-06-16 Ricoh Co Ltd 光ディスク記録再生装置の信号処理回路
US7477467B1 (en) * 2003-11-25 2009-01-13 Marvell International Ltd. Preamp circuit including a loopback mode for data storage
US7250751B2 (en) * 2005-07-26 2007-07-31 Marvell International Ltd. Integrated systems testing

Similar Documents

Publication Publication Date Title
TWI257099B (en) Integrated circuit device for providing selectively variable write latency and method thereof
JP2008021406A5 (enExample)
CN109582596A (zh) 从具有不同读取和写入定时的模式寄存器进行读取
JP2013524383A5 (enExample)
JP2017523489A (ja) プログラム可能な遅延を用いてダイナミックランダムアクセスメモリ(dram)コマンドを生成するメモリ物理レイヤインタフェースロジック
JP2011528154A5 (enExample)
JP2007226942A5 (enExample)
JP2009093227A5 (enExample)
US10976945B2 (en) Memory devices with multiple sets of latencies and methods for operating the same
KR100928037B1 (ko) 저장 용량과 파일 시스템을 동적으로 확장, 축소가 가능한반도체 저장매체 디스크
EP1860649A4 (en) DATA PLAYBACK DEVICE
WO2008107994A1 (ja) 情報再生装置及び方法、並びにコンピュータプログラム
EP2117229A3 (en) Camera
JP2008305349A5 (enExample)
JP2013527541A5 (enExample)
JP2011041024A5 (ja) シリアル通信装置
CN110349603A (zh) 半导体存储器件及其操作方法
TW200746085A (en) Testing storage system electronics using loopback
JP2009064360A5 (enExample)
JP2010134904A5 (enExample)
TW200643724A (en) System for improving bandwidth among a plurality of memory controllers and method thereof
JP2006236105A5 (enExample)
JP2006050389A5 (enExample)
CN104123247A (zh) 接口电路及串行接口存储器的存取模式选择方法
TW200723292A (en) Semiconductor memory device