JP2006520089A - 基板上に多層素子を製造する方法およびシステム - Google Patents

基板上に多層素子を製造する方法およびシステム Download PDF

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JP2006520089A
JP2006520089A JP2005500831A JP2005500831A JP2006520089A JP 2006520089 A JP2006520089 A JP 2006520089A JP 2005500831 A JP2005500831 A JP 2005500831A JP 2005500831 A JP2005500831 A JP 2005500831A JP 2006520089 A JP2006520089 A JP 2006520089A
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layer
semiconductor layer
bonded
substrate
layers
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Japanese (ja)
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JP2006520089A5 (enExample
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ファリス，サデグ，エム．
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レビオ インコーポレーティッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C99/00—Subject matter not provided for in other groups of this subclass
    • B81C99/0035—Testing
    • B81C99/0045—End test of the packaged device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/207—Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Micromachines (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
JP2005500831A 2002-11-20 2003-11-20 基板上に多層素子を製造する方法およびシステム Withdrawn JP2006520089A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US42812502P 2002-11-20 2002-11-20
PCT/US2003/037304 WO2004112089A2 (en) 2002-11-20 2003-11-20 Method and system for fabricating multi layer devices on a substrate

Publications (2)

Publication Number Publication Date
JP2006520089A true JP2006520089A (ja) 2006-08-31
JP2006520089A5 JP2006520089A5 (enExample) 2007-01-11

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005500831A Withdrawn JP2006520089A (ja) 2002-11-20 2003-11-20 基板上に多層素子を製造する方法およびシステム

Country Status (8)

Country Link
US (1) US7056751B2 (enExample)
EP (1) EP1573788A3 (enExample)
JP (1) JP2006520089A (enExample)
KR (1) KR20050083935A (enExample)
CN (1) CN1742358A (enExample)
AU (1) AU2003304218A1 (enExample)
TW (3) TW200421497A (enExample)
WO (1) WO2004112089A2 (enExample)

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* Cited by examiner, † Cited by third party
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FR2839505B1 (fr) * 2002-05-07 2005-07-15 Univ Claude Bernard Lyon Procede pour modifier les proprietes d'une couche mince et substrat faisant application du procede
US7659631B2 (en) * 2006-10-12 2010-02-09 Hewlett-Packard Development Company, L.P. Interconnection between different circuit types
US20090026524A1 (en) * 2007-07-27 2009-01-29 Franz Kreupl Stacked Circuits
EP2483075A1 (en) * 2009-09-30 2012-08-08 Mycrolab Diagnostics Pty Ltd Selective bond reduction in microfluidic devices
KR101348655B1 (ko) * 2010-03-24 2014-01-08 한국전자통신연구원 미세유체 제어 장치 및 그 제조 방법
US8829329B2 (en) * 2010-08-18 2014-09-09 International Business Machines Corporation Solar cell and battery 3D integration
DE102010041763A1 (de) 2010-09-30 2012-04-05 Siemens Aktiengesellschaft Mikromechanisches Substrat
US10543662B2 (en) 2012-02-08 2020-01-28 Corning Incorporated Device modified substrate article and methods for making
US9340443B2 (en) 2012-12-13 2016-05-17 Corning Incorporated Bulk annealing of glass sheets
US10086584B2 (en) 2012-12-13 2018-10-02 Corning Incorporated Glass articles and methods for controlled bonding of glass sheets with carriers
TWI617437B (zh) 2012-12-13 2018-03-11 康寧公司 促進控制薄片與載體間接合之處理
US10014177B2 (en) 2012-12-13 2018-07-03 Corning Incorporated Methods for processing electronic devices
US10510576B2 (en) 2013-10-14 2019-12-17 Corning Incorporated Carrier-bonding methods and articles for semiconductor and interposer processing
JP6770432B2 (ja) 2014-01-27 2020-10-14 コーニング インコーポレイテッド 薄いシートの担体との制御された結合のための物品および方法
CN106457758B (zh) 2014-04-09 2018-11-16 康宁股份有限公司 装置改性的基材制品及其制备方法
EP3297824A1 (en) 2015-05-19 2018-03-28 Corning Incorporated Articles and methods for bonding sheets with carriers
EP3313799B1 (en) 2015-06-26 2022-09-07 Corning Incorporated Methods and articles including a sheet and a carrier
US20170186730A1 (en) * 2015-12-26 2017-06-29 Invensas Corporation System and method for providing 3d wafer assembly with known-good-dies
KR102627237B1 (ko) * 2016-06-01 2024-01-23 퀀텀-에스아이 인코포레이티드 분자들을 검출 및 분석하기 위한 통합 디바이스
TW201825623A (zh) 2016-08-30 2018-07-16 美商康寧公司 用於片材接合的矽氧烷電漿聚合物
TWI810161B (zh) 2016-08-31 2023-08-01 美商康寧公司 具以可控制式黏結的薄片之製品及製作其之方法
JP7260523B2 (ja) 2017-08-18 2023-04-18 コーニング インコーポレイテッド ポリカチオン性高分子を使用した一時的結合
CN111615567B (zh) 2017-12-15 2023-04-14 康宁股份有限公司 用于处理基板的方法和用于制备包括粘合片材的制品的方法
US11315789B2 (en) * 2019-04-24 2022-04-26 Tokyo Electron Limited Method and structure for low density silicon oxide for fusion bonding and debonding
JP7367055B2 (ja) 2020-02-20 2023-10-23 長江存儲科技有限責任公司 Ｘｔａｃｋｉｎｇアーキテクチャを有するＤＲＡＭメモリデバイス
US11829077B2 (en) * 2020-12-11 2023-11-28 Kla Corporation System and method for determining post bonding overlay
JP7636977B2 (ja) 2021-06-24 2025-02-27 浜松ホトニクス株式会社 Ｘ線発生装置
JP7097480B1 (ja) * 2021-06-24 2022-07-07 浜松ホトニクス株式会社 Ｘ線管、ｘ線発生装置、及び窓部材の製造方法
JP7636118B2 (ja) * 2021-07-15 2025-02-26 株式会社ディスコ 積層デバイスウェーハの形成方法
US11782411B2 (en) 2021-07-28 2023-10-10 Kla Corporation System and method for mitigating overlay distortion patterns caused by a wafer bonding tool
US12645152B2 (en) 2021-07-28 2026-06-02 Kla Corporation System and method for optimizing through silicon via overlay
US12644696B2 (en) 2021-07-28 2026-06-02 Kla Corporation System and method for detecting particle contamination on a bonding tool
CN114035030B (zh) * 2021-11-05 2023-10-24 爱迪特（秦皇岛）科技股份有限公司 一种测试组件
US12674662B2 (en) 2022-09-16 2026-07-07 KLA Coporation System and method for acquiring alignment measurements of structures of a bonded sample
CN116387256A (zh) * 2023-04-26 2023-07-04 上海易卜半导体有限公司 芯片堆栈及制备方法
CN119275214B (zh) * 2024-12-10 2025-02-25 电子科技大学 一种用于腐蚀工艺监控的表征器件

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11251517A (ja) * 1998-02-27 1999-09-17 Seiko Epson Corp ３次元デバイスの製造方法
JP2002164354A (ja) * 2000-09-14 2002-06-07 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

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JPS63155731A (ja) * 1986-12-19 1988-06-28 Agency Of Ind Science & Technol 半導体装置
US5094697A (en) * 1989-06-16 1992-03-10 Canon Kabushiki Kaisha Photovoltaic device and method for producing the same
JP3214631B2 (ja) * 1992-01-31 2001-10-02 キヤノン株式会社 半導体基体及びその作製方法
US6133582A (en) * 1998-05-14 2000-10-17 Lightspeed Semiconductor Corporation Methods and apparatuses for binning partially completed integrated circuits based upon test results
US6965895B2 (en) * 2001-07-16 2005-11-15 Applied Materials, Inc. Method and apparatus for analyzing manufacturing data

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11251517A (ja) * 1998-02-27 1999-09-17 Seiko Epson Corp ３次元デバイスの製造方法
JP2002164354A (ja) * 2000-09-14 2002-06-07 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

Also Published As

Publication number Publication date
AU2003304218A8 (en) 2005-01-04
KR20050083935A (ko) 2005-08-26
TW200428538A (en) 2004-12-16
AU2003304218A1 (en) 2005-01-04
CN1742358A (zh) 2006-03-01
WO2004112089A2 (en) 2004-12-23
EP1573788A3 (en) 2005-11-02
TW200423261A (en) 2004-11-01
US20040241888A1 (en) 2004-12-02
TW200421497A (en) 2004-10-16
EP1573788A2 (en) 2005-09-14
US7056751B2 (en) 2006-06-06
WO2004112089A3 (en) 2005-09-15

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