JP2006510966A - カプセル化ハードウェアの構成／制御 - Google Patents

カプセル化ハードウェアの構成／制御 Download PDF

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Publication number
JP2006510966A
JP2006510966A JP2004560121A JP2004560121A JP2006510966A JP 2006510966 A JP2006510966 A JP 2006510966A JP 2004560121 A JP2004560121 A JP 2004560121A JP 2004560121 A JP2004560121 A JP 2004560121A JP 2006510966 A JP2006510966 A JP 2006510966A
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JP
Japan
Prior art keywords
configuration
subsystem
control
hardware
control unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2004560121A
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English (en)
Japanese (ja)
Other versions
JP2006510966A5 (enExample
Inventor
ロニー、ゴフ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of JP2006510966A publication Critical patent/JP2006510966A/ja
Publication of JP2006510966A5 publication Critical patent/JP2006510966A5/ja
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4498—Finite state machines
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Stored Programmes (AREA)
  • Information Transfer Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
JP2004560121A 2002-12-18 2003-12-17 カプセル化ハードウェアの構成／制御 Withdrawn JP2006510966A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43473802P 2002-12-18 2002-12-18
PCT/IB2003/006008 WO2004055668A2 (en) 2002-12-18 2003-12-17 Encapsulated hardware configuration/control

Publications (2)

Publication Number Publication Date
JP2006510966A true JP2006510966A (ja) 2006-03-30
JP2006510966A5 JP2006510966A5 (enExample) 2007-02-08

Family

ID=32595302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004560121A Withdrawn JP2006510966A (ja) 2002-12-18 2003-12-17 カプセル化ハードウェアの構成／制御

Country Status (6)

Country Link
US (1) US7788416B2 (enExample)
EP (1) EP1576468A3 (enExample)
JP (1) JP2006510966A (enExample)
CN (1) CN100357890C (enExample)
AU (1) AU2003292455A1 (enExample)
WO (1) WO2004055668A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9104894B2 (en) * 2005-12-16 2015-08-11 Hewlett-Packard Development Company, L.P. Hardware enablement using an interface
US7650437B2 (en) 2006-08-01 2010-01-19 Research In Motion Limited System and method for managing hardware configuration parameters
EP1909172A1 (en) * 2006-08-01 2008-04-09 Research In Motion Limited System and method for managing hardware configuration parameters
TW201001289A (en) * 2008-06-27 2010-01-01 Silicon Motion Inc Embedded system and hardware setting method
CN105095149B (zh) * 2015-08-10 2018-10-16 青岛中星微电子有限公司 一种片上系统参数的批处理方法和装置
US11138140B2 (en) 2020-01-31 2021-10-05 Hewlett Packard Enterprise Development Lp Configuring first subsystem with a master processor and a second subsystem with a slave processor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6240496B1 (en) * 1989-11-24 2001-05-29 Hyundai Electronics America Architecture and configuring method for a computer expansion board
US5333270A (en) * 1992-12-29 1994-07-26 National Semiconductor Corporation FDDI configuration management state machine controller
FR2700402B1 (fr) * 1993-01-13 1995-04-07 Sgs Thomson Microelectronics Microcontrôleur à mémoire électriquement programmable multimode.
CN100545828C (zh) * 1993-07-30 2009-09-30 佳能株式会社 控制连接到网络的网络设备的控制设备及其控制方法
WO1997049042A1 (en) * 1996-06-21 1997-12-24 Organic Systems, Inc. Dynamically reconfigurable hardware system for real-time control of processes
US5938764A (en) * 1996-10-23 1999-08-17 Micron Electronics, Inc. Apparatus for improved storage of computer system configuration information
US6222757B1 (en) * 1998-02-25 2001-04-24 Xilinx, Inc. Configuration memory architecture for FPGA
US6363437B1 (en) * 1999-01-07 2002-03-26 Telefonaktiebolaget Lm Ericsson (Publ) Plug and play I2C slave
US6542945B1 (en) * 1999-09-28 2003-04-01 Intel Corporation Instant configuration of a digital device
EP1102173A3 (en) * 1999-11-22 2005-01-19 Texas Instruments Incorporated Universal serial bus architecture
US6640262B1 (en) * 1999-12-20 2003-10-28 3Com Corporation Method and apparatus for automatically configuring a configurable integrated circuit
US6606670B1 (en) * 2000-08-16 2003-08-12 Microchip Technology Incorporated Circuit serial programming of default configuration
TW518502B (en) * 2001-07-13 2003-01-21 Prolific Technology Inc USB compound device and the realization method thereof
US7064579B2 (en) * 2002-07-08 2006-06-20 Viciciv Technology Alterable application specific integrated circuit (ASIC)

Also Published As

Publication number Publication date
WO2004055668A2 (en) 2004-07-01
WO2004055668A3 (en) 2005-08-04
EP1576468A3 (en) 2005-09-28
US20060123145A1 (en) 2006-06-08
CN100357890C (zh) 2007-12-26
AU2003292455A1 (en) 2004-07-09
US7788416B2 (en) 2010-08-31
AU2003292455A8 (en) 2004-07-09
CN1729450A (zh) 2006-02-01
EP1576468A2 (en) 2005-09-21

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