JP2006501669A5 - - Google Patents

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Publication number
JP2006501669A5
JP2006501669A5 JP2004541118A JP2004541118A JP2006501669A5 JP 2006501669 A5 JP2006501669 A5 JP 2006501669A5 JP 2004541118 A JP2004541118 A JP 2004541118A JP 2004541118 A JP2004541118 A JP 2004541118A JP 2006501669 A5 JP2006501669 A5 JP 2006501669A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004541118A
Other versions
JP2006501669A (ja
Filing date
Publication date
Priority claimed from FR0212120A external-priority patent/FR2845202B1/fr
Application filed filed Critical
Publication of JP2006501669A publication Critical patent/JP2006501669A/ja
Publication of JP2006501669A5 publication Critical patent/JP2006501669A5/ja
Pending legal-status Critical Current

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JP2004541118A 2002-10-01 2003-09-26 半導体材料のウエハのための高速アニーリングプロセス Pending JP2006501669A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0212120A FR2845202B1 (fr) 2002-10-01 2002-10-01 Procede de recuit rapide de tranches de materiau semiconducteur.
PCT/IB2003/004590 WO2004032227A1 (en) 2002-10-01 2003-09-26 Rapid annealing process for wafers in semiconductor material

Publications (2)

Publication Number Publication Date
JP2006501669A JP2006501669A (ja) 2006-01-12
JP2006501669A5 true JP2006501669A5 (ja) 2006-04-27

Family

ID=31985363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004541118A Pending JP2006501669A (ja) 2002-10-01 2003-09-26 半導体材料のウエハのための高速アニーリングプロセス

Country Status (9)

Country Link
US (1) US7138344B2 (ja)
EP (1) EP1552553A1 (ja)
JP (1) JP2006501669A (ja)
KR (1) KR100758053B1 (ja)
CN (1) CN100336196C (ja)
AU (1) AU2003267793A1 (ja)
FR (1) FR2845202B1 (ja)
TW (1) TWI278936B (ja)
WO (1) WO2004032227A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008053521A (ja) * 2006-08-25 2008-03-06 Sumco Techxiv株式会社 シリコンウェーハの熱処理方法
KR100818842B1 (ko) * 2006-12-27 2008-04-01 주식회사 실트론 웨이퍼의 열처리시 슬립을 방지할 수 있는 웨이퍼 지지 핀및 웨이퍼의 열처리 방법
FR2938119B1 (fr) 2008-10-30 2011-04-22 Soitec Silicon On Insulator Procede de detachement de couches semi-conductrices a basse temperature
FR2941324B1 (fr) * 2009-01-22 2011-04-29 Soitec Silicon On Insulator Procede de dissolution de la couche d'oxyde dans la couronne d'une structure de type semi-conducteur sur isolant.
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3373390D1 (en) * 1983-03-18 1987-10-08 Acec Method of controlling the running of an electrical machine, and device using this method
US5359693A (en) * 1991-07-15 1994-10-25 Ast Elektronik Gmbh Method and apparatus for a rapid thermal processing of delicate components
JPH07321120A (ja) * 1994-05-25 1995-12-08 Komatsu Electron Metals Co Ltd シリコンウェーハの熱処理方法
JP3287524B2 (ja) * 1995-03-13 2002-06-04 三菱マテリアル株式会社 Soi基板の製造方法
JPH1012626A (ja) * 1996-06-26 1998-01-16 Sony Corp 半導体装置の製造方法
JP3450163B2 (ja) * 1997-09-12 2003-09-22 Necエレクトロニクス株式会社 半導体装置の製造方法
JPH11168106A (ja) * 1997-09-30 1999-06-22 Fujitsu Ltd 半導体基板の処理方法
FR2777115B1 (fr) * 1998-04-07 2001-07-13 Commissariat Energie Atomique Procede de traitement de substrats semi-conducteurs et structures obtenues par ce procede
JP3478141B2 (ja) * 1998-09-14 2003-12-15 信越半導体株式会社 シリコンウエーハの熱処理方法及びシリコンウエーハ
FR2797713B1 (fr) * 1999-08-20 2002-08-02 Soitec Silicon On Insulator Procede de traitement de substrats pour la microelectronique et substrats obtenus par ce procede
JP2002110688A (ja) * 2000-09-29 2002-04-12 Canon Inc Soiの熱処理方法及び製造方法

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