JP2006303266A - 半導体装置のリペア方法 - Google Patents
半導体装置のリペア方法 Download PDFInfo
- Publication number
- JP2006303266A JP2006303266A JP2005124483A JP2005124483A JP2006303266A JP 2006303266 A JP2006303266 A JP 2006303266A JP 2005124483 A JP2005124483 A JP 2005124483A JP 2005124483 A JP2005124483 A JP 2005124483A JP 2006303266 A JP2006303266 A JP 2006303266A
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- JP
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- Prior art keywords
- semiconductor device
- heat transfer
- transfer plate
- wiring board
- printed wiring
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 60
- 238000000034 method Methods 0.000 title claims abstract description 22
- 229910000679 solder Inorganic materials 0.000 claims abstract description 19
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 15
- 229920005989 resin Polymers 0.000 claims abstract description 14
- 239000011347 resin Substances 0.000 claims abstract description 14
- 238000010438 heat treatment Methods 0.000 claims description 26
- 230000002411 adverse Effects 0.000 abstract description 3
- 238000002844 melting Methods 0.000 abstract 1
- 230000008018 melting Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 20
- 238000010586 diagram Methods 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000002950 deficient Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000012360 testing method Methods 0.000 description 2
- 229920005992 thermoplastic resin Polymers 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 210000000078 claw Anatomy 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 238000005485 electric heating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 238000003079 width control Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/98—Methods for disconnecting semiconductor or solid-state bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
【解決手段】 半導体装置14のパッケージ上面よりも大きい良伝熱性の伝熱板22を熱硬化性樹脂24を用いてパッケージ上面の全面に密着させて接着し、伝熱板24にヒータツール30を押圧することにより伝熱板24および半導体装置14を加熱し、アンダーフィル18を軟化させかつはんだを溶融させると共に熱硬化性樹脂24を硬化させた状態で、引き剥がし具26を半導体装置14のパッケージ上面より外側へ突出した伝熱板24の突出部28に係合させて伝熱板24を半導体装置14と一体にしてプリント配線板12から剥がす。
【選択図】 図2
Description
12 プリント配線板(基板)
14 半導体装置(ICチップ)
16 はんだボール
18 アンダーフィル
22、22A、22B 伝熱板
22C 薄板(伝熱板)
24 熱硬化性樹脂
26、26A、26C、28D 引き剥がし具
28、28A、28C 突出部
30 ヒータツール
32 温度センサ
34 コントローラ
Claims (7)
- プリント配線板に加熱によりリペア可能なアンダーフィルを用いて固定された半導体装置を加熱することにより取外す半導体装置のリペア方法において、
1)前記半導体装置のパッケージ上面よりも大きい良伝熱性の伝熱板を熱硬化性樹脂を用いて前記パッケージ上面の全面に密着させて接着し、
2)前記伝熱板にヒータツールを押圧することにより前記伝熱板および前記半導体装置を加熱し、
3)前記アンダーフィルを軟化させかつはんだを溶融させると共に前記熱硬化性樹脂を硬化させた状態で、引き剥がし具を前記半導体装置のパッケージ上面より外側へ突出した前記伝熱板の突出部に係合させて前記伝熱板を前記半導体装置と一体にしてプリント配線板から剥がす、
ことを特徴とする半導体装置のリペア方法。 - 半導体装置ははんだボールによってプリント配線板に電気接続されアンダーフィルで固定されている請求項1の半導体装置のリペア方法。
- 伝熱板は上方から見て半導体装置の少なくとも対称位置に突出部を持ち、引き剥がし具はこれら対称位置の突出部に係合して伝熱板および半導体装置をプリント配線板から引き剥がす請求項1の半導体装置のリペア方法。
- 引き剥がし具は伝熱板を上方に引き揚げる請求項1の半導体装置のリペア方法。
- 引き剥がし具は、伝熱板の突出部の対称位置の一方を他方よりも速く引き揚げて伝熱板を傾けながらプリント配線板から引き剥がす請求項3の半導体装置のリペア方法。
- 伝熱板は可撓性の薄板である請求項1〜5のいずれかの半導体装置のリペア方法。
- 引き剥がし具は、上方から見て半導体装置の非対称な位置で伝熱板の突出部に係合して伝熱板および半導体装置をプリント配線板から引き剥がす請求項1の半導体装置のリペア方法。
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JP2005124483A JP3918004B2 (ja) | 2005-04-22 | 2005-04-22 | 半導体装置のリペア方法 |
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Publications (2)
Publication Number | Publication Date |
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JP2006303266A true JP2006303266A (ja) | 2006-11-02 |
JP3918004B2 JP3918004B2 (ja) | 2007-05-23 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016119336A (ja) * | 2014-12-18 | 2016-06-30 | 富士通株式会社 | 半導体部品分離方法 |
US10269762B2 (en) * | 2015-10-29 | 2019-04-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Rework process and tool design for semiconductor package |
US11563232B2 (en) | 2017-10-24 | 2023-01-24 | Lg Energy Solution, Ltd. | Lamination apparatus and method for secondary battery |
-
2005
- 2005-04-22 JP JP2005124483A patent/JP3918004B2/ja active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016119336A (ja) * | 2014-12-18 | 2016-06-30 | 富士通株式会社 | 半導体部品分離方法 |
US10269762B2 (en) * | 2015-10-29 | 2019-04-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Rework process and tool design for semiconductor package |
US11563232B2 (en) | 2017-10-24 | 2023-01-24 | Lg Energy Solution, Ltd. | Lamination apparatus and method for secondary battery |
Also Published As
Publication number | Publication date |
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JP3918004B2 (ja) | 2007-05-23 |
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