JP2006173460A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP2006173460A
JP2006173460A JP2004366029A JP2004366029A JP2006173460A JP 2006173460 A JP2006173460 A JP 2006173460A JP 2004366029 A JP2004366029 A JP 2004366029A JP 2004366029 A JP2004366029 A JP 2004366029A JP 2006173460 A JP2006173460 A JP 2006173460A
Authority
JP
Japan
Prior art keywords
semiconductor device
manufacturing
solder paste
insulating film
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004366029A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006173460A5 (https=
Inventor
Hiromi Shigihara
宏美 鴫原
Hisao Shigihara
久雄 鴫原
Akira Yajima
明 矢島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2004366029A priority Critical patent/JP2006173460A/ja
Priority to US11/300,308 priority patent/US20060131365A1/en
Publication of JP2006173460A publication Critical patent/JP2006173460A/ja
Publication of JP2006173460A5 publication Critical patent/JP2006173460A5/ja
Priority to US12/547,980 priority patent/US20090315179A1/en
Pending legal-status Critical Current

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00—Tools, devices or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06—Solder feeding devices; Solder melting pans
    • B23K3/0607—Solder feeding devices
    • B23K3/0623—Solder feeding devices for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
JP2004366029A 2004-12-17 2004-12-17 半導体装置の製造方法 Pending JP2006173460A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2004366029A JP2006173460A (ja) 2004-12-17 2004-12-17 半導体装置の製造方法
US11/300,308 US20060131365A1 (en) 2004-12-17 2005-12-15 Method of manufacturing a semiconductor device
US12/547,980 US20090315179A1 (en) 2004-12-17 2009-08-26 Semiconductor device having solder bumps protruding beyond insulating films

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004366029A JP2006173460A (ja) 2004-12-17 2004-12-17 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2006173460A true JP2006173460A (ja) 2006-06-29
JP2006173460A5 JP2006173460A5 (https=) 2009-08-13

Family

ID=36594430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004366029A Pending JP2006173460A (ja) 2004-12-17 2004-12-17 半導体装置の製造方法

Country Status (2)

Country Link
US (2) US20060131365A1 (https=)
JP (1) JP2006173460A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010076123A (ja) * 2008-09-24 2010-04-08 Dainippon Printing Co Ltd 導電性バンプ付き基板シート製造方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI278374B (en) * 2005-12-23 2007-04-11 Delta Electronics Inc Object and bonding method thereof
US8058163B2 (en) * 2008-08-07 2011-11-15 Flipchip International, Llc Enhanced reliability for semiconductor devices using dielectric encasement
KR101022942B1 (ko) 2008-11-12 2011-03-16 삼성전기주식회사 흐름 방지용 댐을 구비한 인쇄회로기판 및 그 제조방법
JP5587804B2 (ja) * 2011-01-21 2014-09-10 日本特殊陶業株式会社 電子部品実装用配線基板の製造方法、電子部品実装用配線基板、及び電子部品付き配線基板の製造方法
US9966350B2 (en) * 2011-06-06 2018-05-08 Maxim Integrated Products, Inc. Wafer-level package device
US9761549B2 (en) * 2012-11-08 2017-09-12 Tongfu Microelectronics Co., Ltd. Semiconductor device and fabrication method
JP2014192476A (ja) * 2013-03-28 2014-10-06 Fujitsu Ltd プリント基板の半田実装方法及び半田実装構造

Citations (2)

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JP2003046230A (ja) * 2001-08-02 2003-02-14 Seiko Instruments Inc 構造体及びこの構造体を用いた実装方法
JP2004342904A (ja) * 2003-05-16 2004-12-02 Murata Mfg Co Ltd 電子回路装置および電子回路装置の製造方法

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US5381848A (en) * 1993-09-15 1995-01-17 Lsi Logic Corporation Casting of raised bump contacts on a substrate
US5478700A (en) * 1993-12-21 1995-12-26 International Business Machines Corporation Method for applying bonding agents to pad and/or interconnection sites in the manufacture of electrical circuits using a bonding agent injection head
US5492266A (en) * 1994-08-31 1996-02-20 International Business Machines Corporation Fine pitch solder deposits on printed circuit board process and product
US5673846A (en) * 1995-08-24 1997-10-07 International Business Machines Corporation Solder anchor decal and method
FR2762715B1 (fr) * 1997-04-28 2000-07-21 Novatec Procede de realisation et de brasage de billes de connexion electrique sur des plages d'accueil de raccordement electrique de circuits ou de composants electroniques et dispositif de mise en oeuvre
JPH1160645A (ja) * 1997-08-27 1999-03-02 Tdk Corp 耐熱性低誘電性高分子材料ならびにそれを用いたフィルム、基板、電子部品および耐熱性樹脂成形品
US5977632A (en) * 1998-02-02 1999-11-02 Motorola, Inc. Flip chip bump structure and method of making
EP1005082A4 (en) * 1998-03-27 2001-08-16 Seiko Epson Corp SEMICONDUCTOR DEVICE, METHOD FOR THE PRODUCTION THEREOF, PCB AND ELECTRONIC DEVICE
US6461953B1 (en) * 1998-08-10 2002-10-08 Fujitsu Limited Solder bump forming method, electronic component mounting method, and electronic component mounting structure
US6114098A (en) * 1998-09-17 2000-09-05 International Business Machines Corporation Method of filling an aperture in a substrate
JP3403677B2 (ja) * 1999-09-06 2003-05-06 マイクロ・テック株式会社 半田ボール形成方法
TW498435B (en) * 2000-08-15 2002-08-11 Hitachi Ltd Method of producing semiconductor integrated circuit device and method of producing multi-chip module
DE10056869B4 (de) * 2000-11-16 2005-10-13 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauteil mit einer strahlungsabsorbierenden leitenden Schutzschicht und Verfahren zur Herstellung derselben
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
JP3461172B2 (ja) * 2001-07-05 2003-10-27 日東電工株式会社 多層配線回路基板の製造方法
US6605524B1 (en) * 2001-09-10 2003-08-12 Taiwan Semiconductor Manufacturing Company Bumping process to increase bump height and to create a more robust bump structure
US6703069B1 (en) * 2002-09-30 2004-03-09 Intel Corporation Under bump metallurgy for lead-tin bump over copper pad
US7128946B2 (en) * 2002-12-27 2006-10-31 Hynix Semiconductor Inc. Plate for forming metal wires and method of forming metal wires using the same
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KR100510543B1 (ko) * 2003-08-21 2005-08-26 삼성전자주식회사 표면 결함이 제거된 범프 형성 방법
TW592013B (en) * 2003-09-09 2004-06-11 Advanced Semiconductor Eng Solder bump structure and the method for forming the same
US7485564B2 (en) * 2007-02-12 2009-02-03 International Business Machines Corporation Undercut-free BLM process for Pb-free and Pb-reduced C4
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Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003046230A (ja) * 2001-08-02 2003-02-14 Seiko Instruments Inc 構造体及びこの構造体を用いた実装方法
JP2004342904A (ja) * 2003-05-16 2004-12-02 Murata Mfg Co Ltd 電子回路装置および電子回路装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010076123A (ja) * 2008-09-24 2010-04-08 Dainippon Printing Co Ltd 導電性バンプ付き基板シート製造方法

Also Published As

Publication number Publication date
US20090315179A1 (en) 2009-12-24
US20060131365A1 (en) 2006-06-22

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