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JP2006156724A5
JP2006156724A5 JP2004345369A JP2004345369A JP2006156724A5 JP 2006156724 A5 JP2006156724 A5 JP 2006156724A5 JP 2004345369 A JP2004345369 A JP 2004345369A JP 2004345369 A JP2004345369 A JP 2004345369A JP 2006156724 A5 JP2006156724 A5 JP 2006156724A5
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チップ状電子部品の抵抗値修正方法Resistance value correction method for chip-shaped electronic components

本発明は、各種電子機器に使用されるチップ抵抗器や多連チップ抵抗器等のチップ状電子部品の抵抗値修正方法に関するものである。 The present invention relates to a method for correcting a resistance value of a chip-shaped electronic component such as a chip resistor or a multiple chip resistor used in various electronic devices.

従来のこの種のチップ抵抗器や多連チップ抵抗器等のチップ状電子部品は、図5(a)に示すように、アルミナ基板等の絶縁性を有するシート状の絶縁基板1の上面に複数対の上面電極2a,2bをスクリーン印刷・焼成により形成し、その後、図5(b)に示すように、前記複数対の上面電極2a,2bに電気的に接続されるように抵抗体3をスクリーン印刷・焼成により形成し、その後、この抵抗体3の抵抗値を要求される目的の抵抗値に修正するようにしている。この抵抗値の修正方法としては、抵抗体3を形成した後、レーザーを用いて抵抗体3にトリミング溝を形成することにより、複数対の上面電極2a,2b間に位置する抵抗体3の抵抗値を上昇させる手法が一般的に利用されている。この抵抗値修正は、抵抗値修正を目的とする抵抗体が接続されている上面電極に抵抗値測定用の端子を接触させ、この状態で抵抗値を測定しながら目的とする抵抗値になるまでレーザーで加工を行う。   As shown in FIG. 5A, a plurality of conventional chip-type electronic components such as this type of chip resistor and multiple chip resistor are provided on the upper surface of an insulating sheet-like insulating substrate 1 such as an alumina substrate. The pair of upper surface electrodes 2a and 2b are formed by screen printing / firing, and then, as shown in FIG. 5B, the resistor 3 is electrically connected to the plurality of pairs of upper surface electrodes 2a and 2b. It is formed by screen printing / firing, and then the resistance value of the resistor 3 is corrected to the required target resistance value. As a method for correcting the resistance value, after the resistor 3 is formed, a trimming groove is formed in the resistor 3 by using a laser, whereby the resistance of the resistor 3 positioned between the plurality of pairs of upper surface electrodes 2a and 2b is formed. A technique for increasing the value is generally used. In this resistance value correction, a resistance measurement terminal is brought into contact with the upper surface electrode to which a resistor whose resistance value is to be corrected is connected, and the resistance value is measured in this state until the target resistance value is reached. Processing with a laser.

抵抗値を測定するために上面電極に接触させる抵抗値測定用の端子は抵抗値を持っているため、抵抗体の正味の抵抗値を測定するためには、この抵抗値測定用の端子の抵抗値を含まないように、電流端子と電圧端子を高電圧側と低電圧側にそれぞれ独立させた端子構造の抵抗値測定用の端子を上面電極に接触させながら抵抗値を測定する、いわゆる四端子測定法が有効である。この場合、電流端子と電圧端子が独立していない二端子測定法よりも、この四端子測定法を使用することにより、抵抗値測定用の端子を接触させた上面電極間の精密な抵抗値測定が可能となる。   Since the resistance value measurement terminal brought into contact with the upper surface electrode in order to measure the resistance value has a resistance value, in order to measure the net resistance value of the resistor, the resistance value of the resistance value measurement terminal So-called four terminals that measure the resistance value while contacting the upper surface electrode with the terminal for measuring the resistance value of the terminal structure in which the current terminal and the voltage terminal are independent on the high voltage side and the low voltage side, respectively, so as not to include the value The measurement method is effective. In this case, by using this four-terminal measurement method rather than the two-terminal measurement method in which the current terminal and voltage terminal are not independent, precise resistance value measurement between the upper surface electrodes in contact with the resistance measurement terminals is performed. Is possible.

近年、抵抗体の狭公差の要求や、低抵抗領域である1Ω以下の抵抗値の要求が高まっており、これらの抵抗値を精度良く達成するためには、四端子測定法を用いた抵抗値修正方法が必要不可欠である。   In recent years, there has been an increasing demand for resistor tolerances and resistance values of 1Ω or less, which is a low resistance region. In order to achieve these resistance values with high accuracy, resistance values using a four-terminal measurement method are being used. A correction method is essential.

四端子測定法を用いて抵抗体の抵抗値を修正する場合、従来は、抵抗値測定用の端子を図6に示すような配置で上面電極に接触させて抵抗体の抵抗値測定が行われていた。すなわち、抵抗体3の抵抗値を測定する場合、抵抗体3が接続された一方の上面電極2aに低電位側の電圧端子4aと低電位側の電流端子5aの二端子を同時に接触させ、かつ他方の上面電極2bに高電位側の電圧端子4bと高電位側の電流端子5bの二端子を同時に接触させ、この状態で抵抗体3の抵抗値を測定しながら抵抗値修正を行うようにしていた。   When the resistance value of a resistor is corrected by using the four-terminal measurement method, conventionally, the resistance value of the resistor is measured by bringing a terminal for measuring the resistance value into contact with the upper surface electrode in an arrangement as shown in FIG. It was. That is, when the resistance value of the resistor 3 is measured, two terminals of the low potential side voltage terminal 4a and the low potential side current terminal 5a are simultaneously brought into contact with one upper surface electrode 2a to which the resistor 3 is connected, and Two terminals of the high potential side voltage terminal 4b and the high potential side current terminal 5b are simultaneously brought into contact with the other upper surface electrode 2b, and the resistance value is corrected while measuring the resistance value of the resistor 3 in this state. It was.

なお、この出願の発明に関する先行技術文献情報としては、例えば、特許文献1が知られている。
特開平11−340002号公報
As prior art document information relating to the invention of this application, for example, Patent Document 1 is known.
JP-A-11-340002

しかしながら、近年、回路実装部品の小形化・高密度実装化が進み、非常に小さいチップ抵抗器(1005、0603、0402サイズ)が出回るようになってきている。   However, in recent years, miniaturization and high-density mounting of circuit-mounted components have progressed, and very small chip resistors (1005, 0603, 0402 sizes) have come into circulation.

これらの非常に小さいチップ抵抗器の抵抗値修正を行う場合、従来から用いられている四端子測定法においては、図6に示すように、抵抗値測定を行う抵抗体3が電気的に接続されている一方の上面電極2aに低電位側電圧端子4aおよび低電位側電流端子5aの二端子を接触させ、かつ他方の上面電極2bに高電位側電圧端子4bおよび高電位側電流端子5bの二端子を接触させる必要があるが、上記1005、0603、0402サイズの非常に小さいチップ抵抗器においては、上面電極の面積が非常に小さいため、一方の上面電極2aまたは他方の上面電極2bにそれぞれ二端子を確実に接触させるのは非常に難しいという問題点を有していた。例えば、1005サイズのチップ抵抗器では、上面電極2a,2bの面積が300μm×300μmと非常に小さいため、このような面積の小さい上面電極2a,2bに、従来から用いられている100μmの先端径を有する抵抗値測定用の端子をそれぞれ2個ずつ確実に接触させるということは非常に困難を伴うものであった。   When the resistance values of these very small chip resistors are corrected, in the conventional four-terminal measurement method, as shown in FIG. 6, the resistor 3 for measuring the resistance value is electrically connected. One upper surface electrode 2a is in contact with two terminals of a low potential side voltage terminal 4a and a low potential side current terminal 5a, and the other upper surface electrode 2b is in contact with two terminals of a high potential side voltage terminal 4b and a high potential side current terminal 5b. The terminals need to be in contact with each other. However, in the above-mentioned very small chip resistors of 1005, 0603, and 0402 sizes, the area of the upper surface electrode is very small. There was a problem that it was very difficult to contact the terminals reliably. For example, since the area of the upper surface electrodes 2a and 2b is as small as 300 μm × 300 μm in a 1005 size chip resistor, the tip diameter of 100 μm conventionally used for such small upper surface electrodes 2a and 2b is used. It was very difficult to make sure that two resistance value measuring terminals each having a contact with each other were in contact with each other.

この問題を解決する1つの方法として、チップ抵抗器のサイズが小さくなるにつれてより細い先端径を有する抵抗値測定用の端子を使用するという方法がとられているが、抵抗値測定用の端子の先端径を細くすると、端子が折れ曲がりやすく、また、磨耗によって抵抗値測定用の端子の寿命が短くなるなどの不都合が生じていた。   One method for solving this problem is to use a resistance value measuring terminal having a narrower tip diameter as the size of the chip resistor is reduced. When the tip diameter is made thin, the terminal is easily bent, and there are inconveniences such that the life of the terminal for measuring the resistance value is shortened due to wear.

また、特開平11−340002号公報に見られるように、スリットを挟んで直列に接続する抵抗体を含む格子の間に、ダミー格子を形成して電極面積を確保する方法が提案されているが、この場合は、同一基板で取得できるチップ数が減少してしまい、かつダミーを選別する手間等が必要となるため、実用的ではなかった。   Further, as seen in Japanese Patent Application Laid-Open No. 11-340002, a method has been proposed in which a dummy grid is formed between grids including resistors connected in series with a slit interposed therebetween to secure an electrode area. In this case, the number of chips that can be obtained on the same substrate is reduced, and it is not practical because it takes time and labor to sort out the dummy.

本発明は上記従来の課題を解決するもので、電極部分の面積が非常に小さい抵抗体の抵抗値測定をする場合でも、四端子を確実に電極に接触させて安定した抵抗値測定が可能となり、これにより、抵抗値修正も確実に行えるチップ状電子部品の抵抗値修正方法を提供することを目的とするものである。 The present invention solves the above-described conventional problems, and even when measuring the resistance value of a resistor with a very small area of the electrode portion, it is possible to stably measure the resistance value by making the four terminals securely contact the electrode. Thus, it is an object of the present invention to provide a resistance value correcting method for chip-shaped electronic components that can also reliably correct the resistance value .

上記目的を達成するために、本発明は以下の構成を有するものである。   In order to achieve the above object, the present invention has the following configuration.

本発明の請求項1に記載の発明は、シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列、第3の電極列、第4の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列と、前記第2の電極列と第4の電極列との間に電気的に接続されるように形成された第3の抵抗体列とを有し、前記第1の電極列と第2の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第1の電極列と第2の電極列のいずれか他方に低電位側電圧端子列を接触させ、かつ前記第3の電極列と第4の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第3の電極列と第4の電極列のいずれか他方に低電位側電流端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列、第4の電極列の4列の電極列および前記第2の抵抗体列、第1の抵抗体列、第3の抵抗体列の3列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたもので、この抵抗値修正方法によれば、電極部分の面積が非常に小さい抵抗体の抵抗値測定をする場合でも、四端子を確実に電極に接触させて安定した抵抗値測定が可能となり、これにより、抵抗値修正も確実に行えるという作用効果を有するものである。 According to a first aspect of the present invention, the first electrode lines, respectively so as to straddle the dividing grooves formed on a sheet-like insulating substrate formed of a column, the second electrode array, the third electrode row, A fourth electrode array ; a first resistor array formed to be electrically connected between the first electrode array and the second electrode array ; the first electrode array and the first electrode array ; A second resistor row formed so as to be electrically connected to the third electrode row, and to be electrically connected between the second electrode row and the fourth electrode row. and a third resistor string formed, together with the contacting the high-potential-side voltage terminal row on one of the first electrode array and second electrode array, said first electrode array contacting the low-potential-side voltage terminal row to the other of the second electrode array, and the high-potential-side current terminal row on one of the third electrode array and the fourth electrode row Together make touch, the third to the electrode columns and the other one of the fourth electrode column by contacting a low-potential-side current terminal row, the third electrode row, first electrode array, the second electrode array The four electrode rows of the fourth electrode row and the three resistor rows of the second resistor row, the first resistor row, and the third resistor row are used as one measurement region, and While measuring the resistance value of the first resistor row in one measurement region by the four-terminal measurement method, the first resistor row is trimmed to correct the resistance value to the target resistance value . Therefore, according to this resistance value correction method , even when measuring the resistance value of a resistor having a very small area of the electrode part, it is possible to reliably measure the resistance value by bringing the four terminals into contact with the electrode, Thereby, it has the effect that resistance value correction can also be performed reliably.

本発明の請求項2に記載の発明は、シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列、第3の電極列、第4の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列と、前記第2の電極列と第4の電極列との間に電気的に接続されるように形成された第3の抵抗体列とを有し、前記第1の電極列と第2の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第1の電極列と第2の電極列のいずれか他方に低電位側電流端子列を接触させ、かつ前記第3の電極列と第4の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第3の電極列と第4の電極列のいずれか他方に低電位側電圧端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列、第4の電極列の4列の電極列および前記第2の抵抗体列、第1の抵抗体列、第3の抵抗体列の3列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたもので、この抵抗値修正方法によれば、電極部分の面積が非常に小さい抵抗体の抵抗値測定をする場合でも、四端子を確実に電極に接触させて安定した抵抗値測定が可能となり、これにより、抵抗値修正も確実に行えるという作用効果を有するものである。 The invention according to claim 2 of the present invention, the first electrode lines, respectively so as to straddle the dividing grooves formed on a sheet-like insulating substrate formed of a column, the second electrode array, the third electrode row, A fourth electrode array ; a first resistor array formed to be electrically connected between the first electrode array and the second electrode array ; the first electrode array and the first electrode array ; A second resistor row formed so as to be electrically connected to the third electrode row, and to be electrically connected between the second electrode row and the fourth electrode row. and a third resistor string formed, together with the contacting the high-potential-side current terminal row on one of the first electrode array and second electrode array, said first electrode array contacting the low-potential-side current terminal row to the other of the second electrode array, and the high-potential voltage terminal row either one of the third electrode array and the fourth electrode row Together make touch, the third to the electrode columns and the other one of the fourth electrode column by contacting a low-potential-side voltage terminal row, the third electrode row, first electrode array, the second electrode array The four electrode rows of the fourth electrode row and the three resistor rows of the second resistor row, the first resistor row, and the third resistor row are used as one measurement region, and While measuring the resistance value of the first resistor row in one measurement region by the four-terminal measurement method, the first resistor row is trimmed to correct the resistance value to the target resistance value . Therefore, according to this resistance value correction method , even when measuring the resistance value of a resistor having a very small area of the electrode part, it is possible to reliably measure the resistance value by bringing the four terminals into contact with the electrode, Thereby, it has the effect that resistance value correction can also be performed reliably.

本発明の請求項3に記載の発明は、シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列、第3の電極列、第4の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列と、前記第2の電極列と第4の電極列との間に電気的に接続されるように形成された第3の抵抗体列とを有し、前記第1の電極列と第4の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第1の電極列と第4の電極列のいずれか他方に低電位側電流端子列を接触させ、かつ前記第3の電極列と第2の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第3の電極列と第2の電極列のいずれか他方に低電位側電圧端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列、第4の電極列の4列の電極列および前記第2の抵抗体列、第1の抵抗体列、第3の抵抗体列の3列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたもので、この抵抗値修正方法によれば、電極部分の面積が非常に小さい抵抗体の抵抗値測定をする場合でも、四端子を確実に電極に接触させて安定した抵抗値測定が可能となり、これにより、抵抗値修正も確実に行えるという作用効果を有するものである。 The invention described in claim 3 of the present invention, the first electrode lines, respectively so as to straddle the dividing grooves formed on a sheet-like insulating substrate formed of a column, the second electrode array, the third electrode row, A fourth electrode array ; a first resistor array formed to be electrically connected between the first electrode array and the second electrode array ; the first electrode array and the first electrode array ; A second resistor row formed so as to be electrically connected to the third electrode row, and to be electrically connected between the second electrode row and the fourth electrode row. and a third resistor string formed, together with the contacting the high-potential-side current terminal row on one of the first electrode array and the fourth electrode row, and the first electrode array fourth low-potential-side current terminal row to the other of the electrode row is brought into contact with, and the high-potential-side voltage terminal row on one of the third electrode array and second electrode array Together make touch, the third to the other of the electrode row and the second electrode array by contacting the low-potential-side voltage terminal row, the third electrode row, first electrode array, the second electrode array The four electrode rows of the fourth electrode row and the three resistor rows of the second resistor row, the first resistor row, and the third resistor row are used as one measurement region, and While measuring the resistance value of the first resistor row in one measurement region by the four-terminal measurement method, the first resistor row is trimmed to correct the resistance value to the target resistance value . Therefore, according to this resistance value correction method , even when measuring the resistance value of a resistor having a very small area of the electrode part, it is possible to reliably measure the resistance value by bringing the four terminals into contact with the electrode, Thereby, it has the effect that resistance value correction can also be performed reliably.

本発明の請求項4に記載の発明は、シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列と、前記相隣る分割溝の両方を跨ぐように形成された第3の電極列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第2の抵抗体列とを有し、前記第1の電極列と第3の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第1の電極列と第3の電極列のいずれか他方に低電位側電圧端子列を接触させ、かつ前記第2の電極列と第3の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第2の電極列と第3の電極列のいずれか他方に低電位側電流端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列の3列の電極列および前記第1の抵抗体列、第2の抵抗体列の2列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたもので、この抵抗値修正方法によれば、電極部分の面積が非常に小さい抵抗体の抵抗値測定をする場合でも、四端子を確実に電極に接触させて安定した抵抗値測定が可能となり、これにより、抵抗値修正も確実に行えるという作用効果を有するものである。 The invention according to claim 4 of the present invention, the first electrode lines, respectively so as to straddle the dividing grooves formed on a sheet-like insulating substrate formed of a column, and a second electrode row, the phase Tonariru division A third electrode array formed so as to straddle both of the grooves, and a first resistor array formed so as to be electrically connected between the first electrode array and the third electrode array And a second resistor row formed so as to be electrically connected between the first electrode row and the second electrode row, and the first electrode row and the third electrode row A high potential side voltage terminal row is brought into contact with either one of the electrode rows , a low potential side voltage terminal row is brought into contact with either one of the first electrode row and the third electrode row , and the second with contacting the high-potential-side current terminal row in either the electrode array and the third electrode row, one of said second electrode array and the third electrode row On the other hand in contacting the low-potential-side current terminal row, the third electrode row, first electrode row, three rows of electrode columns and the first resistor string to the second electrode array, the second resistor Two resistor rows of the body row are used as one measurement region, and the first resistor body is measured while measuring the resistance value of the first resistor row in the one measurement region by a four-terminal measurement method. The resistance value correction is performed by trimming the column to the target resistance value. According to this resistance value correction method , even when measuring the resistance value of a resistor having a very small area of the electrode part, The terminal can be brought into contact with the electrode with certainty and stable resistance measurement can be performed, whereby the resistance value can be corrected reliably.

本発明の請求項5に記載の発明は、シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列と、前記相隣る分割溝の両方を跨ぐように形成された第3の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列とを有し、前記第1の電極列と第2の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第1の電極列と第2の電極列のいずれか他方に低電位側電流端子列を接触させ、かつ前記第2の電極列と第3の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第2の電極列と第3の電極列のいずれか他方に低電位側電圧端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列の3列の電極列および前記第1の抵抗体列、第2の抵抗体列の2列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたもので、この抵抗値修正方法によれば、電極部分の面積が非常に小さい抵抗体の抵抗値測定をする場合でも、四端子を確実に電極に接触させて安定した抵抗値測定が可能となり、これにより、抵抗値修正も確実に行えるという作用効果を有するものである。 The invention described in claim 5 of the present invention, the first electrode lines, respectively so as to straddle the dividing grooves formed on a sheet-like insulating substrate formed of a column, and a second electrode row, the phase Tonariru division A third electrode array formed so as to straddle both of the grooves, and a first resistor array formed so as to be electrically connected between the first electrode array and the second electrode array And a second resistor row formed so as to be electrically connected between the first electrode row and the third electrode row, and the first electrode row and the second electrode row A high potential side current terminal row is brought into contact with either one of the electrode rows , a low potential side current terminal row is brought into contact with either one of the first electrode row and the second electrode row , and the second with contacting the high-potential-side voltage terminal row on one of the electrode array and the third electrode row, one of said second electrode array and the third electrode row On the other hand in contacting the low-potential-side voltage terminal row, the third electrode row, first electrode row, three rows of electrode columns and the first resistor string to the second electrode array, the second resistor Two resistor rows of the body row are used as one measurement region, and the first resistor body is measured while measuring the resistance value of the first resistor row in the one measurement region by a four-terminal measurement method. The resistance value correction is performed by trimming the column to the target resistance value. According to this resistance value correction method , even when measuring the resistance value of a resistor having a very small area of the electrode part, The terminal can be brought into contact with the electrode with certainty and stable resistance measurement can be performed, whereby the resistance value can be corrected reliably.

以上のように本発明のチップ状電子部品の抵抗値修正方法は、シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列、第3の電極列、第4の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列と、前記第2の電極列と第4の電極列との間に電気的に接続されるように形成された第3の抵抗体列とを有し、前記第1の電極列と第2の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第1の電極列と第2の電極列のいずれか他方に低電位側電圧端子列を接触させ、かつ前記第3の電極列と第4の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第3の電極列と第2の電極列のいずれか他方に低電位側電流端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列、第4の電極列の4列の電極列および前記第2の抵抗体列、第1の抵抗体列、第3の抵抗体列の3列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしているため、電極部分の面積が非常に小さい抵抗体の抵抗値測定をする場合でも、四端子を確実に電極に接触させて安定した抵抗値測定が可能となり、これにより、抵抗値修正も確実に行えるという優れた効果を奏するものである。 The method of the resistance value correction chip electronic component of the present invention as described above, the first electrode lines, respectively so as to straddle the dividing grooves formed on a sheet-like insulating substrate formed of a column, the second electrode array, A third resistor array , a fourth electrode array , a first resistor array formed so as to be electrically connected between the first electrode array and the second electrode array ; A second resistor row formed so as to be electrically connected between the first electrode row and the third electrode row; and an electric current between the second electrode row and the fourth electrode row. manner and a third resistor string formed so as to be connected, with contacting the high-potential-side voltage terminal row on one of the first electrode array and second electrode array, the contacting the low-potential-side voltage terminal row to the other of the first electrode array and second electrode array, and one of the third electrode array and the fourth electrode row one In conjunction with contacting the high-potential-side current terminal row, the third electrode row of the contacting the low-potential-side current terminal row to the other of the second electrode array, said third electrode row, first 4 electrode rows of electrode row, second electrode row, fourth electrode row and three resistor rows of the second resistor row, first resistor row, third resistor row One measurement region is formed, and the first resistor row is trimmed to the target resistance value while measuring the resistance value of the first resistor row by the four-terminal measurement method in the one measurement region. Since the resistance value is corrected, even when measuring the resistance value of a resistor with a very small area of the electrode, it is possible to reliably measure the resistance value by making the four terminals securely contact the electrode. As a result, the resistance value can be corrected with certainty.

(実施の形態1)
以下、実施の形態1を用いて、本発明の特に請求項1〜3に記載の発明について説明する。
(Embodiment 1)
Hereinafter, the invention described in the first to third aspects of the present invention will be described using the first embodiment.

図1は本発明の実施の形態1におけるチップ抵抗器において、シート状の絶縁基板上に複数の電極と複数の抵抗体を形成した状態での抵抗値測定用の四端子の配置位置を示した模式図である。   FIG. 1 shows an arrangement position of four terminals for measuring resistance values in a state where a plurality of electrodes and a plurality of resistors are formed on a sheet-like insulating substrate in the chip resistor according to the first embodiment of the present invention. It is a schematic diagram.

図1において、11はアルミナ基板等の絶縁性を有するシート状の絶縁基板で、このシート状の絶縁基板11の上面には、分割溝23を跨ぐように複数の第1の電極12、第2の電極13、第3の電極14、第4の電極15をそれぞれスクリーン印刷・焼成により列で形成している。そして前記列で形成されている複数の第1の電極12と第2の電極13との間にはこれらと電気的に接続される複数の第1の抵抗体16をスクリーン印刷・焼成により列で形成し、また前記複数の第1の電極12と第3の電極14との間にはこれらと電気的に接続される複数の第2の抵抗体17をスクリーン印刷・焼成により列で形成し、さらに前記複数の第2の電極13と第4の電極15との間にはこれらと電気的に接続される複数の第3の抵抗体18をスクリーン印刷・焼成により列で形成している。   In FIG. 1, reference numeral 11 denotes an insulating sheet-like insulating substrate such as an alumina substrate. On the upper surface of the sheet-like insulating substrate 11, a plurality of first electrodes 12 and second electrodes are provided so as to straddle the dividing grooves 23. The electrode 13, the third electrode 14, and the fourth electrode 15 are formed in a row by screen printing and firing, respectively. Between the plurality of first electrodes 12 and the second electrode 13 formed in the row, a plurality of first resistors 16 electrically connected thereto are arranged in a row by screen printing / firing. A plurality of second resistors 17 electrically connected to the plurality of first electrodes 12 and the third electrodes 14 are formed in a row by screen printing / firing; Further, a plurality of third resistors 18 electrically connected to the plurality of second electrodes 13 and the fourth electrodes 15 are formed in a row by screen printing / firing.

上記構成において、列で形成されている複数の第1の電極12と第2の電極13との間に電気的に接続されている複数の第1の抵抗体16の抵抗値の修正を行う場合は、複数の第2の電極13に複数の高電位側電圧端子19を接触させるとともに、複数の第1の電極12に複数の低電位側電圧端子20を接触させ、さらに前記第4の電極15に複数の高電位側電流端子21を接触させるとともに、複数の第3の電極14に複数の低電位側電流端子22を接触させ、この状態で、レーザーを用いて第1の抵抗体16にトリミング溝を形成することにより、複数の第1の電極12と第2の電極13との間に電気的に接続されている複数の第1の抵抗体16の抵抗値を上昇させて、要求される目的の抵抗値に修正する。   In the above configuration, when the resistance values of the plurality of first resistors 16 electrically connected between the plurality of first electrodes 12 and the second electrode 13 formed in a row are corrected. Has a plurality of high potential side voltage terminals 19 in contact with a plurality of second electrodes 13, a plurality of low potential side voltage terminals 20 in contact with a plurality of first electrodes 12, and the fourth electrode 15. A plurality of high potential side current terminals 21 are brought into contact with each other and a plurality of low potential side current terminals 22 are brought into contact with a plurality of third electrodes 14. In this state, trimming is performed on the first resistor 16 using a laser. By forming the groove, the resistance value of the plurality of first resistors 16 electrically connected between the plurality of first electrodes 12 and the second electrode 13 is increased, and is required. Correct to the desired resistance value.

次に、列で形成されている複数の第3の抵抗体18の抵抗値の修正を行う場合は、図1の状態から高電位側電圧端子19、低電位側電圧端子20、高電位側電流端子21、低電位側電流端子22の4つの端子を上方向に動かして4つの電極13,12,15,14との接触を断つとともに、複数の電極と複数の抵抗体を有するシート状の絶縁基板11を載置したステージ(図示せず)を相隣る分割溝23で定められたピッチ分だけ左方向に動かし、そしてこの状態で、前記高電位側電圧端子19、低電位側電圧端子20、高電位側電流端子21、低電位側電流端子22の4つの端子を下方向に動かして、図2に示すように4つの電極に接触させる。この場合、高電位側電圧端子19は第4の電極15に、低電位側電圧端子20は第2の電極13に、高電位側電流端子21は第4の電極15の隣に位置する別の電極24に、低電位側電流端子22は第1の電極12にそれぞれ接触することになり、この状態で、レーザーを用いて第3の抵抗体18にトリミング溝を形成することにより、複数の第2の電極13と第4の電極15との間に電気的に接続されている複数の第3の抵抗体18の抵抗値を上昇させて、要求される目的の抵抗値に修正する。   Next, when correcting the resistance values of the plurality of third resistors 18 formed in a row, the high potential side voltage terminal 19, the low potential side voltage terminal 20, the high potential side current are changed from the state of FIG. The four terminals of the terminal 21 and the low potential side current terminal 22 are moved upward to break contact with the four electrodes 13, 12, 15, 14, and sheet-like insulation having a plurality of electrodes and a plurality of resistors. The stage (not shown) on which the substrate 11 is placed is moved to the left by the pitch determined by the adjacent dividing grooves 23. In this state, the high potential side voltage terminal 19 and the low potential side voltage terminal 20 are moved. Then, the four terminals of the high potential side current terminal 21 and the low potential side current terminal 22 are moved downward to come into contact with the four electrodes as shown in FIG. In this case, the high potential side voltage terminal 19 is located on the fourth electrode 15, the low potential side voltage terminal 20 is located on the second electrode 13, and the high potential side current terminal 21 is located on the other side of the fourth electrode 15. The low-potential-side current terminal 22 is in contact with the electrode 24 and the first electrode 12, and in this state, a plurality of second trimming grooves are formed in the third resistor 18 using a laser. The resistance values of the plurality of third resistors 18 electrically connected between the second electrode 13 and the fourth electrode 15 are increased to correct the desired resistance value.

次に、図2に示す列で形成されている複数の第4の抵抗体25の抵抗値の修正を行う場合は、図2の状態から高電位側電圧端子19、低電位側電圧端子20、高電位側電流端子21、低電位側電流端子22の4つの端子を上方向に動かして4つの電極15,13,24,12との接触を断つとともに、複数の電極と複数の抵抗体を有するシート状の絶縁基板11を載置したステージ(図示せず)を相隣る分割溝23で定められたピッチ分だけ左方向に動かし、そしてこの状態で、前記高電位側電圧端子19、低電位側電圧端子20、高電位側電流端子21、低電位側電流端子22の4つの端子を下方向に動かして、図2に示す4つの電極に接触させる。この場合、高電位側電圧端子19は第4の電極15の隣に位置する第5の電極24に、低電位側電圧端子20は第4の電極15に、高電位側電流端子21は第5の電極24の隣に位置する第6の電極26に、低電位側電流端子22は第2の電極13にそれぞれ接触することになり、この状態で、レーザーを用いて第4の抵抗体25にトリミング溝を形成することにより、複数の第4の電極15と第5の電極24との間に電気的に接続されている複数の第4の抵抗体25の抵抗値を上昇させて、要求される目的の抵抗値に修正する。   Next, when correcting the resistance values of the plurality of fourth resistors 25 formed in the row shown in FIG. 2, the high potential side voltage terminal 19, the low potential side voltage terminal 20, The four terminals of the high potential side current terminal 21 and the low potential side current terminal 22 are moved upward to cut off the contact with the four electrodes 15, 13, 24, 12 and have a plurality of electrodes and a plurality of resistors. The stage (not shown) on which the sheet-like insulating substrate 11 is placed is moved to the left by the pitch determined by the adjacent dividing grooves 23, and in this state, the high potential side voltage terminal 19, low potential The four terminals of the side voltage terminal 20, the high potential side current terminal 21, and the low potential side current terminal 22 are moved downward to come into contact with the four electrodes shown in FIG. In this case, the high potential side voltage terminal 19 is connected to the fifth electrode 24 located next to the fourth electrode 15, the low potential side voltage terminal 20 is connected to the fourth electrode 15, and the high potential side current terminal 21 is connected to the fifth electrode 24. The low potential side current terminal 22 comes into contact with the second electrode 13 to the sixth electrode 26 located next to the electrode 24, and in this state, the fourth resistor 25 is connected to the fourth resistor 25 using a laser. By forming the trimming groove, the resistance value of the plurality of fourth resistors 25 electrically connected between the plurality of fourth electrodes 15 and the fifth electrode 24 is increased, which is required. Correct to the desired resistance value.

上記したように本発明の実施の形態1における抵抗値修正方法は、高電位側電圧端子19、低電位側電圧端子20、高電位側電流端子21、低電位側電流端子22の4つの端子を上下方向に動かして4つの電極との接触を断ったり、あるいは接触させるという動作と、複数の電極と複数の抵抗体を有するシート状の絶縁基板11を載置したステージ(図示せず)を相隣る分割溝23で定められたピッチ分だけ左方向へ動かすという動作を順次繰り返すことにより、列で形成されている複数の抵抗体の抵抗値の修正を順次行うようにしたもので、この抵抗値修正方法においては、高電位側と低電位側の2つの電圧端子と高電位側と低電位側の2つの電流端子を4つの電極にそれぞれ1個ずつ接触させて抵抗値修正を行うようにしているため、この抵抗値修正方法を、特に、微小サイズの角チップ抵抗器の抵抗値修正工程において採用すれば、従来のように抵抗値測定を行う抵抗体が電気的に接続されている2つの電極にそれぞれ高電位側と低電位側の2つの電圧端子と高電位側と低電位側の2つの電流端子を接触させて抵抗値修正を行うようにしたものに比べ、1つの抵抗値測定用端子が活用できる電極面積が増加するため、抵抗値測定用端子の電極への接触の確実性が増すものである。この場合、電極に接触する抵抗値測定用端子は、高電位側の電圧・電流端子と、低電位側の電圧・電流端子のそれぞれが抵抗値修正を行う第1の抵抗体16を挟んで異方向に分かれるようにする必要があるが、この接触条件を満たしていれば、第1の抵抗体16が直接的に接続される第1、第2の電極12,13と、間接的に接続される第3、第4の電極14,15で、電圧端子と電流端子の接触を選択しなくてもよいものである。   As described above, the resistance value correcting method according to the first embodiment of the present invention includes the four terminals of the high potential side voltage terminal 19, the low potential side voltage terminal 20, the high potential side current terminal 21, and the low potential side current terminal 22. An operation of moving up and down to disconnect or contact the four electrodes, and a stage (not shown) on which a sheet-like insulating substrate 11 having a plurality of electrodes and a plurality of resistors are placed. By sequentially repeating the operation of moving to the left by the pitch determined by the adjacent divided grooves 23, the resistance values of a plurality of resistors formed in a row are sequentially corrected. In the value correction method, the resistance value correction is performed by bringing two voltage terminals on the high potential side and the low potential side and two current terminals on the high potential side and the low potential side into contact with the four electrodes one by one. Because this If the resistance value correcting method is employed particularly in the resistance value correcting process of a small-sized square chip resistor, each of the two electrodes to which the resistor for measuring the resistance value is electrically connected as in the prior art is used. One resistance value measurement terminal can be used compared to the one in which two voltage terminals on the potential side and the low potential side and two current terminals on the high potential side and the low potential side are brought into contact with each other to correct the resistance value. Since the electrode area is increased, the certainty of contact of the resistance value measuring terminal with the electrode is increased. In this case, the resistance value measurement terminals in contact with the electrodes are different from each other with the first resistor 16 for correcting the resistance value between the high potential side voltage / current terminal and the low potential side voltage / current terminal. Although it is necessary to divide in the direction, if this contact condition is satisfied, the first resistor 16 is indirectly connected to the first and second electrodes 12 and 13 to which the first resistor 16 is directly connected. The third and fourth electrodes 14 and 15 need not select the contact between the voltage terminal and the current terminal.

すなわち、上記本発明の実施の形態1においては、列で形成されている複数の第1の抵抗体16の抵抗値の修正を行う場合、複数の第2の電極13に複数の高電位側電圧端子19を接触させるとともに、複数の第1の電極12に複数の低電位側電圧端子20を接触させ、さらに前記複数の第4の電極15に複数の高電位側電流端子21を接触させるとともに、複数の第3の電極14に複数の低電位側電流端子22を接触させていたが、これとは逆に、複数の第2の電極13に複数の低電位側電圧端子20を接触させるとともに、複数の第1の電極12に複数の高電位側電圧端子19を接触させ、さらに前記複数の第4の電極15に複数の低電位側電流端子22を接触させるとともに、複数の第3の電極14に複数の高電位側電流端子21を接触させるようにするか、あるいは複数の第2の電極13に複数の高電位側電流端子21または低電位側電流端子22を接触させるとともに、複数の第1の電極12に複数の低電位側電流端子22または高電位側電流端子21を接触させ、そして前記複数の第4の電極15に複数の高電位側電圧端子19または低電位側電圧端子20を接触させるとともに、複数の第3の電極14に複数の低電位側電圧端子20または高電位側電圧端子19を接触させるようにしてもよく、さらには複数の第1の電極12に複数の高電位側電流端子21または低電位側電流端子22を接触させるとともに、複数の第4の電極15に複数の低電位側電流端子22または高電位側電流端子21を接触させ、そして前記複数の第3の電極14に複数の高電位側電圧端子19または低電位側電圧端子20を接触させるとともに、複数の第2の電極13に複数の低電位側電圧端子20または高電位側電圧端子19を接触させるようにしてもよく、これらの場合においても、上記実施の形態1と同様に、列で形成されている複数の第1の電極12と第2の電極13との間に電気的に接続されている複数の第1の抵抗体16の抵抗値の修正が行えるものである。   That is, in the first embodiment of the present invention, when the resistance values of the plurality of first resistors 16 formed in a row are corrected, a plurality of high potential side voltages are applied to the plurality of second electrodes 13. While contacting the terminal 19, the plurality of low potential side voltage terminals 20 are brought into contact with the plurality of first electrodes 12, and the plurality of high potential side current terminals 21 are brought into contact with the plurality of fourth electrodes 15, While the plurality of low potential side current terminals 22 are in contact with the plurality of third electrodes 14, the plurality of low potential side voltage terminals 20 are in contact with the plurality of second electrodes 13. A plurality of high potential side voltage terminals 19 are brought into contact with the plurality of first electrodes 12, and a plurality of low potential side current terminals 22 are brought into contact with the plurality of fourth electrodes 15. A plurality of high potential side current terminals 21 are connected to Or a plurality of high potential side current terminals 21 or low potential side current terminals 22 are brought into contact with the plurality of second electrodes 13, and a plurality of low potential side current terminals are connected to the plurality of first electrodes 12. 22 or the high potential side current terminal 21 is brought into contact with the plurality of fourth electrodes 15, and the plurality of high potential side voltage terminals 19 or the low potential side voltage terminals 20 are brought into contact with the plurality of third electrodes 14. A plurality of low potential side voltage terminals 20 or high potential side voltage terminals 19 may be brought into contact with each other, and a plurality of high potential side current terminals 21 or low potential side current terminals 22 are connected to the plurality of first electrodes 12. The plurality of fourth electrodes 15 are contacted with a plurality of low potential side current terminals 22 or high potential side current terminals 21, and the plurality of third electrodes 14 are contacted with a plurality of high potential side voltage terminals. 9 or the low potential side voltage terminal 20 may be brought into contact with each other, and a plurality of low potential side voltage terminals 20 or high potential side voltage terminals 19 may be brought into contact with the plurality of second electrodes 13. As in the first embodiment, the resistances of the plurality of first resistors 16 electrically connected between the plurality of first electrodes 12 and the second electrode 13 formed in a row. The value can be corrected.

(実施の形態2)
以下、実施の形態2を用いて、本発明の特に請求項4、5に記載の発明について説明する。
(Embodiment 2)
Hereinafter, the invention described in the fourth and fifth aspects of the present invention will be described using the second embodiment.

図3は本発明の実施の形態2におけるチップ抵抗器において、シート状の絶縁基板上に複数の電極と複数の抵抗体を形成した状態での抵抗値測定用の四端子の配置位置を示した模式図である。   FIG. 3 shows an arrangement position of four terminals for measuring resistance values in a state where a plurality of electrodes and a plurality of resistors are formed on a sheet-like insulating substrate in the chip resistor according to the second embodiment of the present invention. It is a schematic diagram.

図3において、31はアルミナ基板等の絶縁性を有するシート状の絶縁基板で、このシート状の絶縁基板31の上面には、分割溝34を跨ぐように複数の第1の電極32、第2の電極33をそれぞれスクリーン印刷・焼成により列で形成するとともに、相隣る分割溝34の両方に跨がるように第3の電極35をスクリーン印刷・焼成により列で形成している。そして前記列で形成されている複数の第1の電極32と第3の電極35との間にはこれらと電気的に接続されるように複数の第1の抵抗体36をスクリーン印刷・焼成により列で形成し、さらに前記複数の第1の電極32と第2の電極33との間にはこれらと電気的に接続されるように複数の第2の抵抗体37をスクリーン印刷・焼成により列で形成している。   In FIG. 3, reference numeral 31 denotes an insulating sheet-like insulating substrate such as an alumina substrate. On the upper surface of the sheet-like insulating substrate 31, a plurality of first electrodes 32 and second electrodes are provided so as to straddle the dividing grooves 34. The electrodes 33 are formed in rows by screen printing / firing, and the third electrodes 35 are formed in rows by screen printing / firing so as to straddle both adjacent divided grooves 34. A plurality of first resistors 36 are screen-printed and fired between the plurality of first electrodes 32 and the third electrode 35 formed in the row so as to be electrically connected thereto. A plurality of second resistors 37 are formed by screen printing and firing so as to be electrically connected to the plurality of first electrodes 32 and the second electrodes 33. It is formed with.

上記構成において、列で形成されている複数の第1の電極32と第2の電極33との間に電気的に接続されている複数の第1の抵抗体36の抵抗値の修正を行う場合は、複数の第1の電極32に複数の高電位側電圧端子38を接触させるとともに、複数の第3の電極35に複数の低電位側電圧端子39と低電位側電流端子40を接触させ、さらに前記複数の第2の電極33に複数の高電位側電流端子41を接触させ、この状態で、レーザーを用いて第1の抵抗体36にトリミング溝を形成することにより、複数の第1の電極32と第3の電極35との間に電気的に接続される複数の第1の抵抗体36の抵抗値を上昇させて、要求される目的の抵抗値に修正する。   In the above configuration, when the resistance values of the plurality of first resistors 36 electrically connected between the plurality of first electrodes 32 and the second electrode 33 formed in a row are corrected. The plurality of high potential side voltage terminals 38 are brought into contact with the plurality of first electrodes 32, and the plurality of low potential side voltage terminals 39 and the low potential side current terminals 40 are brought into contact with the plurality of third electrodes 35. Further, a plurality of high-potential-side current terminals 41 are brought into contact with the plurality of second electrodes 33, and in this state, trimming grooves are formed in the first resistor 36 using a laser. The resistance values of the plurality of first resistors 36 electrically connected between the electrode 32 and the third electrode 35 are increased to correct the desired resistance value.

次に、列で形成されている複数の第2の抵抗体37の抵抗値の修正を行う場合は、図3の状態から高電位側電圧端子38、低電位側電圧端子39、高電位側電流端子41、低電位側電流端子40の4つの端子を上方向に動かして3つの電極32,35,33との接触を断つとともに、複数の電極と複数の抵抗体を有するシート状の絶縁基板31を載置したステージ(図示せず)を相隣る分割溝34で定められたピッチ分だけ左方向に動かし、そしてこの状態で、前記高電位側電圧端子38、低電位側電圧端子39、高電位側電流端子41、低電位側電流端子40の4つの端子を下方向に動かして、図4に示すように4つの電極に接触させる。この場合、高電位側電圧端子38は第2の電極33に、低電位側電圧端子39は第1の電極32に、高電位側電流端子41は第2の電極33の隣に位置する第4の電極42に、低電位側電流端子40は第3の電極35にそれぞれ接触することになり、この状態で、レーザーを用いて第2の抵抗体37にトリミング溝を形成することにより、複数の第1の電極32と第2の電極33との間に電気的に接続されている複数の第2の抵抗体37の抵抗値を上昇させて、要求される目的の抵抗値に修正する。   Next, when correcting the resistance values of the plurality of second resistors 37 formed in a row, the high potential side voltage terminal 38, the low potential side voltage terminal 39, the high potential side current are changed from the state of FIG. The four terminals of the terminal 41 and the low potential side current terminal 40 are moved upward to break the contact with the three electrodes 32, 35, 33, and the sheet-like insulating substrate 31 having a plurality of electrodes and a plurality of resistors. Is moved to the left by a pitch determined by adjacent dividing grooves 34, and in this state, the high potential side voltage terminal 38, the low potential side voltage terminal 39, The four terminals of the potential side current terminal 41 and the low potential side current terminal 40 are moved downward to contact the four electrodes as shown in FIG. In this case, the high potential side voltage terminal 38 is positioned on the second electrode 33, the low potential side voltage terminal 39 is positioned on the first electrode 32, and the high potential side current terminal 41 is positioned next to the second electrode 33. The low-potential-side current terminal 40 is in contact with the third electrode 35, and a trimming groove is formed in the second resistor 37 using a laser in this state. The resistance values of the plurality of second resistors 37 electrically connected between the first electrode 32 and the second electrode 33 are increased to correct the required resistance value.

次に、図4に示す列で形成されている複数の第3の抵抗体43の抵抗値の修正を行う場合は、図4の状態から高電位側電圧端子38、低電位側電圧端子39、高電位側電流端子41、低電位側電流端子40の4つの端子を上方向に動かして4つの電極33,32,42,35との接触を断つとともに、複数の電極と複数の抵抗体を有するシート状の絶縁基板31を載置したステージ(図示せず)を相隣る分割溝34で定められたピッチ分だけ左方向に動かし、そしてこの状態で、前記高電位側電圧端子38、低電位側電圧端子39、高電位側電流端子41、低電位側電流端子40の4つの端子を下方向に動かして、図4に示す4つの電極に接触させる。この場合、高電位側電圧端子38は第2の電極33の隣に位置する第4の電極42に、低電位側電圧端子39は第2の電極33に、高電位側電流端子41は第4の電極42の隣に位置する第5の電極44に、低電位側電流端子40は第1の電極32にそれぞれ接触することになり、この状態で、レーザーを用いて第3の抵抗体43にトリミング溝を形成することにより、複数の第2の電極33と別の電極42との間に電気的に接続されている複数の第3の抵抗体43の抵抗値を上昇させて、要求される目的の抵抗値に修正する。 Next, when correcting the resistance values of the plurality of third resistors 43 formed in the row shown in FIG. 4, the high potential side voltage terminal 38, the low potential side voltage terminal 39, The four terminals of the high potential side current terminal 41 and the low potential side current terminal 40 are moved upward to cut off the contact with the four electrodes 33, 32, 42, and 35, and have a plurality of electrodes and a plurality of resistors. The stage (not shown) on which the sheet-like insulating substrate 31 is placed is moved to the left by the pitch determined by the adjacent dividing grooves 34, and in this state, the high potential side voltage terminal 38, the low potential The four terminals of the side voltage terminal 39, the high potential side current terminal 41, and the low potential side current terminal 40 are moved downward to come into contact with the four electrodes shown in FIG. In this case, the high potential side voltage terminal 38 is connected to the fourth electrode 42 adjacent to the second electrode 33, the low potential side voltage terminal 39 is connected to the second electrode 33, and the high potential side current terminal 41 is connected to the fourth electrode 42. The low potential side current terminal 40 is in contact with the first electrode 32 and the fifth electrode 44 located next to the electrode 42, and in this state, the third resistor 43 is connected to the third resistor 43 using a laser. By forming the trimming groove, the resistance value of the plurality of third resistors 43 electrically connected between the plurality of second electrodes 33 and the other electrode 42 is increased, which is required. Correct to the desired resistance value.

上記したように本発明の実施の形態2における抵抗値修正方法は、高電位側電圧端子38、低電位側電圧端子39、高電位側電流端子41、低電位側電流端子40の4つの端子を上下方向に動かして、最初は3つの電極との接触を断ったり、あるいは接触させる。そして2番目以降は4つの電極との接触を断ったり、あるいは接触させるという動作と、複数の電極と複数の抵抗体を有するシート状の絶縁基板31を載置したステージ(図示せず)を相隣る分割溝34で定められたピッチ分だけ左方向へ動かすという動作を順次繰り返すことにより、列で形成されている複数の抵抗体の抵抗値の修正を順次行うようにしたもので、この抵抗値修正方法においては、高電位側と低電位側の2つの電圧端子と高電位側と低電位側の2つの電流端子のうち、最初は2つの測定端子を相隣る分割溝34の両方に跨がって形成された1つの電極に接触させ、かつ残り2つの測定端子を2つの電極にそれぞれ1個ずつ接触させて抵抗値修正を行うようにしているため、この抵抗値修正方法を、特に、微小サイズの角チップ抵抗器の抵抗値修正工程において採用すれば、従来のように抵抗値測定を行う抵抗体が電気的に接続されている2つの電極にそれぞれ高電位側と低電位側の2つの電圧端子と高電位側と低電位側の2つの電流端子を接触させて抵抗値修正を行うようにしたものに比べ、1つの抵抗値測定用端子が活用できる電極面積が増加するため、抵抗値測定用端子の電極への接触の確実性が増すものである。この場合、電極に接触する抵抗値測定用端子は、高電位側の電圧・電流端子と、低電位側の電圧・電流端子のそれぞれが抵抗値修正を行う第1の抵抗体36を挟んで異方向に分かれるようにする必要があるが、この接触条件を満たしていれば、第1の抵抗体36が直接的に接続される第1、第3の電極32,35と、間接的に接続される第2の電極33で、電圧端子と電流端子の接触を選択しなくてもよいものである。   As described above, the resistance value correcting method according to the second embodiment of the present invention includes the four terminals of the high potential side voltage terminal 38, the low potential side voltage terminal 39, the high potential side current terminal 41, and the low potential side current terminal 40. By moving up and down, the contact with the three electrodes is initially cut off or brought into contact. In the second and subsequent stages, the operation of cutting off or bringing into contact with the four electrodes and the stage (not shown) on which the sheet-like insulating substrate 31 having a plurality of electrodes and a plurality of resistors are placed are combined. By sequentially repeating the operation of moving to the left by the pitch determined by the adjacent divided grooves 34, the resistance values of a plurality of resistors formed in a row are sequentially corrected. In the value correction method, of the two voltage terminals on the high potential side and the low potential side and the two current terminals on the high potential side and the low potential side, first, the two measurement terminals are placed in both adjacent divided grooves 34. Since the resistance value correction is performed by contacting one electrode formed across and contacting the remaining two measurement terminals one by one with each of the two electrodes, this resistance value correction method is In particular, small corners If it is adopted in the resistance value correction process of the resistor, two voltage terminals on the high potential side and the low potential side are respectively connected to two electrodes to which a resistor for measuring the resistance value is electrically connected as in the prior art. Compared to the case where the resistance value is corrected by bringing the two current terminals on the potential side and the low potential side into contact with each other, the electrode area that can be utilized by one resistance value measuring terminal increases. The certainty of contact with the electrode is increased. In this case, the resistance value measurement terminals in contact with the electrodes are different from each other with the first resistor 36 for correcting the resistance value between the high potential side voltage / current terminal and the low potential side voltage / current terminal. Although it is necessary to divide in the direction, if the contact condition is satisfied, the first resistor 36 is indirectly connected to the first and third electrodes 32 and 35 to which the first resistor 36 is directly connected. In the second electrode 33, it is not necessary to select the contact between the voltage terminal and the current terminal.

すなわち、上記本発明の実施の形態2においては、列で形成されている複数の第1の抵抗体36の抵抗値の修正を行う場合、複数の第1の電極32に複数の高電位側電圧端子38を接触させるとともに、複数の第3の電極35に複数の低電位側電圧端子39と低電位側電流端子40を接触させ、さらに前記複数の第2の電極33に複数の高電位側電流端子41を接触させるようにしていたが、これとは逆に、複数の第1の電極32に複数の低電位側電圧端子39を接触させるとともに、複数の第3の電極35に複数の高電位側電圧端子38と高電位側電流端子41を接触させ、さらに前記複数の第2の電極33に複数の低電位側電流端子40を接触させるようにしてもよく、この場合においても、上記実施の形態2と同様に、列で形成されている複数の第1の電極32と第2の電極33との間に電気的に接続されている複数の第1の抵抗体36の抵抗値の修正が行えるものである。   That is, in the second embodiment of the present invention, when the resistance values of the plurality of first resistors 36 formed in a row are corrected, a plurality of high potential side voltages are applied to the plurality of first electrodes 32. The terminal 38 is brought into contact, the plurality of low potential side voltage terminals 39 and the low potential side current terminal 40 are brought into contact with the plurality of third electrodes 35, and the plurality of high potential side currents are brought into contact with the plurality of second electrodes 33. In contrast to this, the terminals 41 are in contact with each other, but conversely, a plurality of low potential side voltage terminals 39 are brought into contact with the plurality of first electrodes 32 and a plurality of high potentials are applied to the plurality of third electrodes 35. The side voltage terminal 38 and the high potential side current terminal 41 may be brought into contact with each other, and the plurality of low potential side current terminals 40 may be brought into contact with the plurality of second electrodes 33. Like form 2, formed in rows That the plurality of first electrodes 32 and in which can be performed electrically the attached correction of resistance values of a plurality of first resistor 36 between the second electrode 33.

本発明にかかるチップ状電子部品の抵抗値修正方法は、従来に比べて小さい電極に接続される抵抗体の抵抗値を測定する場合、抵抗値測定端子が電極と接触不良を起こすこともなく、安定した抵抗値測定が可能となり、抵抗値修正も確実に行えるという効果を有し、回転基板に実装されるチップ状電子部品を構成する抵抗体の抵抗値修正方法として有用である。 The resistance value correcting method of the chip-shaped electronic component according to the present invention, when measuring the resistance value of a resistor connected to an electrode smaller than the conventional one, without causing a contact failure with the electrode, resistance value measurement terminal, Stable resistance value measurement is possible, and resistance value correction can be performed reliably. This is useful as a resistance value correction method for a resistor constituting a chip-shaped electronic component mounted on a rotating substrate.

本発明の実施の形態1におけるチップ抵抗器において、シート状の絶縁基板上に複数の電極と複数の抵抗体を形成した状態での抵抗値測定用の四端子の配置位置を示した模式図The chip resistor in Embodiment 1 of this invention WHEREIN: The schematic diagram which showed the arrangement position of four terminals for resistance value measurement in the state which formed the some electrode and the some resistor on the sheet-like insulating substrate 同抵抗値測定用四端子の配置位置を変えた状態を示す模式図Schematic diagram showing a state where the arrangement position of the four terminals for measuring the resistance value is changed. 本発明の実施の形態2におけるチップ抵抗器において、シート状の絶縁基板上に複数の電極と複数の抵抗体を形成した状態での抵抗値測定用の四端子の配置位置を示した模式図The chip resistor in Embodiment 2 of this invention WHEREIN: The schematic diagram which showed the arrangement position of four terminals for resistance value measurement in the state which formed the some electrode and the some resistor on the sheet-like insulating substrate 同抵抗値測定用四端子の配置位置を変えた状態を示す模式図Schematic diagram showing a state where the arrangement position of the four terminals for measuring the resistance value is changed. (a)(b)従来のチップ状電子部品の製造工程を示す製造工程図(A) (b) Manufacturing process diagram showing a manufacturing process of a conventional chip-shaped electronic component 従来のチップ状電子部品において、シート状の絶縁基板上に複数の電極と複数の抵抗体を形成した状態での抵抗値測定用の四端子の配置位置を示した模式図Schematic diagram showing the arrangement positions of four terminals for measuring resistance values in a state where a plurality of electrodes and a plurality of resistors are formed on a sheet-like insulating substrate in a conventional chip-shaped electronic component

符号の説明Explanation of symbols

11 シート状の絶縁基板
12 第1の電極
13 第2の電極
14 第3の電極
15 第4の電極
16 第1の抵抗体
17 第2の抵抗体
18 第3の抵抗体
19 高電位側電圧端子
20 低電位側電圧端子
21 高電位側電流端子
22 低電位側電流端子
23 分割溝
31 シート状の絶縁基板
32 第1の電極
33 第2の電極
34 分割溝
35 第3の電極
36 第1の抵抗体
37 第2の抵抗体
38 高電位側電圧端子
39 低電位側電圧端子
40 低電位側電流端子
41 高電位側電流端子
DESCRIPTION OF SYMBOLS 11 Sheet-like insulating substrate 12 1st electrode 13 2nd electrode 14 3rd electrode 15 4th electrode 16 1st resistor 17 2nd resistor 18 3rd resistor 19 High potential side voltage terminal 20 Low-potential-side voltage terminal 21 High-potential-side current terminal 22 Low-potential-side current terminal 23 Dividing groove 31 Sheet-like insulating substrate 32 First electrode 33 Second electrode 34 Dividing groove 35 Third electrode 36 First resistance Body 37 second resistor 38 high potential side voltage terminal 39 low potential side voltage terminal 40 low potential side current terminal 41 high potential side current terminal

Claims (5)

シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列、第3の電極列、第4の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列と、前記第2の電極列と第4の電極列との間に電気的に接続されるように形成された第3の抵抗体列とを有し、前記第1の電極列と第2の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第1の電極列と第2の電極列のいずれか他方に低電位側電圧端子列を接触させ、かつ前記第3の電極列と第4の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第3の電極列と第4の電極列のいずれか他方に低電位側電流端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列、第4の電極列の4列の電極列および前記第2の抵抗体列、第1の抵抗体列、第3の抵抗体列の3列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたチップ状電子部品の抵抗値修正方法。 The first electrode column formed in each row so as to straddle the dividing grooves formed on a sheet-like insulating substrate, a second electrode array, the third electrode row, and the fourth electrode row, the first electrode A first resistor row formed to be electrically connected between the row and the second electrode row; and an electrical connection between the first electrode row and the third electrode row. A second resistor row formed as described above, and a third resistor row formed so as to be electrically connected between the second electrode row and the fourth electrode row. a low potential with contacting the high-potential-side voltage terminal row on one of the first electrode array and second electrode array, to the other of said first electrode array and second electrode array contacting side voltage terminal rows, and with contacting the high-potential-side current terminal row on one of the third electrode row and the fourth electrode row, the third conductive The columns and the other one of the fourth electrode column by contacting a low-potential-side current terminal row, the third electrode row, first electrode array, the second electrode rows, four rows of the fourth electrode row The electrode array and the three resistor arrays of the second resistor array, the first resistor array, and the third resistor array serve as one measurement region, and the first resistor region includes the first resistor array. A resistance value correction method for a chip-shaped electronic component in which the resistance value of one resistor row is measured by a four-terminal measurement method, and the first resistor row is trimmed to correct the resistance value to a target resistance value. . シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列、第3の電極列、第4の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列と、前記第2の電極列と第4の電極列との間に電気的に接続されるように形成された第3の抵抗体列とを有し、前記第1の電極列と第2の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第1の電極列と第2の電極列のいずれか他方に低電位側電流端子列を接触させ、かつ前記第3の電極列と第4の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第3の電極列と第4の電極列のいずれか他方に低電位側電圧端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列、第4の電極列の4列の電極列および前記第2の抵抗体列、第1の抵抗体列、第3の抵抗体列の3列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたチップ状電子部品の抵抗値修正方法。 The first electrode column formed in each row so as to straddle the dividing grooves formed on a sheet-like insulating substrate, a second electrode array, the third electrode row, and the fourth electrode row, the first electrode A first resistor row formed to be electrically connected between the row and the second electrode row; and an electrical connection between the first electrode row and the third electrode row. A second resistor row formed as described above, and a third resistor row formed so as to be electrically connected between the second electrode row and the fourth electrode row. a low potential with contacting the high-potential-side current terminal row on one of the first electrode array and second electrode array, to the other of said first electrode array and second electrode array contacting side current terminal rows, and with contacting the high-potential-side voltage terminal row on one of the third electrode row and the fourth electrode row, the third conductive The columns and the other one of the fourth electrode column by contacting a low-potential-side voltage terminal row, the third electrode row, first electrode array, the second electrode rows, four rows of the fourth electrode row The electrode array and the three resistor arrays of the second resistor array, the first resistor array, and the third resistor array serve as one measurement region, and the first resistor region includes the first resistor array. A resistance value correction method for a chip-shaped electronic component in which the resistance value of one resistor row is measured by a four-terminal measurement method, and the first resistor row is trimmed to correct the resistance value to a target resistance value. . シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列、第3の電極列、第4の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列と、前記第2の電極列と第4の電極列との間に電気的に接続されるように形成された第3の抵抗体列とを有し、前記第1の電極列と第4の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第1の電極列と第4の電極列のいずれか他方に低電位側電流端子列を接触させ、かつ前記第3の電極列と第2の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第3の電極列と第2の電極列のいずれか他方に低電位側電圧端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列、第4の電極列の4列の電極列および前記第2の抵抗体列、第1の抵抗体列、第3の抵抗体列の3列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたチップ状電子部品の抵抗値修正方法。 The first electrode column formed in each row so as to straddle the dividing grooves formed on a sheet-like insulating substrate, a second electrode array, the third electrode row, and the fourth electrode row, the first electrode A first resistor row formed to be electrically connected between the row and the second electrode row; and an electrical connection between the first electrode row and the third electrode row. A second resistor row formed as described above, and a third resistor row formed so as to be electrically connected between the second electrode row and the fourth electrode row. a low potential with contacting the high-potential-side current terminal row on one of the first electrode array and the fourth electrode row, to the other of said first electrode array and the fourth electrode row contacting side current terminal rows, and with contacting the high-potential-side voltage terminal row on one of the third electrode array and second electrode array, said third conductive To the other of the columns and the second electrode array by contacting the low-potential-side voltage terminal row, the third electrode row, first electrode array, the second electrode rows, four rows of the fourth electrode row The electrode array and the three resistor arrays of the second resistor array, the first resistor array, and the third resistor array serve as one measurement region, and the first resistor region includes the first resistor array. A resistance value correction method for a chip-shaped electronic component in which the resistance value of one resistor row is measured by a four-terminal measurement method, and the first resistor row is trimmed to correct the resistance value to a target resistance value. . シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列と、前記相隣る分割溝の両方を跨ぐように形成された第3の電極列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第2の抵抗体列とを有し、前記第1の電極列と第3の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第1の電極列と第3の電極列のいずれか他方に低電位側電圧端子列を接触させ、かつ前記第2の電極列と第3の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第2の電極列と第3の電極列のいずれか他方に低電位側電流端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列の3列の電極列および前記第1の抵抗体列、第2の抵抗体列の2列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたチップ状電子部品の抵抗値修正方法。 The first electrode column formed in each row so as to straddle the dividing grooves formed on a sheet-like insulating substrate, a second electrode array, the third, which is formed so as to straddle both the phase Tonariru dividing groove of the electrode array, the first and the resistor string formed so as to be electrically connected between said first electrode array and the third electrode row, the first electrode array and the second and a second resistor string formed so as to be electrically connected between the electrode array, the first electrode array and the high-potential-side voltage terminals to one of the third electrode row A row is brought into contact, a low potential side voltage terminal row is brought into contact with either one of the first electrode row and the third electrode row , and one of the second electrode row and the third electrode row in conjunction with contacting the high-potential-side current terminal row, contact the low potential side current terminal row to the other of said second electrode array and the third electrode row Allowed by the third electrode row, first electrode row, three rows of electrode columns and the first resistor string to the second electrode array, the resistor string two rows of the second resistor string One measurement region is formed, and the first resistor row is trimmed to the target resistance value while measuring the resistance value of the first resistor row by the four-terminal measurement method in the one measurement region. A method of correcting a resistance value of a chip-shaped electronic component which is adapted to correct a resistance value. シート状の絶縁基板に形成した分割溝を跨ぐようにそれぞれ列で形成された第1の電極列、第2の電極列と、前記相隣る分割溝の両方を跨ぐように形成された第3の電極列と、前記第1の電極列と第2の電極列との間に電気的に接続されるように形成された第1の抵抗体列と、前記第1の電極列と第3の電極列との間に電気的に接続されるように形成された第2の抵抗体列とを有し、前記第1の電極列と第2の電極列のいずれか一方に高電位側電流端子列を接触させるとともに、前記第1の電極列と第2の電極列のいずれか他方に低電位側電流端子列を接触させ、かつ前記第2の電極列と第3の電極列のいずれか一方に高電位側電圧端子列を接触させるとともに、前記第2の電極列と第3の電極列のいずれか他方に低電位側電圧端子列を接触させて、前記第3の電極列、第1の電極列、第2の電極列の3列の電極列および前記第1の抵抗体列、第2の抵抗体列の2列の抵抗体列を一つの測定領域とし、かつこの一つの測定領域の中で前記第1の抵抗体列の抵抗値を四端子測定法により測定しながらこの第1の抵抗体列をトリミングして目的の抵抗値まで抵抗値修正を行うようにしたチップ状電子部品の抵抗値修正方法。 The first electrode column formed in each row so as to straddle the dividing grooves formed on a sheet-like insulating substrate, a second electrode array, the third, which is formed so as to straddle both the phase Tonariru dividing groove of the electrode array, said first electrode array and first resistor string formed so as to be electrically connected between the second electrode array, said first electrode array and the third A second resistor row formed so as to be electrically connected to the electrode row, and a high-potential side current terminal is connected to either the first electrode row or the second electrode row. And a low potential side current terminal row in contact with either one of the first electrode row and the second electrode row , and one of the second electrode row and the third electrode row contact with contacting the high-potential-side voltage terminal row, the low-potential-side voltage terminal row to the other of said second electrode array and the third electrode columns Allowed by the third electrode row, first electrode row, three rows of electrode columns and the first resistor string to the second electrode array, the resistor string two rows of the second resistor string One measurement region is formed, and the first resistor row is trimmed to the target resistance value while measuring the resistance value of the first resistor row by the four-terminal measurement method in the one measurement region. A method of correcting a resistance value of a chip-shaped electronic component which is adapted to correct a resistance value.
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