JP2006013164A - Printed board with chip land - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed board with chip lands mounting a 0-ohm chip wherein the chip lands can be eliminated through short-circuit without the need for revising the board. <P>SOLUTION: A short-circuit purpose land pattern 2 of a forked and almost U-shape and the left and right sides of which are tilted like shoulders is located between a pair of left and right chip lands 1A, 1B, so that leg shaped parts 2a, 2b of the pattern 2 are deposited between the chip lands 1A, 1B. A pair of ground patterns 3A, 3B is placed in the vicinity above and under a short neck shaped part 2c formed in the middle of the short-circuit purpose land pattern 2 in the case of chip mounting, the short neck shaped part 2c of the short-circuit purpose land pattern 2 and the ground patterns 3A, 3B are subjected to soldering 4 by a DIP layer to short-circuit both the patterns, and when no chip is mounted, a pair of the left and right chip lands 1A, 1B are soldered to the leg shaped parts 2a, 2b of the short-circuit purpose land pattern 2 by the DIP layer to short-circuit the chip lands 1A, 1B to the short-circuit purpose land pattern 2, thereby eliminating both the chip lands 1A, 1B. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a printed circuit board having chip lands in which a pair of left and right chip lands are not erased when a chip is mounted but are short-circuited to a ground pattern when the chip is not mounted to erase the chip lands.

  Conventionally, in order to erase chip lands provided on a substrate, the substrate must be changed to another substrate.

  The first prior art is shown in FIG. 4, FIG. 5, and FIG. The land 112 and the signal line 113 are formed on the upper surface of the printed board 111. A sub-brand 114 is formed inside the land 112 at a small interval t, and the land 112 and the sub-brand 114 are connected by an additional pattern 115. When adding the electronic component 116, cream solder 117 is applied to the land 112, and the electronic component 116 is soldered by the cream solder 117. In this state, the sub-brands 114 are not connected to each other. When the electronic component 116 is not mounted, the sub-brands 114 are connected with the cream solder 117. (For example, refer to Patent Document 1).

  However, in this case, the erasure of the land 112 was not described.

  The second prior art is shown in FIGS. This is because a pair of lands 202A and 202B are integrally formed in an open state on the wiring 202 on the substrate 201, and chip parts are mounted between the lands 202A and 202B as necessary, or both the lands 202A and 202B are mounted. In the wiring board device in which the two are short-circuited, a pair of substantially L-shaped electrodes 202a and 202b are integrally formed on the lands 202A and 202B, respectively, and the ends of the substantially L-shaped electrodes 202a and 202b are connected to each other. They are approached so as to be intertwined with each other with a predetermined gap α. (For example, refer to Patent Document 2).

However, in this, the short circuit of the lands 202A and 202B to the ground is not described.
JP-A-8-279661 JP 2002-271008 A

  The present invention has been made in view of the above-described conventional situation, and a printed circuit board having a chip land that can be erased by short-circuiting a chip land that can mount a 0Ω chip without changing the substrate. It is intended to provide.

  The present invention has been proposed in order to solve the above-mentioned problems. The invention according to claim 1 is that the pair of left and right chip lands are not erased when the chip is mounted, but are short-circuited to the ground pattern when the chip is not mounted. In the printed circuit board having the chip lands which erase the chip lands, the left and right leg-shaped portions are arranged between the pair of left and right chip lands, and the left and right are shoulder-shaped. An inclined short-circuit land pattern is provided, and a pair of ground patterns are provided near the top and bottom of the short-neck portion at the center of the short-circuit land pattern. When the chip is not mounted, the pair of left and right chip lands are short-circuited. The chip land is short-circuited to the short-circuit land pattern by being soldered to a leg-shaped portion of the land pattern by a DIP layer, and the both chip lands are erased, and the leg shape of the short-circuit land pattern It is characterized in that the tip portion of the portion is inclined from the inner side toward the outer chip land side.

  According to a second aspect of the present invention, there is provided a printed circuit board having a chip land in which the pair of left and right chip lands are not erased when the chip is mounted, but are short-circuited to the ground pattern when the chip is not mounted. A bifurcated substantially U-shaped short-circuit land pattern is provided so that the leg-shaped portions on both sides are arranged between a pair of chip lands, and a location near the top and bottom of the horizontal shoulder-shaped portion at the center of the short-circuit land pattern When the chip is mounted, the horizontal shoulder shape portion of the short-circuit land pattern and the ground pattern are soldered with a DIP layer to short-circuit both patterns. A pair of chip lands are soldered to the leg shape portion of the short-circuit land pattern with a DIP layer so that the two chip lands are Shorted to 絡用 land pattern is characterized by being configured the so that both chip lands are deleted.

  According to the first aspect of the present invention, when the chip land provided on the printed circuit board is not used, the chip land can be erased by short-circuiting to the short-circuit land pattern, and the 0Ω chip can be mounted. The chip land can be deleted by short-circuiting without changing the substrate. In addition, since the tip portion of the leg shape portion of the short-circuit land pattern is inclined from the inner side toward the outer chip land side, the solder is chipped when soldering on the DIP layer when the chip land is erased. It can be made easier to flow to the land side.

  According to the second aspect of the present invention, when the chip land provided on the printed circuit board is not used, the chip land can be erased by short-circuiting to the short-circuit land pattern, and the 0Ω chip can be mounted. The chip land can be deleted by short-circuiting without changing the substrate.

  Hereinafter, embodiments of a printed circuit board having chip lands according to the present invention will be described with reference to the drawings.

  FIG. 1 is a partial plan view of a printed circuit board having chip lands according to an embodiment of the present invention.

  As shown in FIG. 1, the printed circuit board having chip lands of the present embodiment has a bifurcated substantially U-shape so that leg-shaped portions 2a and 2b on both sides are disposed between a pair of left and right chip lands 1A and 1B. The short-circuiting land pattern 2 inclined right and left in a shoulder shape is provided, and a pair of ground patterns 3A and 3B are provided near the top and bottom of the short neck portion 2c at the center of the short-circuiting land pattern 2. Furthermore, inclined portions 2d and 2e are provided in which the tip portions of the leg-shaped portions 2a and 2b of the short-circuit land pattern 2 are inclined from the inner side toward the outer chip lands 1A and 1B.

  FIG. 2 is a partial plan view showing a state in which the short-circuit land pattern and the ground pattern on the substrate are short-circuited by soldering with a DIP layer in the DIP direction.

  As shown in FIG. 2, at the time of chip mounting, the short neck portion 2c of the short-circuit land pattern 2 and the ground patterns 3A and 3B are soldered with the solder 4 in a DIP layer in the DIP direction. 3B is short-circuited.

  FIG. 3 is a partial plan view showing a state in which the chip land and the shorting land pattern on the same substrate are soldered with a DIP layer and short-circuited to erase the chip land.

  As shown in FIG. 3, when the chip is not mounted, the pair of left and right chip lands 1A and 1B are soldered to the leg shape portions 2a and 2b of the short-circuit ground pattern 2 by depositing solder 4 with a DIP layer in the DIP direction. The chip lands 1A and 1B are short-circuited to the short-circuit land pattern 2, and the chip lands 1A and 1B are erased.

  According to this embodiment, when the chip lands 1A and 1B provided on the printed circuit board are not used, the chip lands 1A and 1B can be erased by short-circuiting to the short-circuit land pattern 2, and a 0Ω chip can be mounted. The chip lands 1A and 1B thus made can be deleted by short-circuiting without changing the substrate. In addition, since the tip portions of the leg-shaped portions 2a and 2b of the short-circuit land pattern 2 are inclined from the inner side toward the outer chip lands 1A and 1B, the DIP layer when the chip lands 1A and 1B are erased It is possible to facilitate the flow of the solder 4 to the chip land side during soldering.

  Of course, the shape of the short-circuit land pattern 2 is not limited to the shape described in the above embodiment, and may be, for example, the shape of a horizontal shoulder shape portion.

It is a fragmentary top view of the printed circuit board which has a chip land of an embodiment of the present invention. It is a fragmentary top view which shows the state which soldered the short circuit land pattern and ground pattern in the board | substrate with the DIP layer, and was short-circuited. It is the fragmentary top view which shows the state which soldered the chip land and short circuit land pattern in the board | substrate with the DIP layer, and short-circuited, and erase | eliminated the chip land. It is a partial top view which shows the conventional printed circuit board. It is a fragmentary top view of the state which mounted the electronic component on the conventional printed circuit board. It is a fragmentary top view of the state which does not mount an electronic component on the conventional printed circuit board. It is a perspective view of the conventional wiring board apparatus. It is a top view of the apparatus.

Explanation of symbols

1A Left chip land 1B Right chip land 2 Short-circuit land pattern 2a Leg shape portion 2b Leg shape portion 2c Short neck shape portion 2d Inclined portion 2e Inclined portion 3A Ground pattern 3B Ground pattern 4 Solder

Claims (2)

In a printed circuit board having chip lands that are not erased when the chip is mounted, but are not erased when the chip is mounted, but are short-circuited to the ground pattern when the chip is not mounted, the chip lands are erased between the pair of left and right chip lands. A short-circuiting land pattern having a bifurcated substantially U-shape and inclined to the left and right shoulders is provided so that the leg-shaped portion is arranged, and a pair of short-circuiting land patterns are formed at positions near the top and bottom of the short neck-shaped portion at the center. When the chip is mounted, the short neck portion of the shorting land pattern and the ground pattern are soldered with a DIP layer to short-circuit both patterns. When the chip is not mounted, the pair of left and right A chip land is soldered to a leg shape portion of the short-circuit land pattern with a DIP layer, and the chip land is used for the short-circuit. The chip lands are short-circuited so that the two chip lands are erased, and the tip portions of the leg-shaped portions of the short-circuit land pattern are inclined from the inner side toward the outer chip land side. A printed circuit board having chip lands. In a printed circuit board having chip lands that are not erased when the chip is mounted, but are not erased when the chip is mounted, but are short-circuited to the ground pattern when the chip is not mounted, the chip lands are erased between the pair of left and right chip lands. A bifurcated substantially U-shaped short-circuit land pattern is provided so that the leg-shaped portion is arranged, and a pair of ground patterns are provided in the vicinity of the top and bottom of the horizontal shoulder-shaped portion at the center of the short-circuit land pattern. When the chip is mounted, the horizontal shoulder shape portion of the short-circuit land pattern and the ground pattern are soldered with the DIP layer to short-circuit both patterns. When the chip is not mounted, the pair of left and right chip lands are the short-circuit land. The two chip lands are short-circuited to the short-circuit land pattern by soldering to the leg shape portion of the pattern with a DIP layer. Printed circuit board having a chip lands, characterized by being configured the so that both chip lands are deleted by.

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