JP4415769B2 - Printed circuit board having chip land - Google Patents

Description

The present invention relates to a printed circuit board having chip lands in which a pair of left and right chip lands are not erased when a chip is mounted, but are short-circuited to a short-circuit land pattern when the chip is not mounted.

  Conventionally, in order to erase chip lands provided on a substrate, the substrate must be changed to another substrate.

  The first prior art is shown in FIG. 4, FIG. 5, and FIG. The land 112 and the signal line 113 are formed on the upper surface of the printed board 111. A sub-brand 114 is formed inside the land 112 at a small interval t, and the land 112 and the sub-brand 114 are connected by an additional pattern 115. When adding the electronic component 116, cream solder 117 is applied to the land 112, and the electronic component 116 is soldered by the cream solder 117. In this state, the sub-brands 114 are not connected to each other. When the electronic component 116 is not mounted, the sub-brands 114 are connected with cream solder 117. (For example, refer to Patent Document 1).

  However, in this case, the erasure of the land 112 was not described.

  The second prior art is shown in FIGS. This is because a pair of lands 202A and 202B are integrally formed in an open state on the wiring 202 on the substrate 201, and chip parts are mounted between the lands 202A and 202B as necessary, or both the lands 202A and 202B are mounted. In the wiring board device in which the two are short-circuited, a pair of substantially L-shaped electrodes 202a and 202b are integrally formed on the lands 202A and 202B, respectively, and the ends of the substantially L-shaped electrodes 202a and 202b are connected to each other. They are approached so as to be intertwined with each other with a predetermined gap α. (For example, refer to Patent Document 2).

However, in this, the short circuit of the lands 202A and 202B to the ground is not described.
JP-A-8-279661 JP 2002-271008 A

  The present invention has been made in view of the above-described conventional situation, and a printed circuit board having a chip land that can be erased by short-circuiting a chip land that can mount a 0Ω chip without changing the substrate. It is intended to provide.

The present invention has been proposed in order to solve the above-described problem. The invention according to claim 1 is directed to a land pattern for short-circuiting when a pair of left and right chip lands are not erased when the chip is mounted, and when the chip is not mounted. In a printed circuit board having chip lands that are short-circuited to erase the chip lands, the left and right shoulders are bifurcated substantially U-shaped so that the leg shape portions on both sides are arranged between the pair of left and right chip lands. A short-circuiting land pattern inclined in a shape is provided, and a pair of ground patterns is provided in the vicinity of the top and bottom of the short neck portion at the center of the short-circuiting land pattern. neck shaped portion and the ground pattern soldered both patterns are short-circuited by DIP tank, at the time of chip unimplemented, the pair of right and left tip land the Configured such that the both chips land leg-shaped portion soldered to the tip land in DIP tank of絡用land pattern is short-circuited to the short land pattern is deleted, the legs of the short land pattern The tip portion of the part-shaped portion is inclined from the inner side toward the outer chip land side.

The invention according to claim 2 is a printed circuit board having chip lands in which the pair of left and right chip lands are not erased when the chip is mounted, and the chip lands are erased by short-circuiting to the shorting land pattern when the chip is not mounted. A bifurcated substantially U-shaped short-circuit land pattern is provided so that the leg-shaped portions on both sides are arranged between the pair of left and right chip lands, and above and below the horizontal shoulder-shaped portion at the center of the short-circuit land pattern. A pair of ground patterns are provided in the vicinity, and at the time of chip mounting, the horizontal shoulder shape part of the short-circuit land pattern and the ground pattern are soldered in a DIP bath so that both patterns are short-circuited. the two chips land the pair of right and left tip land is soldered in DIP tank leg-shaped portion of the short land pattern Shorted to serial shorting land pattern is characterized by being configured the so that both chip lands are deleted.

According to the first aspect of the present invention, when the chip land provided on the printed circuit board is not used, the chip land can be erased by short-circuiting to the short-circuit land pattern, and the 0Ω chip can be mounted. The chip land can be deleted by short-circuiting without changing the substrate. In addition, since the tip end portion of the leg shape portion of the short-circuit land pattern is inclined from the inner side toward the outer chip land side, the solder is chipped when soldering in the DIP tank when erasing the chip land. It can be made easier to flow to the land side.

  According to the second aspect of the present invention, when the chip land provided on the printed circuit board is not used, the chip land can be erased by short-circuiting to the short-circuit land pattern, and the 0Ω chip can be mounted. The chip land can be deleted by short-circuiting without changing the substrate.

  Hereinafter, embodiments of a printed circuit board having chip lands according to the present invention will be described with reference to the drawings.

  FIG. 1 is a partial plan view of a printed circuit board having chip lands according to an embodiment of the present invention.

  As shown in FIG. 1, the printed circuit board having chip lands of the present embodiment has a bifurcated substantially U-shape so that leg-shaped portions 2a and 2b on both sides are disposed between a pair of left and right chip lands 1A and 1B. The short-circuiting land pattern 2 inclined right and left in a shoulder shape is provided, and a pair of ground patterns 3A and 3B are provided near the top and bottom of the short neck portion 2c at the center of the short-circuiting land pattern 2. Furthermore, inclined portions 2d and 2e are provided in which the tip portions of the leg-shaped portions 2a and 2b of the short-circuit land pattern 2 are inclined from the inner side toward the outer chip lands 1A and 1B.

FIG. 2 is a partial plan view showing a state in which a short-circuit land pattern and a ground pattern on the substrate are short-circuited by soldering in a DIP tank in a DIP direction.

As shown in FIG. 2, at the time of chip mounting, the short neck portion 2c of the short-circuit land pattern 2 and the ground patterns 3A and 3B are soldered with solder 4 in a DIP tank in the DIP direction, and both patterns 2, 3A, 3B is short-circuited.

FIG. 3 is a partial plan view showing a state in which the chip land and the short-circuit land pattern on the substrate are soldered in a DIP bath and short-circuited to erase the chip land.

As shown in FIG. 3, when the chip is not mounted, the pair of left and right chip lands 1A and 1B are soldered to the leg shape portions 2a and 2b of the short-circuit ground pattern 2 by depositing the solder 4 in the DIP direction in the DIP tank. The chip lands 1A and 1B are short-circuited to the short-circuit land pattern 2, and the chip lands 1A and 1B are erased.

According to this embodiment, when the chip lands 1A and 1B provided on the printed circuit board are not used, the chip lands 1A and 1B can be erased by short-circuiting to the short-circuit land pattern 2, and a 0Ω chip can be mounted. The chip lands 1A and 1B thus made can be deleted by short-circuiting without changing the substrate. Further, since the tip end portions of the leg-shaped portions 2a and 2b of the short-circuit land pattern 2 are inclined from the inner side toward the outer chip lands 1A and 1B, a DIP tank for erasing the chip lands 1A and 1B. It is possible to facilitate the flow of the solder 4 to the chip land side during soldering.

  Note that the shape of the short-circuit land pattern 2 is not limited to the shape described in the above embodiment, and may be, for example, the shape of a horizontal shoulder shape portion.

It is a fragmentary top view of the printed circuit board which has a chip land of an embodiment of the present invention. It is a partial top view which shows the state which soldered the short circuit land pattern and ground pattern in the board | substrate in the DIP tank , and was short-circuited. It is the fragmentary top view which shows the state which soldered the chip land and the short circuit land pattern in the board | substrate in the DIP tank , short-circuited, and erase | eliminated the chip land. It is a partial top view which shows the conventional printed circuit board. It is a fragmentary top view of the state which mounted the electronic component on the conventional printed circuit board. It is a fragmentary top view of the state which does not mount an electronic component on the conventional printed circuit board. It is a perspective view of the conventional wiring board apparatus. It is a top view of the apparatus.

Explanation of symbols

1A Left chip land 1B Right chip land 2 Short-circuit land pattern 2a Leg shape portion 2b Leg shape portion 2c Short neck shape portion 2d Inclined portion 2e Inclined portion 3A Ground pattern 3B Ground pattern 4 Solder

Claims (2)

In a printed circuit board having chip lands which are not erased when the chip is mounted, but are not erased when the chip is mounted, but are short-circuited to the shorting land pattern when the chip is not mounted, the chip land is erased, between the left and right chip lands. A short-circuiting land pattern with a bifurcated substantially U-shape and sloping left and right shoulders is provided so that the leg shape parts on both sides are arranged, and the upper and lower portions of the short neck shape part at the center of this short-circuiting land pattern When the chip is mounted, the short neck portion of the shorting land pattern and the ground pattern are soldered in a DIP bath to short-circuit both patterns. said chip land the short is soldered DIP tank a pair of chip land the leg-shaped portion of the short land pattern A short-circuited land pattern, and the two chip lands are configured to be erased, and the tip portion of the leg-shaped portion of the short-circuiting land pattern is inclined from the inner side toward the outer chip land side. A printed circuit board having a featured chip land. In a printed circuit board having chip lands which are not erased when the chip is mounted, but are not erased when the chip is mounted, but are short-circuited to the shorting land pattern when the chip is not mounted, the chip land is erased, between the left and right chip lands. A bifurcated, substantially U-shaped short-circuit land pattern is provided so that the leg-shaped portions on both sides are arranged, and a pair of ground patterns are provided in the vicinity of the top and bottom of the horizontal shoulder-shaped portion at the center of the short-circuit land pattern. When the chip is mounted, the horizontal shoulder shape portion of the short-circuit land pattern and the ground pattern are soldered in a DIP bath to short-circuit both patterns. When the chip is not mounted, the pair of left and right chip lands are short-circuited. wherein the leg-shaped portion of the use land pattern are soldered DIP tank both chips land the short land pattern Printed circuit board having a chip lands, wherein the shorted both chips land is configured to be deleted.

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