JP2005189382A - Display device, drive circuit of display device and method for driving display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device by, for instance, an organic EL element for preventing face irregularity, black lift and deterioration of contrast by correcting threshold voltage of a transistor driving a light emitting element. <P>SOLUTION: The display device corrects irregularity of a transistor TR2 and sets gradation by setting a signal level of a signal line SIG after setting the threshold voltage of the transistor TR2 in the capacitor Cs2 for holding a signal level provided between gate sources of the transistor TR2 to the transistor TR2 driving by current the light emitting element 12 by source follower circuit configuration. It offsets voltage between terminals of the capacitor Cs2 for holding the signal level so as to lower gradation by reference voltage Vof connected to a capacitor Cs1 for coupling, or generates a drive signal to a signal line by being offset in a direction lowering gradation only by a black level. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display device, a display device drive circuit, and a display device drive method, and can be applied to, for example, a display device using an organic EL (Electro Luminescence) element. The present invention relates to a transistor for driving a light emitting element with a source follower circuit configuration, and after setting a threshold voltage of a transistor in a signal level holding capacitor provided between the gate and source of the transistor, In the configuration in which gradation is set by correcting the transistor variation by setting the signal level of the signal level, the signal level holding capacitor terminals are arranged so that the gradation is lowered by the reference voltage connected to the coupling capacitor. The threshold voltage of the transistor driving the light emitting element is corrected by offsetting the voltage and offsetting in the direction in which the gradation is lowered by the black level to generate the drive signal to the signal line. Prevents surface roughness, black float, and contrast degradation.

  Conventionally, in organic EL display devices, various applications to display devices have been proposed, for example, in US Pat. No. 5,684,365 and JP-A-8-234683.

  That is, as shown in FIG. 11, in this type of display device 1, the pixel unit 2 has scanning lines SCN provided in the horizontal direction in units of lines with respect to the pixels (PX) 3 arranged in a matrix. A signal line SIG is provided in the vertical direction for each column so as to be orthogonal to the scanning line SCN. For the pixel portion 2 formed in this way, the display device 1 drives the scanning line SCN by the vertical drive circuit 4 to sequentially select the pixels 3 of the pixel portion 2 in units of lines, and this pixel 3 The gray level of each pixel 3 is set by driving the signal line SIG by the horizontal drive circuit 5 so as to correspond to the selection.

  For this reason, the vertical drive circuit 4 generates a write signal ws for sequentially instructing writing to each pixel 3 in line units by the write scan circuit (WSCN) 4A, and outputs the write signal ws to the scan line SCN. The setting of gradation in the pixel 3 is controlled. The horizontal drive circuit 5 generates a drive signal in accordance with the gradation data D1 indicating the gradation of each pixel 3, distributes this drive signal to each signal line SIG by the horizontal selector (HSEL) 5A, and outputs it. Thus, the display device 1 is configured to set the gradation of each pixel 3 in line units.

  In the organic EL display device, each pixel 3 driven in this manner includes an organic EL element that is a self-luminous element driven by current driving, and a driving circuit (hereinafter referred to as a pixel driving circuit) that drives the organic EL element. (Referred to as a pixel circuit).

  In the display device thus formed, each pixel circuit is formed by an n-channel MOS type TFT (Thin Film Transistor), and the anode of the organic EL element is connected to the transistor. By driving with current, an organic EL element and a pixel circuit can be integrally formed on a glass substrate by applying an amorphous silicon process. As a result, as shown in FIG. It is conceivable to drive the element 12.

  That is, the display device 11 shown in FIG. 12 is formed in each pixel 3 so that the organic EL element 12 is current-driven by the transistor TR2 having a source follower circuit configuration in which the source is connected to the anode of the organic EL element 12. A signal level holding capacitor C1 is provided at the gate of the transistor TR2. The display device 11 outputs the write signal ws from the write scan circuit 4A provided in the vertical drive circuit 4, and this signal level holding capacitor C1 by the switch circuit by the transistor TR1 that is turned on by the write signal ws. Is connected to the signal line SIG, whereby the gate voltage Vg of the transistor TR2 is set according to the signal level of the drive signal output to the signal line SIG in response to the write signal ws. As a result, the display device 11 drives the organic EL element 12 with a current corresponding to the gate voltage Vg set in this way, and emits the organic EL element 12 of each pixel 3 with a gradation corresponding to the gradation data D1. Thus, a desired image can be displayed.

  However, in an organic EL element, as shown in FIG. 13, the current-voltage characteristics change in a direction in which current hardly flows through use. In FIG. 13 and FIG. 14, the symbol L1 indicates the initial characteristics, and the symbol L2 indicates the characteristics due to the change with time. On the other hand, in the driving by the sofa follower circuit described above with reference to FIG. 12, the characteristic curve due to the load intersects the characteristic curve of the drain-source voltage Vds−the drain source current Ids of the transistor TR2 as shown in FIG. The intersecting point becomes the operating point. As a result, when the current-voltage characteristics change in the organic EL element, the current flowing through the organic EL element is reduced by that amount, thereby causing a disadvantage that the luminance of each pixel is gradually lowered to deteriorate the image quality.

As one method for solving this drawback, a method of controlling the drive current of the organic EL element 12 by setting the gradation by the gate-source voltage Vgs instead of simply setting the gradation by the gate voltage Vg can be considered. That is, in the drain current Ids of the TFT, it is expressed by (1/2) × μ × (W / L) Cox (Vgs−Vth) ² (1), thereby setting the gradation by the gate-source voltage Vgs. Thus, it is possible to prevent a change in drive current due to a change with time. Here, μ is the carrier mobility, W is the gate width, L is the gate length, Cox is the gate capacitance per unit area, and Vth is the threshold voltage.

  However, when the gradation is set by the gate-source voltage Vgs in this way, as is clear from the equation (1), if the threshold voltage Vth of the transistor that drives the organic EL element varies, the corresponding amount in each pixel. There is a drawback in that the drive current varies, and the image quality deteriorates. Accordingly, as a method for eliminating this drawback, a threshold voltage Vth of the transistor is set in advance in a capacitor for holding the signal level for gradation setting, and the capacitor for holding the signal level is set by this threshold voltage. It is conceivable to correct the terminal voltage.

  FIG. 15 is a block diagram showing a display device considered to be able to eliminate these drawbacks by contrast with FIG. In this display device 31, in each pixel 33, a signal level holding capacitor Cs2 is arranged between the gate and source of the transistor TR2 in place of the arrangement of the signal level holding capacitor C1 between the gate and drain of the transistor TR2. The terminal voltage of the signal level holding capacitor Cs2 is set according to the signal level of the signal line SIG. Further, when a switch circuit composed of a transistor TR3 which is turned on by the drive scan signal ds1 is connected to the source of the transistor TR2, the terminal voltage of the signal level holding capacitor Cs2 is set by the signal level of the signal line SIG. The source side end of the signal level holding capacitor Cs2 is held at a constant potential. In FIG. 15, this constant potential is the ground potential.

  Thereby, in the transistor TR2, the organic EL element 12 can be driven by the gate-source voltage Vgs based on the inter-terminal voltage held in the signal level holding capacitor Cs2, and the voltage-current characteristics of the organic EL element 12 change over time. Even so, it is possible to prevent the deterioration of the image quality by preventing the change of the drive current due to the change with time.

  The display device 31 is provided with a coupling capacitor Cs1 between the signal level holding capacitor Cs2 and the transistor TR1, so as to set the gradation by setting the gate-source voltage Vgs. The terminal voltage of the signal level holding capacitor Cs2 is set by the signal level Vin of the signal line SIG via the coupling capacitor Cs1. In this case, the voltage between the terminals of the signal level holding capacitor Cs2 due to the connection to the signal line SIG via the capacitor Cs1 is the voltage ΔVin = Vin obtained by dividing the signal level Vin of the signal line SIG by the capacitors Cs1 and Cs2. (Cs1 / (Cs1 + Cs2))... (2). Accordingly, the signal line SIG is driven by the horizontal drive circuit 35 in consideration of this relational expression.

  Further, the display device 31 is connected to the reference voltage by the switch circuit by the transistor TR4 that stops the supply of the power source Vcc to the transistor TR2, the switch circuit by the transistor TR5 that short-circuits the gate and source of the transistor TR2, and the transistor TR1 side end of the capacitor Cs1. A switch circuit comprising a transistor TR6 is provided. Even in the reference voltage related to the transistor TR6, the display device 31 is set to the ground potential.

  Accordingly, as shown in FIGS. 16 and 17A, the display device 31 current-drives the organic EL element 12 with the transistor TR2 by the gate-source voltage Vgs by the signal level holding capacitor Cs2, and generates the write signal ws. Immediately before setting the gradation of the pixel 33, with the power supply Vcc supplied to the transistor TR2, the transistor TR5 is turned on by the control signal az and the transistor TR2 is diode-connected, and the coupling capacitor Cs1 is connected. The signal line side end is set to a predetermined reference potential (FIGS. 16A, 16B, and 17B). After that, the supply of power Vcc to the transistor TR2 is stopped by the transistor TR4, and the source of the transistor TR2 is connected to the reference voltage by the transistor TR3 (FIGS. 16C, 16D, and 17C). As a result, in this display device 31, even if the voltage across the terminals of the signal level holding capacitor Cs2 is equal to or lower than the threshold voltage Vth of the transistor TR2, the display device 31 once exceeds the threshold voltage Vth of the transistor TR2. The gate-source voltage Vgs of the transistor TR2 is raised and then converged to the threshold voltage Vth, so that the threshold voltage Vth of the transistor TR2 is set in the signal level holding capacitor Cs2. Has been made. (FIGS. 16E and 16F).

  When the threshold voltage Vth is set to the signal level holding capacitor Cs2 in this manner, the display device 31 causes the control signal az to fall while the source of the transistor TR2 is connected to the reference voltage by the transistor TR3. Thus, the diode connection by the transistor TR5 is stopped, and the connection of the coupling capacitor Cs1 to the reference voltage by the transistor TR6 is stopped (FIGS. 16B and 17D). Subsequently, the transistor TR1 is controlled by the rising of the write signal ws to connect the signal line SIG to the coupling capacitor Cs1, thereby holding the source side end of the signal level holding capacitor Cs2 at the reference voltage. In this state, the terminal voltage of the signal level holding capacitor Cs2 is set by the signal level Vin of the signal line SIG through the coupling capacitor Cs1, and thereby, between the gate and source of the transistor TR2 used for driving the organic EL element 12 The voltage Vgs is set (FIGS. 16C and 17D). In this case, since the threshold voltage Vth of the transistor TR2 is set in advance in the signal level holding capacitor Cs2, the threshold voltage Vth of the signal level holding capacitor Cs2 is set. The voltage between the terminals is set by a voltage that is higher by a corresponding amount, so that the term of -Vth in parentheses in the equation (1) is set to be canceled, and the organic EL element 12 is driven by the transistor TR2. This prevents variations in drive current due to variations in the threshold voltage Vth of the transistor TR2.

  Thus, in the display device 31, after the transistors TR1 and TR3 are returned to the original settings, the supply of the power supply Vcc is started by the transistor TR4, so that the signal level holding capacitor Cs2 thus set is connected between the terminals. The organic EL element 12 is current-driven by the voltage (FIG. 17E). FIGS. 17A to 17E show settings of the transistors TR1 to TR6 corresponding to the periods TA to TE in FIG. 16, respectively.

  In the display device 31 (FIG. 15), in addition to the write scan circuit 24A that outputs the write signal ws, the output of the write signal ws by this write scan circuit 24A corresponds to the configuration of the pixel unit 32 by such pixels 33. The vertical drive circuit 34 is provided with a drive scan circuit (DSCN) 34B, a drive scan circuit (DSCN2) 34C, and an auto zero circuit (ZERO) 34D that output a drive scan signal ds1, a drive scan signal ds2, and a control signal az, respectively. . The horizontal drive circuit 35 generates a drive signal so as to correspond to these configurations.

  By doing so, it is possible to prevent deterioration in image quality due to changes over time of the organic EL element 12 and variations in the threshold voltage Vth of the transistor TR2 that drives the organic EL element 12.

  When the gradation of the EL element 12 is set by correcting the variation of the threshold voltage Vth of the transistor TR2 and setting the signal level Vin of the signal line SIG in the signal level holding capacitor Cs2 as described above, In the level gradation, the signal level Vin of the signal line SIG is set to 0 [V]. As a result, the voltage across the terminals of the signal level holding capacitor Cs2 is set to the threshold voltage Vth of the transistor TR2. Originally, no current is supplied to the organic EL element 12 by the cutoff of the transistor TR2, so that the organic EL element 12 does not emit any light.

  However, in such setting of the threshold voltage Vth, variations cannot be avoided, and the transistor TR2 itself that drives the organic EL element 12 also varies. As a result, when the threshold voltage Vth of the transistor TR2 is corrected in this way, the term of -Vth in the parentheses described above with respect to the expression (1) cannot be completely canceled, and the signal level is maintained slightly. Variation occurs in the voltage set in the capacitor Cs2.

In such a variation, there is almost no problem when the original voltage set to the signal level holding capacitor Cs2 is high, whereas the voltage set to the signal level holding capacitor Cs2 When the voltage is low, the variation voltage becomes relatively large with respect to the original inter-terminal voltage, thereby affecting the display image. Accordingly, in the display device 31 having the configuration shown in FIG. 15, for example, when the entire surface is set to black gradation, pixels that emit light slightly are generated, and so-called surface roughness that can be seen as if the display screen is rough is generated. There was a problem that occurred. In addition, in the display with the black level as described above, the organic EL element 12 emits light, though slightly, so-called black floating that can be seen as if the gradation due to the black level has floated to the white level side occurs. Further, there is a problem that the contrast is lowered on the black level side.
USP 5,684,365 JP-A-8-234683

  The present invention has been made in consideration of the above points, and can correct a threshold voltage of a transistor for driving a light emitting element to prevent surface roughness, black floating, and contrast deterioration. A display device driving circuit and a display device driving method are proposed.

  In order to solve such a problem, in the invention of claim 1, the pixel is applied to a display device having a pixel portion in which pixels driven by current drive are arranged in a matrix and a drive circuit for driving the pixel portion. A transistor having a signal level holding capacitor between a light emitting element and a gate source, a transistor having a source follower circuit that drives the light emitting element by a gate-source voltage by a voltage between terminals of the signal level holding capacitor, and one end of the transistor A coupling capacitor connected to the gate, a signal line switch circuit for connecting the other end of the coupling capacitor to the signal line, a short-circuit switch circuit for short-circuiting the gate drain of the transistor, and a coupling For the capacitor side reference voltage, which connects the other end of the capacitor to the capacitor side reference voltage A switch circuit for power supply that stops supply of power to the transistor, and the drive circuit drives the signal line switch circuit to drive the signal level of the signal line through the coupling capacitor. By setting the terminal voltage of the capacitor for holding the signal level, the voltage between the gate and source of the transistor used for driving the light emitting element is set, and the capacitor side reference voltage for setting the terminal voltage of the capacitor for holding the signal level is set. The switch circuit for short circuit and the switch circuit for short circuit are set to the ON state, and the switch circuit for power supply is set to the OFF state, so that the voltage between the terminals of the signal level holding capacitor is set to the threshold voltage of the transistor. After setting the capacitor side reference voltage switch circuit and the short circuit switch circuit to the OFF state, Set the switch circuit for the signal line to the ON state, set the terminal voltage of the capacitor for holding the signal level according to the signal level of the signal line, and the signal level at which the reference voltage on the capacitor side is set according to the signal level of the signal line The terminal voltage of the holding capacitor is set to a voltage that is offset to the side where the gradation is lowered.

  According to a fifth aspect of the present invention, the pixel is applied to a display device in which pixels driven by current are arranged in a matrix, and the pixel holds a signal level holding capacitor between the light emitting element and the gate source, A transistor by a source follower circuit that drives a light emitting element by a gate-source voltage by a voltage between terminals of a capacitor for holding a signal level set by a signal level of the line, a coupling capacitor having one end connected to the gate of the transistor, After connecting the other end of the coupling capacitor to the reference voltage on the capacitor side, when the voltage between the terminals of the signal level holding capacitor is almost the threshold voltage of the transistor, it is switched off. Capacitor that separates the other end of the coupling capacitor from the reference voltage on the capacitor side The switch circuit for the reference voltage and the switch circuit for the short circuit that switches to the ON state in conjunction with the switch circuit for the reference voltage on the source side and short-circuits the gate drain of the transistor, and the switch circuit for the reference voltage on the capacitor side In response to the operation, the voltage between the terminals of the capacitor for holding the signal level is maintained until the capacitor side reference voltage switch circuit and the short circuit switch circuit are turned off by stopping the power supply to the transistor. A power source switch circuit that starts supplying power to the transistor by setting the voltage between the terminals of the signal level holding capacitor according to the signal level of the signal line. In addition to the capacitor for coupling, after the switch circuit for the capacitor side reference voltage is turned off Is connected to the signal line, and the terminal voltage of the signal level holding capacitor is set by the signal level of the signal line via the coupling capacitor, so that the signal level holding capacitor terminal is set according to the signal level of the signal line. Signal line switch circuit for setting the voltage between the terminals, and the reference voltage on the capacitor side offsets the terminal voltage of the capacitor for holding the signal level set by the signal level of the signal line to the side where the gradation is lowered Make it a voltage.

  According to a sixth aspect of the present invention, a signal level holding capacitor is held between the organic EL element and the gate source when applied to a display device in which pixels of organic EL elements are arranged in a matrix. A transistor having a source follower circuit that drives an organic EL element by a gate-source voltage based on a voltage between terminals of a signal level holding capacitor set according to a signal level of the signal, a coupling capacitor having one end connected to the gate of the transistor, After connecting the other end of the coupling capacitor to the reference voltage on the capacitor side, when the voltage between the terminals of the signal level holding capacitor is almost the threshold voltage of the transistor, it is switched off. A capacitor that separates the other end of the coupling capacitor from the reference voltage on the capacitor side. A switch circuit for a short circuit that switches to the ON state in conjunction with the switch circuit for the source side reference voltage and the switch circuit for the source side reference voltage, and shorts the gate and drain of the transistor, and a switch circuit for the capacitor side reference voltage In response to the ON operation of the transistor, the supply of power to the transistor is stopped, and the capacitor level holding capacitor terminal until the capacitor side reference voltage switch circuit and the short circuit switch circuit are turned OFF. A power switch that starts supplying power to the transistor by setting the voltage between the terminals of the capacitor for holding the signal level according to the signal level of the signal line after setting the voltage between the gate and source of the transistor by lowering the voltage between the transistors Capacitor for coupling after the circuit and switch circuit for capacitor side reference voltage off operation By connecting the other end to the signal line and setting the terminal voltage of the signal level holding capacitor via the coupling capacitor according to the signal level of the signal line, the capacitor for holding the signal level according to the signal level of the signal line Signal line switch circuit for setting the voltage between the terminals of the capacitor, and the reference voltage on the capacitor side is such that the gradation of the terminal voltage of the capacitor for holding the signal level set by the signal level of the signal line is reduced. Make sure that the voltage is offset.

  According to a seventh aspect of the present invention, in the display device driving circuit in which pixels driven by current are arranged in a matrix, the pixel holds a signal level holding capacitor between the light emitting element and the gate source, A transistor with a source follower circuit that drives a light-emitting element by a gate-source voltage by a voltage between terminals of a capacitor for holding a level, a coupling capacitor having one end connected to the gate of the transistor, and the other end of the coupling capacitor Switch circuit for signal line that connects to the signal line, switch circuit for short circuit that short-circuits the gate drain of the transistor, and capacitor side reference voltage that connects the other end of the coupling capacitor to the capacitor side reference voltage Switch circuit and the power to stop the power supply to the transistor A light-emitting element by setting the terminal voltage of the signal level holding capacitor according to the signal level of the signal line through the coupling capacitor by driving the switch circuit for the signal line Set the voltage between the gate and source of the transistor used to drive the capacitor, and set the capacitor-side reference voltage switch circuit and short-circuit switch circuit to the ON state when setting the terminal voltage of the signal level holding capacitor. By setting the switch circuit for switching to the OFF state, the voltage across the capacitor for signal level holding is set to the threshold voltage of the transistor, and the switch circuit for the capacitor side reference voltage and the switch circuit for short circuit are turned off After setting to the state, set the switch circuit for the signal line to the ON state, and depending on the signal level of the signal line, The voltage that sets the terminal voltage of the capacitor for holding the signal level, and the reference voltage on the capacitor side offsets the terminal voltage of the capacitor for holding the signal level that is set according to the signal level of the signal line to the side where the gradation is lowered The drive circuit of the display device offsets the signal level of each gradation corresponding to the black level gradation to the side where the gradation is increased by the reference voltage on the capacitor side in gradations other than the black level. To generate a drive signal for the signal line.

  According to another aspect of the invention, the pixel holds a signal level holding capacitor between the light emitting element and the gate source when applied to a driving circuit of a display device in which pixels driven by current are arranged in a matrix. A transistor using a source follower circuit that drives a light emitting element by a gate-source voltage by a voltage between terminals of a signal level holding capacitor, a coupling capacitor having one end connected to the gate of the transistor, and a coupling capacitor Signal line switch circuit for connecting the other end of the transistor to the signal line, switch circuit for short-circuiting the gate and drain of the transistor, and capacitor side for connecting the other end of the coupling capacitor to the reference voltage on the capacitor side Stop supply of power to the reference voltage switch circuit and transistor Light source by setting the terminal voltage of the capacitor for holding the signal level according to the signal level of the signal line through the coupling capacitor by driving the switch circuit for the signal line. Set the gate-source voltage of the transistor used to drive the element, and set the capacitor-side reference voltage switch circuit and the short-circuit switch circuit to the ON state in setting the terminal voltage of the capacitor for holding the signal level. By setting the power supply switch circuit to the OFF state, the voltage across the capacitor of the signal level holding capacitor is set to the threshold voltage of the transistor, and the capacitor side reference voltage switch circuit and the short circuit switch circuit are set. After setting to the OFF state, the switch circuit for the signal line is set to the ON state and the signal level of the signal line The terminal voltage of the capacitor for holding the signal level is set, and the drive circuit of the display device offsets the signal level corresponding to the gray level other than the black level to the side to reduce the gray level in the black level gray level. A drive signal for the signal line is generated.

  According to a ninth aspect of the present invention, in the display device driving method in which pixels driven by current are arranged in a matrix, the pixel holds a signal level holding capacitor between the light emitting element and the gate source, A transistor with a source follower circuit that drives a light-emitting element by a gate-source voltage by a voltage between terminals of a capacitor for holding a level, a coupling capacitor having one end connected to the gate of the transistor, and the other end of the coupling capacitor Switch circuit for signal line that connects to the signal line, switch circuit for short circuit that short-circuits the gate drain of the transistor, and capacitor side reference voltage that connects the other end of the coupling capacitor to the capacitor side reference voltage Switch circuit and the power to stop the power supply to the transistor The display device is driven by the signal line switch circuit, and the terminal voltage of the signal level holding capacitor is determined by the signal level of the signal line through the coupling capacitor. By setting, the voltage between the gate and source of the transistor used to drive the light emitting element is set, and in setting the terminal voltage of the capacitor for holding the signal level, the switch circuit for the capacitor side reference voltage and the switch circuit for the short circuit are turned on. In addition to setting the power supply switch circuit to the OFF state, the voltage across the capacitor of the signal level holding capacitor is set to the threshold voltage of the transistor, and the capacitor side reference voltage switch circuit, After the short-circuit switch circuit is set to the OFF state, the signal line switch circuit is set to the ON state. The terminal voltage of the capacitor for holding the signal level is set according to the signal level of the signal line, and the reference voltage on the capacitor side is set to the terminal voltage of the capacitor for holding the signal level set by the signal level of the signal line. The voltage is set to be offset to the lowering side.

  According to the configuration of claim 1, the present invention is applied to a display device having a pixel portion in which pixels driven by current drive are arranged in a matrix and a drive circuit for driving the pixel portion, and by driving a switch circuit for a signal line, By setting the terminal voltage of the capacitor for holding the signal level according to the signal level of the signal line through the coupling capacitor, the voltage between the gate and the source of the transistor used for driving the light emitting element is set. By being a follower circuit, it is possible to drive the light emitting element while effectively avoiding the influence of the temporal change of the light emitting element, thereby preventing image quality deterioration due to the temporal change. In setting the terminal voltage of the capacitor for holding the signal level, the capacitor side reference voltage switch circuit and the short circuit switch circuit are set to the ON state, and the power supply switch circuit is set to the OFF state. After setting the voltage across the capacitor of the signal level holding capacitor to the threshold voltage of the transistor, and setting the capacitor side reference voltage switch circuit and the short circuit switch circuit to the OFF state, the signal line switch circuit Is set to the ON state, and the terminal voltage of the capacitor for holding the signal level is set according to the signal level of the signal line, the set voltage of the capacitor for holding the signal level is corrected by the threshold voltage of the transistor having variation. Thus, image quality deterioration due to variations in the threshold voltage of the transistor can be prevented. In such a configuration, in the configuration of claim 1, the reference voltage on the capacitor side offsets the terminal voltage of the signal level holding capacitor set by the signal level of the signal line to the side where the gradation is lowered. Because it is a voltage, it is possible to ensure that the light emitting element does not emit light at the black level simply by setting the reference voltage on the capacitor side, thereby correcting the threshold voltage of the transistor that drives the light emitting element. In this way, surface roughness, black float, and contrast deterioration can be prevented.

  Thus, according to the configurations of claims 5 and 6, the threshold value of the transistor for driving the light emitting element is applied to a display device in which pixels driven by current and pixels made of organic EL elements are arranged in a matrix. By correcting the voltage, it is possible to prevent surface roughness, black floating, and contrast deterioration.

  Further, according to the configurations of claims 7 and 8, the display device configured to correct the threshold voltage of the transistor driving the light emitting element can prevent surface roughness, black floating, and contrast deterioration. It is possible to provide a driving circuit for a display device.

  According to the ninth aspect of the present invention, there is provided a display device that corrects the threshold voltage of the transistor that drives the light emitting element. The display device can prevent surface roughness, black floating, and contrast deterioration. A driving method can be provided.

  According to the present invention, it is possible to prevent surface roughness, black floating, and contrast degradation by correcting the threshold voltage of a transistor that drives a light emitting element.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings as appropriate.

  FIG. 2 is a block diagram illustrating the display apparatus according to the first embodiment of the present invention. In the display device 51, the pixel unit 52 includes red, green, and blue pixels (PXR, PXG, PXB) 53 that are driven by current, arranged in a matrix, and six scanning lines SCN are provided for these pixels 53. , SCN1, SCN2R, SCN2G, SCN2B, and SCN3 are provided in the horizontal direction in line units. A signal line SIG is provided in the vertical direction for each column so as to be orthogonal to the scanning lines SCN, SCN1, SCN2R, SCN2G, SCN2B, and SCN3. With respect to the pixel portion 52 formed as described above, the display device 51 is provided in the pixel 53 sequentially in line units by driving the scanning lines SCN, SCN2R, SCN2G, SCN2B, and SCN3 by the vertical drive circuit 54. The operation of the pixel circuit is controlled, and the signal line SIG is driven by the horizontal drive circuit 55 so as to correspond to the control of the pixel circuit, and the gradation of each pixel 53 is set.

  Therefore, the vertical drive circuit 54 generates a write signal ws for sequentially instructing writing to each pixel 53 line by line by the write scan circuit (WSCN) 54A, and in synchronization with the write signal ws, the drive scan signal ds1, ds2 is generated by the drive scan circuits 54B and 54C, and the write signal ws and the drive scan signals ds1 and ds2 are output to the scan lines SCN, SCN1, SCN2R, SCN2G, and SCN2B to control the gradation setting in each pixel 53. It is made like that. Further, a control signal az instructing correction of the threshold voltage Vth of the organic EL element 12 is generated by an auto zero circuit (ZERO) 54D, and this control signal az is output to the scanning line SCN3. In such a control, the drive scan signal ds2 is generated for each of the red, green, and blue pixels 53 and is output to the corresponding scan lines SCN2R, SCN2G, and SCN2B of the pixel 53, thereby the display device 51. In this case, the color balance is adjusted by controlling light emission and non-light emission in each of the red, green, and blue pixels 53.

  Further, in the horizontal drive circuit 55, a drive signal is generated by a signal driver 55B by an analog-digital conversion circuit in accordance with the gradation data D1 indicating the gradation of each pixel 53, and this drive signal is generated by a horizontal selector (HSEL) 55A. The signals are distributed to the respective signal lines SIG and output.

  FIG. 1 is a connection diagram showing each pixel 53 of the display device 51 in comparison with FIG. In the pixel 53 according to the display device 51, the signal line SIG side end of the coupling capacitor Cs1 is connected to the reference voltage Vof by the transistor TR6. This reference voltage Vof is used as the signal level holding capacitor Cs2. The signal level of the signal line SIG is set to a power supply that gives a negative offset voltage. Each pixel 53 has the same configuration as the pixel 33 of the display device 31 of FIG. 15 except that the setting of the reference voltage Vof related to the transistor TR6 is different.

  Specifically, the reference voltage Vof is set to a positive power supply voltage that rises by a predetermined potential on the power supply Vcc side. As for the voltage value, the threshold voltage Vth of the transistor TR2 is set in the signal level holding capacitor Cs2, and even if the threshold voltage Vth is set and the transistor TR2 varies, the black level is reduced. The capacitor Cs2 for holding the signal level is set by adjustment, and the voltage for surely cutting off the transistor TR2 is set to the voltage for setting the capacitor Cs2 for holding the signal level. For this reason, in this embodiment, the power supply circuit for supplying various power supplies to the pixel unit 52 is formed so that the reference voltage Vof can be adjusted. By this adjustment, the reference voltage Vof is changed depending on the gradation of the black level. The voltage at which the pixel 54 does not emit light is set.

  Thereby, in this pixel 53, as shown in FIG. 3, in setting the gradation based on the black level, the transistor TR2 is surely cut off and the organic EL element 12 is not driven, so In order to prevent a decrease in contrast.

  That is, in this case, in this pixel 53, the organic EL element 12 is driven by the gate-source voltage Vgs by the inter-terminal voltage held in the signal level holding capacitor Cs2, and light emission or non-light emission is caused by the drive scan signal ds2. Control is performed (FIGS. 3D to 3F), the control signal az is raised immediately before the non-light emission is set, and the transistors TR5 and TR6 are set to the ON state (FIG. 3B). As a result, the gate-source voltage Vgs of the transistor TR2 is once raised, and then the supply of the power supply Vcc to the transistor TR2 is stopped by the rise of the drive scan signal ds2, and the rise of the drive scan signal ds1 ( In FIG. 3C, the source side end of the signal level holding capacitor Cs2 is set to the ground potential. As a result, the threshold voltage Vth of the transistor TR2 is set in the signal level holding capacitor Cs2.

  At this time, the transistor TR6 holds the reference voltage Vof on the signal line SIG side of the coupling capacitor Cs1, and the signal level holding capacitor Cs2 thereby holds the signal level SIG side of the coupling capacitor Cs1. The threshold voltage Vth of the transistor TR2 is set with the end set to the reference voltage Vof. Thus, after setting the transistors TR5 and TR6 to the OFF state, the signal line SIG is connected to the signal line side of the coupling capacitor Cs1 by the write signal ws (FIG. 3A), the coupling capacitor Cs1 Is supplied with charge from the signal line SIG by the signal level Vin of the signal line SIG with respect to the reference voltage Vof at the time of setting the threshold voltage Vth, and thereby the reference voltage Vof with respect to the signal level Vin of the signal line SIG. The terminal voltage of the signal level holding capacitor Cs2 is set by a voltage that is lower by this amount. FIG. 3 shows an example in the case where the signal level Vin based on the gradation based on the black level is supplied to the signal line SIG.

  Thereby, in the pixel 53, the terminal voltage of the signal level holding capacitor Cs2 set by the signal level Vin of the signal line SIG is changed by the reference voltage Vof connected to the signal line SIG side of the coupling capacitor Cs1. The organic EL element 12 is driven by the transistor TR2 by the gate-source voltage Vgs based on the voltage across the terminals of the signal level holding capacitor Cs2 so as to be surely set to the black level. ing.

  Corresponding to the supply of the offset voltage by the reference voltage Vof in the pixel 53, in this display device 51, the signal driver 55B is shown in FIG. 4 and FIG. 5 for the gradation indicated by the gradation data D1. A drive signal is generated with the characteristics shown and output to the signal line. Here, FIG. 4 is a characteristic curve diagram showing the gradation based on the voltage Vcs2 between the terminals of the capacitor Cs2 for holding the signal level and the gradation data D1, and FIG. 4 shows the signal level Vin of the drive signal output to the signal line SIG. FIG. 6 is a characteristic curve diagram showing the relationship between and gradation data D1. Reference numeral L3 is a characteristic curve when the signal line side end of the coupling capacitor Cs1 is connected to the ground potential by the transistor TR6, and reference numeral L4 is a characteristic curve according to this embodiment.

  In general, in this type of display device, the signal level is set so as to increase sequentially from 0 level by increasing the gradation in accordance with the light emission characteristics of the organic EL element 12 (FIG. 4, reference L3). When displaying the black level gradation by connecting the signal line side end of the coupling capacitor Cs1 to the ground potential by the transistor TR6, the inter-terminal voltage Vcs2 of the signal level holding capacitor Cs2 is expressed by the following equation (2). The threshold voltage Vth of the transistor TR2 is set so that the value in the parenthesis is 0 (FIG. 4, reference L3), whereby the transistor TR2 is held in the cut-off state and drives the organic EL element 12. In other words, a black level gradation is expressed.

  However, in this embodiment, the terminal voltage set in the signal level holding capacitor Cs2 is offset to the negative side by the reference voltage Vof, so that the signal line side end of the coupling capacitor Cs1 is grounded by the transistor TR6. When a drive signal is generated with the same characteristics as when connected to a potential, the gray level sinks on the black side, making it difficult to correctly represent the gray level. Problems such as surface roughness in the case of black level gradation as described for the configuration of 15 occur.

  Therefore, the signal driver 55B generates a drive signal with the same signal level as that when the signal level side end of the coupling capacitor Cs1 is set to the ground potential by the transistor TR6. Except for the black level, the drive signal is generated by a voltage higher by the reference voltage Vof than when the signal line side end of the coupling capacitor Cs1 is set to the ground potential by the transistor TR6. As a result, in this embodiment, in the gradation other than the black level, the signal level of each gradation corresponding to the gradation of the black level is offset by the reference voltage Vof on the capacitor side to increase the gradation, and the signal A drive signal for the line SIG is generated, whereby the voltage between terminals of the signal level holding capacitor Cs2 is offset to prevent surface roughness and the like so that an image can be displayed with a correct gradation. Yes.

(2) Operation of the embodiment In the above configuration, the display device 51 (FIG. 2) is driven by the horizontal drive circuit 55 sequentially in line units by driving the scanning lines SCN, SCN2R, SCN2G, SCN2B, and SCN3 by the vertical drive circuit 54. The signal level of the signal line SIG to be driven is set in each pixel 53. In the display device 51, each pixel 53 emits light according to the signal level set for each pixel 53, and a desired image is displayed.

  In the display device 51, in each pixel 53, a signal level holding capacitor Cs1 is provided between the gate and source of the transistor TR2 having a source follower circuit configuration for driving the organic EL element 12, and a coupling circuit is provided by a switch circuit by the transistor TR1. By connecting the capacitor Cs2 to the signal line SIG, the signal level Vin of the signal line SIG is set to the signal level holding capacitor Cs2 via the coupling capacitor Cs1. Further, the organic EL element 12 is driven by the transistor TR2 by the gate-source voltage Vgs by the signal level holding capacitor Cs2 set in this way. As a result, in the display device 51, it is possible to prevent a change in drive current due to a change with time of the voltage / current characteristics of the organic EL element 12, and to effectively avoid deterioration of image quality due to a change with time of the organic EL element 12. Further, each pixel 53 is formed by an n-channel MOS transistor, and the organic EL element 12 can be driven from the anode side by the transistor TR2. By these, an amorphous silicon process is applied to the organic EL element 12 and the pixel circuit. Can be integrally formed on the glass substrate.

  In the display device 51, in setting the terminal voltage of the signal level holding capacitor Cs2 based on the signal level Vin of the signal line SIG, the transistors TR5 and TR6 are turned on by the control signal az while the transistor TR2 remains connected to the power source. Thus, the transistor TR2 is set to diode connection, and the signal line side end of the coupling capacitor Cs1 is connected to the reference voltage Vof, and the gate-source voltage Vgs of the transistor TR2 is once raised.

  Thereafter, the supply of the power source Vcc to the transistor TR2 is stopped by the transistor TR4, and the source side end of the signal level holding capacitor Cs2 is connected to the ground potential which is a reference voltage, and thereby the signal level holding capacitor Cs2 Is set to the ground potential, and the voltage across the terminals of the signal level holding capacitor Cs2 is set to the threshold voltage Vth of the transistor TR2. In the display device 51, the voltage across the terminals of the signal level holding capacitor Cs2 set by the signal level Vin of the signal line SIG via the coupling capacitor Cs1 is set in the signal level holding capacitor Cs2. This is corrected by the threshold voltage Vth of the transistor TR2, thereby preventing image quality deterioration due to variations in the threshold voltage Vth of the transistor TR2.

  In the display device 51, in the state where the signal line side end of the coupling capacitor Cs1 is connected to the predetermined reference voltage Vof by the transistor TR6, the threshold voltage of the transistor TR2 is added to the signal level holding capacitor Cs2. After Vth is set, the voltage between the terminals of the signal level holding capacitor Cs2 is set by the signal level Vin of the signal line SIG via the coupling capacitor Cs1, and thereby the signal level holding capacitor Cs2 Is set by offsetting the inter-terminal voltage to a voltage lower by the reference voltage Vof so as to lower the gradation.

  In this embodiment, the offset voltage is applied to the black level gradation even when the setting of the threshold voltage Vth of the transistor TR2 with respect to the signal level holding capacitor Cs2 varies or when the transistor TR2 varies. Is set to a voltage that does not cause the organic EL element 12 to emit light, thereby preventing surface roughness, black floating, and contrast deterioration.

  Further, in the gradation other than black so that the voltage between terminals of the signal level holding capacitor Cs2 is offset and changed to a voltage lower by the reference voltage Vof in this way, The signal level of each gradation corresponding to the gradation of the black level is set to a voltage that is higher by the reference voltage Vof, and a drive signal is generated by the signal driver 55B. Thus, surface roughness, black floating, contrast It is possible to prevent deterioration and display an image with a correct gradation.

(3) Effects of the embodiment According to the above configuration, the transistor for current level driving of the light emitting element by the source follower circuit configuration is connected to the signal level holding capacitor provided between the gate and the source of the transistor. After setting the threshold voltage, by setting the signal level of the signal line, the gradation is reduced by the reference voltage connected to the coupling capacitor in the configuration in which the gradation is set by correcting the transistor variation. By offsetting the inter-terminal voltage of the signal level holding capacitor, the threshold voltage of the transistor that drives the light emitting element is corrected to prevent surface roughness, black floating, and contrast deterioration with a simple configuration. can do.

  In addition, the voltage between the terminals of the signal level holding capacitor is offset in this way, and the gradation other than the black level is higher by the offset voltage than the signal level of each gradation corresponding to the black level signal level. By generating a drive signal with voltage, an image can be displayed with correct gradation. Thus, when the gradation is corrected on the drive signal side in this way, even when the voltage between the terminals of the signal level holding capacitor Cs2 is offset by an extremely large voltage, the correct gradation is used. Even if the threshold voltage Vth of the transistor TR2 set in the signal level holding capacitor Cs2 varies greatly, it is possible to reliably prevent surface roughness, black floating, etc. Thus, an image can be displayed.

  FIG. 6 is a block diagram showing a display apparatus according to Embodiment 2 of the present invention. In the display device 61, the transistor TR3 that grounds the source of the transistor TR2 to the ground that is the reference voltage is controlled by the write signal ws. As a result, in the display device 51, the drive scan signal ds1, which is the control signal of the transistor TR3, is omitted, and the pixels 63 can be arranged at a higher density, and the configuration of the vertical drive circuit 64 is simplified. It has been made possible.

  The display device 61 is configured in the same manner as the display device 51 according to the first embodiment except that the control related to the write signal ws is different. Thus, the vertical drive circuit 64 is provided with a write scan circuit 64A, a drive scan circuit 64C, and an auto zero circuit 64D that output a write signal ws, a drive scan signal ds2, and a control signal az, respectively. In the horizontal drive circuit 65A, a drive signal is generated by the signal driver 65B and distributed to each signal line SIG by the horizontal selector 65A.

  FIG. 7 is a time chart showing the relationship between the write signal ws, drive scan signal ds2, and control signal az output from the vertical drive circuit 64 and the transistor TR2. In the display device 61, light emission and non-light emission are controlled by on / off control of the transistor TR4 by the drive scan signal ds2 (FIG. 7C), and the control signal az is raised immediately before setting to non-light emission ( In FIG. 7B, the gate-source voltage Vgs of the transistor TR2 is once raised and then set to the threshold voltage Vth of the transistor TR2 (FIGS. 7D and 7E). Also in this embodiment, in the pixel 63, the signal line side end of the coupling capacitor Cs1 is connected to the reference voltage Vof by the transistor TR6, and thus the gate-source voltage Vgs of the transistor TR2 is equal to that of the transistor TR2. The threshold voltage Vth is set. In this case, the falling of the gate voltage Vg and the source voltage Vs of the transistor TR2 used for setting the threshold voltage Vth is executed by discharging the accumulated charge through the organic EL element 12, thereby causing the transistor TR2 to fall. , The source voltage Vs is set to the threshold voltage VthEL of the organic EL element 12, and the gate-source voltage Vgs is set to the threshold voltage Vth of the transistor TR2.

  Thereafter, the control signal az is lowered to turn off the transistors TR5 and TR6, and then the signal line side end of the coupling capacitor Cs1 is connected to the signal line SIG by the write signal ws (FIG. 7 ( A)) With this, the terminal voltage of the signal level holding capacitor Cs2 is set by the signal level Vin of the signal line SIG in a state where the source side end of the signal level holding capacitor Cs2 is grounded.

  As a result, in the display device 61, the voltage between the terminals of the transistor TR2 set by the signal level Vin of the signal line SIG is corrected so as to lower the gradation by the reference voltage Vof. Therefore, it is possible to prevent surface roughness, black floating, and contrast deterioration with a simple configuration.

  In the display device 61, similarly to the case of the first embodiment, the voltage between the terminals of the signal level holding capacitor Cs2 is corrected in this way, and a signal with a gradation other than the black level is corresponding to this correction. A drive signal is generated by the signal driver 65B so as to raise the level, and thus, it is possible to display an image with a correct gradation while preventing surface roughness, black floating and deterioration of contrast.

  According to the configuration of FIG. 6, even when the transistor TR3 that connects the reference voltage to the source side end of the signal level holding capacitor Cs2 is controlled by the write signal ws, the same effect as in the first embodiment can be obtained. Can do.

  FIG. 8 is a block diagram showing a display apparatus according to Embodiment 3 of the present invention. In the display device 71, the transistor TR3 that grounds the source of the transistor TR2 to the ground that is the reference voltage is controlled by the control signal az that instructs correction of the threshold voltage Vth. As a result, in the display device 71, the drive scan signal ds1, which is a control signal of the transistor TR3, is omitted, and the pixels 73 can be arranged at a higher density, and the configuration of the vertical drive circuit 74 is simplified. It has been made possible.

  The display device 71 is configured in the same manner as the display device 51 according to the first embodiment except that the control related to the control signal az is different. As a result, a write scan circuit 74A, a drive scan circuit 74C, and an auto-zero circuit 74D for outputting a write signal ws, a drive scan signal ds2, and a control signal az, respectively, are provided in the vertical drive circuit 74. In the horizontal drive circuit 75A, a drive signal is generated by the signal driver 75B and distributed to each signal line SIG by the horizontal selector 75A.

  FIG. 9 is a time chart showing the relationship among the write signal ws, drive scan signal ds2, and control signal az output from the vertical drive circuit 74 and the transistor TR2. In the display device 71, light emission and non-light emission are controlled by the on / off control of the transistor TR4 by the drive scan signal ds2 (FIG. 9C), and the control signal az is raised immediately before the non-light emission is set ( In FIG. 9B, the gate-source voltage Vgs of the transistor TR2 is once raised and then set to the threshold voltage Vth of the transistor TR2 (FIGS. 9D and 9E). Also in this embodiment, in the pixel 73, the signal line side end of the coupling capacitor Cs1 is connected to the reference voltage Vof by the transistor TR6, and thus the gate-source voltage Vgs of the transistor TR2 is equal to that of the transistor TR2. The threshold voltage Vth is set. In this embodiment, the transistor TR3 is controlled to be turned on / off by the control signal az for controlling the transistors TR5 and TR6 as described above, so that the threshold voltage Vth of the gate-source voltage Vgs of the transistor TR2 is changed. The setting is executed with the source terminal of the transistor TR2 set to the ground potential.

  Thereafter, the control signal az is lowered to turn off the transistors TR3, TR5 and TR6, and then the signal line side end of the coupling capacitor Cs1 is connected to the signal line SIG by the write signal ws (see FIG. 9 (A)), with the source side end of the signal level holding capacitor Cs2 grounded via the organic EL element 12, the signal level Vin of the signal line SIG is connected between the terminals of the signal level holding capacitor Cs2. The voltage is set. The terminal voltage is set by charging the coupling capacitor Cs1 and the signal level holding capacitor Cs2. During this time, the organic EL element 12 is in a cut-off state. Retained. However, since the organic EL element 12 has a capacity of several tens [pF], the capacity of the coupling capacitor Cs1 and the signal level holding capacitor Cs2 is sufficiently larger than the capacity of the organic EL element 12. By setting it small, the signal line side potential of the signal level holding capacitor Cs2 is set by the signal level Vin of the signal line SIG while the ground side end of the signal level holding capacitor Cs2 is held at substantially the ground potential. Accordingly, the voltage between the terminals of the signal level holding capacitor Cs2 can be set correctly by the signal level Vin of the signal line SIG.

  Thus, in the display device 71, the voltage between the terminals of the signal level holding capacitor Cs2 set by the signal level Vin of the signal line SIG in this way is reduced in gradation by the reference voltage Vof. Thus, it is possible to prevent surface roughness, black floating, and contrast deterioration with a simple configuration.

  In the display device 71, similarly to the case of the first embodiment, the voltage between the terminals of the signal level holding capacitor Cs2 is corrected in this way, and a signal with a gradation other than the black level is corresponding to this correction. A drive signal is generated by the signal driver 75B so as to raise the level, and thus, it is possible to display an image with correct gradation while preventing surface roughness, black floating and contrast deterioration.

  According to the configuration of FIG. 8, even when the transistor TR3 that connects the source side end of the signal level holding capacitor Cs2 to the reference voltage is controlled by the control signal az related to the correction of the threshold voltage Vth, the implementation is performed. The same effect as in Example 1 can be obtained.

  FIG. 10 is a block diagram showing a display apparatus according to Embodiment 4 of the present invention. In the display device 81, the transistor TR3 for grounding the source of the transistor TR2 to the ground which is a reference voltage is omitted. As a result, in this display device 81, the pixels 83 can be arranged at a high density by omitting the transistor TR3, and the configuration of the vertical drive circuit 84 can be simplified.

  The display device 81 is configured the same as the display device 51 according to the first embodiment except that the configuration related to the transistor TR3 is different. Thus, the vertical drive circuit 84 is provided with a write scan circuit 84A, a drive scan circuit 84C, and an auto zero circuit 84D that output a write signal ws, a drive scan signal ds2, and a control signal az, respectively. In the horizontal drive circuit 85, a drive signal is generated by the signal driver 85B and distributed to each signal line SIG by the horizontal selector 85A.

  In this display device 81, light emission and non-light emission are controlled by the on / off control of the transistor TR4 by the drive scan signal ds2, and the control signal az is raised immediately before setting to non-light emission, whereby the gate-source voltage of the transistor TR2 is raised. After Vgs is once raised, it is set to the threshold voltage Vth of the transistor TR2. In the display device 81, the threshold voltage Vth is set by discharging the accumulated charge via the organic EL element 12, whereby the source voltage Vs is changed to the organic EL after a predetermined time has elapsed in the transistor TR2. The threshold voltage VthEL of the element 12 is set, and the gate-source voltage Vgs is set to the threshold voltage Vth of the transistor TR2.

  At this time, in the pixel 83, the signal line side end of the coupling capacitor Cs1 is connected to the reference voltage Vof by the transistor TR6, and thus the gate-source voltage Vgs of the transistor TR2 is changed to the threshold voltage of the transistor TR2. Vth is set.

  Thereafter, the control signal az is lowered to turn off the transistors TR3, TR5 and TR6, and then the signal line side end of the coupling capacitor Cs1 is connected to the signal line SIG by the write signal ws. As in the display device 71 of the third embodiment, the signal level holding capacitor Cs2 is grounded through the organic EL element 12, and the signal level holding capacitor is set by the signal level Vin of the signal line SIG. The terminal voltage of Cs2 is set.

  As a result, in this display device 81 as well, the gradation between the terminals of the signal level holding capacitor Cs2 set by the signal level Vin of the signal line SIG is lowered by the reference voltage Vof. Thus, it is possible to prevent surface roughness, black floating, and contrast deterioration with a simple configuration.

  In the display device 81, similarly to the case of the first embodiment, a drive signal is generated by the signal driver 85B so as to correspond to the correction of the inter-terminal voltage in the capacitor Cs2, and thus, the surface roughness and the black floating are thus generated. Therefore, it is possible to display an image with correct gradation while preventing deterioration of contrast.

  According to the configuration of FIG. 10, even when the transistor TR3 that connects the source side end of the signal level holding capacitor Cs2 to the reference voltage is controlled by the control signal az related to the correction of the threshold voltage Vth, the implementation is performed. The same effect as in Example 1 can be obtained.

  In this embodiment, in place of the correction of the terminal voltage of the signal level holding capacitor Cs2 by the reference voltage Vof and the correction of the gradation by the signal driver described in the first to fourth embodiments, the horizontal drive circuit in the configuration of FIG. By generating a drive signal by a signal driver provided in 35, surface roughness, black floating, and deterioration of contrast are prevented, and an image is displayed with correct gradation.

  That is, in the display device according to this embodiment, a drive signal is generated by the signal driver and output to the signal line so that the voltage between the terminals of the signal level holding capacitor Cs2 is set according to the characteristic indicated by L4 in FIG. To do. Therefore, in the black level gradation, the signal level corresponding to the gradation other than the black level is offset to the gradation reduction side to generate the signal line drive signal. Specifically, in FIG. 5, the drive signal is generated by a characteristic in which the characteristic indicated by the symbol L4 is offset to the negative side by the voltage Vof.

  As in this embodiment, in the black level gradation, the signal level corresponding to the gradation other than the black level is offset to the gradation reduction side to generate the signal line drive signal. The same effect as in the first embodiment can be obtained.

  In the above-described embodiment, the case where the gradation is corrected by the signal driver which is a digital / analog conversion circuit has been described. However, the present invention is not limited to this, and for example, the gradation is corrected at the front stage of the digital / analog conversion circuit. It may be.

  In the above-described embodiments, the case where the pixel circuit is formed by the n-channel type transistor has been described. However, the present invention is not limited to this. For example, the case where the pixel circuit is formed by the p-channel type transistor is widely used. Can be applied.

  Further, in the above-described embodiments, the case where the black level is set by setting the reference voltage Vof in the pixel portion and the gradation is corrected on the horizontal drive circuit side has been described. If sufficient characteristics can be ensured, the correction of gradation may be omitted even on the horizontal drive circuit side.

  Further, in the above-described embodiments, the case where the organic EL element, the pixel circuit, and the drive circuit are integrally formed on the glass substrate by applying the amorphous silicon process has been described. The present invention can also be widely applied to a case where a driver circuit is formed separately from a silicon substrate and then connected to the pixel portion and integrated.

  In the above-described embodiments, the case where the light emitting element by the organic EL element is current-driven has been described. However, the present invention is not limited to this, and can be widely applied to display devices using various light-emitting elements related to current driving. .

  The present invention relates to a display device, a display device drive circuit, and a display device drive method, and can be applied to a display device using an organic EL element, for example.

It is a connection diagram which shows the pixel of the display apparatus which concerns on Example 1 of this invention with a periphery structure. It is a block diagram which shows the display apparatus by the pixel of FIG. 2 is a time chart for explaining the operation of the pixel in FIG. 1. FIG. 2 is a characteristic curve diagram illustrating a relationship between a voltage between terminals and a gradation of a signal level holding capacitor according to the pixel of FIG. 1. FIG. 2 is a characteristic curve diagram illustrating a relationship between a driving signal of a signal line and a gray level related to the pixel in FIG. 1. It is a time chart with which it uses for description of operation | movement of the display apparatus which concerns on Example 2 of this invention. 7 is a time chart for explaining the operation of the pixel in FIG. 6. It is a block diagram which shows the display apparatus which concerns on Example 3 of this invention. 9 is a time chart for explaining the operation of the pixel in FIG. 8. It is a block diagram which shows the display apparatus which concerns on Example 4 of this invention. It is a block diagram which shows the structure of a display apparatus. FIG. 12 is a connection diagram illustrating a pixel circuit of the display device of FIG. 11 together with a peripheral configuration. It is a characteristic curve figure which shows the characteristic of an organic EL element. It is a characteristic curve figure with which it uses for description of the change of the operating point of an organic EL element. FIG. 3 is a connection diagram illustrating a pixel circuit having a source follower circuit configuration along with a peripheral configuration. 16 is a time chart for explaining the operation of the pixel circuit of FIG. FIG. 17 is a connection diagram for explaining the time chart of FIG. 16.

Explanation of symbols

1, 11, 31, 51, 61, 71, 81 ... Display device, 2, 32, 52, 62, 72, 82 ... Pixel unit, 3, 33, 53, 63, 73, 83 ... Pixel, 4 , 34, 54, 64, 74, 84... Vertical drive circuit, 4A, 34A, 54A, 64A, 74A, 84A... Write scan circuit, 5, 35, 55, 65, 75, 85. 12 ... Organic EL element, 34B, 34C, 54B, 54C, 64C, 74C, 84C ... Drive scan circuit, 34D, 54D, 64D, 74D, 84D ... Auto-zero circuit, C1, Cs1, Cs2 ... Capacitor, TR1 ~ TR6 …… Transistor

Claims (9)

In a display device having a pixel portion in which pixels driven by current are arranged in a matrix and a drive circuit for driving the pixel portion,
The pixel is
A light emitting element;
A transistor having a source follower circuit that holds a signal level holding capacitor between a gate and a source and drives the light emitting element by a gate-source voltage based on a voltage between terminals of the signal level holding capacitor;
A coupling capacitor having one end connected to the gate of the transistor;
A signal line switch circuit for connecting the other end of the coupling capacitor to the signal line;
A switch circuit for short-circuiting to short-circuit the gate drain of the transistor;
A capacitor side reference voltage switch circuit for connecting the other end of the coupling capacitor to a capacitor side reference voltage;
A power supply switch circuit for stopping supply of power to the transistor,
The drive circuit is
By driving the switch circuit for the signal line, the terminal voltage of the capacitor for holding the signal level is set by the signal level of the signal line through the coupling capacitor, so that the light emitting element is driven. Set the gate-source voltage of the transistor,
In setting the terminal voltage of the signal level holding capacitor,
By setting the switch circuit for the capacitor side reference voltage and the switch circuit for short circuit to the on state, and setting the switch circuit for power supply to the off state, the voltage across the terminals of the capacitor for holding the signal level Is set to the threshold voltage of the transistor,
After the capacitor-side reference voltage switch circuit and the short-circuit switch circuit are set to an OFF state, the signal line switch circuit is set to an ON state, and the signal level is maintained according to the signal level of the signal line. Set the capacitor terminal voltage for
The display device, wherein the reference voltage on the capacitor side is a voltage for offsetting a terminal voltage of the capacitor for holding the signal level, which is set according to a signal level of the signal line, to a side where gradation is lowered. The drive circuit is
In the gradation other than the black level, the signal level of each gradation corresponding to the gradation of the black level is offset to the gradation increasing side by the reference voltage on the capacitor side, and the drive signal of the signal line is The display device according to claim 1, wherein the display device is generated. The pixel is
A switch circuit for a source side reference voltage that connects a source of the transistor to a source side reference voltage;
The drive circuit is
At least during the period when the signal line switch circuit is set to the on state, the source side reference voltage switch circuit is set to the on state to hold the source of the transistor at the source side reference voltage. The display device according to claim 1. The display device according to claim 1, wherein the transistor and each switch circuit are formed by an n-channel MOS transistor. In a display device in which pixels driven by current are arranged in a matrix,
The pixel is
A light emitting element;
A source follower circuit that holds a signal level holding capacitor between a gate and a source and drives the light emitting element by a gate-source voltage by a voltage between terminals of the signal level holding capacitor set by a signal level of a signal line A transistor,
A coupling capacitor having one end connected to the gate of the transistor;
After the other end of the coupling capacitor is connected to the reference voltage on the capacitor side, the voltage is switched to the off state when the voltage across the terminals of the signal level holding capacitor is almost equal to the threshold voltage of the transistor. A capacitor-side reference voltage switch circuit that separates the other end of the coupling capacitor from the capacitor-side reference voltage;
A short-circuit switch circuit that switches to an on state in conjunction with the source-side reference voltage switch circuit and short-circuits the gate drain of the transistor;
In response to the ON operation of the capacitor-side reference voltage switch circuit, the supply of power to the transistor is stopped, whereby the capacitor-side reference voltage switch circuit and the short-circuit switch circuit are turned OFF. Until the voltage between the terminals of the signal level holding capacitor is lowered and set to the voltage between the gate and source of the transistor, and then the voltage between the terminals of the signal level holding capacitor according to the signal level of the signal line. A switch circuit for power supply that starts supply of power to the transistor by setting, and
After the off operation of the switch circuit for the capacitor side reference voltage, the other end of the coupling capacitor is connected to a signal line, and the terminal voltage of the signal level holding capacitor is connected via the coupling capacitor. A signal line switch circuit that sets a voltage between terminals of the signal level holding capacitor according to the signal level of the signal line by setting the signal level of the signal line.
The display device, wherein the reference voltage on the capacitor side is a voltage for offsetting a terminal voltage of the signal level holding capacitor set by the signal level of the signal line to a side where gradation is lowered. In a display device in which pixels by organic EL elements are arranged in a matrix,
The organic EL element;
A source follower circuit that holds a signal level holding capacitor between a gate and a source and drives the organic EL element by a gate-source voltage based on a voltage between terminals of the signal level holding capacitor set by a signal level of a signal line And transistor by
A coupling capacitor having one end connected to the gate of the transistor;
After the other end of the coupling capacitor is connected to the reference voltage on the capacitor side, the voltage is switched to the off state when the voltage across the terminals of the signal level holding capacitor is almost equal to the threshold voltage of the transistor. A capacitor-side reference voltage switch circuit that separates the other end of the coupling capacitor from the capacitor-side reference voltage;
A short-circuit switch circuit that switches to an on state in conjunction with the source-side reference voltage switch circuit and short-circuits the gate drain of the transistor;
In response to the ON operation of the capacitor-side reference voltage switch circuit, the supply of power to the transistor is stopped, whereby the capacitor-side reference voltage switch circuit and the short-circuit switch circuit are turned OFF. Until the voltage between the terminals of the signal level holding capacitor is lowered and set to the voltage between the gate and source of the transistor, and then the voltage between the terminals of the signal level holding capacitor according to the signal level of the signal line. A switch circuit for power supply that starts supply of power to the transistor by setting, and
After the off operation of the switch circuit for the capacitor side reference voltage, the other end of the coupling capacitor is connected to a signal line, and the terminal voltage of the signal level holding capacitor is connected via the coupling capacitor. A signal line switch circuit that sets a voltage between terminals of the signal level holding capacitor according to the signal level of the signal line by setting the signal level of the signal line.
The display device, wherein the reference voltage on the capacitor side is a voltage for offsetting a terminal voltage of the signal level holding capacitor set by the signal level of the signal line to a side where gradation is lowered. In a display device drive circuit in which pixels driven by current are arranged in a matrix,
The pixel is
A light emitting element;
A transistor having a source follower circuit that holds a signal level holding capacitor between a gate and a source and drives the light emitting element by a gate-source voltage based on a voltage between terminals of the signal level holding capacitor;
A coupling capacitor having one end connected to the gate of the transistor;
A signal line switch circuit for connecting the other end of the coupling capacitor to the signal line;
A switch circuit for short-circuiting to short-circuit the gate drain of the transistor;
A capacitor side reference voltage switch circuit for connecting the other end of the coupling capacitor to a capacitor side reference voltage;
A power supply switch circuit for stopping supply of power to the transistor,
By driving the switch circuit for the signal line, the terminal voltage of the capacitor for holding the signal level is set by the signal level of the signal line through the coupling capacitor, so that the light emitting element is driven. Set the gate-source voltage of the transistor,
In setting the terminal voltage of the signal level holding capacitor,
By setting the switch circuit for the capacitor side reference voltage and the switch circuit for short circuit to the on state, and setting the switch circuit for power supply to the off state, the voltage across the terminals of the capacitor for holding the signal level Is set to the threshold voltage of the transistor,
After the capacitor-side reference voltage switch circuit and the short-circuit switch circuit are set to an OFF state, the signal line switch circuit is set to an ON state, and the signal level is maintained according to the signal level of the signal line. Set the capacitor terminal voltage for
The capacitor side reference voltage is a voltage for offsetting the terminal voltage of the signal level holding capacitor set by the signal level of the signal line to the side where gradation is lowered,
The display device drive circuit comprises:
In the gradation other than the black level, the signal level of each gradation corresponding to the gradation of the black level is offset to the gradation increasing side by the reference voltage on the capacitor side, and the drive signal of the signal line is A display circuit driving circuit. In a display device drive circuit in which pixels driven by current are arranged in a matrix,
The pixel is
A light emitting element;
A transistor having a source follower circuit that holds a signal level holding capacitor between a gate and a source and drives the light emitting element by a gate-source voltage based on a voltage between terminals of the signal level holding capacitor;
A coupling capacitor having one end connected to the gate of the transistor;
A signal line switch circuit for connecting the other end of the coupling capacitor to the signal line;
A switch circuit for short-circuiting to short-circuit the gate drain of the transistor;
A capacitor side reference voltage switch circuit for connecting the other end of the coupling capacitor to a capacitor side reference voltage;
A power supply switch circuit for stopping supply of power to the transistor,
By driving the switch circuit for the signal line, the terminal voltage of the capacitor for holding the signal level is set by the signal level of the signal line through the coupling capacitor, so that the light emitting element is driven. Set the gate-source voltage of the transistor,
In setting the terminal voltage of the signal level holding capacitor,
By setting the switch circuit for the capacitor side reference voltage and the switch circuit for short circuit to the on state, and setting the switch circuit for power supply to the off state, the voltage across the terminals of the capacitor for holding the signal level Is set to the threshold voltage of the transistor,
After the capacitor-side reference voltage switch circuit and the short-circuit switch circuit are set to an OFF state, the signal line switch circuit is set to an ON state, and the signal level is maintained according to the signal level of the signal line. Set the capacitor terminal voltage for
The display device drive circuit comprises:
A drive circuit for a display device, wherein a signal for driving the signal line is generated by offsetting a signal level corresponding to a gradation other than the black level to a gradation reduction side in a gradation of a black level . In a driving method of a display device in which pixels driven by current are arranged in a matrix,
The pixel is
A light emitting element;
A transistor having a source follower circuit that holds a signal level holding capacitor between a gate and a source and drives the light emitting element by a gate-source voltage based on a voltage between terminals of the signal level holding capacitor;
A coupling capacitor having one end connected to the gate of the transistor;
A signal line switch circuit for connecting the other end of the coupling capacitor to the signal line;
A switch circuit for short-circuiting to short-circuit the gate drain of the transistor;
A capacitor side reference voltage switch circuit for connecting the other end of the coupling capacitor to a capacitor side reference voltage;
A power supply switch circuit for stopping supply of power to the transistor,
The driving method of the display device is:
By driving the switch circuit for the signal line, the terminal voltage of the capacitor for holding the signal level is set by the signal level of the signal line through the coupling capacitor, so that the light emitting element is driven. Set the gate-source voltage of the transistor,
In setting the terminal voltage of the signal level holding capacitor,
By setting the switch circuit for the capacitor side reference voltage and the switch circuit for short circuit to the on state, and setting the switch circuit for power supply to the off state, the voltage across the terminals of the capacitor for holding the signal level Is set to the threshold voltage of the transistor,
After the capacitor-side reference voltage switch circuit and the short-circuit switch circuit are set to an OFF state, the signal line switch circuit is set to an ON state, and the signal level is maintained according to the signal level of the signal line. Set the capacitor terminal voltage for
The reference voltage on the capacitor side is a voltage for offsetting the terminal voltage of the capacitor for holding the signal level, which is set according to the signal level of the signal line, to the side on which gradation is lowered. Driving method.

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