JP2005149778A - Electronic component with sheet-shaped base plate, laminated electronic circuit device, and manufacturing method of the same - Google Patents

Electronic component with sheet-shaped base plate, laminated electronic circuit device, and manufacturing method of the same Download PDF

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JP2005149778A
JP2005149778A JP2003382192A JP2003382192A JP2005149778A JP 2005149778 A JP2005149778 A JP 2005149778A JP 2003382192 A JP2003382192 A JP 2003382192A JP 2003382192 A JP2003382192 A JP 2003382192A JP 2005149778 A JP2005149778 A JP 2005149778A
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terminal
sheet
electrode
substrate
electronic component
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Osamu Sengoku
修 仙石
Yoshiyuki Nagaoka
美行 長岡
Hisayoshi Watanabe
久芳 渡辺
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component with a sheet-shaped base plate having a noise prevention circuit preventing noise from a power source line of the electronic component or the like, reconciling both reduction of a total height of a device and prevention of an increase of mounting area. <P>SOLUTION: The sheet-shaped base plate 30 has a first face 32 facing a bottom face 12 of a connector 10, and a second face 36 at the opposite side of the first face 32 facing the opposite side of the bottom face 12, and the area of the base plate is to be larger than that surrounded by curved parts 16 of all terminal pins 14. A noise prevention circuit 44 composed of first electrode terminals 40, second electrode terminals 42, and capacitor elements 38, is formed on the second face 36 of the sheet-shaped base plate 30. First wiring terminals 34 are formed at the position corresponding to terminal pins 14 on the first face 32 facing the bottom face 12. Further, the first wiring terminals 34 and the first electrode terminals 40 corresponding to each other are electrically connected by through-holes 46, respectively. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、携帯電話等の携帯機器に主として使用する電子部品に関し、特に電子部品とノイズ防止回路を一体化したシート状基板付き電子部品並びに積層型電子回路装置およびその製造方法に関する。   The present invention relates to an electronic component mainly used in a portable device such as a mobile phone, and more particularly to an electronic component with a sheet-like substrate in which an electronic component and a noise prevention circuit are integrated, a multilayer electronic circuit device, and a manufacturing method thereof.

多くの電子機器において、プリント基板等の種々の回路基板上に電子部品を表面実装することが行われており、電子部品の電源ライン等から生じる高周波ノイズを低減するため、電子部品の所定の端子ピンにコンデンサ等の受動素子で構成するフィルタが設置されている。従来、電子部品が実装された回路基板と同一平面上に、チップコンデンサの一方の電極端子を端子ピンに接続し、他方の電極端子を接地する回路構成が行われている。このような構成では、電子部品の周囲にさらにチップコンデンサを実装する領域部が必要なために回路基板の実装密度を向上させることができない。   In many electronic devices, electronic components are surface-mounted on various circuit boards such as printed circuit boards. In order to reduce high-frequency noise generated from power lines of electronic components, predetermined terminals of electronic components are used. A filter comprising a passive element such as a capacitor is installed on the pin. 2. Description of the Related Art Conventionally, a circuit configuration has been performed in which one electrode terminal of a chip capacitor is connected to a terminal pin and the other electrode terminal is grounded on the same plane as a circuit board on which electronic components are mounted. In such a configuration, the area for mounting the chip capacitor is further required around the electronic component, so that the mounting density of the circuit board cannot be improved.

このために、電子部品のノイズ防止用のフィルタ回路を回路基板に実装するときの実装面積をできるだけ小さくすることが検討されている。   For this reason, it has been studied to make the mounting area as small as possible when a filter circuit for preventing noise of electronic components is mounted on a circuit board.

例えば、図12に示す従来の例では、電子部品300のハウジング310にプラグが挿入されるプラグ挿入室320とその後方部に収納室330を設け、コンデンサアレイ等で構成するフィルタ400を収納室330内に収納し、一体化した構成が示されている。ハウジング310には、端子ピン340の延在部が収納室330に突出した端子340aと、プリント配線に接続する端子350の一端350aとが収納室330内で対向して配置され、さらに短辺方向の両側にグランド電極360が設けられている。フィルタ400は、入力側外部電極420、出力側外部電極440とグランド電極460が設けられ、内部にはコンデンサ(図示せず)が端子ピン340に対応する個数形成されている。このフィルタ400が、上下面を端子ピン340の端子340aと端子350の一端350aで挟まれ、かつ、両側面をグランド電極360で挟まれた状態で収納室330に収納されている。このような構成により、ノイズ防止のためのフィルタ回路を電子部品に一体化して、回路基板上での実装面積の増加を防止している(特許文献1)。   For example, in the conventional example shown in FIG. 12, a plug insertion chamber 320 into which a plug is inserted into the housing 310 of the electronic component 300 and a storage chamber 330 are provided at the rear thereof, and the filter 400 configured by a capacitor array or the like is provided in the storage chamber 330. An integrated configuration housed inside is shown. In the housing 310, a terminal 340a in which an extended portion of the terminal pin 340 protrudes into the storage chamber 330 and an end 350a of the terminal 350 connected to the printed wiring are arranged to face each other in the storage chamber 330, and further in the short side direction. Ground electrodes 360 are provided on both sides. The filter 400 includes an input-side external electrode 420, an output-side external electrode 440, and a ground electrode 460. A number of capacitors (not shown) corresponding to the terminal pins 340 are formed therein. The filter 400 is stored in the storage chamber 330 with the upper and lower surfaces sandwiched between the terminal 340 a of the terminal pin 340 and one end 350 a of the terminal 350 and the both side surfaces sandwiched between the ground electrodes 360. With such a configuration, a filter circuit for preventing noise is integrated with an electronic component to prevent an increase in mounting area on the circuit board (Patent Document 1).

また、複数の端子ピンとこの端子ピンを取り囲むように位置し、かつ接地電位に接続される金属製シェルとを備えた雄型電子部品と、上記シェルの凹部内に上記端子ピンを貫通させて装着可能なシート型ノイズフィルタとからなる構成のものもある。この場合は、シート型ノイズフィルタは弾性変形可能な薄い絶縁シート上にノイズ除去用回路手段が設けられているものであって、端子ピンが貫通する複数の孔が設けてあるとともに、上記シェルの凹部に装着された状態でシェルの内面に弾性的に当接する複数の突片が外周縁部より突出した形状となっている(特許文献2)。この構成により、ノイズフィルタ回路を形成した絶縁シートが電子部品と回路基板との間に配置されるので、回路基板の実装面積が増えることはない。
特開平6−20746号公報 特開平11−329609号公報
In addition, a male electronic component having a plurality of terminal pins and a metal shell positioned so as to surround the terminal pins and connected to the ground potential, and the terminal pins are inserted through the recesses of the shell. There is also a configuration comprising a possible sheet type noise filter. In this case, the sheet-type noise filter is provided with a noise removing circuit means on a thin insulating sheet that can be elastically deformed, and has a plurality of holes through which terminal pins pass, A plurality of projecting pieces that elastically abut on the inner surface of the shell in a state of being mounted in the recesses protrude from the outer peripheral edge (Patent Document 2). With this configuration, since the insulating sheet on which the noise filter circuit is formed is disposed between the electronic component and the circuit board, the mounting area of the circuit board does not increase.
JP-A-6-20746 JP 11-329609 A

しかしながら、上述の第1の例では、コンデンサアレイからなるフィルタは回路基板面に対して垂直方向に配置される構成であるため、低背化が非常に困難であり携帯電話等の薄型が要求される電子機器には使用しにくい。   However, in the first example described above, the filter made of the capacitor array is arranged in a direction perpendicular to the circuit board surface, so it is very difficult to reduce the height, and a thin cellular phone or the like is required. It is difficult to use for electronic equipment.

さらに、第2の例においては、シート型ノイズフィルタを端子ピンに挿入し、雌型の電子部品を端子ピンに挿入して使用すればよいので実装構成が簡単であるが、端子ピンに挿入するときにコンデンサ等の素子が損傷される可能性がある。これを防止するためには、挿入時に加わる荷重によっても変形しにくい厚さのシートを用いる必要がある。また、この構成の電子部品は表面実装型ではなく、第1の例と同様に低背化は困難である。   Further, in the second example, since the sheet type noise filter is inserted into the terminal pin and the female electronic component is inserted into the terminal pin for use, the mounting configuration is simple, but it is inserted into the terminal pin. Sometimes elements such as capacitors can be damaged. In order to prevent this, it is necessary to use a sheet having a thickness that is not easily deformed by a load applied during insertion. In addition, the electronic component having this configuration is not a surface mount type, and it is difficult to reduce the height as in the first example.

本発明の積層型電子回路装置は、電子部品の電源ライン等のノイズを防止するノイズ防止回路等を有しながら、低背化と実装面積の増加防止を両立して、携帯機器用に適したシート状基板付き電子部品並びに積層型電子回路装置およびその製造方法を提供することを目的とする。   The multilayer electronic circuit device of the present invention has a noise prevention circuit that prevents noise of power lines of electronic components and the like, and is suitable for portable devices while achieving both low height and prevention of increase in mounting area. It is an object of the present invention to provide an electronic component with a sheet-like substrate, a multilayer electronic circuit device, and a manufacturing method thereof.

本発明のシート状基板付き電子部品は、側面部または底面の周縁部から対向して突出するとともに屈曲した屈曲部を有するL字形状の複数の端子ピンが備えられた電子部品と、電子部品の底面に対向する第1の面と第1の面に対して底面と反対方向に対向する第2の面を有し、その形状は全ての端子ピンの屈曲部で囲まれる領域より大きいとともに、その少なくとも一方の面にはノイズ防止回路が備えられ、第1の面が端子ピンに接続されたシート状基板とを含む構成からなる。   An electronic component with a sheet-like substrate of the present invention includes an electronic component provided with a plurality of L-shaped terminal pins that protrude from the side surface or the peripheral edge of the bottom surface and have bent portions, and an electronic component A first surface facing the bottom surface and a second surface facing the first surface in a direction opposite to the bottom surface, the shape being larger than the region surrounded by the bent portions of all the terminal pins; At least one surface includes a noise prevention circuit, and the first surface includes a sheet-like substrate connected to the terminal pins.

このように電子部品と、ノイズ防止回路とを含むシート状基板を積み重ねて立体的に構成するので、全体の高さをほとんど変えず、またノイズ防止回路部分の実装面積を増やすことがないため、装置の小型化を実現できる。   Since the sheet-like substrate including the electronic component and the noise prevention circuit is stacked in this manner and configured in a three-dimensional manner, the overall height is hardly changed and the mounting area of the noise prevention circuit portion is not increased. The device can be downsized.

また、本発明のシート状基板付き電子部品のノイズ防止回路は、シート状基板の端子ピンと対応する位置に設けられた第1の電極端子と、シート状基板の中央部または中央部から端子ピンと対応する位置に設けられた第2の電極端子と、第1の電極端子と第2の電極端子との間に設けられたコンデンサ素子とを含む構成からなる。このような構成により、コンデンサ素子で高周波ノイズが信号電流から分離される。   In addition, the noise prevention circuit of the electronic component with the sheet-like substrate according to the present invention corresponds to the first electrode terminal provided at a position corresponding to the terminal pin of the sheet-like substrate, and the terminal pin from the central portion or the central portion of the sheet-like substrate. And a capacitor element provided between the first electrode terminal and the second electrode terminal. With such a configuration, the high frequency noise is separated from the signal current by the capacitor element.

また、本発明のシート状基板付き電子部品は、第2の電極端子を共通接続し、接地端子とする構成からなる。この構成により、電源ライン等の高周波ノイズが重畳しているラインから接地端子に高周波成分がバイパスされ、高周波ノイズが除去される。   In addition, the electronic component with a sheet-like substrate of the present invention has a configuration in which the second electrode terminals are commonly connected to serve as a ground terminal. With this configuration, a high frequency component is bypassed from a line on which high frequency noise such as a power supply line is superimposed to the ground terminal, and high frequency noise is removed.

また、本発明のシート状基板付き電子部品は、第2の面にノイズ防止回路が形成された構成、または、本発明のシート状基板付き電子部品は、シート状基板の第1の面にノイズ防止回路が形成され、端子ピンと第1の電極端子または第2の電極端子とが接続された構成としてもよい。このようにノイズ防止回路を含むシート状基板と電子部品とを一体化させた構成とすることで、両者を電気的にも接続完了した部品として扱うことができる。その結果、その接続完了した部品としての動作試験を容易に行うことができ、信頼性の高い電子部品を得られる。   The electronic component with a sheet-like substrate of the present invention has a configuration in which a noise prevention circuit is formed on the second surface, or the electronic component with a sheet-like substrate of the present invention has a noise on the first surface of the sheet-like substrate. A prevention circuit may be formed, and the terminal pin may be connected to the first electrode terminal or the second electrode terminal. Thus, by setting it as the structure which integrated the sheet-like board | substrate containing a noise prevention circuit, and an electronic component, both can be handled as a component which completed electrical connection. As a result, it is possible to easily perform an operation test as the connected component, and to obtain a highly reliable electronic component.

また、本発明の積層型電子回路装置は、シート状基板の第2の面にノイズ防止回路が形成され、第1の面に端子ピンと対向する位置に第1の配線端子を形成して端子ピンと第1の配線端子とが接続されるとともに第1の配線端子と第1の電極端子とがスルーホールで接続されたシート状基板付き電子部品と、第1の電極端子に対向する位置に第1の電極パッドおよび第2の電極端子に対向する位置に少なくとも一つの第2の電極パッドが形成され第1の電極パッドが第1の電極端子および第2の電極パッドが第2の電極端子に接続された回路基板とを含む構成からなる。   In the multilayer electronic circuit device of the present invention, a noise prevention circuit is formed on the second surface of the sheet-like substrate, and a first wiring terminal is formed on the first surface at a position facing the terminal pin. An electronic component with a sheet-like substrate in which the first wiring terminal is connected and the first wiring terminal and the first electrode terminal are connected by a through hole, and the first electrode terminal is located at a position facing the first electrode terminal. At least one second electrode pad is formed at a position facing the electrode pad and the second electrode terminal, and the first electrode pad is connected to the first electrode terminal and the second electrode pad is connected to the second electrode terminal. And a circuit board formed.

このような構成により、回路基板にシート状基板のみを専有して実装することがないため、シート状基板を装着しても実装面積が増えることがない。   With such a configuration, since only the sheet-like substrate is not mounted exclusively on the circuit board, the mounting area does not increase even when the sheet-like substrate is mounted.

また、本発明の積層型電子回路装置は、シート状基板の第2の面にノイズ防止回路が形成されたシート状基板付き電子部品と、端子ピンおよび第1の電極端子面と対応する位置に第1の電極パッドおよび第2の電極端子に対向する位置に少なくとも一つの第2の電極パッドが形成され、第1の電極パッドが第1の電極端子と端子ピンとに接続され第2の電極パッドが第2の電極端子に接続された回路基板とを含む構成からなる。   Also, the multilayer electronic circuit device of the present invention has an electronic component with a sheet-like substrate in which a noise prevention circuit is formed on the second surface of the sheet-like substrate, and a position corresponding to the terminal pin and the first electrode terminal surface. At least one second electrode pad is formed at a position facing the first electrode pad and the second electrode terminal, the first electrode pad is connected to the first electrode terminal and the terminal pin, and the second electrode pad Includes a circuit board connected to the second electrode terminal.

このような構成により、電子部品の端子ピンと回路基板の電極パッドとを直接接続できるので、シート状基板にはスルーホールが必要なくなり、製造工程が簡略化される。   With such a configuration, since the terminal pins of the electronic component and the electrode pads of the circuit board can be directly connected, the sheet-like board does not require a through hole, and the manufacturing process is simplified.

また、本発明の積層型電子回路装置は、シート状基板の第1の面にノイズ防止回路が形成され、端子ピンと第1の電極端子または第2の電極端子とが接続された第2の面に第1の配線端子が端子ピンと対応する位置に形成され第2の配線端子が第2の電極端子または端子ピンと対応する位置に形成されるとともに、第1の電極端子と第1の配線端子および第2の電極端子と第2の配線端子とがスルーホールで接続されたシート状基板付き電子部品と、第1の配線端子に対向する位置に第1の電極パッドおよび第2の配線端子に対向する位置に少なくとも一つの第2の電極パッドが形成され第1の電極パッドが第1の配線端子および第2の電極パッドが第2の配線端子に接続された回路基板とを含む構成からなる。   In the multilayer electronic circuit device of the present invention, a noise prevention circuit is formed on the first surface of the sheet-like substrate, and the second surface in which the terminal pin and the first electrode terminal or the second electrode terminal are connected. The first wiring terminal is formed at a position corresponding to the terminal pin, the second wiring terminal is formed at a position corresponding to the second electrode terminal or the terminal pin, and the first electrode terminal, the first wiring terminal, An electronic component with a sheet-like substrate in which the second electrode terminal and the second wiring terminal are connected by a through hole, and the first electrode pad and the second wiring terminal at a position facing the first wiring terminal At least one second electrode pad is formed at a position where the first electrode pad includes the first wiring terminal and the circuit board having the second electrode pad connected to the second wiring terminal.

このような構成により、シート状基板と回路基板との間に有効なスペースがより多くなり、回路基板の他の配線の引き回しもでき、配線設計の自由度が増す。   With such a configuration, there is more effective space between the sheet-like board and the circuit board, and other wirings of the circuit board can be routed, and the degree of freedom in wiring design is increased.

また、本発明の積層型電子回路装置は、シート状基板の第1の面にノイズ防止回路が形成されたシート状基板付き電子部品と、端子ピンと対応する位置に第1の電極パッドおよび第2の電極パッドが形成され、第1の電極パッドおよび第2の電極パッドが端子ピンに接続された回路基板とを含む構成からなる。   The multilayer electronic circuit device according to the present invention includes an electronic component with a sheet-like substrate in which a noise prevention circuit is formed on the first surface of the sheet-like substrate, a first electrode pad and a second electrode at positions corresponding to the terminal pins. And a circuit board in which the first electrode pad and the second electrode pad are connected to the terminal pins.

このような構成により、電子部品の端子ピンと回路基板の電極パッドとを直接接続できるので、スルーホールが不要となるとともに、シート状基板を回路基板に電極パッドなしで載置できるので、さらに低背化できる。   With such a configuration, the terminal pin of the electronic component and the electrode pad of the circuit board can be directly connected, so that a through-hole is not necessary and the sheet-like board can be placed on the circuit board without the electrode pad. Can be

また、本発明の積層型電子回路装置は、回路基板がシート状基板を収納するための凹部が設けられている構成からなる。これにより、積層型電子回路装置はより一層の低背化が可能となる。   In the multilayer electronic circuit device of the present invention, the circuit board is provided with a recess for accommodating the sheet-like board. Thereby, the multilayer electronic circuit device can be further reduced in height.

また、本発明の積層型電子回路装置の製造方法は、側面部または底面の周縁部から対向して突出するとともに屈曲した屈曲部を有するL字形状の複数の端子ピンが備えられた電子部品の端子ピン、並びに全ての端子ピンの屈曲部で囲まれた領域より広い領域にノイズ防止回路が備えられたシート状基板と電子部品とを接続部材で接続する第1接続工程と、端子ピンまたはシート状基板の中央部に対応する位置に形成された回路基板の電極パッドをシート状基板またはシート状基板および端子ピンに接続部材で接続する第2接続工程とを有する方法からなる。   Also, the manufacturing method of the multilayer electronic circuit device of the present invention is an electronic component provided with a plurality of L-shaped terminal pins that protrude from the peripheral portion of the side surface or bottom surface and have bent portions. A first connection step of connecting a terminal board and a sheet-like substrate provided with a noise prevention circuit in an area wider than the area surrounded by the bent portions of all the terminal pins and an electronic component with a connecting member; and the terminal pin or the sheet And a second connection step of connecting the electrode pads of the circuit board formed at a position corresponding to the center portion of the sheet-like substrate to the sheet-like substrate or the sheet-like substrate and the terminal pins with a connecting member.

この製造方法により、ノイズ防止回路が電子部品と立体的に配置されながら、全体の高さはほとんど変わらないようにすることができるので、回路基板上での実装面積の低減と低背化を実現でき、小型、薄型の積層型電子回路装置が得られる。また、電子部品とシート状基板を先に一体化するので、回路基板上への実装が一度に可能となり、回路基板上に他の電子部品の実装と同時に一括して実装することができ、実装プロセスが容易になる。さらに、シート状基板付き電子部品として一体で動作確認ができるため、回路基板に実装する前に動作確認をすれば、不良のシート状基板付き電子部品を実装することがない。   This manufacturing method allows the noise prevention circuit to be arranged three-dimensionally with the electronic components, but the overall height can be kept almost unchanged, reducing the mounting area on the circuit board and reducing the height. A small and thin multilayer electronic circuit device can be obtained. In addition, since the electronic component and the sheet-like substrate are integrated first, it can be mounted on the circuit board at one time, and can be mounted on the circuit board at the same time as the mounting of other electronic components. The process becomes easier. Further, since the operation can be confirmed integrally as the electronic component with the sheet-like substrate, if the operation is confirmed before being mounted on the circuit board, the defective electronic component with the sheet-like substrate is not mounted.

また、本発明の積層型電子回路装置の製造方法は、第1接続工程の接続部材には第1のはんだ材が用いられ、第2接続工程の接続部材には第1のはんだ材より低融点のはんだ材が用いられる方法からなる。   In the manufacturing method of the multilayer electronic circuit device of the present invention, the first solder material is used for the connection member in the first connection step, and the connection member in the second connection step has a lower melting point than the first solder material. These solder materials are used.

この製造方法により、シート状基板の電極端子を回路基板の電極パッドに接続する際に、端子ピンと配線端子の接続部材が再溶融することがなくなり、接続信頼性が向上する。   With this manufacturing method, when connecting the electrode terminal of the sheet-like substrate to the electrode pad of the circuit substrate, the connection member between the terminal pin and the wiring terminal is not melted again, and the connection reliability is improved.

本発明のシート状基板付き電子部品は、側面部または底面の周縁部から対向して突出するとともに屈曲した屈曲部を有するL字形状の複数の端子ピンが備えられた電子部品と、電子部品の底面に対向する第1の面と第1の面に対して底面と反対方向に対向する第2の面を有し、その形状は全ての端子ピンの屈曲部で囲まれる領域より大きいとともに、その少なくとも一方の面にはノイズ防止回路が備えられ、第1の面が端子ピンに接続されたシート状基板とを含む構成からなる。   An electronic component with a sheet-like substrate of the present invention includes an electronic component provided with a plurality of L-shaped terminal pins that protrude from the side surface or the peripheral edge of the bottom surface and have bent portions, and an electronic component A first surface facing the bottom surface and a second surface facing the first surface in a direction opposite to the bottom surface, the shape being larger than the region surrounded by the bent portions of all the terminal pins; At least one surface includes a noise prevention circuit, and the first surface includes a sheet-like substrate connected to the terminal pins.

このように電子部品と、ノイズ防止回路とを含むシート状基板を積み重ねて立体的に配置する構成とすることにより、全体の高さはほとんど変わらないようにすることができるので、低背化と実装面積の増加防止を両立して、携帯機器用に適したシート状基板付き電子部品を提供できるという大きな効果を奏する。   In this way, the overall height can be kept almost unchanged by stacking sheet-like substrates including electronic components and a noise prevention circuit in a three-dimensional manner. It is possible to provide an electronic component with a sheet-like substrate that is suitable for portable devices while simultaneously preventing an increase in mounting area.

以下、本発明の実施の形態におけるシート状基板付き電子部品並びに積層型電子回路装置およびその製造方法について、図面を用いて説明する。   Hereinafter, an electronic component with a sheet-like substrate, a multilayer electronic circuit device, and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.

(第1の実施の形態)
図1(A)は、本発明の第1の実施の形態のシート状基板付き電子部品の断面構造図であり、図1(B)はその平面図である。なお、本発明の実施の形態では、電子部品10としてコネクタを例に、またノイズ防止回路44としてはコンデンサ素子38のみで構成したものを例に説明する。
(First embodiment)
FIG. 1A is a sectional structural view of an electronic component with a sheet-like substrate according to the first embodiment of the present invention, and FIG. 1B is a plan view thereof. In the embodiment of the present invention, a connector will be described as an example of the electronic component 10, and a noise prevention circuit 44 including only the capacitor element 38 will be described as an example.

コネクタ10の底面12の周縁部から、対向して端子ピン14が複数突出している。突出している端子ピン14はL字形状に屈曲し、その屈曲部16から先端部18までの水平部20を有している。また、コネクタ10は、樹脂モールド22中に端子ピン14の延長部が埋め込まれ、雄型コネクタを挿入する空間部24にその一部が突出して接触部26となっている。この接触部26は、雄型コネクタを挿入するときに弾性的に変形できるように構成されている。   A plurality of terminal pins 14 protrude from the peripheral portion of the bottom surface 12 of the connector 10 so as to face each other. The protruding terminal pin 14 is bent in an L shape and has a horizontal portion 20 from the bent portion 16 to the tip portion 18. Further, the connector 10 has an extended portion of the terminal pin 14 embedded in the resin mold 22, and a part of the connector 10 protrudes into the space portion 24 into which the male connector is inserted to form a contact portion 26. The contact portion 26 is configured to be elastically deformable when the male connector is inserted.

シート状基板30は、コネクタ10の底面12に対向する第1の面32、および第1の面32に対して底面12と反対方向に対向する第2の面36を有し、その形状は全ての端子ピン14の屈曲部16で囲まれた領域より大きくする。図1(A)では、シート状基板30は端子ピン14の先端部18で囲まれた領域に形成された場合を示している。シート状基板30の第2の面36には、ノイズ防止回路44が形成されている。図1(A)で、ノイズ防止回路44は、第1の電極端子40と第2の電極端子42とコンデンサ素子38とで構成されている。ここで、第1の電極端子40は、シート状基板30の端部で端子ピン14に対応する位置に設けられ、第2の電極端子42はシート状基板30の中央部に設けられている。また第1の面32は、端子ピン14に対向する位置に第1の配線端子34が形成されている。さらに、第1の配線端子34と第1の電極端子40とはスルーホール46で電気的に接続されている。そして、端子ピン14とシート状基板30の第1の配線端子34とが、はんだ等の接続部材70で電気的に接続されている。   The sheet-like substrate 30 has a first surface 32 that opposes the bottom surface 12 of the connector 10 and a second surface 36 that opposes the first surface 32 in the direction opposite to the bottom surface 12, all of which are shaped. It is made larger than the area surrounded by the bent portion 16 of the terminal pin 14. FIG. 1A shows a case where the sheet-like substrate 30 is formed in a region surrounded by the tip portions 18 of the terminal pins 14. A noise prevention circuit 44 is formed on the second surface 36 of the sheet-like substrate 30. In FIG. 1A, the noise prevention circuit 44 includes a first electrode terminal 40, a second electrode terminal 42, and a capacitor element 38. Here, the first electrode terminal 40 is provided at a position corresponding to the terminal pin 14 at the end of the sheet-like substrate 30, and the second electrode terminal 42 is provided at the center of the sheet-like substrate 30. Further, the first surface 32 has a first wiring terminal 34 formed at a position facing the terminal pin 14. Further, the first wiring terminal 34 and the first electrode terminal 40 are electrically connected through a through hole 46. And the terminal pin 14 and the 1st wiring terminal 34 of the sheet-like board | substrate 30 are electrically connected by the connection members 70, such as solder.

シート状基板30について、図2を用いてさらに詳しく説明する。図2(A)はシート状基板30の平面図、図2(B)は図2(A)に示すX1−X1線に沿った断面図である。   The sheet-like substrate 30 will be described in more detail with reference to FIG. 2A is a plan view of the sheet-like substrate 30, and FIG. 2B is a cross-sectional view taken along line X1-X1 shown in FIG.

シート状基板30は、例えばポリイミドフィルム等の薄くて軽い樹脂基板31の第2の面36に、薄膜プロセスによりコンデンサ素子38をアレイ状に形成し、さらに外部機器と接続するための第1の電極端子40、第2の電極端子42を、例えば薄膜プロセスとメッキプロセスにより形成したものである。コンデンサ素子38は、例えば以下のように形成する。樹脂基板31上に下層電極膜33を、例えばマスク蒸着により所定の位置に形成する。その後、この下層電極膜33の一部を残して、その表面上に誘電体膜35を同様にマスクを用いて、例えばスパッタリングにより形成する。この誘電体膜35上にさらに上層電極膜37を形成して、コンデンサ素子38を形成する。さらに第1の電極端子40、第2の電極端子42を形成すれば、ノイズ防止回路44が作製される。なお、コンデンサ素子38を外部環境から保護するために、第1の電極端子40、第2の電極端子42を除いて絶縁保護層39を形成することで、耐環境性に優れたコンデンサ素子38とすることができる。   The sheet-like substrate 30 is a first electrode for forming capacitor elements 38 in an array shape on a second surface 36 of a thin and light resin substrate 31 such as a polyimide film by a thin film process and for connecting to an external device. The terminal 40 and the second electrode terminal 42 are formed by a thin film process and a plating process, for example. The capacitor element 38 is formed as follows, for example. A lower electrode film 33 is formed at a predetermined position on the resin substrate 31 by, for example, mask vapor deposition. Thereafter, a part of the lower electrode film 33 is left, and a dielectric film 35 is similarly formed on the surface of the lower electrode film 33 by using a mask, for example, by sputtering. An upper electrode film 37 is further formed on the dielectric film 35 to form a capacitor element 38. Further, if the first electrode terminal 40 and the second electrode terminal 42 are formed, a noise prevention circuit 44 is produced. In order to protect the capacitor element 38 from the external environment, the insulating protection layer 39 is formed except for the first electrode terminal 40 and the second electrode terminal 42, so that the capacitor element 38 having excellent environmental resistance can be obtained. can do.

ところで、下層電極膜33としては、低抵抗で、密着性がよく、かつ誘電体膜35との反応性が低い材料であれば、特に限定はないが、成膜の容易さからアルミニウム(Al)膜は好適な材料の一つである。この成膜法としては、真空蒸着法、スパッタリング法またはメッキ法等を組み合わせてもよい。また、誘電体膜35としては、比誘電率が大きく、その温度係数の小さい材料が好ましく、例えば二酸化シリコン(SiO2)やチタン酸バリウム(BaTiO3)、チタン酸ストロンチウム(SrTiO3)、あるいは酸化チタン(TiO2)等、一般的に誘電体材料として用いられている材料を用いることもできる。それらの成膜方法としては、スパッタリング法、真空蒸着法、ゾルゲル法やプラズマ化学気相成膜法(PCVD法)等を用いることが可能である。さらに、上層電極膜37としては、下層電極膜33と同様な材料で、両電極膜とも0.1μm〜0.3μmの厚さに形成することができる。 By the way, the lower electrode film 33 is not particularly limited as long as it is a material having low resistance, good adhesion, and low reactivity with the dielectric film 35. However, aluminum (Al) is easy for film formation. The membrane is one suitable material. As this film forming method, a vacuum deposition method, a sputtering method, a plating method, or the like may be combined. The dielectric film 35 is preferably made of a material having a large relative dielectric constant and a small temperature coefficient. For example, silicon dioxide (SiO 2 ), barium titanate (BaTiO 3 ), strontium titanate (SrTiO 3 ), or oxide A material generally used as a dielectric material such as titanium (TiO 2 ) can also be used. As these film forming methods, it is possible to use a sputtering method, a vacuum deposition method, a sol-gel method, a plasma chemical vapor deposition method (PCVD method), or the like. Further, the upper electrode film 37 is made of the same material as the lower electrode film 33, and both electrode films can be formed to a thickness of 0.1 μm to 0.3 μm.

また、絶縁保護層39としては、紫外線硬化型樹脂が印刷プロセスで厚さ10μm前後に形成しやすく、かつ耐湿性に優れているので好適であるが、特にこのような材料に限定されない。例えば、スパッタリング等で無機材料からなる絶縁膜を形成してもよい。さらに、第1の電極端子40、第2の電極端子42は、例えば銅(Cu)膜を5μm前後形成した上に金(Au)膜を約0.2μm程度形成すれば、外部機器とのはんだ付け性に優れた電極端子を形成できる。   The insulating protective layer 39 is suitable because an ultraviolet curable resin can be easily formed to a thickness of about 10 μm by a printing process and is excellent in moisture resistance, but is not particularly limited to such a material. For example, an insulating film made of an inorganic material may be formed by sputtering or the like. Furthermore, the first electrode terminal 40 and the second electrode terminal 42 can be soldered to an external device if, for example, a copper (Cu) film is formed around 5 μm and a gold (Au) film is formed about 0.2 μm. An electrode terminal with excellent attachment can be formed.

また、第1の面32の端部には第1の配線端子34を電極端子と同様の方法で形成してもよい。そして、第1の配線端子34と第1の電極端子40とをスルーホール46で接続し、シート状基板30が作製される。   Further, the first wiring terminal 34 may be formed at the end of the first surface 32 by the same method as the electrode terminal. And the 1st wiring terminal 34 and the 1st electrode terminal 40 are connected by the through hole 46, and the sheet-like board | substrate 30 is produced.

ここで図2に示すように、第1の電極端子40と第2の電極端子42とは、コンデンサ素子38を介して接続され、第2の電極端子42は、共通接続されている。そして、第1の電極端子40に接続されているラインの高周波ノイズ成分が、接地端子となっている第2の電極端子42にバイパスされ、高周波ノイズが除去される。   Here, as shown in FIG. 2, the first electrode terminal 40 and the second electrode terminal 42 are connected via a capacitor element 38, and the second electrode terminal 42 is commonly connected. And the high frequency noise component of the line connected to the 1st electrode terminal 40 is bypassed by the 2nd electrode terminal 42 used as a ground terminal, and a high frequency noise is removed.

このようなシート状基板付き電子部品では、電子部品と、ノイズ防止回路とを含むシート状基板を積み重ねて立体的に構成するので、全体の高さをほとんど変えず、またノイズ防止回路部分の実装面積を増やすことがないため、装置の小型化を実現できる。さらに、電子部品とノイズ防止回路を有するシート状基板とを一体化した状態で、両者を電気的にも接続完了した部品として扱うことができる。従って、その接続完了した部品としての動作試験を容易に行うことができて、信頼性の高い部品を得られる。   In such an electronic component with a sheet-like substrate, the sheet-like substrate including the electronic component and the noise prevention circuit is stacked to form a three-dimensional structure, so that the overall height is hardly changed and the noise prevention circuit portion is mounted. Since the area is not increased, the size of the apparatus can be reduced. Furthermore, in a state where the electronic component and the sheet-like substrate having the noise prevention circuit are integrated, both can be handled as components that have been electrically connected. Therefore, the operation test as the connected component can be easily performed, and a highly reliable component can be obtained.

なお本発明の第1の実施の形態では、シート状基板30の第2の面36にノイズ防止回路44を形成する場合を示したが、第1の面にノイズ防止回路を形成しても同様の効果が得られるシート状基板付き電子部品となる。   In the first embodiment of the present invention, the case where the noise prevention circuit 44 is formed on the second surface 36 of the sheet-like substrate 30 is shown, but the same may be said even if the noise prevention circuit is formed on the first surface. Thus, an electronic component with a sheet-like substrate can be obtained.

(第2の実施の形態)
次に本発明の積層型電子回路装置および製造方法について図3〜図6を用いて説明する。本発明の積層型電子回路装置は、電子部品(コネクタ)10にシート状基板50が付いたシート状基板付き電子部品、および回路基板60から構成されている。
(Second Embodiment)
Next, the multilayer electronic circuit device and the manufacturing method of the present invention will be described with reference to FIGS. The multilayer electronic circuit device of the present invention includes an electronic component with a sheet-like substrate in which a sheet-like substrate 50 is attached to an electronic component (connector) 10, and a circuit board 60.

図3(A)は、本発明の第2の実施の形態の積層型電子回路装置の断面構造図であり、図3(B)は図3(A)の平面図である。本発明の第1の実施の形態と同様に、シート状基板50の第2の面36には第1の電極端子40、コンデンサ素子38、第2の電極端子47を含むノイズ防止回路が形成されている。また第1の面32には、端子ピン14の対応する位置に第1の配線端子34が形成され、端子ピン14と第1の配線端子34とが接続部材70で接続されている。そして、第1の配線端子34と第1の電極端子40とがスルーホール46で接続されている。なお図3(A)は、図4のX2−X2線に沿った断面図である。またコネクタ10は、本発明の第1の実施の形態と同様なので説明を省略する。   FIG. 3A is a cross-sectional structure diagram of the multilayer electronic circuit device according to the second embodiment of the present invention, and FIG. 3B is a plan view of FIG. Similar to the first embodiment of the present invention, a noise prevention circuit including the first electrode terminal 40, the capacitor element 38, and the second electrode terminal 47 is formed on the second surface 36 of the sheet-like substrate 50. ing. A first wiring terminal 34 is formed on the first surface 32 at a position corresponding to the terminal pin 14, and the terminal pin 14 and the first wiring terminal 34 are connected by a connecting member 70. The first wiring terminal 34 and the first electrode terminal 40 are connected by a through hole 46. 3A is a cross-sectional view taken along line X2-X2 of FIG. Further, the connector 10 is the same as that of the first embodiment of the present invention, so the description is omitted.

回路基板60は、例えばガラスエポキシ樹脂からなる基板62上に多層配線(図示せず)等が設けられている。また図3(A)、図3(B)に示すようにシート状基板50の第1の電極端子40に対応する位置、およびそれより引き出された形状で、第1の電極パッド64が設けられている。そして、シート状基板50の第1の電極端子40と回路基板60の第1の電極パッド64とが、はんだ等の接続部材72で電気的に接続されている。   The circuit board 60 is provided with a multilayer wiring (not shown) or the like on a substrate 62 made of, for example, glass epoxy resin. Further, as shown in FIGS. 3A and 3B, a first electrode pad 64 is provided at a position corresponding to the first electrode terminal 40 of the sheet-like substrate 50 and a shape drawn therefrom. ing. And the 1st electrode terminal 40 of the sheet-like board | substrate 50 and the 1st electrode pad 64 of the circuit board 60 are electrically connected by the connection members 72, such as solder.

図4は、図3(A)の回路基板60側からシート状基板50を見た底面図である。シート状基板50の第2の電極端子47は共通接続され、第2の電極端子引き出し部47aから接地される。   FIG. 4 is a bottom view of the sheet substrate 50 as viewed from the circuit substrate 60 side of FIG. The second electrode terminals 47 of the sheet-like substrate 50 are commonly connected and grounded from the second electrode terminal lead portion 47a.

図5は、本発明の第2の実施の形態の積層型電子回路装置の図4のX3−X3線に沿った断面図である。図5に示すように、接続不要な端子ピン14aの対応する位置に第2の電極端子47を延設して、第2の電極端子引き出し部47aを形成している。そして、第2の電極端子引き出し部47aは回路基板60の第2の電極パッド66とはんだ等の接続部材79で接続されている。この結果、シート状基板50と回路基板60との接続箇所は、シート状基板50の端部のみになるので、接続の良否確認も容易になる。また、接続の良否確認の導通チェックを行う際も、シート状基板50の端子ピンの支持のない中央部に、導通チェックの検査端子を接触させることがないので、確認の精度も向上する。   FIG. 5 is a sectional view taken along line X3-X3 in FIG. 4 of the multilayer electronic circuit device according to the second embodiment of the present invention. As shown in FIG. 5, the second electrode terminal 47 is formed by extending the second electrode terminal 47 at a position corresponding to the terminal pin 14a that does not require connection. The second electrode terminal lead portion 47a is connected to the second electrode pad 66 of the circuit board 60 by a connecting member 79 such as solder. As a result, the connection place between the sheet-like substrate 50 and the circuit board 60 is only the end of the sheet-like substrate 50, so that it is easy to check whether the connection is good or bad. In addition, when conducting a continuity check for confirming whether or not the connection is good, since the inspection terminal for the continuity check is not brought into contact with the center portion of the sheet-like substrate 50 where the terminal pins are not supported, the accuracy of confirmation is improved.

なお、接地方法として第2の電極端子引き出し部47aで一括して行う方法に限定されるものでなく、第2の電極端子47を複数まとめて、あるいは個々に接地してもよい。その際、第2の電極端子を引き出すことなく、第2の電極パッド66を第2の電極端子47の対向する位置に形成してもよい。   Note that the grounding method is not limited to the method in which the second electrode terminal lead portion 47a is used in a lump, and a plurality of the second electrode terminals 47 may be grounded together or individually. At this time, the second electrode pad 66 may be formed at a position facing the second electrode terminal 47 without pulling out the second electrode terminal.

このようにコネクタと、ノイズ防止回路を含むシート状基板とを積層し、立体的に構成して回路基板に接続するため、回路基板に占めるノイズ防止回路部分の面積が増えることはない。そして、電子回路装置としての高さは、シート状基板の厚さである100μm前後高くなるだけである。このように、本発明の積層型電子回路装置はノイズ防止回路を有しながら、実装面積を増やすことなく、また高さもほとんど変わることがない。   As described above, the connector and the sheet-like substrate including the noise prevention circuit are stacked, configured in a three-dimensional manner, and connected to the circuit substrate. Therefore, the area of the noise prevention circuit portion in the circuit board does not increase. And the height as an electronic circuit apparatus only becomes high about 100 micrometers which is the thickness of a sheet-like board | substrate. As described above, the multilayer electronic circuit device of the present invention has a noise prevention circuit, but does not increase the mounting area and hardly changes its height.

次に本発明の第2の実施の形態の積層型電子回路装置の製造方法について、図6を用いて説明する。   Next, a manufacturing method of the multilayer electronic circuit device according to the second embodiment of the present invention will be described with reference to FIG.

図6(A)は、第1接続工程を示す図で、シート状基板30を平坦面を有する平板80に載置し、コネクタ10を位置合せした状態である。また、第1の配線端子34には、端子ピン14と接続するための接続部材70が供給されている。   FIG. 6A is a diagram showing the first connection step, in which the sheet-like substrate 30 is placed on a flat plate 80 having a flat surface and the connector 10 is aligned. Further, a connection member 70 for connecting to the terminal pin 14 is supplied to the first wiring terminal 34.

図6(B)は、コネクタ10の端子ピン14とシート状基板30の第1の配線端子34とを接続部材70で接続して一体化した状態を示す図である。   FIG. 6B is a diagram showing a state in which the terminal pins 14 of the connector 10 and the first wiring terminals 34 of the sheet-like substrate 30 are connected and integrated by the connecting member 70.

図6(C)は、第2接続工程を示す図で、一体化したシート状基板30付きコネクタ10を、回路基板60に位置合せした状態である。そして、回路基板60の第1の電極パッド64には、第1の電極端子40と接続するための接続部材72が供給されている。その後、回路基板60とシート状基板30付きコネクタ10が接続され、積層型電子回路装置が完成する。   FIG. 6C is a diagram showing the second connection step, and shows a state in which the integrated connector 10 with the sheet-like substrate 30 is aligned with the circuit substrate 60. A connection member 72 for connecting to the first electrode terminal 40 is supplied to the first electrode pad 64 of the circuit board 60. Thereafter, the circuit board 60 and the connector 10 with the sheet-like board 30 are connected to complete the multilayer electronic circuit device.

このように、コネクタとシート状基板を先に一体化するので、回路基板上への実装が一度に可能となり、回路基板上に他の電子部品の実装と同時に一括して実装することができ、実装プロセスが容易になる。さらに、シート状基板付き電子部品として一体で動作確認ができるため、回路基板に実装する前に動作確認をすれば、不良のシート状基板付き電子部品を実装することがなくなる。   Thus, since the connector and the sheet-like board are integrated first, mounting on the circuit board is possible at one time, and it can be mounted on the circuit board at the same time as mounting other electronic components, The mounting process becomes easier. Further, since the operation can be confirmed integrally as the electronic component with the sheet-like substrate, if the operation is confirmed before being mounted on the circuit board, the defective electronic component with the sheet-like substrate is not mounted.

また、第1接続工程の接続部材には高融点はんだ材であるSn−Ag系、Sn−Sb系を用い、第2接続工程の接続部材には低融点はんだ材のSn−Bi系、Bi−In系、Sn−In系を用いれば、第2接続工程で第1接続工程でのはんだが再溶融することはない。さらに、第1接続工程の接続部材にははんだ材を用い、第2接続工程の接続部材には常温硬化型のエポキシ系の導電性接着材を用いてもよい。   In addition, Sn—Ag and Sn—Sb, which are high melting point solder materials, are used for the connection member in the first connection step, and Sn—Bi and Bi—, which are low melting point solder materials, are used as the connection members in the second connection step. If the In system and the Sn-In system are used, the solder in the first connection process does not remelt in the second connection process. Furthermore, a solder material may be used for the connection member in the first connection step, and a room temperature curing type epoxy conductive adhesive may be used for the connection member in the second connection step.

(第3の実施の形態)
図7は本発明の第3の実施の形態の積層型電子回路装置の断面構造図で、本発明の第2の実施の形態でのシート状基板の形状が小さい場合である。図7(A)は、シート状基板56付きコネクタ10が第1の電極パッド64のみに接続されている部分の断面構造図、図7(B)はシート状基板56付きコネクタ10が、接地されている第2の電極パッド66に接続されている部分も含む断面構造図である。
(Third embodiment)
FIG. 7 is a cross-sectional structural view of the multilayer electronic circuit device according to the third embodiment of the present invention, and shows a case where the shape of the sheet-like substrate in the second embodiment of the present invention is small. 7A is a cross-sectional structural view of a portion where the connector 10 with the sheet-like substrate 56 is connected only to the first electrode pad 64, and FIG. 7B is a diagram illustrating the connector 10 with the sheet-like substrate 56 being grounded. FIG. 6 is a cross-sectional structure diagram that also includes a portion connected to the second electrode pad 66.

図7(A)に示すように、シート状基板56は端子ピン14に接続部材78で接続され、第1の電極端子40は第1の電極パッド64とはんだ等の接続部材72bで接続されている。さらに、端子ピン14は第1の電極パッド64とはんだ等の接続部材77で接続されている。その他は本発明の第2の実施の形態と同様なので説明を省略する。なお、接続部材78は導電性を有する必要はなく、端子ピン14およびシート状基板56を第1の電極パッド64と接続するまでに、コネクタ10とシート状基板56とを一体化するものであればよい。   As shown in FIG. 7A, the sheet-like substrate 56 is connected to the terminal pins 14 by connection members 78, and the first electrode terminals 40 are connected to the first electrode pads 64 by connection members 72b such as solder. Yes. Further, the terminal pin 14 is connected to the first electrode pad 64 by a connecting member 77 such as solder. Others are the same as those of the second embodiment of the present invention, and the description thereof will be omitted. Note that the connecting member 78 does not need to have conductivity, and the connector 10 and the sheet substrate 56 are integrated before the terminal pins 14 and the sheet substrate 56 are connected to the first electrode pads 64. That's fine.

また図7(B)で図7(A)と異なる点は、第2の電極パッド66は接続不要な端子ピン14aとは接続せずに、第2の電極端子引き出し部47aとはんだ等の接続部材79bで接続していることである。ここで、接続不要な端子ピン14aとは、外部機器との接続が不要な端子ピンのことである。通常、コネクタの端子ピンは全て外部機器との接続が必要なものばかりでなく、接続不要の端子ピンを含めて余裕をもたせている。なお、第2の電極端子引き出し部47aは、本発明の第2の実施の形態と同様に第2の電極端子47を、シート状基板56の端部に延設したものである。   7B is different from FIG. 7A in that the second electrode pad 66 is not connected to the terminal pin 14a that does not need to be connected, and the second electrode terminal lead portion 47a is connected to the solder or the like. It is connected with the member 79b. Here, the terminal pin 14a that does not require connection is a terminal pin that does not require connection with an external device. Normally, not only the terminal pins of the connector need to be connected to an external device but also a margin including a terminal pin that does not need to be connected. The second electrode terminal lead portion 47 a is obtained by extending the second electrode terminal 47 to the end portion of the sheet-like substrate 56 as in the second embodiment of the present invention.

このような構成にすれば、シート状基板56にはスルーホールが全く必要なくなり、製造工程が簡略化される。   With such a configuration, the sheet-like substrate 56 does not require any through holes, and the manufacturing process is simplified.

(第4の実施の形態)
次にコネクタ10に対向する第1の面32に、ノイズ防止回路を形成したシート状基板52を含む積層型電子回路装置を、本発明の第4の実施の形態として、図8および図9を用いて説明する。ここでは、本発明の第1の実施の形態〜第3の実施の形態と異なる点を中心に説明する。
(Fourth embodiment)
Next, a multilayer electronic circuit device including a sheet-like substrate 52 having a noise prevention circuit formed on the first surface 32 facing the connector 10 is shown in FIGS. 8 and 9 as a fourth embodiment of the present invention. It explains using. Here, it demonstrates centering on a different point from the 1st Embodiment of this invention-3rd Embodiment.

図8は本発明の第4の実施の形態の積層型電子回路装置の断面構造図、図9はその積層型電子回路装置に使われているシート状基板の平面図である。そして、図8(A)、図8(B)はそれぞれ図9のX4−X4線、X5−X5線に沿った断面図である。図8、図9に示すシート状基板52では、本発明の第2の実施の形態のシート状基板50と同様に第2の電極端子48が共通接続され、第2の電極端子引き出し部48aから接地される。   FIG. 8 is a sectional structural view of a multilayer electronic circuit device according to a fourth embodiment of the present invention, and FIG. 9 is a plan view of a sheet-like substrate used in the multilayer electronic circuit device. 8A and 8B are cross-sectional views taken along lines X4-X4 and X5-X5 in FIG. 9, respectively. In the sheet-like substrate 52 shown in FIG. 8 and FIG. 9, the second electrode terminal 48 is commonly connected in the same manner as the sheet-like substrate 50 of the second embodiment of the present invention. Grounded.

図8(A)は、シート状基板52が第1の電極パッド64のみに接続された部分の断面図である。シート状基板52の、コネクタ10の底面12に対向する第1の面32には、コンデンサ素子38および第1の電極端子41、第2の電極端子48が形成されている。また、第1の電極端子41が、シート状基板52の端部で端子ピン14の対向する位置に設けられ、第2の電極端子48はシート状基板52の中央部に設けられている。第2の面36は回路基板82に対向する面であり、第1の電極端子41に対応する位置には第1の配線端子34が形成されている。さらに、対応する第1の配線端子34と第1の電極端子41とは、スルーホール46で電気的に接続されている。また、第1の電極端子41と端子ピン14、第1の配線端子34と第1の電極パッド64がそれぞれはんだ等の接続部材71、接続部材73で電気的に接続されている。   FIG. 8A is a cross-sectional view of a portion where the sheet-like substrate 52 is connected only to the first electrode pad 64. A capacitor element 38, a first electrode terminal 41, and a second electrode terminal 48 are formed on the first surface 32 of the sheet-like substrate 52 facing the bottom surface 12 of the connector 10. Further, the first electrode terminal 41 is provided at a position facing the terminal pin 14 at the end of the sheet-like substrate 52, and the second electrode terminal 48 is provided at the center of the sheet-like substrate 52. The second surface 36 is a surface facing the circuit board 82, and the first wiring terminal 34 is formed at a position corresponding to the first electrode terminal 41. Further, the corresponding first wiring terminal 34 and first electrode terminal 41 are electrically connected through a through hole 46. Further, the first electrode terminal 41 and the terminal pin 14, and the first wiring terminal 34 and the first electrode pad 64 are electrically connected by a connection member 71 such as solder and a connection member 73, respectively.

図8(B)は、シート状基板52の第2の電極端子48を延設して、第2の電極端子引き出し部48aが形成された部分の断面図である。接続不要な端子ピン14aの対応する位置で、第1の面32に第2の電極端子引き出し部48a、第2の面36に第2の配線端子43、回路基板82に第2の電極パッド66が形成され、第2の電極端子引き出し部48aと第2の配線端子43とはスルーホール49で接続されている。また、接続不要な端子ピン14aと第2の電極端子引き出し部48a、第2の配線端子43と第2の電極パッド66はそれぞれはんだ等の接続部材74、接続部材75で電気的に接続されている。第2の電極パッド66は接地されていて、端子ピン14に含まれる高周波成分はコンデンサ素子38で分離され、第2の電極パッド66から除去される。   FIG. 8B is a cross-sectional view of a portion where the second electrode terminal 48 of the sheet-like substrate 52 is extended to form the second electrode terminal lead portion 48a. At a position corresponding to the terminal pin 14a that does not require connection, the second electrode terminal lead portion 48a is formed on the first surface 32, the second wiring terminal 43 is formed on the second surface 36, and the second electrode pad 66 is formed on the circuit board 82. The second electrode terminal lead portion 48a and the second wiring terminal 43 are connected by a through hole 49. Further, the terminal pin 14a and the second electrode terminal lead portion 48a that do not require connection, and the second wiring terminal 43 and the second electrode pad 66 are electrically connected by a connection member 74 such as solder and a connection member 75, respectively. Yes. The second electrode pad 66 is grounded, and the high frequency component contained in the terminal pin 14 is separated by the capacitor element 38 and removed from the second electrode pad 66.

このように、ノイズ防止回路をコネクタ側に形成することで、回路基板とシート状基板との間に有効なスペースができ、回路基板の他の配線の引き回しもより容易になる。   Thus, by forming the noise prevention circuit on the connector side, an effective space is created between the circuit board and the sheet-like board, and the other wiring of the circuit board can be routed more easily.

(第5の実施の形態)
図10は本発明の第5の実施の形態の積層型電子回路装置の断面構造図で、本発明の第4の実施の形態でのシート状基板より、その形状が小さい場合である。図10(A)は、シート状基板54付きコネクタ10が第1の電極パッド65のみに接続されている部分の断面図、図10(B)は、シート状基板54付きコネクタ10が接地されている第2の電極パッド66に接続されている部分も含む断面図である。
(Fifth embodiment)
FIG. 10 is a cross-sectional structural view of the multilayer electronic circuit device according to the fifth embodiment of the present invention, in which the shape is smaller than that of the sheet-like substrate according to the fourth embodiment of the present invention. 10A is a cross-sectional view of a portion where the connector 10 with the sheet-like substrate 54 is connected only to the first electrode pad 65, and FIG. 10B shows that the connector 10 with the sheet-like substrate 54 is grounded. 6 is a cross-sectional view including a portion connected to the second electrode pad 66.

図10に示すように、回路基板61には、第1の電極パッド65が端子ピン14の一部に対応する位置および引き出された形状で、第2の電極パッド66が接続不要な端子ピン14aの一部に対応する位置および引き出された形状で形成されている。そして、端子ピン14と第1の電極端子41、端子ピン14と第1の電極パッド65、接続不要な端子ピン14aと第2の電極端子引き出し部48a、接続不要な端子ピン14aと第2の電極パッド66がそれぞれはんだ等の接続部材71b、接続部材77、接続部材74a、接続部材76で接続されている。   As shown in FIG. 10, on the circuit board 61, the first electrode pad 65 has a position corresponding to a part of the terminal pin 14 and a drawn shape, and the second electrode pad 66 does not need to be connected to the terminal pin 14a. It is formed in the position corresponding to a part of and the shape pulled out. The terminal pin 14 and the first electrode terminal 41, the terminal pin 14 and the first electrode pad 65, the connection unnecessary terminal pin 14a and the second electrode terminal lead portion 48a, the connection unnecessary terminal pin 14a and the second terminal pin 14a. The electrode pads 66 are connected by a connection member 71b such as solder, a connection member 77, a connection member 74a, and a connection member 76, respectively.

このような構成の積層型電子回路装置とすれば、シート状基板54にはスルーホールは全く不要となるうえに、シート状基板54を回路基板61に接続部材で接続する必要がなくなるので、さらに低背化できる。ここで、端子ピン14および接続不要な端子ピン14aを、それぞれ第1の電極パッド65および第2の電極パッド66には、はんだ等の接続部材77、接続部材76で接続する。接続部材77、接続部材76は100μm前後の厚さが必要なため、数回のスクリーン印刷等の塗布工程が必要となる。   With the stacked electronic circuit device having such a configuration, the sheet-like substrate 54 does not require any through holes, and it is not necessary to connect the sheet-like substrate 54 to the circuit substrate 61 with a connecting member. Can be reduced in height. Here, the terminal pin 14 and the terminal pin 14a that does not need to be connected are connected to the first electrode pad 65 and the second electrode pad 66 by a connecting member 77 such as solder and a connecting member 76, respectively. Since the connecting member 77 and the connecting member 76 need to have a thickness of about 100 μm, several coating processes such as screen printing are required.

そこで、図11に示すように、シート状基板54を収納するように、回路基板63に凹部を設けることで、端子ピン14と第1の電極パッド65、接続不要な端子ピン14aと第2の電極パッド66が接続されているそれぞれ接続部材77b、接続部材76aを100μm前後も厚くする必要がなくなる。また、端子ピン14と第1の電極端子41および第1の電極パッド65、接続不要な端子ピン14aと第2の電極端子引き出し部48aおよび第2の電極パッド66をそれぞれはんだ等の接続部材71b、接続部材77b、接続部材74a、接続部材76aで同時に接続できる。   Therefore, as shown in FIG. 11, by providing a recess in the circuit board 63 so as to accommodate the sheet-like board 54, the terminal pins 14 and the first electrode pads 65, the terminal pins 14a that do not need to be connected, and the second pins are connected. There is no need to increase the thickness of the connection members 77b and 76a to which the electrode pads 66 are connected by about 100 μm. Further, the terminal pin 14, the first electrode terminal 41 and the first electrode pad 65, the terminal pin 14a which does not need to be connected, the second electrode terminal lead portion 48a and the second electrode pad 66 are respectively connected to a connecting member 71b such as solder. The connection member 77b, the connection member 74a, and the connection member 76a can be connected simultaneously.

なお、本発明の第1の実施の形態〜第5の実施の形態では、ノイズ防止回路としてコンデンサ素子アレイについて説明したが、本発明はこれに限定されない。ノイズ防止回路としては、CRフィルタやLCフィルタであってもよい。   In the first to fifth embodiments of the present invention, the capacitor element array has been described as the noise prevention circuit. However, the present invention is not limited to this. The noise prevention circuit may be a CR filter or an LC filter.

さらに、本発明の実施の形態では、電子部品としてコネクタを例として説明したが、本発明はコネクタに限定されない。例えば、ガルウィング型端子のパッケージ構造の半導体素子のように、表面実装型パッケージであれば同様に適用できる。   Furthermore, in the embodiment of the present invention, the connector has been described as an example of the electronic component, but the present invention is not limited to the connector. For example, the present invention can be similarly applied to a surface mount type package such as a semiconductor element having a gull wing type terminal package structure.

本発明にかかるシート状基板付き電子部品並びに積層型電子回路装置およびその製造方法は、低背化と実装面積の増加防止を両立して小型化できるので、携帯電話等の携帯機器に有用である。   INDUSTRIAL APPLICABILITY The electronic component with a sheet-like substrate, the multilayer electronic circuit device, and the manufacturing method thereof according to the present invention can be miniaturized while achieving both a reduction in height and an increase in mounting area, and thus are useful for portable devices such as cellular phones. .

(A)本発明の第1の実施の形態のシート状基板付き電子部品の断面構造図(B)同実施の形態のシート状基板付き電子部品の平面図(A) Cross-sectional structure diagram of electronic component with sheet-like substrate of the first embodiment of the present invention (B) Plan view of electronic component with sheet-like substrate of the same embodiment (A)同実施の形態のシート状基板付き電子部品に用いるシート状基板の平面図(B)同実施の形態のシート状基板付き電子部品に用いるシート状基板のX1−X1線に沿った断面図(A) Plan view of sheet-like substrate used for electronic component with sheet-like substrate of the embodiment (B) Cross section taken along line X1-X1 of sheet-like substrate used for electronic component with sheet-like substrate of the embodiment Figure (A)本発明の第2の実施の形態の積層型電子回路装置の断面構造を示し図4のX2−X2線に沿った断面図(B)同実施の形態の積層型電子回路装置の平面図(A) Cross-sectional view taken along line X2-X2 of FIG. 4 showing a cross-sectional structure of the multilayer electronic circuit device of the second embodiment of the present invention (B) Plane of the multilayer electronic circuit device of the same embodiment Figure 同実施の形態の積層型電子回路装置に用いるシート状基板を回路基板側から見た底面図Bottom view of the sheet-like substrate used in the multilayer electronic circuit device of the same embodiment as viewed from the circuit substrate side 同実施の形態の積層型電子回路装置の図4のX3−X3線に沿った断面図Sectional drawing along the X3-X3 line of FIG. 4 of the multilayer electronic circuit device of the embodiment (A)同実施の形態の積層型電子回路装置の製造方法を示す第1接続工程を示す図(B)同実施の形態の積層型電子回路装置の製造方法を示すコネクタとシート状基板を一体化した状態を示す図(C)同実施の形態の積層型電子回路装置の製造方法を示す第2接続工程を示す図(A) The figure which shows the 1st connection process which shows the manufacturing method of the multilayer electronic circuit device of the embodiment (B) The connector and sheet-like board | substrate which show the manufacturing method of the multilayer electronic circuit device of the embodiment are integrated The figure which shows the state which became (C) The figure which shows the 2nd connection process which shows the manufacturing method of the multilayer electronic circuit device of the embodiment (A)本発明の第3の実施の形態の積層型電子回路装置の第1の電極パッドのみに接続された部分の断面構造図(B)同実施の形態の積層型電子回路装置の第2の電極パッドに接続された部分を含む断面構造図(A) Cross-sectional structure diagram of a portion connected to only the first electrode pad of the multilayer electronic circuit device of the third embodiment of the present invention (B) Second of the multilayer electronic circuit device of the same embodiment Sectional structure diagram including the part connected to the electrode pad of (A)本発明の第4の実施の形態の積層型電子回路装置の断面構造を示し図9のX4−X4線に沿った断面図(B)同実施の形態の積層型電子回路装置の断面構造を示し図9のX5−X5線に沿った断面図(A) Cross-sectional view taken along line X4-X4 of FIG. 9 showing a cross-sectional structure of the multilayer electronic circuit device of the fourth embodiment of the present invention (B) Cross section of the multilayer electronic circuit device of the same embodiment Sectional view taken along line X5-X5 in FIG. 9 showing the structure 同実施の形態の積層型電子回路装置に用いるシート状基板の平面図Plan view of a sheet-like substrate used in the multilayer electronic circuit device of the same embodiment 本発明の第5の実施の形態の積層型電子回路装置の断面構造図Sectional structure diagram of a multilayer electronic circuit device according to a fifth embodiment of the present invention 同実施の形態の積層型電子回路装置で回路基板にシート状基板を収納した断面構造図Sectional structural view in which a sheet-like substrate is housed in a circuit board in the multilayer electronic circuit device of the embodiment 従来のノイズ防止用のフィルタを電子部品に一体化した例を示す図The figure which shows the example which integrated the filter for the conventional noise prevention into the electronic component

符号の説明Explanation of symbols

10,300 電子部品(コネクタ)
12 底面
14,340 端子ピン
14a 接続不要な端子ピン
16 屈曲部
18 先端部
20 水平部
22 樹脂モールド
24 空間部
26 接触部
30,50,52,54,56 シート状基板
31 樹脂基板
32 第1の面
33 下層電極膜
34 第1の配線端子
35 誘電体膜
36 第2の面
37 上層電極膜
38 コンデンサ素子
39 絶縁保護層
40,41 第1の電極端子
42,47,48 第2の電極端子
43 第2の配線端子
44 ノイズ防止回路
46,49 スルーホール
47a,48a 第2の電極端子引き出し部
60,61,63,82 回路基板
62 基板
64,65 第1の電極パッド
66 第2の電極パッド
70,71,71b,72,72b,73,74,74a,75,76,76a,77,77b,78,79,79b 接続部材
80 平板
310 ハウジング
320 プラグ挿入室
330 収納室
340a,350 端子
350a 一端
360,460 グランド電極
400 フィルタ
420 入力側外部電極
440 出力側外部電極
10,300 Electronic components (connectors)
12 bottom surface 14,340 terminal pin 14a connection unnecessary terminal pin 16 bent portion 18 tip portion 20 horizontal portion 22 resin mold 24 space portion 26 contact portion 30, 50, 52, 54, 56 sheet-like substrate 31 resin substrate 32 first Surface 33 Lower electrode film 34 First wiring terminal 35 Dielectric film 36 Second surface 37 Upper layer electrode film 38 Capacitor element 39 Insulating protective layer 40, 41 First electrode terminal 42, 47, 48 Second electrode terminal 43 Second wiring terminal 44 Noise prevention circuit 46, 49 Through hole 47a, 48a Second electrode terminal lead-out portion 60, 61, 63, 82 Circuit board 62 Board 64, 65 First electrode pad 66 Second electrode pad 70 71, 71b, 72, 72b, 73, 74, 74a, 75, 76, 76a, 77, 77b, 78, 79, 79b Member 80 flat 310 housing 320 plug insertion chamber 330 accommodating chamber 340a, 350 terminals 350a end 360,460 ground electrode 400 filter 420 input-side external electrodes 440 output-side external electrodes

Claims (12)

側面部または底面の周縁部から対向して突出するとともに屈曲した屈曲部を有するL字形状の複数の端子ピンが備えられた電子部品と、
前記電子部品の底面に対向する第1の面と前記第1の面に対して前記底面と反対方向に対向する第2の面を有し、その形状は全ての前記端子ピンの前記屈曲部で囲まれる領域より大きいとともに、その少なくとも一方の面にはノイズ防止回路が備えられ、前記第1の面が前記端子ピンに接続されたシート状基板と
を含むシート状基板付き電子部品。
An electronic component provided with a plurality of L-shaped terminal pins protruding from the side surface or the peripheral edge of the bottom surface and having a bent portion bent;
A first surface facing the bottom surface of the electronic component and a second surface facing the first surface in a direction opposite to the bottom surface, the shape of which is the bent portion of all the terminal pins An electronic component with a sheet-like substrate, which is larger than the enclosed region and includes a sheet-like substrate on which at least one surface thereof is provided with a noise prevention circuit and the first surface is connected to the terminal pins.
前記ノイズ防止回路は前記シート状基板の前記端子ピンと対応する位置に設けられた第1の電極端子と、前記シート状基板の中央部または中央部から前記端子ピンと対応する位置に設けられた第2の電極端子と、前記第1の電極端子と前記第2の電極端子との間に設けられたコンデンサ素子とを含む請求項1記載のシート状基板付き電子部品。 The noise prevention circuit includes a first electrode terminal provided at a position corresponding to the terminal pin of the sheet-like substrate, and a second part provided at a center portion of the sheet-like substrate or a position corresponding to the terminal pin from the center portion. 2. The electronic component with a sheet-like substrate according to claim 1, further comprising: an electrode terminal; and a capacitor element provided between the first electrode terminal and the second electrode terminal. 前記第2の電極端子を共通接続し、接地端子とする請求項2記載のシート状基板付き電子部品。 The electronic component with a sheet-like substrate according to claim 2, wherein the second electrode terminals are connected in common to serve as a ground terminal. 前記第2の面に前記ノイズ防止回路が形成された請求項2または請求項3記載のシート状基板付き電子部品。 The electronic component with a sheet-like substrate according to claim 2 or 3, wherein the noise prevention circuit is formed on the second surface. 前記第1の面に前記ノイズ防止回路が形成され、前記端子ピンと前記第1の電極端子または前記第2の電極端子とが接続された請求項2または請求項3記載のシート状基板付き電子部品。 4. The electronic component with a sheet-like substrate according to claim 2, wherein the noise prevention circuit is formed on the first surface, and the terminal pin is connected to the first electrode terminal or the second electrode terminal. . 前記第1の面に前記端子ピンと対向する位置に第1の配線端子を形成して前記端子ピンと前記第1の配線端子とが接続されるとともに前記第1の配線端子と前記第1の電極端子とがスルーホールで接続された請求項4記載のシート状基板付き電子部品と、
前記第1の電極端子に対向する位置に第1の電極パッドおよび前記第2の電極端子に対向する位置に少なくとも一つの第2の電極パッドが形成され前記第1の電極パッドが前記第1の電極端子および前記第2の電極パッドが前記第2の電極端子に接続された回路基板と
を含む積層型電子回路装置。
A first wiring terminal is formed on the first surface at a position facing the terminal pin, the terminal pin and the first wiring terminal are connected, and the first wiring terminal and the first electrode terminal And an electronic component with a sheet-like substrate according to claim 4, wherein the electronic component is connected through a through hole,
At least one second electrode pad is formed at a position facing the first electrode terminal and at a position facing the second electrode terminal at a position facing the first electrode terminal, and the first electrode pad is formed at the first electrode pad. A multilayer electronic circuit device comprising: an electrode terminal; and a circuit board having the second electrode pad connected to the second electrode terminal.
請求項4記載のシート状基板付き電子部品と、
前記端子ピンおよび前記第1の電極端子面と対応する位置に第1の電極パッドおよび前記第2の電極端子に対向する位置に少なくとも一つの第2の電極パッドが形成され、前記第1の電極パッドが前記第1の電極端子と前記端子ピンとに接続され前記第2の電極パッドが前記第2の電極端子に接続された回路基板と
を含む積層型電子回路装置。
An electronic component with a sheet-like substrate according to claim 4,
At least one second electrode pad is formed at a position opposite to the first electrode pad and the second electrode terminal at a position corresponding to the terminal pin and the first electrode terminal surface, and the first electrode A stacked electronic circuit device comprising: a circuit board having a pad connected to the first electrode terminal and the terminal pin, and the second electrode pad connected to the second electrode terminal.
前記第2の面に第1の配線端子が前記端子ピンと対応する位置に形成され第2の配線端子が前記第2の電極端子または前記端子ピンと対応する位置に形成されるとともに、前記第1の電極端子と前記第1の配線端子および前記第2の電極端子と前記第2の配線端子とがスルーホールで接続された請求項5記載のシート状基板付き電子部品と、
前記第1の配線端子に対向する位置に第1の電極パッドおよび前記第2の配線端子に対向する位置に少なくとも一つの第2の電極パッドが形成され前記第1の電極パッドが前記第1の配線端子および前記第2の電極パッドが前記第2の配線端子に接続された回路基板と
を含む積層型電子回路装置。
A first wiring terminal is formed on the second surface at a position corresponding to the terminal pin, and a second wiring terminal is formed at a position corresponding to the second electrode terminal or the terminal pin. The electronic component with a sheet-like substrate according to claim 5, wherein the electrode terminal, the first wiring terminal, the second electrode terminal, and the second wiring terminal are connected by a through hole,
At least one second electrode pad is formed at a position facing the first wiring terminal and at a position facing the second wiring terminal at a position facing the first wiring terminal, and the first electrode pad is formed at the first wiring pad. A multilayer electronic circuit device including a wiring board and a circuit board in which the second electrode pad is connected to the second wiring terminal.
請求項5記載のシート状基板付き電子部品と、
前記端子ピンと対応する位置に第1の電極パッドおよび第2の電極パッドが形成され、前記第1の電極パッドおよび前記第2の電極パッドが前記端子ピンに接続された回路基板と
を含む積層型電子回路装置。
An electronic component with a sheet-like substrate according to claim 5,
A laminated type including a circuit board in which a first electrode pad and a second electrode pad are formed at a position corresponding to the terminal pin, and the first electrode pad and the second electrode pad are connected to the terminal pin. Electronic circuit device.
前記回路基板には前記シート状基板を収納するための凹部が設けられている請求項9記載の積層型電子回路装置。 The multilayer electronic circuit device according to claim 9, wherein the circuit board is provided with a recess for accommodating the sheet-like substrate. 側面部または底面の周縁部から対向して突出するとともに屈曲した屈曲部を有するL字形状の複数の端子ピンが備えられた電子部品の前記端子ピン、並びに全ての前記端子ピンの前記屈曲部で囲まれた領域より広い領域にノイズ防止回路が備えられたシート状基板と前記電子部品とを接続部材で接続する第1接続工程と、
前記端子ピンまたは前記シート状基板の中央部に対応する位置に形成された回路基板の電極パッドを前記シート状基板または前記シート状基板および前記端子ピンに接続部材で接続する第2接続工程と
を有する積層型電子回路装置の製造方法。
In the terminal pin of the electronic component provided with a plurality of L-shaped terminal pins protruding and bent from the peripheral portion of the side surface or the bottom surface, and the bent portions of all the terminal pins A first connection step of connecting the electronic component with a sheet-like substrate provided with a noise prevention circuit in a wider area than the enclosed area; and
A second connection step of connecting an electrode pad of a circuit board formed at a position corresponding to a center portion of the terminal pin or the sheet-like substrate to the sheet-like substrate or the sheet-like substrate and the terminal pin with a connection member; A method for manufacturing a stacked electronic circuit device.
前記第1接続工程の接続部材には第1のはんだ材が用いられ、前記第2接続工程の接続部材には前記第1のはんだ材より低融点のはんだ材が用いられる請求項11記載の積層型電子回路装置の製造方法。 The lamination according to claim 11, wherein a first solder material is used for the connection member in the first connection step, and a solder material having a melting point lower than that of the first solder material is used for the connection member in the second connection step. Type electronic circuit device manufacturing method.
JP2003382192A 2003-11-12 2003-11-12 Electronic component with sheet-shaped base plate, laminated electronic circuit device, and manufacturing method of the same Pending JP2005149778A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007037275A1 (en) * 2005-09-28 2007-04-05 Matsushita Electric Industrial Co., Ltd. Electronic circuit connection structure and its manufacturing method
JP2009217976A (en) * 2008-03-07 2009-09-24 Fujikura Ltd Coaxial cable connector, and its soldering method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007037275A1 (en) * 2005-09-28 2007-04-05 Matsushita Electric Industrial Co., Ltd. Electronic circuit connection structure and its manufacturing method
US7835160B2 (en) 2005-09-28 2010-11-16 Panasonic Corporation Electronic circuit connection structure and its manufacturing method
JP2009217976A (en) * 2008-03-07 2009-09-24 Fujikura Ltd Coaxial cable connector, and its soldering method

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