CN114980496B - Circuit board assembly, electronic equipment and processing method of circuit board assembly - Google Patents
Circuit board assembly, electronic equipment and processing method of circuit board assembly Download PDFInfo
- Publication number
- CN114980496B CN114980496B CN202110189317.4A CN202110189317A CN114980496B CN 114980496 B CN114980496 B CN 114980496B CN 202110189317 A CN202110189317 A CN 202110189317A CN 114980496 B CN114980496 B CN 114980496B
- Authority
- CN
- China
- Prior art keywords
- circuit board
- electronic component
- board assembly
- pads
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 14
- 238000012545 processing Methods 0.000 claims abstract description 23
- 229910000679 solder Inorganic materials 0.000 claims description 83
- 238000000034 method Methods 0.000 claims description 40
- 230000008569 process Effects 0.000 claims description 29
- 238000007639 printing Methods 0.000 claims description 26
- 238000005476 soldering Methods 0.000 claims description 25
- 239000002184 metal Substances 0.000 claims description 23
- 230000004907 flux Effects 0.000 claims description 18
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 11
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000002844 melting Methods 0.000 claims description 5
- 230000008018 melting Effects 0.000 claims description 5
- 238000004806 packaging method and process Methods 0.000 claims 4
- 238000013461 design Methods 0.000 abstract description 13
- 238000003860 storage Methods 0.000 abstract description 4
- 238000003466 welding Methods 0.000 description 8
- 229910000831 Steel Inorganic materials 0.000 description 7
- 239000010959 steel Substances 0.000 description 7
- 238000005507 spraying Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000005693 optoelectronics Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 1
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
The application provides a circuit board assembly, electronic equipment and a processing method of the circuit board assembly, relates to the technical field of electronic equipment, and can reduce the thickness of the circuit board assembly so as to realize the thin design of the electronic equipment. The circuit board assembly comprises a circuit board and a first electronic component; the surface of the circuit board is provided with a groove, and the bottom surface of the groove is provided with a plurality of first bonding pads in an array manner; the first electronic component is provided with a first surface, the first surface is opposite to the bottom surface of the groove, the first surface array is provided with a plurality of first conductive pieces, the first conductive pieces protrude towards the direction close to the bottom surface of the groove, the end parts of the first conductive pieces close to the bottom surface of the groove are respectively connected with a plurality of first bonding pads, and the height h of the part, between the first surface and the first bonding pads, of the first conductive pieces in the direction perpendicular to the circuit board is as follows: h < (0.21×l nd+0.36) mm. The circuit board assembly provided by the embodiment of the application is used for realizing signal control, data processing and storage.
Description
Technical Field
The present application relates to the field of electronic devices, and in particular, to a circuit board assembly, an electronic device, and a method for processing a circuit board assembly.
Background
At present, the design of electronic devices such as a folding screen mobile phone, a tablet mobile phone and a tablet computer is increasingly focusing on the overall thinning, and the thickness of a circuit board assembly in the electronic devices is one of main factors for limiting the thickness of the whole device.
In the prior art, a circuit board assembly includes a printed circuit board and electronic components disposed on the printed circuit board. Along with the gradual enrichment of functions and the gradual improvement of performances of electronic equipment, the number of electronic components required to be arranged on a printed circuit board is increased. In order to increase the number of electronic components integrated on the printed circuit board without increasing the area of the printed circuit board, at least two electronic components may be packaged in a stacked manner at the same area on the printed circuit board by using a package on package (package on package, POP) technology, but this greatly increases the thickness of the circuit board assembly. On the basis, how to reduce the thickness of the circuit board assembly so as to realize the thin design of the electronic equipment is an important direction of research of various manufacturers.
Disclosure of Invention
The embodiment of the application provides a circuit board assembly, electronic equipment and a processing method of the circuit board assembly, which can reduce the thickness of the circuit board assembly so as to realize the thin design of the electronic equipment.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:
In a first aspect, some embodiments of the present application provide a circuit board assembly comprising a circuit board and a first electronic component; the surface of the circuit board is provided with a groove, and the bottom surface of the groove is provided with a plurality of first bonding pads in an array manner; the first electronic component is provided with a first surface, the first surface is opposite to the bottom surface of the groove, the first surface array is provided with a plurality of first conductive pieces, the first conductive pieces protrude towards the direction close to the bottom surface of the groove, the end parts of the first conductive pieces close to the bottom surface of the groove are respectively connected with a plurality of first bonding pads, and the height h of the part, between the first surface and the first bonding pads, of the first conductive pieces in the direction perpendicular to the circuit board is as follows: h < (0.21× lnd +0.36) mm; wherein d is an array pitch of the plurality of first conductive elements on the first surface.
In the circuit board assembly provided by the embodiment of the application, the surface of the circuit board is provided with the groove, the bottom surface of the groove is provided with the plurality of first bonding pads in an array manner, and the first electronic component is connected with the plurality of first bonding pads through the plurality of first conductive pieces. Therefore, at least the first conductive piece is sunk into the groove, and on the premise that the height of the first conductive piece is unchanged, the height of the first electronic component protruding out of the surface of the circuit board can be reduced, the thickness of the circuit board assembly is reduced, and the thin design of the electronic equipment is facilitated. Meanwhile, since the height h of the portions of the plurality of first conductive members between the first surface and the first pad in the direction perpendicular to the circuit board satisfies: h < 0.21× lnd +0.36, unit: mm, this h is smaller than the height h 0(h0≥0.21×lnd0 +0.36 of the soldering area in the prior art when soldering with a solder paste printing process, where d=d 0 for the same electronic component. Therefore, the thickness of the circuit board assembly can be further reduced.
In a possible implementation manner of the first aspect, the first electronic component is a wafer level package structure, and the mass ratio of tin in the first conductive element is greater than or equal to 95.5% and less than 95.71%. That is, the interval of the mass ratio of Sn in the first conductive member is [95.5%, 95.71%). Since the leads of the wafer level package structure are typically SAC405 solder balls, the mass ratio of Sn in the SAC405 solder balls is 95.5%. Therefore, the interval of the mass ratio of Sn in the first conductive member is 95.5 percent and 95.71 percent, the first electronic component is determined to be directly connected with the first bonding pad through the pin of the first electronic component, and solder paste is not arranged between the pin of the first electronic component and the first bonding pad, so that the heights of the parts, between the first surface and the first bonding pad, of the plurality of first conductive members in the direction perpendicular to the circuit board are smaller, the height of the first electronic component protruding out of the surface of the circuit board can be further reduced, the thickness of the circuit board assembly is reduced, and the thin design of electronic equipment is facilitated.
In a possible implementation manner of the first aspect, the first electronic component is a fan-in wafer level chip scale package structure or a fan-out wafer level chip scale package structure.
In one possible implementation manner of the first aspect, the first electronic component is an amorphous wafer level package structure, and the mass ratio of tin in the first conductive element is greater than 97.89% and less than or equal to 98.25%. In other words, the interval of the mass ratio of Sn in the first conductive member is (97.89%, 98.25% ], since the pins of the amorphous wafer level package structure are usually LF35 solder balls, the mass ratio of Sn in the LF35 solder balls is 98.25%, and the mass ratio of Sn in the soldering portion formed after the LF35 solder balls are soldered on the circuit board by the solder paste printing process in the prior art is usually 97.89%, if the interval of the mass ratio of Sn in the first conductive member is (97.89%, 98.25% ], it can be determined that the first electronic component is directly connected with the first pads through the pins thereof, and no solder paste is arranged between the pins of the first electronic component and the first pads, so that the height h of the portion of the plurality of first conductive members between the first surface and the first pads in the direction perpendicular to the circuit board is smaller, the height of the protruding circuit board surface of the first electronic component can be further reduced, the thickness of the circuit board assembly is reduced, and the thin design of the electronic device is facilitated.
In one possible implementation manner of the first aspect, the first electronic component is a flip-chip type chip size package structure, a flip-chip type ball grid array package structure or a wire-bonding type ball grid array package structure.
In a possible implementation manner of the first aspect, the circuit board includes a multilayer wiring structure formed by sequentially alternating and stacking metal layers and insulating medium layers; the groove penetrates through at least one metal layer and at least one insulating medium layer of the multi-layer wiring structure, and the plurality of first bonding pads are located in one metal layer of the multi-layer wiring structure. In this way, the plurality of first bonding pads are formed by one metal layer of the multi-layer wiring structure, and bonding pads are not required to be additionally arranged, so that the structural complexity and the processing difficulty of the circuit board assembly can be reduced.
In a possible implementation manner of the first aspect, the circuit board further includes a solder resist layer disposed on a surface of the multilayer wiring structure, and the groove further penetrates the solder resist layer.
In a possible implementation manner of the first aspect, the recess penetrates a metal layer and an insulating dielectric layer of the multilayer wiring structure.
In a possible implementation manner of the first aspect, the recess penetrates through two metal layers and two insulating dielectric layers of the multilayer wiring structure.
In a possible implementation manner of the first aspect, the first electronic component further has a second surface opposite to the first surface, and the second surface array is provided with a plurality of second pads; the circuit board assembly further comprises a second electronic component, the second electronic component is located on one side, far away from the first surface, of the second surface, the second electronic component is provided with a third surface, the third surface is opposite to the second surface, the third surface is provided with a plurality of second conductive pieces in an array mode, the second conductive pieces protrude towards the direction close to the second surface, and the end portions, close to the second surface, of the second conductive pieces are connected with the second bonding pads respectively. In this way, two electronic components (including the first electronic component and the second electronic component) are stacked and arranged at the same region position on the circuit board, so that the circuit board can bear more electronic components on the premise of not increasing the area of the circuit board.
In a possible implementation manner of the first aspect, the first electronic component is a processor chip, and the second electronic component is a memory chip.
In one possible implementation manner of the first aspect, the first electronic component is an AP, and the second electronic component is a DDR.
In a possible implementation manner of the first aspect, a height h 2 of a portion of the plurality of second conductive members located between the third surface and the second pad in a direction perpendicular to the circuit board satisfies: h 2＜0.21×lnd2 +0.36 units: mm. Wherein d 2 is an array pitch of the plurality of second conductive elements on the third surface. The height h 2 is smaller than the height h 0(h0≥0.21×lnd0 +0.36 of a welding area when the solder paste printing process is adopted for welding in the prior art, wherein d 2＝d0 is aimed at the same electronic component. Therefore, the height of the protruding circuit board of the laminated structure formed by the first electronic component and the second electronic component can be reduced to a certain extent, and the thickness of the circuit board assembly is reduced.
In a possible implementation manner of the first aspect, the surface array of the circuit board is provided with a plurality of third pads, and the third pads and the grooves are located on the same surface of the circuit board; the circuit board assembly further comprises a third electronic component, and the third electronic component and the first electronic component are positioned on the same side of the circuit board; the third electronic component is provided with a fourth surface, the fourth surface faces the circuit board, the fourth surface array is provided with a plurality of third conductive pieces, the third conductive pieces protrude towards the direction close to the circuit board, the ends of the third conductive pieces close to the circuit board are respectively connected with the third bonding pads, and the height h1 of the part, between the fourth surface and the third bonding pads, of the third conductive pieces in the direction perpendicular to the circuit board is as follows: h1 Not less than (0.21× lnd +0.36) mm; wherein d1 is an array pitch of the third conductive elements on the fourth surface. Therefore, the third electronic component adopts the solder paste printing process to realize welding on the circuit board, the efficiency of the solder paste printing process during welding is higher, and the thickness and the processing efficiency of the circuit board assembly can be simultaneously considered.
In a second aspect, some embodiments of the present application provide an electronic device, the electronic device including a housing, a functional device, and a circuit board assembly according to any of the above aspects; the functional device is arranged in the shell; the circuit board assembly is arranged in the shell and is electrically connected with the functional device.
The electronic equipment provided by the embodiment of the application comprises the circuit board assembly according to any technical scheme, so that the electronic equipment and the circuit board assembly can solve the same technical problems and achieve the same technical effects.
In a third aspect, some embodiments of the present application provide a method for processing a circuit board assembly, where the circuit board assembly includes a circuit board and a first electronic component; the surface of the circuit board is provided with a groove, and the bottom surface of the groove is provided with a plurality of first bonding pads in an array manner; the first electronic component is provided with a first surface, a plurality of first pins are arranged on the first surface in an array mode, and the processing method of the circuit board assembly comprises the following steps of: arranging soldering flux on the surfaces of the first pins; bonding the plurality of first pins to the plurality of first bonding pads through soldering flux; and heating and melting the plurality of first pins and volatilizing the soldering flux to enable the plurality of first pins to be connected with the plurality of first bonding pads into a whole, wherein each first pin and the soldering flux remained on the first pin form a first conductive piece.
In the processing method of the circuit board assembly provided by the embodiment of the application, the plurality of first pins of the first electronic component are respectively adhered to the plurality of first bonding pads through the soldering flux, and the soldering flux volatilizes when the plurality of first pins are heated and melted, so that the volume of a conductive structure (namely the part of the first conductive piece between the first surface and the first bonding pad) between the first electronic component and the plurality of first bonding pads is smaller, the height of the first electronic component protruding out of the circuit board can be reduced, the thickness of the circuit board assembly is reduced, and the thin design of electronic equipment is facilitated. Meanwhile, in the processing method of the circuit board assembly provided by the embodiment of the application, the solder paste is not printed or sprayed on the first bonding pad at the bottom surface of the groove, so that a step steel mesh is not required to be arranged for solder paste printing, and a tin spraying device with higher precision is not required to be introduced, and the processing cost of the circuit board assembly is not greatly increased.
In a possible implementation manner of the third aspect, the surface array of the circuit board is provided with a plurality of third pads, and the third pads and the grooves are located on the same surface of the circuit board; the circuit board assembly further comprises a third electronic component, wherein the third electronic component is provided with a fourth surface, and a plurality of second pins are arranged on the fourth surface in an array; the processing method of the circuit board assembly further comprises the following steps: setting solder paste on the plurality of third bonding pads; bonding the second pins on the third bonding pads respectively through solder paste; and heating and melting the solder pastes on the second pins and the third bonding pads so as to enable the second pins to be fused with the solder pastes on the third bonding pads into a whole, wherein the structure formed after each second pin is fused with the solder paste on the corresponding third bonding pad is a third conductive piece. Because the third bonding pads are arranged on the surface of the circuit board, the arrangement of the solder paste on the third bonding pads can be realized by adopting a solder paste printing process, so that the processing efficiency of the circuit board assembly is improved.
In a possible implementation manner of the third aspect, disposing solder paste on the plurality of third pads includes: and setting solder paste on the third bonding pads by using a solder paste printing process. The efficiency of the solder paste printing process is high, so that the processing efficiency of the circuit board assembly can be improved.
Drawings
Fig. 1 is a perspective view of an electronic device provided in some embodiments of the present application;
FIG. 2 is an exploded view of the electronic device shown in FIG. 1;
fig. 3a is a perspective view of a circuit board assembly according to some embodiments of the present application;
FIG. 3b is a schematic cross-sectional view of the circuit board assembly of FIG. 3 a;
FIG. 4 is a schematic cross-sectional view of a circuit board assembly according to still other embodiments of the present application;
FIG. 5 is a schematic cross-sectional view of the circuit board assembly of FIG. 4;
FIG. 6 is a top view of the circuit board of FIG. 5;
FIG. 7 is a schematic cross-sectional view of a circuit board of the circuit board assembly of FIG. 4;
FIG. 8 is an enlarged view of a portion of FIG. 4;
FIG. 9 is an enlarged partial view of region I of FIG. 8;
fig. 10 is a schematic structural view of a circuit board assembly according to still other embodiments of the present application;
FIG. 11 is a schematic diagram of a circuit board assembly according to still other embodiments of the present application;
fig. 12 is a schematic structural view of a circuit board assembly according to still other embodiments of the present application;
fig. 13 is a flowchart of a method for processing a circuit board assembly according to some embodiments of the present application.
Detailed Description
In embodiments of the present application, the terms "first," "second," "third," "fourth" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", "a third" and a fourth "may explicitly or implicitly include one or more such feature.
In embodiments of the present application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The application provides an electronic device, which is a type of electronic device pursuing thickness thinning, and in particular, the electronic device can be a folding screen mobile phone, a tablet computer, a tablet navigator and the like.
Referring to fig. 1 and fig. 2, fig. 1 is a perspective view of an electronic device according to some embodiments of the present application, and fig. 2 is an exploded view of the electronic device shown in fig. 1. In this embodiment, the electronic device is a tablet phone, and the smaller the thickness of the tablet phone is, the better the hand feeling is. Specifically, the electronic device includes a housing 10, a functional device 20, and a circuit board assembly 30.
The case 10 is a case structure formed by splicing a front cover plate (not shown), a frame 11 and a rear cover 12 for protecting the functional device 20 and the circuit board assembly 30 in the electronic apparatus.
A functional device 20 is provided in the housing 10, the functional device 20 being for implementing one or more functions of the electronic apparatus. The functional device 20 includes, but is not limited to, a camera module, a display screen, a speaker, a receiver, an antenna, a microphone, a universal serial bus (universal serial bus, USB) interface, a subscriber identity module (subscriber identification module, SIM) card interface, keys, and the like.
The number of functional devices 20 in the electronic apparatus may be one or a plurality. When the number of the functional devices 20 in the electronic apparatus is one, the functional devices 20 may be one of a camera module, a display screen, a speaker, a receiver, an antenna, a microphone, a USB interface, a SIM card interface, and a key. When the number of the functional devices 20 in the electronic apparatus is plural, the plural functional devices 20 may be plural of a camera module, a display, a speaker, a receiver, an antenna, a microphone, a USB interface, a SIM card interface, and a key, respectively. In the embodiment shown in fig. 1 and 2, the number of functional devices 20 is 3, and the 3 functional devices 20 are each a camera module.
The circuit board assembly 30 is disposed in the housing 10, and the circuit board assembly 30 is electrically connected with the functional device 20. The circuit board assembly 30 is used for signal control, data signal processing, data signal storage, etc. of the functional device 20. The circuit board assembly 30 may be a motherboard of an electronic device, or may be other circuit boards of an electronic device, such as a circuit board for carrying a speaker (speaker) and a USB interface in a tablet phone, which is not specifically limited herein. The circuit board assembly 30 is described below as an example of a motherboard of an electronic device, and this is not to be construed as a particular limitation of the present application.
Referring to fig. 3a and fig. 3b, fig. 3a is a perspective view of a circuit board assembly 30 according to some embodiments of the present application, and fig. 3b is a schematic cross-sectional structure of the circuit board assembly 30 shown in fig. 3 a. In the present embodiment, the circuit board assembly 30 is the circuit board assembly 30 in the electronic device shown in fig. 2. Specifically, the circuit board assembly 30 includes a circuit board 31 and a plurality of electronic components a disposed on the circuit board 31.
Electronic component a includes, but is not limited to, resistors, capacitors, inductors, potentiometers, electronic tubes, heat sinks, electromechanical elements, connectors, semiconductor discrete devices, electroacoustic devices, laser devices, electronic display devices, optoelectronic devices, sensors, power supplies, switches, micro-motors, electronic transformers, relays, printed circuit boards, integrated circuit devices, and the like. It should be noted that, the embodiment of the present application does not limit the number and arrangement of the electronic components a on the circuit board 31, and fig. 3a and 3b only show an example of one number and arrangement of the electronic components a on the circuit board 31.
The circuit board 31 is used for carrying the plurality of electronic components a and realizing electrical connection among the plurality of electronic components a. The circuit board 31 includes, but is not limited to, a printed circuit board (printed circuit board, PCB) and a flexible circuit (flexible printed circuit, FPC) board. In the embodiment shown in fig. 3a and 3b, the circuit board 31 is a PCB board. The shape of the circuit board 31 includes, but is not limited to, rectangular, square, polygonal, circular, etc., and in the embodiment shown in fig. 3a and 3b, the shape of the circuit board 31 is approximately rectangular.
In the prior art, in order to reduce the volume of the circuit board assembly 30, a plurality of pin arrays of the electronic component a are generally laid out on one surface of the electronic component, and pins on the surface are mounted and soldered on pads of the circuit board 31 by using a surface mount technology (surface mounted technology, SMT). Thus, the electronic component a occupies a small area on the circuit board 31, and the height of the soldered portion between the electronic component a and the circuit board 31 in the direction perpendicular to the circuit board 31 is small, so that the volume of the circuit board assembly 30 can be reduced.
On the basis of the above embodiment, in order to improve the mounting efficiency of the plurality of electronic components a on the circuit board 31, a solder paste printing process is generally adopted to print solder paste on all the pads on one surface of the circuit board 31 at a time, then the pins of the plurality of electronic components a are respectively attached to the solder paste on the pads, and the pins of the plurality of electronic components a and the solder paste are melted and solidified into a whole by adopting a reflow soldering process, so that the mounting efficiency of the plurality of electronic components a on the circuit board 31 can be improved.
In the above embodiment, the principle of the solder paste printing process is to print solder paste on the pads of the circuit board 31 through the holes on the planar steel mesh. Since solder paste is printed on the pads of the circuit board 31, the soldering area between the electronic component a and the circuit board 31 is a superposition of the pins and the solder paste, so the height h 0 of the soldering area is larger, usually h 0≥0.21×lnd0 +0.36, unit: mm, d 0 denotes the array pitch of the pins of electronic component a. When the pins of the electronic component A are uniformly arrayed, the array spacing of the pins of the electronic component A refers to the distance between any two adjacent pins; when the pins of the electronic component a are unevenly arrayed, the array pitch of the pins of the electronic component a refers to the distance between two pins closest to each other. Thus, the electronic component a protrudes from the surface of the circuit board 31 to have a large height, and the circuit board assembly 30 has a large thickness, which is not beneficial to the slim design of the electronic device. In order to reduce the thickness of the circuit board assembly 30, a groove may be formed on the surface of the circuit board 31, and a bonding pad may be formed on the bottom surface of the groove, then the electronic component a may be deposited in the groove, and the electronic component a may be soldered to the bonding pad on the bottom surface of the groove by using the SMT. However, since the bonding pads on the bottom surface of the groove and the bonding pads on the surface of the circuit board are not coplanar, the solder paste cannot be printed on the circuit board by adopting a plane steel mesh, and special step steel mesh is required to be customized for solder paste printing, or a high-precision tin spraying device is introduced to spray the solder paste onto the bonding pads on the bottom surface of the groove, and the bonding pads on the surface of the circuit board are printed with the solder paste by adopting a traditional solder paste printing process. The manufacturing process or the manufacturing cost of the circuit board assembly is inevitably increased no matter the special ladder steel net is customized or the tin spraying equipment with higher introduction precision is introduced.
In order to reduce the thickness of the circuit board assembly without greatly increasing the processing cost of the circuit board assembly, refer to fig. 4, fig. 4 is a schematic cross-sectional structure of a circuit board assembly 30 according to still another embodiment of the present application. In the present embodiment, the circuit board assembly 30 includes a circuit board 31 and a first electronic component 32.
The circuit board 31 includes, but is not limited to, a PCB board and an FPC board. In some embodiments, the circuit board 31 is a PCB board, specifically, referring to fig. 5 and 6, fig. 5 is a schematic cross-sectional structure of the circuit board 31 in the circuit board assembly 30 shown in fig. 4, fig. 6 is a top view of the circuit board 31 shown in fig. 5, and the circuit board 31 includes a multi-layer wiring structure formed by sequentially stacking metal layers 31a and insulating medium layers 31b in an alternating manner. In some embodiments, the circuit board 31 further includes a solder resist layer 31c provided on a surface of the multilayer wiring structure.
The surface of the circuit board 31 is provided with a groove 311, and a plurality of first bonding pads 312 are arranged on the bottom surface of the groove 311 in an array manner, and the plurality of first bonding pads 312 are used for welding the first electronic component 32.
In some embodiments, referring to fig. 5 and 6, the circuit board 31 is a PCB board, and the recess 311 penetrates at least one metal layer 31a and at least one insulating dielectric layer 31b of the multi-layer wiring structure. Specifically, the groove 311 may penetrate through one metal layer 31a and one insulating medium layer 31b of the multilayer wiring structure, may also penetrate through two metal layers 31a and two insulating medium layers 31b of the multilayer wiring structure, and may also penetrate through three metal layers 31a and three insulating medium layers 31b of the multilayer wiring structure, and specifically may be comprehensively determined according to the thickness of the circuit board 31 and the number of layers of the metal layers 31a and the insulating medium layers 31b in the circuit board 31, so long as the number of layers of the metal layers 31a and the insulating medium layers 31b penetrated by the groove 311 does not affect the structural strength of the circuit board 31, which is not limited herein. In the embodiment shown in fig. 5 and 6, the recess 311 penetrates one metal layer 31a and one insulating dielectric layer 31b of the multilayer wiring structure. In still other embodiments, referring to fig. 7, fig. 7 is a schematic cross-sectional structure of a circuit board 31 in the circuit board assembly 30 shown in fig. 4, and in this embodiment, the recess 311 penetrates through two metal layers 31a and two insulating dielectric layers 31b of the multi-layer wiring structure.
Note that, when the circuit board 31 further includes a solder resist layer 31c provided on the surface of the multilayer wiring structure, the groove 311 also penetrates the solder resist layer 31c.
Further, the plurality of first pads 312 are located in one metal layer 31a of the multilayer wiring structure. In this way, the plurality of first pads 312 are formed by the one metal layer 31a of the multilayer wiring structure, and no pad is required to be additionally provided, so that the structural complexity and the processing difficulty of the circuit board assembly 30 can be reduced.
In some embodiments, referring to fig. 5 or fig. 7, a solder mask layer 31c is further disposed on a bottom surface of the recess 311, and the solder mask layer 31c does not cover the plurality of first pads 312.
The first electronic component 32 includes, but is not limited to, resistors, capacitors, inductors, potentiometers, electronic tubes, heat sinks, electromechanical elements, connectors, semiconductor discrete devices, electroacoustic devices, laser devices, electronic display devices, optoelectronic devices, sensors, power supplies, switches, micro-motors, electronic transformers, relays, printed circuit boards, integrated circuit devices, and the like.
In some embodiments, the first electronic component 32 is an integrated circuit device (INTEGRATED CIRCUIT, IC), in particular, the first electronic component 32 includes, but is not limited to, an application processor (application processor, AP), double Data Rate (DDR), and universal flash storage (universal flash storage, UFS). The first electronic component 32 may be packaged in a wafer level package (WAFER LEVEL PACKAGE, WLP) or an amorphous wafer level package. Wafer level packages include, but are not limited to, fan-in wafer level chip scale packages (Fan-IN WAFER LEVEL CHIP SCALE PACKAGE, fan-in WLCSP) and Fan-out wafer level chip scale packages (Fan-out WAFER LEVEL CHIP SCALE PACKAGE, fan-out WLCSP). The non-wafer level packages include, but are not limited to, flip chip-size (FC-CSP) packages, flip chip-ball grid array (FCBGA) packages, and wire bonding-ball grid array (WBBGA) packages, not specifically defined herein.
Referring to fig. 8 and 9, fig. 8 is a partial enlarged view of fig. 4, and fig. 9 is a partial enlarged view of region I of fig. 8. In the present embodiment, the circuit board 31 is the circuit board 31 shown in fig. 5, and it is understood that the circuit board 31 may also be the circuit board 31 shown in fig. 7, which is not limited herein. The first electronic component 32 has a first surface 100, and the first surface 100 is opposite to the bottom surface of the recess 311. It should be noted that, the first surface 100 is opposite to the bottom surface of the groove 311, which means: the first surface 100 faces the bottom surface of the groove 311, and an orthographic projection of the first surface 100 on the bottom surface of the groove 311 overlaps the bottom surface of the groove 311.
The first surface 100 is provided with a plurality of first conductive elements 33 in an array, and the plurality of first conductive elements 33 are used for leading out the internal circuit of the first electronic component 32.
The plurality of first conductive members 33 protrude in a direction close to the bottom surface of the recess 311, and ends of the plurality of first conductive members 33 close to the bottom surface of the recess 311 are respectively connected to the plurality of first pads 312. Where "joined" means joined and formed as a whole.
It should be noted that, the plurality of first conductive elements 33 are connected to the plurality of first pads 312 respectively, which includes one or more of the following three implementations; specifically, the three implementations include: one first conductive member 33 is correspondingly connected with one first bonding pad 312, a plurality of first conductive members 33 are correspondingly connected with one first bonding pad 312, and one first conductive member 33 is correspondingly connected with a plurality of first bonding pads 312. Fig. 8 only gives an example in which the number of the plurality of first conductive members 33 is equal to the number of the plurality of first pads 312, and the plurality of first conductive members 33 are connected to the plurality of first pads 312 in one-to-one correspondence, which is not to be construed as a particular limitation of the constitution of the present application.
The height h of the portions of the plurality of first conductive members 33 between the first surface 100 and the first pads 312 in the direction perpendicular to the circuit board 31 (i.e., the direction Z) satisfies: h < 0.21× lnd +0.36, unit: mm. d is the array pitch of the plurality of first conductive elements 33 on the first surface 100. When the plurality of first conductive elements 33 are uniformly arrayed on the first surface 100, the array pitch of the plurality of first conductive elements 33 on the first surface 100 refers to: the distance between the centers of the occupied areas of the adjacent two first conductive members 33 on the first surface 100. When the plurality of first conductive elements 33 are unevenly arrayed on the first surface 100, the array pitch of the plurality of first conductive elements 33 on the first surface 100 means: among the plurality of first conductive members 33, the closest two first conductive members 300 are located at a distance between centers of occupied areas on the first surface 100.
In the circuit board assembly 30 provided in the embodiment of the present application, since the surface of the circuit board 31 is provided with the groove 311, the bottom surface of the groove 311 is provided with the plurality of first pads 312 in an array, and the first electronic component 32 is connected to the plurality of first pads 312 through the plurality of first conductive members 33. Therefore, at least the first conductive member 33 is disposed in the recess 311, so that the height of the first electronic component 32 protruding from the surface of the circuit board 31 can be reduced, and the thickness of the circuit board assembly 30 can be reduced, thereby facilitating the design of the electronic device. Meanwhile, since the height h of the portions of the plurality of first conductive members 33 between the first surface 100 and the first pads 312 in the direction perpendicular to the circuit board 31 satisfies: h < 0.21× lnd +0.36, unit: mm, this h is smaller than the height h 0(h0≥0.21×lnd0 +0.36 of the soldering area in the prior art when soldering with a solder paste printing process, where d=d 0 for the same electronic component. Therefore, the thickness of the circuit board assembly 30 can be further reduced, and it can be determined that the first electronic component 32 is not printed or sprayed with solder paste on the first pad 312 in the process of soldering with the circuit board 31, so that there is no need to provide a step steel mesh for solder paste printing, and there is no need to introduce a high-precision solder spraying device, and therefore, the processing cost of the circuit board assembly can be not greatly increased.
In some embodiments, the first electronic component 32 is a wafer level package structure. In some embodiments, first electronic component 32 is a Fan-in WLCSP structure or a Fan-out WLCSP structure. The mass ratio of tin (chemical symbol: sn) in the first conductive member 33 is 95.5% or more and less than 95.71%. That is, the interval of the mass ratio of Sn in the first conductive member 33 is [95.5%, 95.71%).
Since the leads of the wafer level package structure are typically SAC405 solder balls, the mass ratio of Sn in the SAC405 solder balls is 95.5%. Therefore, the interval of the mass ratio of Sn in the first conductive member 33 is [95.5%, 95.71%), it can be determined that the first electronic component 32 is directly connected to the first pad 312 through the pin thereof, and no solder paste is disposed between the pin of the first electronic component 32 and the first pad 312, so that the height h of the portions of the plurality of first conductive members 33 between the first surface 100 and the first pad 312 in the direction perpendicular to the circuit board 31 is smaller, the height of the first electronic component 32 protruding out of the surface of the circuit board 31 can be further reduced, the thickness of the circuit board assembly 30 is reduced, and the thin design of the electronic device is facilitated.
In other embodiments, the first electronic component 32 is an amorphous wafer level package structure. In some embodiments, the first electronic component 32 is an FC-CSP structure, an FCBGA package structure, or WBBGA package structure. The mass ratio of Sn in the first conductive member 33 is greater than 97.89% and less than or equal to 98.25%. That is, the mass ratio of Sn in the first conductive material 33 is set to be (97.89%, 98.25%).
Since the pins of the amorphous wafer level package structure are typically LF35 solder balls, the mass ratio of Sn in the LF35 solder balls is 98.25%. Meanwhile, since the mass ratio of Sn in the soldering portion formed after the LF35 solder balls are soldered on the circuit board by the solder paste printing process in the prior art is typically 97.89%, if the interval of the mass ratio of Sn in the first conductive member 33 is (97.89%, 98.25% ], it can be determined that the first electronic component 32 is directly connected to the first pad 312 through the pin thereof, and no solder paste is disposed between the pin of the first electronic component 32 and the first pad 312, so that the height h of the portion of the plurality of first conductive members 33 between the first surface 100 and the first pad 312 in the direction perpendicular to the circuit board 31 is smaller, the height of the portion of the first electronic component 32 protruding from the surface of the circuit board 31 can be further reduced, the thickness of the circuit board assembly 30 is reduced, and the thin design of the electronic device is facilitated.
In order to enable the circuit board 31 to carry more electronic components without increasing the area of the circuit board 31, in some embodiments, referring to fig. 10, fig. 10 is a schematic structural diagram of a circuit board assembly 30 according to still other embodiments of the present application. In this embodiment, the first electronic component 32 has, in addition to the first surface 100, a second surface 200 opposite to the first surface 100, and the second surface 200 is provided with a plurality of second pads 313 in an array. The circuit board assembly 30 includes a second electronic component 34 in addition to the circuit board 31 and the first electronic component 32. The second electronic component 34 is located on a side of the second surface 200 remote from the first surface 100. The second electronic component 34 has a third surface 300, the third surface 300 being opposite the second surface 200. The third surface 300 is provided with a plurality of second conductive elements 35 in an array, and the plurality of second conductive elements 35 are used for leading out the circuit of the second electronic component 34. The plurality of second conductive members 35 protrude in a direction approaching the second surface 200, and ends of the plurality of second conductive members 35 approaching the second surface 200 are respectively connected to the plurality of second pads 313. In this way, the two electronic components (including the first electronic component 32 and the second electronic component 34) are stacked and disposed at the same region position on the circuit board 31, so that the circuit board 31 can carry more electronic components without increasing the area of the circuit board 31.
It should be noted that, the plurality of second conductive members 35 are connected to the plurality of second pads 313, respectively, which includes one or more of the following three implementations; specifically, the three implementations include: one second conductive member 35 is correspondingly connected with one second bonding pad 313, a plurality of second conductive members 35 are correspondingly connected with one second bonding pad 313, and one second conductive member 35 is correspondingly connected with a plurality of second bonding pads 313. Fig. 10 only gives an example in which the number of the plurality of second conductive members 35 is equal to the number of the plurality of second pads 313, and the plurality of second conductive members 35 are connected to the plurality of second pads 313 in one-to-one correspondence, which is not to be construed as a particular limitation of the constitution of the present application.
In some embodiments, the first electronic component 32 is a processor chip and the second electronic component 34 is a memory chip. Specifically, the first electronic component 32 includes, but is not limited to, an AP, and the second electronic component 34 includes, but is not limited to, a DDR.
In some embodiments, a height h 2 of a portion of the plurality of second conductive members 35 located between the third surface 300 and the second pad 313 in a direction perpendicular to the circuit board 31 satisfies: h 2＜0.21×lnd2 +0.36 units: mm. Wherein d 2 is an array pitch of the plurality of second conductive elements 35 on the third surface 300. The height h 2 is smaller than the height h 0(h0≥0.21×lnd0 +0.36 of a welding area when the solder paste printing process is adopted for welding in the prior art, wherein d 2＝d0 is aimed at the same electronic component. Therefore, the height of the laminated structure composed of the first electronic component 32 and the second electronic component 34 protruding from the circuit board 31 can be reduced to some extent, and the thickness of the circuit board assembly 30 can be reduced.
Besides the recess 311 provided on the surface of the circuit board 31 to reduce the height of the first electronic component 32 protruding from the circuit board 31, other pads are usually provided to connect other electronic components, and the number of the other pads and the number of the electronic components to be connected are larger, so that a solder paste printing process can be used to ensure the processing efficiency of the circuit board assembly 30.
In some embodiments, referring to fig. 11, fig. 11 is a schematic structural diagram of a circuit board assembly 30 according to still other embodiments of the present application. In the present embodiment, the surface array of the circuit board 31 is provided with a plurality of third pads 314, and in some embodiments, the plurality of third pads 314 are formed of one metal layer of the multilayer wiring structure. The third pads 314 and the grooves 311 are located on the same surface of the circuit board 31. The circuit board assembly 30 further includes a third electronic component 36, the third electronic component 36 and the first electronic component 32 being located on the same side of the circuit board 31. The third electronic component 36 has a fourth surface 400, which fourth surface 400 faces the circuit board 31. The fourth surface 400 is provided with a plurality of third conductive members 37 in an array, the third conductive members 37 protrude toward the direction close to the circuit board 31, and ends of the third conductive members 37 close to the circuit board 31 are respectively connected with the third pads 314.
It should be noted that, the third conductive members 37 are connected to the third pads 314, respectively, and one or more of the following three implementations are included; specifically, the three implementations include: one third conductive member 37 is correspondingly connected with one third bonding pad 314, a plurality of third conductive members 37 are correspondingly connected with one third bonding pad 314, and one third conductive member 37 is correspondingly connected with a plurality of third bonding pads 314. Fig. 11 only shows an example in which the number of the plurality of third conductive members 37 is equal to the number of the plurality of third pads 314, and the plurality of third conductive members 37 are connected to the plurality of third pads 314 in one-to-one correspondence, which is not to be construed as a particular limitation of the constitution of the present application.
In addition, the height h1 of the portions of the plurality of third conductive members 37 between the fourth surface 400 and the third pads 314 in the direction perpendicular to the circuit board 31 satisfies: h1 Gtoreq (0.21× lnd +0.36), unit: mm; wherein d1 is an array pitch of the third conductive elements 37 on the fourth surface 400. In this way, the third electronic component 36 is soldered on the circuit board 31 by using the solder paste printing process, and the solder paste printing process has high soldering efficiency, and can simultaneously give consideration to the thickness and the processing efficiency of the circuit board assembly 30.
The third electronic component 36 includes, but is not limited to, a cartridge, resistor, capacitor, inductor, potentiometer, valve, heat sink, electromechanical element, connector, semiconductor discrete device, electroacoustic device, laser device, electronic display device, optoelectronic device, sensor, power source, switch, micro-motor, electronic transformer, relay, printed circuit board, integrated circuit device, and the like. In the embodiment shown in fig. 11, the third electronic component 36 is a UFS.
The number of the third electronic components 36 provided on the circuit board 31 may be one or plural, and is not particularly limited herein. Fig. 11 gives only an example in which the number of third electronic components 36 provided on the circuit board 31 is one, and this is not to be construed as a particular limitation of the constitution of the present application. In other embodiments, referring to fig. 12, fig. 12 is a schematic structural diagram of a circuit board assembly according to still other embodiments of the present application. In the present embodiment, the number of the third electronic components 36 is two, and the two third electronic components 36 are UFS and a card holder, respectively.
In some embodiments, referring to fig. 12, a fourth electronic component 38 and a fifth electronic component 39 are further disposed on the circuit board 31. The number of the fourth electronic component 38 and the fifth electronic component 39 may be one or plural, and is not particularly limited herein. In some embodiments, the fourth electronic component 38 is a connector, and the fourth electronic component 38 is used to electrically connect a Radio Frequency (RF) circuit board assembly 40 to the circuit board 31. Fifth electronic component 39 includes, but is not limited to, a cartridge, resistor, capacitor, inductor, potentiometer, valve, heat sink, electromechanical element, connector, semiconductor discrete device, electroacoustic device, laser device, electronic display device, optoelectronic device, sensor, power source, switch, micro-motor, electronic transformer, relay, printed circuit board, integrated circuit device, and the like. The fourth electronic component 38 and the third electronic component 36 are respectively located at two opposite sides of the circuit board 31, and the fifth electronic component 39 and the fourth electronic component 38 are located at the same side of the circuit board 31. The fourth electronic component 38 and the fifth electronic component 39 are soldered to the circuit board 31 using a solder paste printing process.
The application also provides a processing method of the circuit board assembly 30, and the circuit board assembly 30 comprises a circuit board 31 and a first electronic component 32. The surface of the circuit board 31 is provided with a groove 311, and the bottom surface of the groove 311 is provided with a plurality of first bonding pads 312 in an array. The first electronic component 32 has a first surface 100, and the first surface 100 is provided with a plurality of first pins in an array, and the plurality of first pins are used for leading out a circuit of the first electronic component 32. Referring to fig. 13, fig. 13 is a flowchart illustrating a method for processing a circuit board assembly 30 according to some embodiments of the present application. In this embodiment, the processing method of the circuit board assembly 30 includes:
s100: arranging soldering flux on the surfaces of the first pins; the soldering flux is usually a mixture with rosin as a main component, is an auxiliary material for ensuring the smooth proceeding of the welding process, has a certain viscosity, and is easy to volatilize when heated to a preset temperature.
S200: bonding the plurality of first pins to the plurality of first pads 312, respectively, by a flux;
S300: the plurality of first pins are heated and melted, and the flux is volatilized, so that the plurality of first pins 321 are respectively connected with the plurality of first bonding pads 312 into a whole. Wherein each first pin and the soldering flux remained on the first pin form a first conductive member 33. In addition, a reflow process may be employed to heat and melt the plurality of first pins and volatilize the flux.
In the processing method of the circuit board assembly 30 provided in the embodiment of the application, since the plurality of first pins of the first electronic component 32 are respectively adhered to the plurality of first bonding pads 312 through the soldering flux, and the soldering flux volatilizes when the plurality of first pins are heated and melted, the volume of the conductive structure between the first electronic component 32 and the plurality of first bonding pads 312 (that is, the portion of the first conductive member 33 between the first surface 100 and the first bonding pads 312) is smaller, the height of the first electronic component 32 protruding out of the circuit board 31 can be reduced, the thickness of the circuit board assembly 30 is reduced, and the thin design of electronic equipment is facilitated. Meanwhile, in the processing method of the circuit board assembly 30 provided by the embodiment of the application, the solder paste is not printed or sprayed on the first bonding pad 312 on the bottom surface of the groove 311, so that a step steel mesh is not required to be arranged for solder paste printing, and a tin spraying device with higher precision is not required to be introduced, and the processing cost of the circuit board assembly is not greatly increased.
In some embodiments, the surface array of the circuit board 31 is provided with a plurality of third pads 314, and the third pads 314 and the grooves 311 are located on the same surface of the circuit board 31. The circuit board assembly 30 further includes a third electronic component 36, the third electronic component 36 having a fourth surface 400, the fourth surface 400 being provided with a plurality of second pins in an array. The second plurality of pins are used for extraction, and the internal circuitry of the third electronic component 36. The method of processing the circuit board assembly 30 further includes: disposing solder paste on the plurality of third pads 314; bonding the second pins to the third pads 314 respectively by solder paste; and heating and melting the solder paste on the second pins and the third pads 314 to fuse the second pins and the solder paste on the third pads 314 into a whole, wherein the structure formed by fusing each second pin and the solder paste on the corresponding third pad 314 is the third conductive member 37.
Since the plurality of third pads 314 are disposed on the surface of the circuit board 31, a solder paste printing process may be used to implement the arrangement of solder paste on the plurality of third pads 314, so as to improve the processing efficiency of the circuit board assembly 30.
Specifically, in the above embodiment, disposing solder paste on the plurality of third pads 314 includes: a solder paste printing process is used to place solder paste on the plurality of third pads 314. The efficiency of the solder paste printing process is high, so that the processing efficiency of the circuit board assembly 30 can be improved.
In the description of the present specification, a particular feature, structure, material, or characteristic may be combined in any suitable manner in one or more embodiments or examples.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (13)
1. A circuit board assembly (30) comprising a circuit board (31) and a first electronic component (32);
The surface of the circuit board (31) is provided with a groove (311), and a plurality of first bonding pads (312) are arranged on the bottom surface of the groove (311) in an array manner;
The first electronic component (32) is provided with a first surface (100), the first surface (100) is opposite to the bottom surface of the groove (311), the first surface (100) is provided with a plurality of first conductive pieces (33) in an array mode, the plurality of first conductive pieces (33) protrude towards the direction close to the bottom surface of the groove (311), the ends, close to the bottom surface of the groove (311), of the plurality of first conductive pieces (33) are respectively connected with the plurality of first bonding pads (312), and the height h of a part, located between the first surface (100) and the first bonding pads (312), of the plurality of first conductive pieces (33) in the direction perpendicular to the circuit board (31) is as follows: h < (0.21×l nd+0.36) mm; wherein d is an array pitch of the plurality of first conductive elements (33) at the first surface (100); the first electronic component (32) is of a wafer level packaging structure, and the mass ratio of tin in the first conductive piece (33) is more than or equal to 95.5% and less than 95.71%; or alternatively
The first electronic component (32) is of an amorphous wafer level packaging structure, and the mass ratio of tin in the first conductive piece (33) is more than 97.89% and less than or equal to 98.25%.
2. The circuit board assembly (30) of claim 1, wherein the first electronic component (32) is a fan-in wafer level chip scale package or a fan-out wafer level chip scale package.
3. The circuit board assembly (30) of claim 1, wherein the first electronic component (32) is a flip-chip type chip scale package, a flip-chip type ball grid array package, or a wire-bonded ball grid array package.
4. A circuit board assembly (30) according to any one of claims 1 to 3, wherein the circuit board (31) comprises a multilayer wiring structure formed by sequentially alternately and stacking metal layers (31 a) and insulating dielectric layers (31 b);
The groove (311) penetrates through at least one metal layer (31 a) and at least one insulating medium layer (31 b) of the multilayer wiring structure, and the plurality of first bonding pads (312) are positioned in one metal layer (31 a) of the multilayer wiring structure.
5. The circuit board assembly (30) of claim 4, wherein the recess (311) extends through a metal layer (31 a) and an insulating dielectric layer (31 b) of the multilayer wiring structure.
6. The circuit board assembly (30) of claim 4, wherein the recess (311) extends through two metal layers (31 a) and two dielectric layers (31 b) of the multilayer wiring structure.
7. A circuit board assembly (30) according to any of claims 1-3, wherein the first electronic component (32) further has a second surface (200) opposite the first surface (100), the second surface (200) array being provided with a plurality of second pads (313);
The circuit board assembly (30) further comprises a second electronic component (34), the second electronic component (34) is located on one side, far away from the first surface (100), of the second surface (200), the second electronic component (34) is provided with a third surface (300), the third surface (300) is opposite to the second surface (200), the third surface (300) is provided with a plurality of second conductive pieces (35) in an array, the second conductive pieces (35) protrude towards the direction close to the second surface (200), and the ends, close to the second surface (200), of the second conductive pieces (35) are respectively connected with the second bonding pads (313).
8. The circuit board assembly (30) of claim 7, wherein the first electronic component (32) is a processor chip and the second electronic component (34) is a memory chip.
9. A circuit board assembly (30) according to any of claims 1-3, wherein the surface array of the circuit board (31) is provided with a plurality of third pads (314), the plurality of third pads (314) being located on the same surface of the circuit board (31) as the recess (311);
The circuit board assembly (30) further comprises a third electronic component (36), and the third electronic component (36) and the first electronic component (32) are positioned on the same side of the circuit board (31);
The third electronic component (36) is provided with a fourth surface (400), the fourth surface (400) faces the circuit board (31), the fourth surface (400) is provided with a plurality of third conductive pieces (37) in an array mode, the third conductive pieces (37) protrude towards the direction close to the circuit board (31), the ends, close to the circuit board (31), of the third conductive pieces (37) are respectively connected with the third bonding pads (314), and the height h1 of the part, located between the fourth surface (400) and the third bonding pads (314), of the third conductive pieces (37) in the direction perpendicular to the circuit board (31) is as follows: h1 Not less than (0.21×lnd1+0.36) mm; wherein d1 is an array pitch of the plurality of third conductive elements (37) on the fourth surface (400).
10. An electronic device, comprising:
a housing (10);
-a functional device (20), the functional device (20) being arranged within the housing (10);
the circuit board assembly (30) of any of claims 1-9, the circuit board assembly (30) being disposed within the housing (10), and the circuit board assembly (30) being electrically connected to the functional device (20).
11. A method of processing a circuit board assembly (30), characterized in that the circuit board assembly (30) comprises a circuit board (31) and a first electronic component (32); the surface of the circuit board (31) is provided with a groove (311), and a plurality of first bonding pads (312) are arranged on the bottom surface of the groove (311) in an array manner; the first electronic component (32) has a first surface (100), the first surface (100) is provided with a plurality of first pins in an array, and the processing method of the circuit board assembly (30) comprises the following steps:
A soldering flux is arranged on the surfaces of the first pins;
bonding the plurality of first pins to the plurality of first pads (312) respectively by the flux;
Heating and melting the plurality of first pins and volatilizing the soldering flux so that the plurality of first pins (321) are respectively connected with the plurality of first bonding pads (312) into a whole, each first pin and the soldering flux remained on the first pins form a first conductive member (33), and the height h of a part of the first conductive member (33) between the first surface (100) and the first bonding pad (312) in the direction perpendicular to the circuit board (31) is as follows: h < (0.21×l nd+0.36) mm; wherein d is an array pitch of the plurality of first pins on the first surface (100);
The first electronic component (32) is of a wafer level packaging structure, and the mass ratio of tin in the first conductive piece (33) is more than or equal to 95.5% and less than 95.71%; or alternatively
The first electronic component (32) is of an amorphous wafer level packaging structure, and the mass ratio of tin in the first conductive piece (33) is more than 97.89% and less than or equal to 98.25%.
12. The method of processing a circuit board assembly (30) according to claim 11, wherein the surface array of the circuit board (31) is provided with a plurality of third pads (314), and the plurality of third pads (314) and the groove (311) are located on the same surface of the circuit board (31); the circuit board assembly (30) further comprises a third electronic component (36), the third electronic component (36) is provided with a fourth surface (400), and a plurality of second pins are arranged on the fourth surface (400) in an array; the processing method of the circuit board assembly (30) further comprises the following steps:
Providing solder paste on the plurality of third pads (314);
Bonding the second pins to the third pads (314) through the solder paste;
and heating and melting the solder paste on the second pins and the third bonding pads (314) so as to enable the second pins and the solder paste on the third bonding pads (314) to be fused into a whole, wherein the structure formed after each second pin and the solder paste on the corresponding third bonding pad (314) are fused is a third conductive piece (37).
13. The method of processing a circuit board assembly (30) of claim 12, wherein disposing solder paste on the plurality of third pads (314) comprises:
a solder paste is disposed on the plurality of third pads (314) using a solder paste printing process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110189317.4A CN114980496B (en) | 2021-02-19 | 2021-02-19 | Circuit board assembly, electronic equipment and processing method of circuit board assembly |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110189317.4A CN114980496B (en) | 2021-02-19 | 2021-02-19 | Circuit board assembly, electronic equipment and processing method of circuit board assembly |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114980496A CN114980496A (en) | 2022-08-30 |
| CN114980496B true CN114980496B (en) | 2024-06-11 |
Family
ID=82954197
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110189317.4A Active CN114980496B (en) | 2021-02-19 | 2021-02-19 | Circuit board assembly, electronic equipment and processing method of circuit board assembly |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114980496B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117457642B (en) * | 2023-12-21 | 2024-05-24 | 荣耀终端有限公司 | Electronic device module and electronic equipment |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5895554A (en) * | 1997-02-21 | 1999-04-20 | Gordon; Thomas A. | Alignment method and apparatus for mounting electronic components |
| CN206413262U (en) * | 2017-01-12 | 2017-08-15 | 深圳市一博科技有限公司 | It is a kind of to reduce the pcb board structure of device setting height(from bottom) |
| CN207781646U (en) * | 2017-10-12 | 2018-08-28 | 深圳市源磊科技有限公司 | A kind of LED chip face-down bonding structure and LED lamp bead |
| CN210432045U (en) * | 2019-06-18 | 2020-04-28 | 深圳和而泰智能控制股份有限公司 | Pad structure and printed circuit board |
| CN210444569U (en) * | 2019-08-28 | 2020-05-01 | 成都傅立叶电子科技有限公司 | Embedded PCB structure of QFN device |
| CN111128769A (en) * | 2019-11-29 | 2020-05-08 | 中国电子科技集团公司第十三研究所 | Ball mounting structure and ball mounting method for ball grid array package |
-
2021
- 2021-02-19 CN CN202110189317.4A patent/CN114980496B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5895554A (en) * | 1997-02-21 | 1999-04-20 | Gordon; Thomas A. | Alignment method and apparatus for mounting electronic components |
| CN206413262U (en) * | 2017-01-12 | 2017-08-15 | 深圳市一博科技有限公司 | It is a kind of to reduce the pcb board structure of device setting height(from bottom) |
| CN207781646U (en) * | 2017-10-12 | 2018-08-28 | 深圳市源磊科技有限公司 | A kind of LED chip face-down bonding structure and LED lamp bead |
| CN210432045U (en) * | 2019-06-18 | 2020-04-28 | 深圳和而泰智能控制股份有限公司 | Pad structure and printed circuit board |
| CN210444569U (en) * | 2019-08-28 | 2020-05-01 | 成都傅立叶电子科技有限公司 | Embedded PCB structure of QFN device |
| CN111128769A (en) * | 2019-11-29 | 2020-05-08 | 中国电子科技集团公司第十三研究所 | Ball mounting structure and ball mounting method for ball grid array package |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114980496A (en) | 2022-08-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7929316B2 (en) | Composite electronic component | |
| TW595296B (en) | Wiring substrate | |
| US6828670B2 (en) | Module component | |
| US7506437B2 (en) | Printed circuit board having chip package mounted thereon and method of fabricating same | |
| EP1204136A1 (en) | Package of semiconductor device and method of manufacture thereof | |
| US10813209B2 (en) | Multilayer substrate, electronic device, and a method for manufacturing a multilayer substrate | |
| US10062649B2 (en) | Package substrate | |
| CN114980496B (en) | Circuit board assembly, electronic equipment and processing method of circuit board assembly | |
| US9629249B2 (en) | Component-embedded substrate and communication module | |
| JP4160923B2 (en) | Electronic components | |
| US9699908B2 (en) | Component-embedded board and communication terminal device | |
| US7967184B2 (en) | Padless substrate for surface mounted components | |
| JP4283523B2 (en) | Composite multilayer substrate and module using the same | |
| WO2013153717A1 (en) | Electronic apparatus and method for manufacturing same | |
| US11191150B2 (en) | Electronic component module and method for manufacturing the same | |
| JP7001211B1 (en) | IC module and IC module manufacturing method | |
| KR102170904B1 (en) | PCB having passive device and method of manufacturing the same | |
| JP4558004B2 (en) | Electronic components, shield covers, mother boards for multi-cavity, wiring boards and electronic equipment | |
| JP2022020441A (en) | Component mounting substrate and manufacturing method of them | |
| KR100926088B1 (en) | Package including embedded chip using cartridge and method of fabricating the same | |
| JP2005149778A (en) | Electronic component with sheet-shaped base plate, laminated electronic circuit device, and manufacturing method of the same | |
| CN114615818A (en) | Chip packaging structure and chip packaging method | |
| JP2006024635A (en) | Flexible printed board for mounting component and its mounting method | |
| JPH0888315A (en) | Electronic module and method for making it multilayer | |
| JP2004273718A (en) | Wiring board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant |