CN114980496A - Circuit board assembly, electronic equipment and processing method of circuit board assembly - Google Patents
Circuit board assembly, electronic equipment and processing method of circuit board assembly Download PDFInfo
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- CN114980496A CN114980496A CN202110189317.4A CN202110189317A CN114980496A CN 114980496 A CN114980496 A CN 114980496A CN 202110189317 A CN202110189317 A CN 202110189317A CN 114980496 A CN114980496 A CN 114980496A
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- 238000003672 processing method Methods 0.000 title claims abstract description 13
- 238000003466 welding Methods 0.000 claims abstract description 15
- 229910000679 solder Inorganic materials 0.000 claims description 90
- 238000000034 method Methods 0.000 claims description 37
- 230000008569 process Effects 0.000 claims description 28
- 238000007639 printing Methods 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 23
- 238000005476 soldering Methods 0.000 claims description 22
- 230000004907 flux Effects 0.000 claims description 18
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 6
- 238000002844 melting Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 238000012545 processing Methods 0.000 abstract description 22
- 238000013461 design Methods 0.000 abstract description 13
- 238000003860 storage Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 9
- 229910000831 Steel Inorganic materials 0.000 description 7
- 239000010959 steel Substances 0.000 description 7
- 238000005507 spraying Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000005693 optoelectronics Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
The application provides a circuit board assembly, electronic equipment and a processing method of the circuit board assembly, relates to the technical field of electronic equipment, and can reduce the thickness of the circuit board assembly so as to realize the thinning design of the electronic equipment. The circuit board assembly comprises a circuit board and a first electronic component; the surface of the circuit board is provided with a groove, and the bottom surface of the groove is provided with a plurality of first welding pads in an array manner; first electronic components has the first surface, and this first surface is relative with the bottom surface of recess, and first surface array is equipped with a plurality of first electrically conductive pieces, and a plurality of first electrically conductive pieces are to protruding to the direction that is close to the bottom surface of recess, and the tip that is close to the bottom surface of recess of a plurality of first electrically conductive pieces meets with a plurality of first pads respectively, and the part height h of the perpendicular direction of circuit board that lies in of a plurality of first electrically conductive pieces between first surface and the first pad satisfies: h < (0.21X l nd +0.36) mm. The circuit board assembly provided by the embodiment of the application is used for realizing signal control, data processing and storage.
Description
Technical Field
The present application relates to the field of electronic device technologies, and in particular, to a circuit board assembly, an electronic device, and a method for processing the circuit board assembly.
Background
At present, the design of electronic devices such as a folding screen mobile phone, a tablet mobile phone, and a tablet computer focuses on the overall thinning, and the thickness of a circuit board assembly in these electronic devices is one of the main factors limiting the thickness of the whole device.
In the prior art, a circuit board assembly includes a printed circuit board and an electronic component disposed on the printed circuit board. Along with the gradual richness of the functions and the gradual improvement of the performance of electronic equipment, the number of electronic components required to be arranged on the printed circuit board is more and more. In order to increase the number of electronic components integrated on the printed circuit board without increasing the area of the printed circuit board, a Package On Package (POP) technology may be used to package at least two electronic components on the same region of the printed circuit board in a stacked manner, but this greatly increases the thickness of the circuit board assembly. On the basis, how to reduce the thickness of the circuit board assembly to realize the thin design of the electronic device is an important direction for various manufacturers to research.
Disclosure of Invention
Embodiments of the present application provide a circuit board assembly, an electronic device, and a method for processing a circuit board assembly, which can reduce the thickness of the circuit board assembly to implement a thin design of the electronic device.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:
in a first aspect, some embodiments of the present application provide a circuit board assembly comprising a circuit board and a first electronic component; the surface of the circuit board is provided with a groove, and the bottom surface of the groove is provided with a plurality of first welding pads in an array manner; first electronic components has the first surface, and the first surface is relative with the bottom surface of recess, and first surface array is equipped with a plurality of first electrically conductive pieces, and this a plurality of first electrically conductive pieces are to protruding to the direction that is close to the bottom surface of recess, and the tip that is close to the bottom surface of recess of a plurality of first electrically conductive pieces meets with a plurality of first pads respectively, and the part height h of a plurality of first electrically conductive pieces that is located between first surface and the first pad on the direction perpendicular with the circuit board satisfies: h < (0.21X lnd +0.36) mm; and d is the array pitch of the plurality of first conductive pieces on the first surface.
In the circuit board assembly provided by the embodiment of the application, the surface of the circuit board is provided with the groove, the bottom surface array of the groove is provided with the first bonding pads, and the first electronic component is connected with the first conductive pieces through the first conductive piecesIs connected with the plurality of first bonding pads. Therefore, at least the first conductive piece is sunk into the groove, so that the height of the first electronic component protruding out of the surface of the circuit board can be reduced on the premise that the height of the first conductive piece is unchanged, the thickness of the circuit board assembly is reduced, and the thin design of electronic equipment is facilitated. Meanwhile, since the height h of the portions of the plurality of first conductive members between the first surface and the first pad in the direction perpendicular to the circuit board satisfies: h < 0.21 × lnd +0.36, unit: mm, which is less than the height h of the welding area when the solder paste printing process is adopted for welding in the prior art 0 (h 0 ≥0.21×lnd 0 +0.36), wherein d ═ d for the same electronic component 0 . Therefore, the thickness of the circuit board assembly can be further reduced.
In a possible implementation manner of the first aspect, the first electronic component is a wafer-level package structure, and a mass ratio of tin in the first conductive component is greater than or equal to 95.5% and less than 95.71%. That is, the interval of the mass ratio of Sn in the first conductive member is [ 95.5%, 95.71%). Since the leads of the wafer level package structure are usually SAC405 solder balls, the mass ratio of Sn in the SAC405 solder balls is 95.5%. Therefore, the mass ratio interval of Sn in the first conductive members is [ 95.5%, 95.71%), it can be determined that the first electronic component is directly connected to the first pad through its own pin, and no solder paste is disposed between the pin of the first electronic component and the first pad, so that the height of the portions of the plurality of first conductive members between the first surface and the first pad in the direction perpendicular to the circuit board is small, the height of the first electronic component protruding out of the surface of the circuit board can be further reduced, the thickness of the circuit board assembly is reduced, and the thin design of the electronic device is facilitated.
In one possible implementation manner of the first aspect, the first electronic component is a fan-in wafer level chip scale package structure or a fan-out wafer level chip scale package structure.
In a possible implementation manner of the first aspect, the first electronic component is a non-wafer level package structure, and a mass ratio of tin in the first conductive component is greater than 97.89% and less than or equal to 98.25%. That is, the mass ratio of Sn in the first conductive member is (97.89%, 98.25% ]. since the lead of the non-wafer level package structure is generally an LF35 solder ball and the mass ratio of Sn in the LF35 solder ball is 98.25%, and meanwhile, since the mass ratio of Sn in the soldering portion formed after the LF35 solder ball is soldered on the circuit board by using the solder paste printing process in the prior art is generally 97.89%, if the mass ratio of Sn in the first conductive member is (97.89%, 98.25%), it can be determined that the first electronic component is directly connected to the first land through its own lead, and no solder paste is provided between the lead of the first electronic component and the first land, so that the height h of the portion of the plurality of first conductive members between the first surface and the first land in the direction perpendicular to the circuit board is small, and the height of the first electronic component protruding out of the surface of the circuit board can be further reduced, the thickness of the circuit board assembly is reduced, and the thin design of the electronic equipment is facilitated.
In one possible implementation manner of the first aspect, the first electronic component is a flip-chip type chip scale package structure, a flip-chip type ball grid array package structure, or a wire bonding type ball grid array package structure.
In one possible implementation manner of the first aspect, the circuit board includes a multilayer wiring structure formed by sequentially and alternately stacking metal layers and insulating dielectric layers; the groove penetrates through at least one metal layer and at least one insulating medium layer of the multilayer wiring structure, and the first pads are located in one metal layer of the multilayer wiring structure. Therefore, the plurality of first pads are formed by one metal layer of the multilayer wiring structure, and no additional pad is needed, so that the structural complexity and the processing difficulty of the circuit board assembly can be reduced.
In one possible implementation manner of the first aspect, the circuit board further includes a solder resist layer disposed on a surface of the multilayer wiring structure, and the groove further penetrates through the solder resist layer.
In one possible implementation manner of the first aspect, the groove penetrates through one metal layer and one insulating dielectric layer of the multilayer wiring structure.
In one possible implementation manner of the first aspect, the groove penetrates through two metal layers and two insulating dielectric layers of the multilayer wiring structure.
In a possible implementation manner of the first aspect, the first electronic component further has a second surface opposite to the first surface, and the second surface array is provided with a plurality of second pads; the circuit board assembly further comprises a second electronic component, the second electronic component is located on one side, far away from the first surface, of the second surface, the second electronic component is provided with a third surface, the third surface is opposite to the second surface, a plurality of second conductive pieces are arranged on the third surface in an array mode, the second conductive pieces protrude towards the direction close to the second surface, and the end portions, close to the second surface, of the second conductive pieces are respectively connected with the second bonding pads. Therefore, the two electronic components (including the first electronic component and the second electronic component) are stacked on the same region of the circuit board, so that the circuit board can bear more electronic components on the premise of not increasing the area of the circuit board.
In a possible implementation manner of the first aspect, the first electronic component is a processor chip, and the second electronic component is a memory chip.
In a possible implementation manner of the first aspect, the first electronic component is an AP, and the second electronic component is a DDR.
In one possible implementation manner of the first aspect, the height h of the portion of the second conductive members between the third surface and the second pad in the direction perpendicular to the circuit board 2 Satisfies the following conditions: h is a total of 2 ＜0.21×lnd 2 +0.36, unit: mm. Wherein d is 2 The array pitch of the plurality of second conductive members on the third surface is set. H is 2 Is less than the height h of the welding area when the solder paste printing process is adopted for welding in the prior art 0 (h 0 ≥0.21×lnd 0 +0.36), wherein, for the same electronic component, d 2 ＝d 0 . Therefore, the height of the laminated structure formed by the first electronic component and the second electronic component protruding out of the circuit board can be reduced to a certain extent, and the thickness of the circuit board assembly is reduced.
In a possible implementation manner of the first aspect, the surface array of the circuit board is provided with a plurality of third pads, and the third pads and the grooves are located on the same surface of the circuit board; the circuit board assembly further comprises a third electronic component, and the third electronic component and the first electronic component are positioned on the same side of the circuit board; the third electronic component is provided with a fourth surface facing the circuit board, the fourth surface is provided with a plurality of third conductive pieces in an array mode, the third conductive pieces protrude towards the direction close to the circuit board, the end parts, close to the circuit board, of the third conductive pieces are respectively connected with the third bonding pads, and the height h1 of the parts, located between the fourth surface and the third bonding pads, of the third conductive pieces in the direction perpendicular to the circuit board meets the following requirements: h1 is not less than (0.21 x lnd1+0.36) mm; and d1 is the array pitch of the third conductive members on the fourth surface. Therefore, the third electronic component realizes welding on the circuit board by adopting the solder paste printing process, the efficiency of the solder paste printing process during welding is higher, and the thickness and the processing efficiency of the circuit board assembly can be considered at the same time.
In a second aspect, some embodiments of the present application provide an electronic device comprising a housing, a functional device, and a circuit board assembly as described in any of the above claims; the functional device is arranged in the shell; the circuit board assembly is arranged in the shell and electrically connected with the functional device.
Because the electronic equipment provided by the embodiment of the application comprises the circuit board assembly in any technical scheme, the electronic equipment and the circuit board assembly can solve the same technical problem and achieve the same technical effect.
In a third aspect, some embodiments of the present application provide a method for processing a circuit board assembly, where the circuit board assembly includes a circuit board and a first electronic component; the surface of the circuit board is provided with a groove, and the bottom surface array of the groove is provided with a plurality of first welding pads; the first electronic component is provided with a first surface, a plurality of first pins are arranged on the first surface in an array mode, and the processing method of the circuit board assembly comprises the following steps: arranging soldering flux on the surfaces of the first pins; respectively bonding the first pins on the first bonding pads through soldering flux; and heating and melting the plurality of first pins and volatilizing the soldering flux so as to enable the plurality of first pins to be respectively connected with the plurality of first bonding pads into a whole, wherein each first pin and the soldering flux remained on the first pin form a first conductive piece.
In the processing method of the circuit board assembly provided by the embodiment of the application, because the plurality of first pins of the first electronic component are respectively bonded on the plurality of first pads through the soldering flux, and the soldering flux volatilizes when the plurality of first pins are heated and melted, the volume of the conductive structure between the first electronic component and the plurality of first pads (i.e. the part of the first conductive member between the first surface and the first pads) is smaller, the height of the first electronic component protruding out of the circuit board can be reduced, the thickness of the circuit board assembly is reduced, and the thinning design of electronic equipment is facilitated. Meanwhile, in the processing method of the circuit board assembly, solder paste is not printed or sprayed on the first bonding pad on the bottom surface of the groove, so that a stepped steel mesh is not required to be arranged for solder paste printing, and high-precision solder spraying equipment is not required to be introduced, so that the processing cost of the circuit board assembly is not greatly increased.
In a possible implementation manner of the third aspect, the surface array of the circuit board is provided with a plurality of third pads, and the plurality of third pads and the grooves are located on the same surface of the circuit board; the circuit board assembly further comprises a third electronic component, the third electronic component is provided with a fourth surface, and the fourth surface is provided with a plurality of second pins in an array mode; the processing method of the circuit board assembly further comprises the following steps: arranging solder paste on the third bonding pads; the second pins are respectively adhered to the third bonding pads through solder paste; and heating and melting the solder pastes on the second pins and the third bonding pads so as to enable the second pins and the solder pastes on the third bonding pads to be fused into a whole, wherein a structure formed by fusing each second pin and the solder paste on the corresponding third bonding pad is a third conductive piece. Because the third bonding pads are arranged on the surface of the circuit board, the arrangement of solder paste on the third bonding pads can be realized by adopting a solder paste printing process so as to improve the processing efficiency of the circuit board assembly.
In one possible implementation manner of the third aspect, the disposing of the solder paste on the plurality of third pads includes: and arranging solder paste on the third bonding pads by adopting a solder paste printing process. Because the efficiency of the solder paste printing process is higher, the processing efficiency of the circuit board assembly can be improved.
Drawings
Fig. 1 is a perspective view of an electronic device provided by some embodiments of the present application;
FIG. 2 is an exploded view of the electronic device of FIG. 1;
fig. 3a is a perspective view of a circuit board assembly provided by some embodiments of the present application;
FIG. 3b is a schematic cross-sectional view of the circuit board assembly shown in FIG. 3 a;
fig. 4 is a schematic cross-sectional view of a circuit board assembly according to further embodiments of the present application;
FIG. 5 is a schematic cross-sectional view of a circuit board of the circuit board assembly shown in FIG. 4;
FIG. 6 is a top view of the circuit board of FIG. 5;
FIG. 7 is a schematic diagram of another cross-sectional configuration of a circuit board of the circuit board assembly of FIG. 4;
FIG. 8 is an enlarged view of a portion of FIG. 4;
FIG. 9 is an enlarged view of a portion of region I of FIG. 8;
fig. 10 is a schematic diagram of a circuit board assembly according to further embodiments of the present application;
fig. 11 is a schematic diagram of a circuit board assembly according to further embodiments of the present application;
FIG. 12 is a schematic diagram illustrating a circuit board assembly according to yet further embodiments of the present application;
fig. 13 is a flow chart of a method of manufacturing a circuit board assembly according to some embodiments of the present disclosure.
Detailed Description
In the embodiments of the present application, the terms "first", "second", "third", and "fourth" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, features defined as "first", "second", "third", "fourth" may explicitly or implicitly include one or more of the features.
In the embodiments of the present application, the terms "include", "include" or any other variations are intended to cover non-exclusive inclusions, so that a process, a method, an article, or an apparatus including a series of elements includes not only those elements but also other elements not explicitly listed, or further includes elements inherent to such a process, a method, an article, or an apparatus. Without further limitation, an element identified by the phrase "comprising an … …" does not exclude the presence of other identical elements in the process, method, article, or apparatus that comprises the element.
The application provides an electronic device, which is a type of electronic device pursuing thickness thinning, and specifically, the electronic device can be a folding screen mobile phone, a tablet computer, a tablet navigator and the like.
Referring to fig. 1 and fig. 2, fig. 1 is a perspective view of an electronic device according to some embodiments of the present disclosure, and fig. 2 is an exploded view of the electronic device shown in fig. 1. In this embodiment, the electronic device is a tablet phone, and the smaller the thickness of the tablet phone is, the better the hand feeling is. Specifically, the electronic apparatus includes a housing 10, a functional device 20, and a circuit board assembly 30.
The housing 10 is a housing structure formed by splicing a front cover plate (not shown), a frame 11 and a rear cover 12, and is used for protecting the functional devices 20 and the circuit board assembly 30 in the electronic equipment.
A functional device 20 is arranged in the housing 10, the functional device 20 being adapted to perform one or more functions of the electronic device. The functional device 20 includes, but is not limited to, a camera module, a display screen, a speaker, a receiver, an antenna, a microphone, a Universal Serial Bus (USB) interface, a Subscriber Identity Module (SIM) card interface, a key, and the like.
The number of the functional devices 20 in the electronic apparatus may be one or more. When the number of the functional devices 20 in the electronic device is one, the functional device 20 may be one of a camera module, a display screen, a speaker, a receiver, an antenna, a microphone, a USB interface, a SIM card interface, and a key. When the number of the functional devices 20 in the electronic device is plural, the plural functional devices 20 may be plural ones of the camera module, the display screen, the speaker, the receiver, the antenna, the microphone, the USB interface, the SIM card interface, and the key. In the embodiment shown in fig. 1 and 2, the number of the functional devices 20 is 3, and the 3 functional devices 20 are all camera modules.
The circuit board assembly 30 is disposed in the housing 10, and the circuit board assembly 30 is electrically connected to the functional device 20. The circuit board assembly 30 is used for performing signal control, data signal processing, and data signal storage operations on the functional device 20. The circuit board assembly 30 may be a main board of the electronic device, or may be another circuit board of the electronic device, such as a circuit board for carrying a speaker (speaker) and a USB interface in a flat-panel mobile phone, which is not limited in this respect. The circuit board assembly 30 is used as an example of a motherboard of an electronic device, which should not be construed as a specific limitation to the present application.
Referring to fig. 3a and 3b, fig. 3a is a perspective view of a circuit board assembly 30 according to some embodiments of the present disclosure, and fig. 3b is a schematic cross-sectional structure diagram of the circuit board assembly 30 shown in fig. 3 a. In the present embodiment, the circuit board assembly 30 is the circuit board assembly 30 in the electronic device shown in fig. 2. Specifically, the circuit board assembly 30 includes a circuit board 31 and a plurality of electronic components a disposed on the circuit board 31.
Electronic components a include, but are not limited to, resistors, capacitors, inductors, potentiometers, valves, heat sinks, electromechanical components, connectors, semiconductor discrete devices, electro-acoustic devices, laser devices, electronic display devices, electro-optical devices, sensors, power supplies, switches, micro-electro-mechanical devices, electronic transformers, relays, printed circuit boards, integrated circuit devices, and the like. It should be noted that, in the embodiment of the present application, the number and the arrangement of the electronic components a on the circuit board 31 are not limited, and fig. 3a and fig. 3b only show an example of the number and the arrangement of the electronic components a on the circuit board 31.
The circuit board 31 is used for carrying the plurality of electronic components a and realizing electrical connection among the plurality of electronic components a. The circuit board 31 includes, but is not limited to, a Printed Circuit Board (PCB) and a flexible circuit board (FPC). In the embodiment shown in fig. 3a and 3b, the circuit board 31 is a PCB board. The shape of the circuit board 31 includes, but is not limited to, rectangular, square, polygonal, circular, etc., and in the embodiment shown in fig. 3a and 3b, the shape of the circuit board 31 is approximately rectangular.
In the prior art, in order to reduce the volume of the circuit board assembly 30, a plurality of pin arrays of the electronic component a are usually disposed on one surface of the electronic component, and the pins on the surface are mounted and soldered on the pads of the circuit board 31 by using Surface Mount Technology (SMT). In this way, the occupied area of the electronic component a on the circuit board 31 is small, and the height of the soldered portion between the electronic component a and the circuit board 31 in the direction perpendicular to the circuit board 31 is small, which can reduce the volume of the circuit board assembly 30.
In addition to the above-described embodiments, in order to improve the mounting efficiency of the plurality of electronic components a on the circuit board 31, generally, a solder paste printing process is used to print solder paste on all the pads on one surface of the circuit board 31 at one time, then the leads of the plurality of electronic components a are attached to the solder paste on the pads, respectively, and a reflow soldering process is used to melt and solidify the leads of the plurality of electronic components a and the solder paste into one body, thereby improving the mounting efficiency of the plurality of electronic components a on the circuit board 31.
In the above embodiment, the principle of the solder paste printing process is to print solder paste on the pads of the circuit board 31 through the holes of the planar steel mesh. Since the solder paste is printed on the lands of the circuit board 31, the solder lands between the electronic component a and the circuit board 31 are superposed by the leads and the solder paste, and therefore the height h of the solder lands 0 Larger, usually h 0 ≥0.21×lnd 0 +0.36, unit: mm, d 0 The array pitch of the leads of the electronic component a is shown. Wherein, when the pins of the electronic component A are uniformly arrayed, the pins of the electronic component A are arrayed between the arraysThe distance refers to the distance between any two adjacent pins; when the pins of the electronic component a are non-uniformly arrayed, the array pitch of the pins of the electronic component a refers to the distance between two nearest pins. Thus, the height of the electronic component a protruding from the surface of the circuit board 31 is large, and the thickness of the circuit board assembly 30 is large, which is not favorable for the thin design of the electronic device. In order to reduce the thickness of the circuit board assembly 30, a groove may be formed on the surface of the circuit board 31, a pad may be formed on the bottom surface of the groove, and then the electronic component a is sunk into the groove and soldered on the pad on the bottom surface of the groove by using the SMT. However, because the solder pads on the bottom surface of the groove and the solder pads on the surface of the circuit board are not coplanar, a planar steel mesh cannot be used for printing solder paste on the circuit board, and a special stepped steel mesh needs to be customized for solder paste printing, or a solder spraying device with higher precision is introduced to spray the solder paste onto the solder pads on the bottom surface of the groove, and the solder pads on the surface of the circuit board are printed by adopting the traditional solder paste printing process. No matter the special ladder steel mesh is customized or tin spraying equipment with higher precision is introduced, the processing procedure or the processing cost of the circuit board assembly is inevitably increased respectively.
Referring to fig. 4, fig. 4 is a schematic cross-sectional structure diagram of a circuit board assembly 30 according to still another embodiment of the present disclosure, in order to reduce the thickness of the circuit board assembly without greatly increasing the processing cost of the circuit board assembly. In the present embodiment, the circuit board assembly 30 includes a circuit board 31 and a first electronic component 32.
The circuit board 31 includes, but is not limited to, a PCB board and an FPC board. In some embodiments, the circuit board 31 is a PCB, and specifically, referring to fig. 5 and fig. 6, fig. 5 is a schematic cross-sectional view of the circuit board 31 in the circuit board assembly 30 shown in fig. 4, and fig. 6 is a top view of the circuit board 31 shown in fig. 5, where the circuit board 31 includes a multilayer wiring structure formed by sequentially and alternately stacking metal layers 31a and insulating dielectric layers 31 b. In some embodiments, the circuit board 31 further includes a solder resist layer 31c provided on the surface of the multilayer wiring structure.
The surface of the circuit board 31 is provided with a groove 311, the bottom surface array of the groove 311 is provided with a plurality of first pads 312, and the plurality of first pads 312 are used for soldering the first electronic component 32.
In some embodiments, with continued reference to fig. 5 and 6, the circuit board 31 is a PCB, and the recess 311 extends through at least one metal layer 31a and at least one insulating dielectric layer 31b of the multilayer wiring structure. Specifically, the groove 311 may penetrate through one metal layer 31a and one insulating medium layer 31b of the multilayer wiring structure, may penetrate through two metal layers 31a and two insulating medium layers 31b of the multilayer wiring structure, and may also penetrate through three metal layers 31a and three insulating medium layers 31b of the multilayer wiring structure, and may be determined comprehensively according to the thickness of the circuit board 31 and the number of layers of the metal layers 31a and the insulating medium layers 31b in the circuit board 31, as long as the number of layers of the metal layers 31a and the insulating medium layers 31b penetrated by the groove 311 does not affect the structural strength of the circuit board 31, which is not specifically limited herein. In the embodiment shown in fig. 5 and 6, the recess 311 penetrates one metal layer 31a and one insulating dielectric layer 31b of the multilayer wiring structure. In still other embodiments, referring to fig. 7, fig. 7 is a schematic cross-sectional view of a circuit board 31 in the circuit board assembly 30 shown in fig. 4, in the present embodiment, a groove 311 penetrates two metal layers 31a and two insulating dielectric layers 31b of a multilayer wiring structure.
When the circuit board 31 further includes a solder resist layer 31c provided on the surface of the multilayer wiring structure, the recess 311 further penetrates the solder resist layer 31 c.
Further, a plurality of first pads 312 are located in one metal layer 31a of the multilayer wiring structure. Thus, the plurality of first pads 312 are formed by one metal layer 31a of the multilayer wiring structure without additionally providing a pad, so that the structural complexity and the processing difficulty of the circuit board assembly 30 can be reduced.
In some embodiments, referring to fig. 5 or fig. 7, a solder mask layer 31c is further disposed on the bottom surface of the groove 311, and the solder mask layer 31c does not cover the plurality of first pads 312.
The first electronic component 32 includes, but is not limited to, resistors, capacitors, inductors, potentiometers, valves, heat sinks, electromechanical components, connectors, semiconductor discrete devices, electroacoustic devices, laser devices, electronic display devices, optoelectronic devices, sensors, power supplies, switches, micro-electro-mechanical devices, electronic transformers, relays, printed circuit boards, integrated circuit devices, and the like.
In some embodiments, the first electronic component 32 is an Integrated Circuit (IC), and particularly, the first electronic component 32 includes, but is not limited to, an Application Processor (AP), a Double Data Rate (DDR), and a universal flash memory (UFS). On this basis, the first electronic component 32 may be packaged in a Wafer Level Package (WLP) manner or a non-wafer level package. The wafer level package includes, but is not limited to, Fan-in wafer level chip scale package (Fan-in WLCSP) and Fan-out wafer level chip scale package (Fan-out WLCSP). Non-wafer level packages include, but are not limited to, flip chip-scale package (FC-CSP), flip chip-ball grid array (FCBGA) and wire-bonded ball grid array (WBBGA) packages, and are not limited to these examples.
Referring to fig. 8 and 9, fig. 8 is a partial enlarged view of fig. 4, and fig. 9 is a partial enlarged view of a region I in fig. 8. In the present embodiment, the circuit board 31 is the circuit board 31 shown in fig. 5, and it is understood that the circuit board 31 may also be the circuit board 31 shown in fig. 7, which is not limited herein. The first electronic component 32 has a first surface 100, and the first surface 100 is opposite to the bottom surface of the recess 311. The first surface 100 is opposite to the bottom surface of the groove 311, and means: the first surface 100 faces the bottom surface of the recess 311, and an orthographic projection of the first surface 100 on the bottom surface of the recess 311 overlaps the bottom surface of the recess 311.
The first surface 100 is provided with a plurality of first conductive members 33 in an array, and the plurality of first conductive members 33 are used for leading out the internal circuit of the first electronic component 32.
The first conductive members 33 protrude toward the bottom surface of the recess 311, and ends of the first conductive members 33 near the bottom surface of the recess 311 are respectively connected to the first pads 312. Wherein "joined" means joined and formed as a unit.
It should be noted that, the first conductive members 33 are respectively connected to the first pads 312, and one or more combinations of the following three implementation manners are included; specifically, the three implementations include: one first conductive member 33 is correspondingly connected with one first bonding pad 312, a plurality of first conductive members 33 are correspondingly connected with one first bonding pad 312, and one first conductive member 33 is correspondingly connected with a plurality of first bonding pads 312. Fig. 8 only shows an example that the number of the first conductive members 33 is equal to the number of the first pads 312, and the first conductive members 33 and the first pads 312 are connected in a one-to-one correspondence, which should not be construed as a specific limitation to the present application.
The height h of the portion of the plurality of first conductive members 33 between the first surface 100 and the first pad 312 in the direction perpendicular to the circuit board 31 (i.e., the direction Z) satisfies: h < 0.21 × lnd +0.36, unit: mm. d is an array pitch of the plurality of first conductive members 33 on the first surface 100. When the plurality of first conductive members 33 are uniformly arrayed on the first surface 100, the array pitch of the plurality of first conductive members 33 on the first surface 100 refers to: the distance between the centers of the occupied areas of the adjacent two first conductive members 33 on the first surface 100. When the plurality of first conductive members 33 are non-uniformly arrayed on the first surface 100, the array pitch of the plurality of first conductive members 33 on the first surface 100 refers to: a distance between centers of occupied areas of two first conductive members 300, which are closest to each other, on the first surface 100 among the plurality of first conductive members 33.
In the circuit board assembly 30 provided in the embodiment of the present application, since the surface of the circuit board 31 is provided with the groove 311, the bottom surface array of the groove 311 is provided with the plurality of first pads 312, and the first electronic component 32 is connected to the plurality of first pads 312 through the plurality of first conductive members 33. Therefore, at least the first conductive member 33 is sunk into the recess 311, and under the premise that the height of the first conductive member 33 is not changed, the height of the first electronic component 32 protruding out of the surface of the circuit board 31 can be reduced, the thickness of the circuit board assembly 30 is reduced, and the electronic equipment is facilitatedAnd (5) thinning design. Meanwhile, since the heights h of the portions of the plurality of first conductive pieces 33 between the first surface 100 and the first pads 312 in the direction perpendicular to the circuit board 31 satisfy: h < 0.21 × lnd +0.36, unit: mm, which is less than the height h of the welding area when the solder paste printing process is adopted for welding in the prior art 0 (h 0 ≥0.21×lnd 0 +0.36), wherein d ═ d for the same electronic component 0 . Therefore, the thickness of the circuit board assembly 30 can be further reduced, and it can be determined that the first electronic component 32 is not printed or sprayed with solder paste on the first bonding pad 312 in the process of being soldered to the circuit board 31, so that it is not necessary to provide a step steel mesh for solder paste printing, and it is not necessary to introduce a solder spraying device with high precision, and thus the processing cost of the circuit board assembly can be not greatly increased.
In some embodiments, the first electronic component 32 is a wafer level package structure. In some embodiments, the first electronic component 32 is a Fan-in WLCSP structure or a Fan-out WLCSP structure. The mass ratio of tin (chemical symbol: Sn) in the first conductive member 33 is 95.5% or more and less than 95.71%. That is, the interval of the mass ratio of Sn in the first conductive member 33 is [ 95.5%, 95.71%).
Since the leads of the wafer level package structure are usually SAC405 solder balls, the mass ratio of Sn in the SAC405 solder balls is 95.5%. Therefore, the interval of the mass ratio of Sn in the first conductive members 33 is [ 95.5%, 95.71%), it can be determined that the first electronic component 32 is directly connected to the first land 312 through its own lead, and no solder paste is disposed between the lead of the first electronic component 32 and the first land 312, so that the height h of the portion of the plurality of first conductive members 33 between the first surface 100 and the first land 312 in the direction perpendicular to the circuit board 31 is small, the height of the first electronic component 32 protruding out of the surface of the circuit board 31 can be further reduced, the thickness of the circuit board assembly 30 is reduced, and the thin design of the electronic device is facilitated.
In other embodiments, the first electronic component 32 is a non-wafer level package structure. In some embodiments, the first electronic component 32 is an FC-CSP structure, an FCBGA package structure, or a WBBGA package structure. The mass ratio of Sn in the first conductive member 33 is more than 97.89% and less than or equal to 98.25%. That is, the interval of the mass ratio of Sn in the first conductive member 33 is (97.89%, 98.25%).
Since the leads of the non-wafer level package structure are usually LF35 solder balls, the mass fraction of Sn in the LF35 solder balls is 98.25%. Meanwhile, in the prior art, the mass ratio of Sn in the soldering portion formed after the LF35 solder ball is soldered on the circuit board by using a solder paste printing process is usually 97.89%, and therefore, if the mass ratio of Sn in the first conductive member 33 is (97.89%, 98.25%), it can be determined that the first electronic component 32 is directly connected to the first land 312 through its own pin, and no solder paste is disposed between the pin of the first electronic component 32 and the first land 312, and therefore, the height h of the portion, located between the first surface 100 and the first land 312, of the plurality of first conductive members 33 in the direction perpendicular to the circuit board 31 is small, which can further reduce the height of the first electronic component 32 protruding out of the surface of the circuit board 31, reduce the thickness of the circuit board assembly 30, and facilitate the thin design of the electronic device.
In order to enable the circuit board 31 to carry more electronic components without increasing the area of the circuit board 31, in some embodiments, please refer to fig. 10, and fig. 10 is a schematic structural diagram of a circuit board assembly 30 according to still other embodiments of the present application. In the present embodiment, the first electronic component 32 has a second surface 200 opposite to the first surface 100 in addition to the first surface 100, and the second surface 200 is provided with a plurality of second pads 313 in an array. The circuit board assembly 30 includes a second electronic component 34 in addition to the circuit board 31 and the first electronic component 32. The second electronic component 34 is located on a side of the second surface 200 away from the first surface 100. The second electronic component 34 has a third surface 300, and the third surface 300 is opposite to the second surface 200. The third surface 300 is provided with a plurality of second conductive members 35 in an array, and the plurality of second conductive members 35 are used for leading out the circuit of the second electronic component 34. The second conductive members 35 protrude toward the second surface 200, and ends of the second conductive members 35 close to the second surface 200 are respectively connected to the second pads 313. In this way, two electronic components (including the first electronic component 32 and the second electronic component 34) are stacked at the same region position on the circuit board 31, so that the circuit board 31 can bear more electronic components without increasing the area of the circuit board 31.
It should be noted that, the plurality of second conductive members 35 are respectively connected to the plurality of second pads 313, and one or more combinations of the following three implementation manners are included; specifically, the three implementations include: one second conductive member 35 is correspondingly connected with one second bonding pad 313, a plurality of second conductive members 35 are correspondingly connected with one second bonding pad 313, and one second conductive member 35 is correspondingly connected with a plurality of second bonding pads 313. Fig. 10 only shows an example in which the number of the second conductive members 35 is equal to the number of the second pads 313, and the second conductive members 35 are in one-to-one correspondence with the second pads 313, which should not be construed as a particular limitation to the present application.
In some embodiments, the first electronic component 32 is a processor chip and the second electronic component 34 is a memory chip. Specifically, the first electronic component 32 includes, but is not limited to, an AP, and the second electronic component 34 includes, but is not limited to, a DDR.
In some embodiments, a height h of a portion of the plurality of second conductive members 35 between the third surface 300 and the second pad 313 in a direction perpendicular to the circuit board 31 2 Satisfies the following conditions: h is 2 ＜0.21×lnd 2 +0.36, unit: mm. Wherein, d 2 The array pitch of the plurality of second conductive members 35 on the third surface 300. H is 2 Is less than the height h of the welding area when the solder paste printing process is adopted for welding in the prior art 0 (h 0 ≥0.21×lnd 0 +0.36), wherein, for the same electronic component, d 2 ＝d 0 . Therefore, the height of the laminated structure of the first electronic component 32 and the second electronic component 34 protruding out of the circuit board 31 can be reduced to some extent, and the thickness of the circuit board assembly 30 can be reduced.
Besides the grooves 311 formed on the surface of the circuit board 31 to reduce the height of the first electronic component 32 protruding from the circuit board 31, other pads are usually formed on the surface of the circuit board 31 for connecting other electronic components, and the number of the other pads and the number of the electronic components to be connected are large, so that the processing efficiency of the circuit board assembly 30 can be ensured by adopting a solder paste printing process.
In some embodiments, please refer to fig. 11, where fig. 11 is a schematic structural diagram of a circuit board assembly 30 according to still other embodiments of the present application. In the present embodiment, the surface array of the circuit board 31 is provided with a plurality of third pads 314, and in some embodiments, the plurality of third pads 314 are formed by one metal layer of a multilayer wiring structure. The third pads 314 and the grooves 311 are located on the same surface of the circuit board 31. Circuit board assembly 30 also includes a third electronic component 36, where third electronic component 36 and first electronic component 32 are located on the same side of circuit board 31. The third electronic component 36 has a fourth surface 400, and the fourth surface 400 faces the circuit board 31. The fourth surface 400 is provided with a plurality of third conductive members 37 in an array, the plurality of third conductive members 37 protrude toward the circuit board 31, and ends of the plurality of third conductive members 37 close to the circuit board 31 are respectively connected to the plurality of third pads 314.
It should be noted that, the plurality of third conductive members 37 are respectively connected to the plurality of third pads 314, and one or more combinations of the following three implementation manners are included; specifically, the three implementations include: a third conductive member 37 is connected to a third bonding pad 314, a plurality of third conductive members 37 are connected to a third bonding pad 314, and a third conductive member 37 is connected to a plurality of third bonding pads 314. Fig. 11 only shows an example that the number of the third conductive members 37 is equal to the number of the third pads 314, and the third conductive members 37 and the third pads 314 are connected in a one-to-one correspondence, which should not be construed as a particular limitation to the present application.
In addition, a height h1 of a portion of the plurality of third conductive members 37 between the fourth surface 400 and the third pad 314 in a direction perpendicular to the circuit board 31 satisfies: h1 ≧ (0.21X lnd1+0.36), unit: mm; where d1 is an array pitch of the plurality of third conductive members 37 on the fourth surface 400. In this way, the third electronic component 36 is soldered to the circuit board 31 by using the solder paste printing process, which is efficient in soldering, and can simultaneously achieve both the thickness and the processing efficiency of the circuit board assembly 30.
The third electronic component 36 includes, but is not limited to, a socket, a resistor, a capacitor, an inductor, a potentiometer, a tube, a heat sink, an electromechanical component, a connector, a semiconductor discrete device, an electroacoustic device, a laser device, an electronic display device, an optoelectronic device, a sensor, a power supply, a switch, a micro-electro-mechanical device, an electronic transformer, a relay, a printed circuit board, an integrated circuit device, etc. In the embodiment shown in fig. 11, the third electronic component 36 is a UFS.
The number of the third electronic components 36 disposed on the circuit board 31 may be one or more, and is not limited in detail here. Fig. 11 gives an example in which the number of the third electronic components 36 provided on the circuit board 31 is only one, and this should not be construed as a particular limitation to the constitution of the present application. In other embodiments, please refer to fig. 12, and fig. 12 is a schematic structural diagram of a circuit board assembly according to still other embodiments of the present application. In this embodiment, the number of the third electronic components 36 is two, and the two third electronic components 36 are the UFS and the card socket, respectively.
In some embodiments, with continued reference to fig. 12, a fourth electronic component 38 and a fifth electronic component 39 are further disposed on the circuit board 31. The number of the fourth electronic component 38 and the fifth electronic component 39 may be one or more, and is not limited in particular. In some embodiments, the fourth electronic component 38 is a connector, and the fourth electronic component 38 is used to electrically connect a Radio Frequency (RF) circuit board assembly 40 to the circuit board 31. The fifth electronic component 39 includes, but is not limited to, a card socket, a resistor, a capacitor, an inductor, a potentiometer, an electronic tube, a heat sink, an electromechanical component, a connector, a semiconductor discrete device, an electroacoustic device, a laser device, an electronic display device, an optoelectronic device, a sensor, a power supply, a switch, a micro-electro-mechanical device, an electronic transformer, a relay, a printed circuit board, an integrated circuit device, and the like. The fourth electronic component 38 and the third electronic component 36 are respectively located on two opposite sides of the circuit board 31, and the fifth electronic component 39 and the fourth electronic component 38 are located on the same side of the circuit board 31. The fourth electronic component 38 and the fifth electronic component 39 are soldered on the circuit board 31 by a solder paste printing process.
The present application further provides a method for processing a circuit board assembly 30, where the circuit board assembly 30 includes a circuit board 31 and a first electronic component 32. The surface of the circuit board 31 is provided with a groove 311, and the bottom surface array of the groove 311 is provided with a plurality of first pads 312. The first electronic component 32 has a first surface 100, and the first surface 100 is provided with a plurality of first pins in an array, and the plurality of first pins are used for leading out a circuit of the first electronic component 32. Referring to fig. 13, fig. 13 is a flowchart illustrating a method for processing a circuit board assembly 30 according to some embodiments of the present disclosure. In the present embodiment, the processing method of the circuit board assembly 30 includes:
s100: arranging soldering flux on the surfaces of the first pins; the soldering flux is an auxiliary material which ensures smooth operation of a welding process and is easy to volatilize when heated to a preset temperature.
S200: the first pins are respectively adhered to the first pads 312 by soldering flux;
s300: the first pins 321 are respectively connected with the first pads 312 to form a whole by heating and melting the first pins and volatilizing the flux. Each first lead and the flux remaining on the first lead form a first conductive member 33. In addition, a reflow soldering process can be adopted to heat and melt the plurality of first pins and volatilize the soldering flux.
In the processing method of the circuit board assembly 30 provided in the embodiment of the present application, since the plurality of first pins of the first electronic component 32 are respectively adhered to the plurality of first pads 312 through the soldering flux, and the soldering flux volatilizes when the plurality of first pins are heated and melted, a volume of the conductive structure between the first electronic component 32 and the plurality of first pads 312 (that is, a portion of the first conductive member 33 located between the first surface 100 and the first pads 312) is relatively small, a height of the first electronic component 32 protruding out of the circuit board 31 can be reduced, a thickness of the circuit board assembly 30 is reduced, and a thinned design of the electronic device is facilitated. Meanwhile, in the processing method of the circuit board assembly 30 provided by the embodiment of the present application, solder paste is not printed or sprayed on the first bonding pad 312 on the bottom surface of the groove 311, so that there is no need to provide a ladder steel mesh for solder paste printing, and there is no need to introduce a high-precision solder spraying device, and thus the processing cost of the circuit board assembly is not greatly increased.
In some embodiments, the surface array of the circuit board 31 is provided with a plurality of third pads 314, and the plurality of third pads 314 and the grooves 311 are located on the same surface of the circuit board 31. The circuit board assembly 30 further includes a third electronic component 36, the third electronic component 36 having a fourth surface 400, the fourth surface 400 being provided with a plurality of second pins in an array. The plurality of second pins are used for leading out, and the internal circuit of the third electronic component 36. The processing method of the circuit board assembly 30 further includes: disposing solder paste on the plurality of third pads 314; the second leads are respectively adhered to the third pads 314 by solder paste; and heating and melting the plurality of second pins and the solder paste on the plurality of third pads 314, so that the plurality of second pins and the solder paste on the plurality of third pads 314 are fused into a whole, and the structure formed by fusing each second pin and the solder paste on the corresponding third pad 314 is the third conductive member 37.
Since the plurality of third pads 314 are disposed on the surface of the circuit board 31, a solder paste printing process may be used to dispose solder paste on the plurality of third pads 314, so as to improve the processing efficiency of the circuit board assembly 30.
Specifically, in the above-described embodiment, disposing the solder paste on the plurality of third pads 314 includes: a solder paste is disposed on the plurality of third pads 314 using a solder paste printing process. Since the efficiency of the solder paste printing process is high, the processing efficiency of the circuit board assembly 30 can be improved.
In the description herein, particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (15)
1. A circuit board assembly (30) comprising a circuit board (31) and a first electronic component (32);
a groove (311) is formed in the surface of the circuit board (31), and a plurality of first bonding pads (312) are arranged on the bottom surface of the groove (311) in an array mode;
the first electronic component (32) has a first surface (100), the first surface (100) is opposite to the bottom surface of the groove (311), the first surface (100) is provided with a plurality of first conductive members (33) in an array, the plurality of first conductive members (33) protrude in a direction close to the bottom surface of the groove (311), ends of the plurality of first conductive members (33) close to the bottom surface of the groove (311) are respectively connected with the plurality of first pads (312), and the height h of a part, located between the first surface (100) and the first pads (312), of the plurality of first conductive members (33) in a direction perpendicular to the circuit board (31) satisfies: h < (0.21X lnd +0.36) mm; wherein d is an array pitch of the plurality of first conductive members (33) on the first surface (100).
2. The circuit board assembly (30) according to claim 1, wherein the first electronic component (32) is a wafer level package structure, and a mass ratio of tin in the first conductive member (33) is greater than or equal to 95.5% and less than 95.71%.
3. The circuit board assembly (30) of claim 2, wherein the first electronic component (32) is a fan-in wafer-level chip-scale package structure or a fan-out wafer-level chip-scale package structure.
4. The circuit board assembly (30) of claim 1, wherein the first electronic component (32) is an amorphous wafer level package, and a mass fraction of tin in the first conductive member (33) is greater than 97.89% and less than or equal to 98.25%.
5. A circuit board assembly (30) according to claim 4, wherein the first electronic component (32) is a flip-chip type chip scale package structure, a flip-chip type ball grid array package structure or a wire bond type ball grid array package structure.
6. A circuit board assembly (30) according to any of claims 1-5, wherein the circuit board (31) comprises a multilayer wiring structure of metal layers (31a) and dielectric layers (31b) alternately stacked in sequence;
the groove (311) penetrates through at least one metal layer (31a) and at least one insulating medium layer (31b) of the multilayer wiring structure, and the first pads (312) are located in the metal layer (31a) of the multilayer wiring structure.
7. The circuit board assembly (30) according to claim 6, wherein the recess (311) extends through a metal layer (31a) and an insulating dielectric layer (31b) of the multilayer wiring structure.
8. The circuit board assembly (30) according to claim 6, wherein the recess (311) extends through two metal layers (31a) and two dielectric layers (31b) of the multilayer wiring structure.
9. A circuit board assembly (30) according to any of claims 1-8, wherein the first electronic component (32) further has a second surface (200) opposite to the first surface (100), the second surface (200) being provided with an array of second pads (313);
the circuit board assembly (30) further comprises a second electronic component (34), the second electronic component (34) is located on one side, far away from the first surface (100), of the second surface (200), the second electronic component (34) is provided with a third surface (300), the third surface (300) is opposite to the second surface (200), the third surface (300) is provided with a plurality of second conductive pieces (35) in an array mode, the second conductive pieces (35) protrude towards the direction close to the second surface (200), and the end portions, close to the second surface (200), of the second conductive pieces (35) are respectively connected with the second pads (313).
10. The circuit board assembly (30) of claim 9, wherein the first electronic component (32) is a processor chip and the second electronic component (34) is a memory chip.
11. A circuit board assembly (30) according to any of claims 1-10, wherein the surface array of the circuit board (31) is provided with a plurality of third pads (314), the plurality of third pads (314) being located on the same surface of the circuit board (31) as the recess (311);
the circuit board assembly (30) further comprises a third electronic component (36), the third electronic component (36) and the first electronic component (32) being located on the same side of the circuit board (31);
the third electronic component (36) has a fourth surface (400), the fourth surface (400) faces the circuit board (31), the fourth surface (400) is provided with a plurality of third conductive members (37) in an array, the plurality of third conductive members (37) protrude in a direction approaching the circuit board (31), ends of the plurality of third conductive members (37) approaching the circuit board (31) are respectively connected with the plurality of third pads (314), and a height h1 of a portion of the plurality of third conductive members (37) between the fourth surface (400) and the third pads (314) in a direction perpendicular to the circuit board (31) satisfies: h1 is not less than (0.21 × l nd1+0.36) mm; wherein d1 is the array pitch of the plurality of third conductive members (37) on the fourth surface (400).
12. An electronic device, comprising:
a housing (10);
a functional device (20), the functional device (20) being disposed within the housing (10);
the circuit board assembly (30) of any of claims 1-11, the circuit board assembly (30) being disposed within the housing (10), and the circuit board assembly (30) being electrically connected to the functional device (20).
13. A method of manufacturing a circuit board assembly (30), wherein the circuit board assembly (30) comprises a circuit board (31) and a first electronic component (32); a groove (311) is formed in the surface of the circuit board (31), and a plurality of first welding pads (312) are arranged on the bottom surface of the groove (311) in an array mode; the first electronic component (32) is provided with a first surface (100), the first surface (100) is provided with a plurality of first pins in an array mode, and the processing method of the circuit board assembly (30) comprises the following steps:
arranging soldering flux on the surfaces of the first pins;
the first pins are respectively adhered to the first bonding pads (312) through the soldering flux;
and heating and melting the first pins, and volatilizing the soldering flux to enable the first pins (321) to be respectively connected with the first bonding pads (312) into a whole, wherein each first pin and the soldering flux left on the first pin form a first conductive member (33).
14. The method of manufacturing a circuit board assembly (30) according to claim 13, wherein the surface array of the circuit board (31) is provided with a plurality of third pads (314), and the plurality of third pads (314) and the grooves (311) are located on the same surface of the circuit board (31); the circuit board assembly (30) further comprises a third electronic component (36), the third electronic component (36) has a fourth surface (400), and the fourth surface (400) is provided with a plurality of second pins in an array; the processing method of the circuit board assembly (30) further comprises the following steps:
disposing solder paste on the plurality of third pads (314);
the plurality of second pins are respectively adhered to the plurality of third bonding pads (314) through the solder paste;
and heating and melting the plurality of second pins and the solder paste on the plurality of third bonding pads (314) so that the plurality of second pins and the solder paste on the plurality of third bonding pads (314) are respectively fused into a whole, and the structure formed by fusing each second pin and the solder paste on the corresponding third bonding pad (314) is a third conductive member (37).
15. The method of manufacturing a circuit board assembly (30) of claim 14, wherein disposing solder paste on the plurality of third pads (314) comprises:
solder paste is disposed on the plurality of third pads (314) using a solder paste printing process.
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|---|---|---|---|---|
| CN117457642A (en) * | 2023-12-21 | 2024-01-26 | 荣耀终端有限公司 | Electronic device module and electronic equipment |
| CN117457642B (en) * | 2023-12-21 | 2024-05-24 | 荣耀终端有限公司 | Electronic device module and electronic equipment |
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| CN114980496B (en) | 2024-06-11 |
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