CN114980496A - A circuit board assembly, an electronic device, and a processing method for the circuit board assembly - Google Patents

Abstract

The application provides a circuit board assembly, electronic equipment and a processing method of the circuit board assembly, relates to the technical field of electronic equipment, and can reduce the thickness of the circuit board assembly so as to realize the thinning design of the electronic equipment. The circuit board assembly comprises a circuit board and a first electronic component; the surface of the circuit board is provided with a groove, and the bottom surface of the groove is provided with a plurality of first welding pads in an array manner; first electronic components has the first surface, and this first surface is relative with the bottom surface of recess, and first surface array is equipped with a plurality of first electrically conductive pieces, and a plurality of first electrically conductive pieces are to protruding to the direction that is close to the bottom surface of recess, and the tip that is close to the bottom surface of recess of a plurality of first electrically conductive pieces meets with a plurality of first pads respectively, and the part height h of the perpendicular direction of circuit board that lies in of a plurality of first electrically conductive pieces between first surface and the first pad satisfies: h < (0.21X l nd +0.36) mm. The circuit board assembly provided by the embodiment of the application is used for realizing signal control, data processing and storage.

Description

A circuit board assembly, an electronic device, and a processing method for the circuit board assembly

technical field

The present application relates to the technical field of electronic devices, and in particular, to a circuit board assembly, an electronic device and a method for processing the circuit board assembly.

Background technique

At present, the design of electronic devices such as folding screen mobile phones, phablets, and tablet computers pays more and more attention to the overall thinning. In these electronic devices, the thickness of circuit board components is one of the main factors limiting the thickness of the whole machine.

In the prior art, a circuit board assembly includes a printed circuit board and electronic components disposed on the printed circuit board. With the gradual enrichment of functions of electronic devices and the gradual improvement of performance, the number of electronic components that need to be set on printed circuit boards is increasing. In order to increase the number of electronic components integrated on the printed circuit board without increasing the area of the printed circuit board, package on package (POP) technology can be used to package at least two electronic components on top of each other. In the same area on the printed circuit board, however, this greatly increases the thickness of the circuit board assembly. On this basis, how to reduce the thickness of circuit board components to achieve thin design of electronic equipment is an important research direction for manufacturers.

SUMMARY OF THE INVENTION

Embodiments of the present application provide a circuit board assembly, an electronic device, and a method for processing the circuit board assembly, which can reduce the thickness of the circuit board assembly, so as to realize a thin design of the electronic device.

To achieve the above object, the embodiments of the present application adopt the following technical solutions:

In a first aspect, some embodiments of the present application provide a circuit board assembly, the circuit board assembly includes a circuit board and a first electronic component; the surface of the circuit board is provided with grooves, and the bottom surface of the grooves is provided with a plurality of first electronic components. The pad; the first electronic component has a first surface, the first surface is opposite to the bottom surface of the groove, the first surface array is provided with a plurality of first conductive parts, the plurality of first conductive parts are toward the bottom surface of the groove close to the groove. The direction is protruding, and the ends of the plurality of first conductive members close to the bottom surface of the groove are respectively connected to the plurality of first pads, and the plurality of first conductive members are located between the first surface and the first pads. The height h of the part in the direction perpendicular to the circuit board satisfies: h<(0.21×1nd+0.36) mm; wherein, d is the array pitch of the plurality of first conductive members on the first surface.

In the circuit board assembly provided by the embodiment of the present application, since the surface of the circuit board is provided with grooves, the bottom surface of the grooves is provided with a plurality of first pads in an array, and the first electronic component is connected to the circuit board through a plurality of first conductive members. A plurality of first pads are connected. Therefore, at least the first conductive member is sunk into the groove, and on the premise that the height of the first conductive member remains unchanged, the height of the first electronic component protruding from the surface of the circuit board can be reduced, and the thickness of the circuit board assembly can be reduced. Conducive to thin design of electronic equipment. At the same time, since the height h of the portion of the plurality of first conductive members located between the first surface and the first pad in the direction perpendicular to the circuit board satisfies: h<0.21×lnd+0.36, unit: mm, the h It is smaller than the height h ₀ of the soldering area when soldering by the solder paste printing process in the prior art (h ₀ ≥0.21×lnd ₀ +0.36), wherein, for the same electronic component, d=d ₀ . Therefore, the thickness of the circuit board assembly can be further reduced.

In a possible implementation manner of the first aspect, the first electronic component is a wafer-level package structure, and the mass ratio of tin in the first conductive member is greater than or equal to 95.5% and less than 95.71%. That is, the range of the mass ratio of Sn in the first conductive member is [95.5%, 95.71%). Since the pins of the wafer-level package structure are usually SAC405 solder balls, the mass ratio of Sn in the SAC405 solder balls is 95.5%. Therefore, the range of the mass ratio of Sn in the first conductive member is [95.5%, 95.71%), it can be determined that the first electronic component is directly connected to the first pad through its own pins, and is not in the first electronic component. Solder paste is arranged between the pins of the device and the first pads, so the parts of the plurality of first conductive members located between the first surface and the first pads have a small height in the direction perpendicular to the circuit board, which can The height of the first electronic component protruding from the surface of the circuit board is further reduced, and the thickness of the circuit board assembly is reduced, which is beneficial to the thin design of the electronic device.

In a possible implementation manner of the first aspect, the first electronic component is a fan-in wafer-level chip-scale package structure or a fan-out wafer-level chip-scale package structure.

In a possible implementation manner of the first aspect, the first electronic component is a non-wafer-level package structure, and the mass ratio of tin in the first conductive member is greater than 97.89% and less than or equal to 98.25%. That is, the mass ratio of Sn in the first conductive member is (97.89%, 98.25%). Since the pins of non-wafer-level packaging structures are usually LF35 solder balls, the mass ratio of Sn in the LF35 solder balls At the same time, since the solder paste printing process is used in the prior art to solder the LF35 solder balls to the circuit board, the mass ratio of Sn in the soldered portion is usually 97.89%, so if the quality of Sn in the first conductive member The range of the proportion is (97.89%, 98.25%], it can be determined that the first electronic component is directly connected to the first pad through its own pins, and the pins of the first electronic component are not connected to the first pad. Solder paste is arranged between the first conductive parts, so the height h of the parts between the first surface and the first pads of the plurality of first conductive parts in the direction perpendicular to the circuit board is small, which can further reduce the size of the first electronic components The height of the protruding circuit board surface reduces the thickness of the circuit board assembly, which is beneficial to the thin design of electronic equipment.

In a possible implementation manner of the first aspect, the first electronic component is a flip-chip chip scale package structure, a flip-chip ball grid array package structure, or a wire-bond ball grid array package structure.

In a possible implementation manner of the first aspect, the circuit board includes a multi-layer wiring structure formed by alternating and stacking metal layers and insulating dielectric layers in sequence; the groove penetrates at least one metal layer and at least one metal layer of the multi-layer wiring structure. An insulating medium layer is provided, and a plurality of first pads are located in a metal layer of the multi-layer wiring structure. In this way, the plurality of first pads are formed by one metal layer of the multi-layer wiring structure, and there is no need to provide additional pads, so the structural complexity and processing difficulty of the circuit board assembly can be reduced.

In a possible implementation manner of the first aspect, the circuit board further includes a solder resist layer disposed on the surface of the multilayer wiring structure, and the groove also penetrates the solder resist layer.

In a possible implementation manner of the first aspect, the groove penetrates one metal layer and one insulating medium layer of the multilayer wiring structure.

In a possible implementation manner of the first aspect, the groove penetrates two metal layers and two insulating dielectric layers of the multilayer wiring structure.

In a possible implementation manner of the first aspect, the first electronic component further has a second surface opposite to the first surface, and the second surface array is provided with a plurality of second pads; the circuit board assembly further includes a second surface. Two electronic components, the second electronic component is located on the side of the second surface away from the first surface, the second electronic component has a third surface, the third surface is opposite to the second surface, and the third surface The array is provided with a plurality of second conductive parts, the plurality of second conductive parts protrude toward the direction close to the second surface, and the ends of the plurality of second conductive parts close to the second surface are respectively in contact with the plurality of second pads catch. In this way, two electronic components (including the first electronic component and the second electronic component) are stacked on the same area of the circuit board, so that the circuit board can be Carry more electronic components.

In a possible implementation manner of the first aspect, the first electronic component is a processor chip, and the second electronic component is a memory chip.

In a possible implementation manner of the first aspect, the first electronic component is AP, and the second electronic component is DDR.

In a possible implementation manner of the first aspect, a height h ₂ of a portion of the plurality of second conductive members located between the third surface and the second pad in a direction perpendicular to the circuit board satisfies: h ₂ < 0.21×lnd ₂ +0.36, unit: mm. Wherein, d ₂ is the array pitch of the plurality of second conductive members on the third surface. The h ₂ is smaller than the height h ₀ of the soldering area when soldering by the solder paste printing process in the prior art (h ₀ ≥0.21×1nd ₀ +0.36), wherein, for the same electronic component, d ₂ =d ₀ . Therefore, the height of the stacked structure composed of the first electronic component and the second electronic component protruding from the circuit board can be reduced to a certain extent, and the thickness of the circuit board assembly can be reduced.

In a possible implementation manner of the first aspect, the surface array of the circuit board is provided with a plurality of third pads, and the plurality of third pads and the groove are located on the same surface of the circuit board; the circuit board assembly further includes a third pad. Three electronic components, the third electronic component and the first electronic component are located on the same side of the circuit board; the third electronic component has a fourth surface, the fourth surface faces the circuit board, and the fourth surface array is provided with multiple a plurality of third conductive members, the plurality of third conductive members protrude toward the direction close to the circuit board, and the ends of the plurality of third conductive members close to the circuit board are respectively connected to the plurality of third pads, and the plurality of third conductive members are respectively connected to the plurality of third pads. The height h1 of the part between the fourth surface and the third pad of the three conductors in the direction perpendicular to the circuit board satisfies: h1≥(0.21×lnd1+0.36)mm; wherein, d1 is a plurality of third conductors The array pitch of the pieces on the fourth surface. In this way, the third electronic component is welded on the circuit board by using the solder paste printing process, and the solder paste printing process has high welding efficiency, and can take into account the thickness of the circuit board assembly and the processing efficiency at the same time.

In a second aspect, some embodiments of the present application provide an electronic device, the electronic device includes a housing, a functional device, and the circuit board assembly described in any of the above technical solutions; the functional device is arranged in the housing; the circuit board assembly is arranged in the housing inside the body, and the circuit board assembly is electrically connected with the functional device.

Since the electronic device provided in the embodiment of the present application includes the circuit board assembly described in any of the above technical solutions, the two can solve the same technical problem and achieve the same technical effect.

In a third aspect, some embodiments of the present application provide a method for processing a circuit board assembly, wherein the circuit board assembly includes a circuit board and a first electronic component; a surface of the circuit board is provided with grooves, and a bottom surface of the grooves is arranged in an array. There are a plurality of first pads; the first electronic component has a first surface, and the first surface array is provided with a plurality of first pins, and the processing method of the circuit board assembly includes: arranging auxiliary aids on the surfaces of the plurality of first pins. flux; the plurality of first pins are respectively bonded to the plurality of first pads by the flux; the plurality of first pins are heated and melted, and the flux is volatilized, so that the plurality of first pins and the A plurality of first pads are connected to form a whole, and each first lead and the flux remaining on the first lead form a first conductive member.

In the processing method of the circuit board assembly provided by the embodiment of the present application, since the plurality of first pins of the first electronic component are respectively adhered to the plurality of first pads by the flux, and the plurality of first pins are heated and melted When a lead is used, the flux is volatilized. Therefore, the conductive structure between the first electronic component and the plurality of first pads (that is, the part of the first conductive member located between the first surface and the first pads) ) is smaller in size, which can reduce the height of the first electronic component protruding from the circuit board, reduce the thickness of the circuit board assembly, and is beneficial to the thin design of the electronic device. At the same time, in the processing method of the circuit board assembly provided in the embodiment of the present application, no solder paste is printed or sprayed on the first pad on the bottom surface of the groove, so there is no need to set a stepped stencil for solder paste printing, and no need to introduce precision Higher tin spray equipment, so it will not greatly increase the processing cost of the circuit board assembly.

In a possible implementation manner of the third aspect, the surface array of the circuit board is provided with a plurality of third pads, and the plurality of third pads and the groove are located on the same surface of the circuit board; the circuit board assembly further includes a third pad. Three electronic components, the third electronic component has a fourth surface, and the fourth surface array is provided with a plurality of second pins; the processing method of the circuit board assembly further includes: disposing solder paste on the plurality of third pads ; Adhering a plurality of second pins to a plurality of third pads respectively through solder paste; heating and melting the solder paste on a plurality of second pins and a plurality of third pads, so as to make the plurality of second pins The feet are respectively fused with the solder paste on the plurality of third pads to form a whole, and the structure formed after each second pin is fused with the solder paste on the corresponding third pad is a third conductive member. Since the plurality of third pads are arranged on the surface of the circuit board, the solder paste printing process can be used to realize the arrangement of the solder paste on the plurality of third pads, so as to improve the processing efficiency of the circuit board assembly.

In a possible implementation manner of the third aspect, disposing solder paste on the plurality of third pads includes: using a solder paste printing process to dispose solder paste on the plurality of third pads. Due to the high efficiency of the solder paste printing process, the processing efficiency of the circuit board assembly can be improved.

Description of drawings

1 is a perspective view of an electronic device provided by some embodiments of the present application;

Fig. 2 is an exploded view of the electronic device shown in Fig. 1;

3a is a perspective view of a circuit board assembly provided by some embodiments of the present application;

Fig. 3b is a schematic cross-sectional structure diagram of the circuit board assembly shown in Fig. 3a;

FIG. 4 is a schematic cross-sectional structure diagram of a circuit board assembly provided by further embodiments of the present application;

FIG. 5 is a schematic cross-sectional structure diagram of the circuit board in the circuit board assembly shown in FIG. 4;

FIG. 6 is a top view of the circuit board shown in FIG. 5;

FIG. 7 is another schematic cross-sectional structure diagram of the circuit board in the circuit board assembly shown in FIG. 4;

Fig. 8 is a partial enlarged view of Fig. 4;

Fig. 9 is a partial enlarged view of region I in Fig. 8;

10 is a schematic structural diagram of a circuit board assembly provided by further embodiments of the present application;

FIG. 11 is a schematic structural diagram of a circuit board assembly provided by further embodiments of the present application;

12 is a schematic structural diagram of a circuit board assembly provided by further embodiments of the present application;

FIG. 13 is a flowchart of a processing method of a circuit board assembly provided by some embodiments of the present application.

Detailed ways

In the embodiments of the present application, the terms "first", "second", "third" and "fourth" are only used for description purposes, and cannot be understood as indicating or implying relative importance or implying the indicated Number of technical features. Thus, a feature defined as "first", "second", "third", "fourth" may expressly or implicitly include one or more of that feature.

In the embodiments of the present application, the terms "comprising", "comprising" or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements, but also Include other elements not expressly listed, or which are inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

The present application provides an electronic device, which is a type of electronic device that pursues thinning. Specifically, the electronic device can be a folding screen mobile phone, a tablet phone, a tablet computer, a tablet navigator, and the like.

Please refer to FIG. 1 and FIG. 2 , FIG. 1 is a perspective view of an electronic device provided by some embodiments of the present application, and FIG. 2 is an exploded view of the electronic device shown in FIG. 1 . In this embodiment, the electronic device is a tablet phone, and the smaller the thickness of the tablet phone, the better the hand feeling. Specifically, the electronic device includes a housing 10 , a functional device 20 and a circuit board assembly 30 .

The casing 10 is a casing structure formed by splicing a front cover plate (not shown in the figure), a frame 11 and a rear cover 12, and is used to protect the functional device 20 and the circuit board assembly 30 in the electronic device.

The functional device 20 is arranged in the casing 10, and the functional device 20 is used to realize one or more functions of the electronic device. The functional device 20 includes but is not limited to a camera module, a display screen, a speaker, a receiver, an antenna, a microphone, a universal serial bus (USB) interface, a subscriber identification module (SIM) card interface, buttons, etc. .

The number of functional devices 20 in the electronic device may be one or multiple. When the number of functional devices 20 in the electronic device is one, the functional device 20 may be one of a camera module, a display screen, a speaker, a receiver, an antenna, a microphone, a USB interface, a SIM card interface, and a button. When the number of functional devices 20 in the electronic device is multiple, the multiple functional devices 20 may be a camera module, a display screen, a speaker, a receiver, an antenna, a microphone, a USB interface, a SIM card interface, and a plurality of buttons, respectively. indivual. In the embodiments shown in FIG. 1 and FIG. 2 , the number of functional devices 20 is three, and the three functional devices 20 are all camera modules.

The circuit board assembly 30 is disposed in the housing 10 , and the circuit board assembly 30 is electrically connected to the functional device 20 . The circuit board assembly 30 is used to perform operations such as signal control, data signal processing, and data signal storage to the functional device 20 . The circuit board assembly 30 may be a main board of an electronic device, or other circuit boards of the electronic device, such as a circuit board used to carry a speaker and a USB interface in a phablet phone, which is not specifically limited herein. The following description will be given by taking the circuit board assembly 30 as the main board of the electronic device as an example, which should not be regarded as a special limitation of the present application.

Please refer to FIGS. 3a and 3b. FIG. 3a is a perspective view of a circuit board assembly 30 provided by some embodiments of the present application, and FIG. 3b is a schematic cross-sectional structure diagram of the circuit board assembly 30 shown in FIG. 3a. In this embodiment, the circuit board assembly 30 is the circuit board assembly 30 in the electronic device shown in FIG. 2 . Specifically, the circuit board assembly 30 includes a circuit board 31 and a plurality of electronic components A disposed on the circuit board 31 .

Electronic components A include but are not limited to resistors, capacitors, inductors, potentiometers, tubes, heat sinks, electromechanical components, connectors, semiconductor discrete devices, electroacoustic devices, laser devices, electronic display devices, optoelectronic devices, sensors, power supplies, Switches, micro motors, electronic transformers, relays, printed circuit boards, integrated circuit devices, etc. It should be noted that the embodiment of the present application does not limit the number and arrangement of electronic components A on the circuit board 31 , and FIG. 3 a and FIG. 3 b only show one type of electronic components A on the circuit board 31 Example of setting quantity and arrangement.

The circuit board 31 is used to carry the plurality of electronic components A, and realize electrical connection between the plurality of electronic components A. The circuit board 31 includes, but is not limited to, a printed circuit board (PCB) and a flexible printed circuit (FPC) board. In the embodiment shown in Figures 3a and 3b, the circuit board 31 is a PCB board. The shape of the circuit board 31 includes, but is not limited to, a rectangle, a square, a polygon, a circle, etc. In the embodiments shown in FIGS. 3 a and 3 b , the shape of the circuit board 31 is approximately a rectangle.

In the prior art, in order to reduce the volume of the circuit board assembly 30, a plurality of pin arrays of the electronic component A are usually arranged on one surface of the electronic component, and surface mounted technology (SMT) is used. The pins on this surface are mounted and soldered on the pads of the circuit board 31 . In this way, the occupied area of the electronic component A on the circuit board 31 is small, and the height of the welding part between the electronic component A and the circuit board 31 in the direction perpendicular to the circuit board 31 is small, which can reduce the size of the circuit board Volume of assembly 30 .

On the basis of the above embodiment, in order to improve the installation efficiency of the plurality of electronic components A on the circuit board 31, solder paste is usually printed on all the pads on one surface of the circuit board 31 at one time by using a solder paste printing process, and then The pins of a plurality of electronic components A are respectively mounted on the solder paste of the pad, and the pins of the plurality of electronic components A and the solder paste are melted and solidified into one by a reflow process, which can improve the performance of the solder paste. The mounting efficiency of each electronic component A on the circuit board 31 .

In the above embodiment, the principle of the solder paste printing process is to print the solder paste on the pads of the circuit board 31 through the holes on the flat steel mesh. Since the solder paste is printed on the pads of the circuit board 31, the soldering area between the electronic component A and the circuit board 31 is the superposition of the pins and the solder paste, so the height _h0 of the soldering area is relatively large, usually _h0 ≥0.21×lnd ₀ +0.36, unit: mm, d ₀ represents the array pitch of the pins of electronic component A. Among them, when the pins of electronic component A are uniformly arrayed, the array spacing of the pins of electronic component A refers to the distance between any two adjacent pins; when the pins of electronic component A are non-uniformly arrayed , the array pitch of the pins of electronic component A refers to the distance between the two closest pins. In this way, the height of the electronic component A protruding from the surface of the circuit board 31 is relatively large, and the thickness of the circuit board assembly 30 is relatively large, which is not conducive to the thin design of the electronic device. In order to reduce the thickness of the circuit board assembly 30, a groove can be provided on the surface of the circuit board 31, and the pads can be set on the bottom surface of the groove, and then the electronic component A is sunk in the groove, and the above SMT is used to Electronic component A is soldered to the pad on the bottom surface of the groove. However, since the pads on the bottom of the groove are not coplanar with the pads on the surface of the circuit board, a flat stencil cannot be used to print solder paste on the circuit board, but a special step stencil needs to be customized for solder paste printing, or the introduction of The high-precision tin-spraying equipment sprays the solder paste onto the pads on the bottom of the groove, and the pads on the surface of the circuit board use the traditional solder paste printing process to print the solder paste. Whether it is customizing a special stepped steel mesh or introducing a high-precision tin spraying equipment, it is inevitable to increase the processing procedure or processing cost of the circuit board assembly respectively.

In order to reduce the thickness of the circuit board assembly without greatly increasing the processing cost of the circuit board assembly, please refer to FIG. 4 , which is a schematic cross-sectional structure diagram of the circuit board assembly 30 according to further embodiments of the present application. In this embodiment, the circuit board assembly 30 includes a circuit board 31 and a first electronic component 32 .

The circuit board 31 includes, but is not limited to, a PCB board and an FPC board. In some embodiments, the circuit board 31 is a PCB board. Specifically, please refer to FIG. 5 and FIG. 6 . FIG. 5 is a schematic cross-sectional structure diagram of the circuit board 31 in the circuit board assembly 30 shown in FIG. 4 , and FIG. 6 is FIG. 5 . The top view of the circuit board 31 is shown, and the circuit board 31 includes a multi-layer wiring structure formed by alternately stacking metal layers 31a and insulating dielectric layers 31b in sequence. In some embodiments, the circuit board 31 further includes a solder resist layer 31c disposed on the surface of the multilayer wiring structure.

The surface of the circuit board 31 is provided with grooves 311 , and the bottom surface of the grooves 311 is arrayed with a plurality of first pads 312 , and the plurality of first pads 312 are used for soldering the first electronic components 32 .

In some embodiments, please continue to refer to FIG. 5 and FIG. 6 , the circuit board 31 is a PCB board, and the groove 311 penetrates at least one metal layer 31 a and at least one insulating medium layer 31 b of the multilayer wiring structure. Specifically, the groove 311 may penetrate one metal layer 31a and one insulating dielectric layer 31b of the multi-layer wiring structure, or may penetrate two metal layers 31a and two insulating dielectric layers 31b of the multi-layer wiring structure, and may also penetrate through The three-layer metal layer 31a and the three-layer insulating dielectric layer 31b of the multilayer wiring structure can be comprehensively determined according to the thickness of the circuit board 31 and the number of layers of the metal layer 31a and the insulating dielectric layer 31b in the circuit board 31, as long as the groove The number of layers of the metal layer 31 a and the insulating medium layer 31 b through which the 311 penetrates may not affect the structural strength of the circuit board 31 , which is not specifically limited here. In the embodiment shown in FIG. 5 and FIG. 6 , the groove 311 penetrates one metal layer 31a and one insulating dielectric layer 31b of the multilayer wiring structure. In still other embodiments, please refer to FIG. 7 . FIG. 7 is another schematic cross-sectional structure diagram of the circuit board 31 in the circuit board assembly 30 shown in FIG. 4 . In this embodiment, the groove 311 penetrates the multilayer wiring structure. There are two metal layers 31a and two insulating dielectric layers 31b.

It should be noted that, when the circuit board 31 further includes a solder resist layer 31c disposed on the surface of the multilayer wiring structure, the groove 311 also penetrates the solder resist layer 31c.

Further, a plurality of first pads 312 are located in one metal layer 31a of the multilayer wiring structure. In this way, the plurality of first pads 312 are formed by one metal layer 31a of the multi-layer wiring structure, and no additional pads need to be provided, so the structural complexity and processing difficulty of the circuit board assembly 30 can be reduced.

In some embodiments, please refer to FIG. 5 or FIG. 7 , the bottom surface of the groove 311 is further provided with a solder resist layer 31 c , and the solder resist layer 31 c does not cover the plurality of first pads 312 .

The first electronic components 32 include, but are not limited to, resistors, capacitors, inductors, potentiometers, electronic tubes, heat sinks, electromechanical components, connectors, semiconductor discrete devices, electroacoustic devices, laser devices, electronic display devices, optoelectronic devices, sensors, Power supplies, switches, micro motors, electronic transformers, relays, printed circuit boards, integrated circuit devices, etc.

In some embodiments, the first electronic component 32 is an integrated circuit (integrated circuit, IC). Specifically, the first electronic component 32 includes, but is not limited to, an application processor (AP), a double-rate synchronous dynamic Random access memory (double data rate, DDR) and universal flash storage (universal flashstorage, UFS). On this basis, the packaging method of the first electronic component 32 may be a wafer level package (wafer level package, WLP) or a non-wafer level package. Among them, the wafer level package includes but is not limited to fan-in wafer level chip scale package (Fan-in WLCSP) and fan-out wafer level package (fan-out wafer level package) chip scale package, Fan-out WLCSP). Non-wafer-level packaging includes, but is not limited to, flip chip-chip scale package (FC-CSP), flip chip-ball grid array (FCBGA) package, and lead A wire bonding-ball grid array (WBBGA) package is not specifically limited here.

Please refer to FIG. 8 and FIG. 9 , FIG. 8 is a partial enlarged view of FIG. 4 , and FIG. 9 is a partial enlarged view of area I in FIG. 8 . In this embodiment, the circuit board 31 is the circuit board 31 shown in FIG. 5 . It can be understood that the circuit board 31 can also be the circuit board 31 shown in FIG. 7 , which is not specifically limited here. The first electronic component 32 has a first surface 100 , and the first surface 100 is opposite to the bottom surface of the groove 311 . It should be noted that the fact that the first surface 100 is opposite to the bottom surface of the groove 311 means that the first surface 100 faces the bottom surface of the groove 311 , and the orthographic projection of the first surface 100 on the bottom surface of the groove 311 and the groove 311 The undersides overlap.

The array of the first surface 100 is provided with a plurality of first conductive members 33 , and the plurality of first conductive members 33 are used to lead out the internal circuit of the first electronic component 32 .

The plurality of first conductive members 33 protrude toward the bottom surface of the groove 311 , and the ends of the plurality of first conductive members 33 adjacent to the bottom surface of the groove 311 are respectively connected to the plurality of first pads 312 . Among them, "joint" means to join and form a whole.

It should be noted that the plurality of first conductive members 33 are respectively connected to the plurality of first pads 312, including one or more combinations of the following three implementations; specifically, the three implementations include: a The first conductive member 33 is correspondingly connected to a first pad 312 , a plurality of first conductive members 33 are correspondingly connected to a first pad 312 , and a first conductive member 33 is correspondingly connected to a plurality of first pads 312 . catch. FIG. 8 only shows an example in which the number of the plurality of first conductive members 33 is equal to the number of the plurality of first pads 312 , and the plurality of first conductive members 33 are connected to the plurality of first pads 312 in one-to-one correspondence , which should not be considered as a special limitation to this application.

The height h of the portion of the plurality of first conductive members 33 located between the first surface 100 and the first pad 312 in the direction perpendicular to the circuit board 31 (that is, the direction Z) satisfies: h<0.21×lnd+ 0.36, unit: mm. d is the array pitch of the plurality of first conductive members 33 on the first surface 100 . Wherein, when the plurality of first conductive members 33 are uniformly arrayed on the first surface 100, the array spacing of the plurality of first conductive members 33 on the first surface 100 refers to: two adjacent first conductive members 33 are on the first surface 100. The distance between the centers of the occupied areas on the surface 100 . When the plurality of first conductive members 33 are non-uniformly arrayed on the first surface 100, the array spacing of the plurality of first conductive members 33 on the first surface 100 refers to: among the plurality of first conductive members 33, the closest distance The distance between the centers of the occupied areas of the two first conductive members 300 on the first surface 100 .

In the circuit board assembly 30 provided in the embodiment of the present application, since the surface of the circuit board 31 is provided with the grooves 311, the bottom surface of the grooves 311 is provided with a plurality of first pads 312 in an array, and the first electronic component 32 passes through the plurality of first pads 312. The first conductive member 33 is in contact with the plurality of first pads 312 . Therefore, at least the first conductive member 33 is sunk into the groove 311 and disposed. On the premise that the height of the first conductive member 33 remains unchanged, the height of the first electronic component 32 protruding from the surface of the circuit board 31 can be reduced, reducing the circuit The thickness of the board assembly 30 is beneficial to the thin design of the electronic device. At the same time, since the height h of the portion of the plurality of first conductive members 33 located between the first surface 100 and the first pad 312 in the direction perpendicular to the circuit board 31 satisfies: h<0.21×lnd+0.36, unit: mm, the h is smaller than the height h ₀ of the soldering area when soldering using the solder paste printing process in the prior art (h ₀ ≥0.21×lnd ₀ +0.36), wherein, for the same electronic component, d=d ₀ . Therefore, the thickness of the circuit board assembly 30 can be further reduced, and at the same time, it can be determined that the first electronic component 32 is not printed or sprayed with solder paste on the first pad 312 during the welding process with the circuit board 31, so there is no need to provide a stepped steel mesh For solder paste printing, there is no need to introduce high-precision tin spraying equipment, so the processing cost of circuit board components can not be greatly increased.

In some embodiments, the first electronic component 32 is a wafer level package structure. In some embodiments, the first electronic component 32 is a Fan-in WLCSP structure or a Fan-out WLCSP structure. The mass ratio of tin (chemical symbol: Sn) in the first conductive member 33 is greater than or equal to 95.5% and less than 95.71%. That is, the range of the mass ratio of Sn in the first conductive member 33 is [95.5%, 95.71%).

Since the pins of the wafer-level package structure are usually SAC405 solder balls, the mass ratio of Sn in the SAC405 solder balls is 95.5%. Therefore, the range of the mass ratio of Sn in the first conductive member 33 is [95.5%, 95.71%), it can be determined that the first electronic component 32 is directly connected to the first pad 312 through its own pins, and is not in the first electronic component 32. Solder paste is disposed between the lead of an electronic component 32 and the first pad 312 , so the portion of the plurality of first conductive members 33 between the first surface 100 and the first pad 312 is perpendicular to the circuit board 31 The height h in the direction is smaller, which can further reduce the height of the first electronic component 32 protruding from the surface of the circuit board 31 , and reduce the thickness of the circuit board assembly 30 , which is beneficial to the thin design of electronic equipment.

In other embodiments, the first electronic component 32 is a non-wafer-level package structure. In some embodiments, the first electronic component 32 is an FC-CSP structure, an FCBGA package structure or a WBBGA package structure. The mass ratio of Sn in the first conductive member 33 is greater than 97.89% and less than or equal to 98.25%. That is, the range of the mass ratio of Sn in the first conductive member 33 is (97.89%, 98.25%).

Since the pins of the non-wafer-level package structure are usually LF35 solder balls, the mass ratio of Sn in the LF35 solder balls is 98.25%. At the same time, since the solder paste printing process is used in the prior art to solder the LF35 solder balls to the circuit board, the mass ratio of Sn in the soldered portion is usually 97.89%. Therefore, if the mass ratio of Sn in the first conductive member 33 is If the interval is (97.89%, 98.25%), it can be determined that the first electronic component 32 is directly connected to the first pad 312 through its own pins, and is not between the pins of the first electronic component 32 and the first pad Solder paste is arranged between 312, so the height h of the portion of the plurality of first conductive members 33 located between the first surface 100 and the first pad 312 in the direction perpendicular to the circuit board 31 is relatively small, which can be further reduced The height of the first electronic component 32 protruding from the surface of the circuit board 31 reduces the thickness of the circuit board assembly 30 and is beneficial to the thin design of the electronic device.

In order to enable the circuit board 31 to carry more electronic components without increasing the area of the circuit board 31 , in some embodiments, please refer to FIG. 10 , which is a circuit provided by still other embodiments of the application A schematic diagram of the structure of the board assembly 30 . In this embodiment, in addition to the first surface 100 , the first electronic component 32 also has a second surface 200 facing away from the first surface 100 , and the second surface 200 is provided with a plurality of second pads 313 in an array. . In addition to the circuit board 31 and the first electronic component 32 , the circuit board assembly 30 also includes a second electronic component 34 . The second electronic component 34 is located on the side of the second surface 200 away from the first surface 100 . The second electronic component 34 has a third surface 300 opposite to the second surface 200 . The array of the third surface 300 is provided with a plurality of second conductive members 35 , and the plurality of second conductive members 35 are used to lead out the circuits of the second electronic components 34 . The plurality of second conductive members 35 protrude in a direction close to the second surface 200 , and ends of the plurality of second conductive members 35 adjacent to the second surface 200 are respectively connected to the plurality of second pads 313 . In this way, two electronic components (including the first electronic component 32 and the second electronic component 34 ) are stacked and arranged in the same area on the circuit board 31 , so that the area of the circuit board 31 is not increased. This enables the circuit board 31 to carry more electronic components.

Among them, it should be noted that the plurality of second conductive members 35 are respectively connected to the plurality of second pads 313, including one or more combinations of the following three implementations; specifically, the three implementations include : One second conductive member 35 is correspondingly connected to one second pad 313 , a plurality of second conductive members 35 is correspondingly connected to one second pad 313 , and one second conductive member 35 is connected to a plurality of second pads 313 Correspondingly connected. FIG. 10 only shows an example in which the number of the plurality of second conductive members 35 is equal to the number of the plurality of second pads 313 , and the plurality of second conductive members 35 are connected to the plurality of second pads 313 in one-to-one correspondence , which should not be considered as a special limitation to this application.

In some embodiments, the first electronic component 32 is a processor chip, and the second electronic component 34 is a memory chip. Specifically, the first electronic component 32 includes but is not limited to AP, and the second electronic component 34 includes but is not limited to DDR.

In some embodiments, the height h ₂ of the portion of the plurality of second conductive members 35 located between the third surface 300 and the second pad 313 in the direction perpendicular to the circuit board 31 satisfies: h ₂ <0.21×1nd ₂ +0.36, unit: mm. Wherein, d ₂ is the array pitch of the plurality of second conductive members 35 on the third surface 300 . The h ₂ is smaller than the height h ₀ of the soldering area when soldering by the solder paste printing process in the prior art (h ₀ ≥0.21×1nd ₀ +0.36), wherein, for the same electronic component, d ₂ =d ₀ . Therefore, the height of the laminated structure formed by the first electronic component 32 and the second electronic component 34 protruding from the circuit board 31 can be reduced to a certain extent, and the thickness of the circuit board assembly 30 can be reduced.

In addition to the grooves 311 provided on the surface of the circuit board 31 to reduce the height of the first electronic component 32 protruding from the circuit board 31, other pads are usually provided to connect other electronic components. Since the number and the number of electronic components to be connected are relatively large, a solder paste printing process can be used to ensure the processing efficiency of the circuit board assembly 30 .

In some embodiments, please refer to FIG. 11 , which is a schematic structural diagram of a circuit board assembly 30 provided in still other embodiments of the present application. In this embodiment, the surface array of the circuit board 31 is provided with a plurality of third pads 314 , and in some embodiments, the plurality of third pads 314 are formed by one metal layer of the multilayer wiring structure. The plurality of third pads 314 and the grooves 311 are located on the same surface of the circuit board 31 . The circuit board assembly 30 also includes a third electronic component 36 located on the same side of the circuit board 31 as the first electronic component 32 . The third electronic component 36 has a fourth surface 400 facing the circuit board 31 . The fourth surface 400 is arrayed with a plurality of third conductive members 37, the plurality of third conductive members 37 protrude toward the direction close to the circuit board 31, and the ends of the plurality of third conductive members 37 adjacent to the circuit board 31 are respectively Connected to a plurality of third pads 314 .

Among them, it should be noted that the plurality of third conductive members 37 are respectively connected to the plurality of third pads 314, including one or more combinations of the following three implementations; specifically, the three implementations include : One third conductive member 37 is correspondingly connected to one third pad 314 , a plurality of third conductive members 37 are correspondingly connected to one third pad 314 , and one third conductive member 37 is connected to a plurality of third pads 314 Correspondingly connected. FIG. 11 only shows an example in which the number of the plurality of third conductive members 37 is equal to the number of the plurality of third pads 314 , and the plurality of third conductive members 37 are connected to the plurality of third pads 314 in one-to-one correspondence , which should not be considered as a special limitation to this application.

In addition, the height h1 of the portion of the plurality of third conductive members 37 located between the fourth surface 400 and the third pad 314 in the direction perpendicular to the circuit board 31 satisfies: h1≥(0.21×lnd1+0.36), unit : mm; wherein, d1 is the array pitch of the plurality of third conductive members 37 on the fourth surface 400 . In this way, the third electronic component 36 is soldered on the circuit board 31 using a solder paste printing process. The solder paste printing process has high welding efficiency and can take into account the thickness and processing efficiency of the circuit board assembly 30 at the same time.

The third electronic components 36 include but are not limited to card holders, resistors, capacitors, inductors, potentiometers, electronic tubes, heat sinks, electromechanical components, connectors, discrete semiconductor devices, electroacoustic devices, laser devices, electronic display devices, and optoelectronic devices , sensors, power supplies, switches, micro motors, electronic transformers, relays, printed circuit boards, integrated circuit devices, etc. In the embodiment shown in FIG. 11 , the third electronic component 36 is UFS.

The number of the third electronic components 36 provided on the circuit board 31 may be one or more, which is not specifically limited herein. FIG. 11 only shows an example in which the number of the third electronic components 36 arranged on the circuit board 31 is one, which should not be considered as a special limitation to the present application. In other embodiments, please refer to FIG. 12 , which is a schematic structural diagram of a circuit board assembly provided by still other embodiments of the present application. In this embodiment, the number of the third electronic components 36 is two, and the two third electronic components 36 are the UFS and the card holder respectively.

In some embodiments, please continue to refer to FIG. 12 , the circuit board 31 is further provided with a fourth electronic component 38 and a fifth electronic component 39 . The number of the fourth electronic component 38 and the fifth electronic component 39 may be one or a plurality of them, which is not specifically limited herein. In some embodiments, the fourth electronic component 38 is a connector, and the fourth electronic component 38 is used to electrically connect the radio frequency (RF) circuit board assembly 40 to the circuit board 31 . The fifth electronic components 39 include but are not limited to card holders, resistors, capacitors, inductors, potentiometers, electronic tubes, heat sinks, electromechanical components, connectors, discrete semiconductor devices, electroacoustic devices, laser devices, electronic display devices, and optoelectronic devices , sensors, power supplies, switches, micro motors, electronic transformers, relays, printed circuit boards, integrated circuit devices, etc. The fourth electronic component 38 and the third electronic component 36 are located on opposite sides of the circuit board 31 respectively, and the fifth electronic component 39 and the fourth electronic component 38 are located on the same side of the circuit board 31 . The fourth electronic component 38 and the fifth electronic component 39 are soldered on the circuit board 31 by a solder paste printing process.

The present application also provides a method for processing a circuit board assembly 30 , where the circuit board assembly 30 includes a circuit board 31 and a first electronic component 32 . The surface of the circuit board 31 is provided with grooves 311 , and the bottom surface of the grooves 311 is provided with a plurality of first pads 312 in an array. The first electronic component 32 has a first surface 100 . The array of the first surface 100 is provided with a plurality of first pins, and the plurality of first pins are used to lead out the circuits of the first electronic component 32 . Please refer to FIG. 13 . FIG. 13 is a flowchart of a processing method of the circuit board assembly 30 provided by some embodiments of the present application. In this embodiment, the processing method of the circuit board assembly 30 includes:

S100: Arrange flux on the surfaces of the plurality of first pins; wherein, the flux is usually a mixture of rosin as the main component, which is an auxiliary material to ensure the smooth progress of the welding process. The flux has a certain viscosity and is heated Volatile when reaching the preset temperature.

S200: Adhering the plurality of first pins to the plurality of first pads 312 respectively through flux;

S300 : Heating and melting the plurality of first pins, and volatilizing the flux, so that the plurality of first pins 321 are respectively connected with the plurality of first pads 312 to form a whole. Wherein, each first lead and the flux remaining on the first lead form a first conductive member 33 . In addition, a reflow soldering process may be used to heat and melt the plurality of first pins, and to volatilize the flux.

In the processing method of the circuit board assembly 30 provided by the embodiment of the present application, since the plurality of first pins of the first electronic component 32 are respectively adhered to the plurality of first pads 312 by flux, and are melted during heating When there are a plurality of first pins, the flux is volatilized. Therefore, the conductive structure between the first electronic component 32 and the plurality of first pads 312 (that is, the first conductive member 33 located on the first surface 100 and the first The part between the pads 312 ) has a small volume, which can reduce the height of the first electronic component 32 protruding from the circuit board 31 , and reduce the thickness of the circuit board assembly 30 , which is beneficial to the thin design of electronic equipment. At the same time, because in the processing method of the circuit board assembly 30 provided in the embodiment of the present application, no solder paste is printed or sprayed on the first pad 312 on the bottom surface of the groove 311, so it is not necessary to set a stepped steel mesh for solder paste printing, and also There is no need to introduce high-precision tin spraying equipment, so the processing cost of circuit board components will not be greatly increased.

In some embodiments, the surface array of the circuit board 31 is provided with a plurality of third pads 314 , and the plurality of third pads 314 and the grooves 311 are located on the same surface of the circuit board 31 . The circuit board assembly 30 further includes a third electronic component 36, the third electronic component 36 has a fourth surface 400, and the fourth surface 400 is arrayed with a plurality of second pins. The plurality of second pins are used to lead out the internal circuit of the third electronic component 36 . The processing method of the circuit board assembly 30 further includes: disposing solder paste on the plurality of third pads 314; bonding the plurality of second pins on the plurality of third pads 314 through the solder paste; heating and melting the plurality of The solder paste on the second pins and the plurality of third pads 314, so that the plurality of second pins and the solder paste on the plurality of third pads 314 are respectively fused into a whole, and each second pin is connected to The structure formed after the solder paste on the corresponding third pad 314 is fused is the third conductive member 37 .

Since the plurality of third pads 314 are disposed on the surface of the circuit board 31 , a solder paste printing process can be used to realize the arrangement of solder paste on the plurality of third pads 314 , so as to improve the processing efficiency of the circuit board assembly 30 .

Specifically, in the above-mentioned embodiment, disposing solder paste on the plurality of third pads 314 includes: using a solder paste printing process to dispose solder paste on the plurality of third pads 314 . Since the efficiency of the solder paste printing process is high, the processing efficiency of the circuit board assembly 30 can be improved.

In the description of this specification, the particular features, structures, materials or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: it can still be The technical solutions described in the foregoing embodiments are modified, or some technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions in the embodiments of the present application.

Claims (15)

1. A circuit board assembly (30) comprising a circuit board (31) and a first electronic component (32);

a groove (311) is formed in the surface of the circuit board (31), and a plurality of first bonding pads (312) are arranged on the bottom surface of the groove (311) in an array mode;

the first electronic component (32) has a first surface (100), the first surface (100) is opposite to the bottom surface of the groove (311), the first surface (100) is provided with a plurality of first conductive members (33) in an array, the plurality of first conductive members (33) protrude in a direction close to the bottom surface of the groove (311), ends of the plurality of first conductive members (33) close to the bottom surface of the groove (311) are respectively connected with the plurality of first pads (312), and the height h of a part, located between the first surface (100) and the first pads (312), of the plurality of first conductive members (33) in a direction perpendicular to the circuit board (31) satisfies: h < (0.21X lnd +0.36) mm; wherein d is an array pitch of the plurality of first conductive members (33) on the first surface (100).

2. The circuit board assembly (30) according to claim 1, wherein the first electronic component (32) is a wafer level package structure, and a mass ratio of tin in the first conductive member (33) is greater than or equal to 95.5% and less than 95.71%.

3. The circuit board assembly (30) of claim 2, wherein the first electronic component (32) is a fan-in wafer-level chip-scale package structure or a fan-out wafer-level chip-scale package structure.

4. The circuit board assembly (30) of claim 1, wherein the first electronic component (32) is an amorphous wafer level package, and a mass fraction of tin in the first conductive member (33) is greater than 97.89% and less than or equal to 98.25%.

5. A circuit board assembly (30) according to claim 4, wherein the first electronic component (32) is a flip-chip type chip scale package structure, a flip-chip type ball grid array package structure or a wire bond type ball grid array package structure.

6. A circuit board assembly (30) according to any of claims 1-5, wherein the circuit board (31) comprises a multilayer wiring structure of metal layers (31a) and dielectric layers (31b) alternately stacked in sequence;

the groove (311) penetrates through at least one metal layer (31a) and at least one insulating medium layer (31b) of the multilayer wiring structure, and the first pads (312) are located in the metal layer (31a) of the multilayer wiring structure.

7. The circuit board assembly (30) according to claim 6, wherein the recess (311) extends through a metal layer (31a) and an insulating dielectric layer (31b) of the multilayer wiring structure.

8. The circuit board assembly (30) according to claim 6, wherein the recess (311) extends through two metal layers (31a) and two dielectric layers (31b) of the multilayer wiring structure.

9. A circuit board assembly (30) according to any of claims 1-8, wherein the first electronic component (32) further has a second surface (200) opposite to the first surface (100), the second surface (200) being provided with an array of second pads (313);

the circuit board assembly (30) further comprises a second electronic component (34), the second electronic component (34) is located on one side, far away from the first surface (100), of the second surface (200), the second electronic component (34) is provided with a third surface (300), the third surface (300) is opposite to the second surface (200), the third surface (300) is provided with a plurality of second conductive pieces (35) in an array mode, the second conductive pieces (35) protrude towards the direction close to the second surface (200), and the end portions, close to the second surface (200), of the second conductive pieces (35) are respectively connected with the second pads (313).

10. The circuit board assembly (30) of claim 9, wherein the first electronic component (32) is a processor chip and the second electronic component (34) is a memory chip.

11. A circuit board assembly (30) according to any of claims 1-10, wherein the surface array of the circuit board (31) is provided with a plurality of third pads (314), the plurality of third pads (314) being located on the same surface of the circuit board (31) as the recess (311);

the circuit board assembly (30) further comprises a third electronic component (36), the third electronic component (36) and the first electronic component (32) being located on the same side of the circuit board (31);

the third electronic component (36) has a fourth surface (400), the fourth surface (400) faces the circuit board (31), the fourth surface (400) is provided with a plurality of third conductive members (37) in an array, the plurality of third conductive members (37) protrude in a direction approaching the circuit board (31), ends of the plurality of third conductive members (37) approaching the circuit board (31) are respectively connected with the plurality of third pads (314), and a height h1 of a portion of the plurality of third conductive members (37) between the fourth surface (400) and the third pads (314) in a direction perpendicular to the circuit board (31) satisfies: h1 is not less than (0.21 × l nd1+0.36) mm; wherein d1 is the array pitch of the plurality of third conductive members (37) on the fourth surface (400).

12. An electronic device, comprising:

a housing (10);

a functional device (20), the functional device (20) being disposed within the housing (10);

the circuit board assembly (30) of any of claims 1-11, the circuit board assembly (30) being disposed within the housing (10), and the circuit board assembly (30) being electrically connected to the functional device (20).

13. A method of manufacturing a circuit board assembly (30), wherein the circuit board assembly (30) comprises a circuit board (31) and a first electronic component (32); a groove (311) is formed in the surface of the circuit board (31), and a plurality of first welding pads (312) are arranged on the bottom surface of the groove (311) in an array mode; the first electronic component (32) is provided with a first surface (100), the first surface (100) is provided with a plurality of first pins in an array mode, and the processing method of the circuit board assembly (30) comprises the following steps:

arranging soldering flux on the surfaces of the first pins;

the first pins are respectively adhered to the first bonding pads (312) through the soldering flux;

and heating and melting the first pins, and volatilizing the soldering flux to enable the first pins (321) to be respectively connected with the first bonding pads (312) into a whole, wherein each first pin and the soldering flux left on the first pin form a first conductive member (33).

14. The method of manufacturing a circuit board assembly (30) according to claim 13, wherein the surface array of the circuit board (31) is provided with a plurality of third pads (314), and the plurality of third pads (314) and the grooves (311) are located on the same surface of the circuit board (31); the circuit board assembly (30) further comprises a third electronic component (36), the third electronic component (36) has a fourth surface (400), and the fourth surface (400) is provided with a plurality of second pins in an array; the processing method of the circuit board assembly (30) further comprises the following steps:

disposing solder paste on the plurality of third pads (314);

the plurality of second pins are respectively adhered to the plurality of third bonding pads (314) through the solder paste;

and heating and melting the plurality of second pins and the solder paste on the plurality of third bonding pads (314) so that the plurality of second pins and the solder paste on the plurality of third bonding pads (314) are respectively fused into a whole, and the structure formed by fusing each second pin and the solder paste on the corresponding third bonding pad (314) is a third conductive member (37).

15. The method of manufacturing a circuit board assembly (30) of claim 14, wherein disposing solder paste on the plurality of third pads (314) comprises:

solder paste is disposed on the plurality of third pads (314) using a solder paste printing process.

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