JP2005142524A5 - - Google Patents
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- Publication number
- JP2005142524A5 JP2005142524A5 JP2004136254A JP2004136254A JP2005142524A5 JP 2005142524 A5 JP2005142524 A5 JP 2005142524A5 JP 2004136254 A JP2004136254 A JP 2004136254A JP 2004136254 A JP2004136254 A JP 2004136254A JP 2005142524 A5 JP2005142524 A5 JP 2005142524A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0305236A FR2854493B1 (fr) | 2003-04-29 | 2003-04-29 | Traitement par brossage d'une plaquette semiconductrice avant collage |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005142524A JP2005142524A (ja) | 2005-06-02 |
| JP2005142524A5 true JP2005142524A5 (enExample) | 2006-05-18 |
| JP4549726B2 JP4549726B2 (ja) | 2010-09-22 |
Family
ID=32982322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004136254A Expired - Lifetime JP4549726B2 (ja) | 2003-04-29 | 2004-04-30 | 半導体ウエハの接着前表面処理 |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP1473765B1 (enExample) |
| JP (1) | JP4549726B2 (enExample) |
| FR (1) | FR2854493B1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7919391B2 (en) * | 2004-12-24 | 2011-04-05 | S.O.I.Tec Silicon On Insulator Technologies | Methods for preparing a bonding surface of a semiconductor wafer |
| JP5064692B2 (ja) * | 2006-02-09 | 2012-10-31 | 信越化学工業株式会社 | Ｓｏｉ基板の製造方法 |
| JP5064693B2 (ja) * | 2006-02-13 | 2012-10-31 | 信越化学工業株式会社 | Ｓｏｉ基板の製造方法 |
| JP2007220782A (ja) * | 2006-02-15 | 2007-08-30 | Shin Etsu Chem Co Ltd | Ｓｏｉ基板およびｓｏｉ基板の製造方法 |
| JP5064695B2 (ja) | 2006-02-16 | 2012-10-31 | 信越化学工業株式会社 | Ｓｏｉ基板の製造方法 |
| JP5042506B2 (ja) | 2006-02-16 | 2012-10-03 | 信越化学工業株式会社 | 半導体基板の製造方法 |
| US7981754B2 (en) * | 2006-09-07 | 2011-07-19 | Renesas Electronics Corporation | Manufacturing method of bonded SOI substrate and manufacturing method of semiconductor device |
| JP2009123831A (ja) | 2007-11-13 | 2009-06-04 | Tokyo Electron Ltd | Ｂｓｐ除去方法、ｂｓｐ除去装置、基板処理装置、及び記憶媒体 |
| FR2935067B1 (fr) | 2008-08-14 | 2011-02-25 | Commissariat Energie Atomique | Procede de fabrication d'une structure semi-conductrice plan de masse enterre |
| KR102567863B1 (ko) * | 2021-01-14 | 2023-08-18 | (주)인터체크 | 스크러버를 이용한 레티클 세정장치 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62186938A (ja) * | 1986-02-13 | 1987-08-15 | Okazaki Seisakusho:Kk | 固体の接合方法 |
| JPS6437841A (en) * | 1987-08-04 | 1989-02-08 | Nec Corp | Semiconductor wafer cleaner |
| JP2671419B2 (ja) * | 1988-08-09 | 1997-10-29 | 株式会社日本自動車部品総合研究所 | 半導体装置の製造方法 |
| JPH02183510A (ja) * | 1989-01-10 | 1990-07-18 | Sony Corp | 半導体用基板の製法 |
| US5131968A (en) * | 1990-07-31 | 1992-07-21 | Motorola, Inc. | Gradient chuck method for wafer bonding employing a convex pressure |
| JPH0719739B2 (ja) * | 1990-09-10 | 1995-03-06 | 信越半導体株式会社 | 接合ウェーハの製造方法 |
| FR2681472B1 (fr) * | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| JP2701709B2 (ja) * | 1993-02-16 | 1998-01-21 | 株式会社デンソー | ２つの材料の直接接合方法及び材料直接接合装置 |
| JP3162914B2 (ja) * | 1994-05-26 | 2001-05-08 | 三菱マテリアル株式会社 | 半導体素子用貼り合せシリコンウェーハの製造方法 |
| JP3171366B2 (ja) * | 1994-09-05 | 2001-05-28 | 三菱マテリアル株式会社 | シリコン半導体ウェーハ及びその製造方法 |
| JP3287524B2 (ja) * | 1995-03-13 | 2002-06-04 | 三菱マテリアル株式会社 | Ｓｏｉ基板の製造方法 |
| US6048411A (en) * | 1997-05-12 | 2000-04-11 | Silicon Genesis Corporation | Silicon-on-silicon hybrid wafer assembly |
| US6388290B1 (en) * | 1998-06-10 | 2002-05-14 | Agere Systems Guardian Corp. | Single crystal silicon on polycrystalline silicon integrated circuits |
| US6566233B2 (en) * | 1999-12-24 | 2003-05-20 | Shin-Etsu Handotai Co., Ltd. | Method for manufacturing bonded wafer |
| JP4628580B2 (ja) * | 2001-04-18 | 2011-02-09 | 信越半導体株式会社 | 貼り合せ基板の製造方法 |
-
2003
- 2003-04-29 FR FR0305236A patent/FR2854493B1/fr not_active Expired - Lifetime
-
2004
- 2004-04-29 EP EP20040291100 patent/EP1473765B1/fr not_active Expired - Lifetime
- 2004-04-30 JP JP2004136254A patent/JP4549726B2/ja not_active Expired - Lifetime