JP2005136213A - 薄膜デバイス基板の製造方法 - Google Patents
薄膜デバイス基板の製造方法 Download PDFInfo
- Publication number
- JP2005136213A JP2005136213A JP2003370911A JP2003370911A JP2005136213A JP 2005136213 A JP2005136213 A JP 2005136213A JP 2003370911 A JP2003370911 A JP 2003370911A JP 2003370911 A JP2003370911 A JP 2003370911A JP 2005136213 A JP2005136213 A JP 2005136213A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- heat insulating
- insulating film
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 237
- 239000010409 thin film Substances 0.000 title claims abstract description 57
- 238000004519 manufacturing process Methods 0.000 title claims description 55
- 239000010408 film Substances 0.000 claims abstract description 374
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 72
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 43
- 238000000034 method Methods 0.000 claims description 64
- 239000004065 semiconductor Substances 0.000 claims description 39
- 238000005224 laser annealing Methods 0.000 claims description 29
- 229910021426 porous silicon Inorganic materials 0.000 claims description 29
- 238000005530 etching Methods 0.000 claims description 27
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 16
- 239000011651 chromium Substances 0.000 claims description 14
- 229910052804 chromium Inorganic materials 0.000 claims description 13
- 239000011800 void material Substances 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 239000011521 glass Substances 0.000 abstract description 59
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 36
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 22
- 230000002159 abnormal effect Effects 0.000 abstract description 7
- 238000013021 overheating Methods 0.000 abstract description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 26
- 238000012546 transfer Methods 0.000 description 25
- 229910052581 Si3N4 Inorganic materials 0.000 description 17
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 17
- 239000010410 layer Substances 0.000 description 16
- 239000012790 adhesive layer Substances 0.000 description 12
- 239000000463 material Substances 0.000 description 12
- 239000011229 interlayer Substances 0.000 description 10
- 239000013078 crystal Substances 0.000 description 9
- 238000004528 spin coating Methods 0.000 description 7
- 238000009413 insulation Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000013081 microcrystal Substances 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- 238000007743 anodising Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 229910000423 chromium oxide Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 150000002576 ketones Chemical class 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000012466 permeate Substances 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- SCPYDCQAZCOKTP-UHFFFAOYSA-N silanol Chemical compound [SiH3]O SCPYDCQAZCOKTP-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002195 soluble material Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6835—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
【解決手段】 まず、ガラス基板101上に、断熱膜102、酸化シリコン膜103及び非晶質シリコン膜104を順次形成し、非晶質シリコン膜104の上方からエキシマレーザのレーザ光105を照射する。すると、非晶質シリコン膜104は溶融した後に再結晶化して多結晶シリコン膜104’となる。続いて、多結晶シリコン膜104’を活性層に用いてTFT106を形成し、TFT106上にプラスチック基板を貼り合わせ、最後に断熱膜102を介してガラス基板101を剥離することによって、TFT106の転写が完成する。TFT106は、断熱膜106が除去されているので、動作時の過熱による異常が抑制される。
【選択図】 図1
Description
102 断熱膜
103,303,403 酸化シリコン膜
104,304,404,504 非晶質シリコン膜(半導体膜)
104’,304’,404’,504’ 多結晶シリコン膜
105,305,405,507 レーザ光
106,306,406,511,701 TFT(薄膜デバイス)
107s,107d コンタクトホール
108 ソース領域
109 チャネル領域
110 ドレイン領域
111 ゲート絶縁膜
112 ソース電極
113 ゲート電極
114 第1層間絶縁膜
115 ドレイン電極
116 第2層間絶縁膜
117,205,307,407,512,609,702,705 接着層
118,206,308,408,513,610 プラッスチック基板(第二の基板)
302,402 多孔質酸化シリコン膜(断熱膜)
309,505,514,606,611 フッ酸(エッチャント)
401’ クロム膜(剥離膜)
409 クロムエッチャント
502,602 酸化シリコン膜(空隙を有する膜)
503,603,607 窒化シリコン膜
506,608 空隙
508 グレイン
509 微結晶
520,620 エッチャント導入孔(貫通孔)
604 層間絶縁膜
605 配線
703 1次転写基板
705 2次転写基板
802 エッチング液
801,803 積層体
Claims (17)
- 熱伝導を抑制する断熱膜を第一の基板上に形成する工程と、前記断熱膜上に半導体膜を形成する工程と、前記半導体膜にレーザアニールを施す工程と、前記レーザアニールが施された前記半導体膜に薄膜デバイスを形成する工程と、前記薄膜デバイス上に第二の基板を接合する工程と、前記第一の基板から前記第二の基板までの積層体から前記第一の基板及び前記断熱膜を剥離する工程と、
を備えた薄膜デバイス基板の製造方法。 - 熱伝導を抑制する断熱膜を第一の基板上に形成する工程と、前記断熱膜上に半導体膜を形成する工程と、前記半導体膜にレーザアニールを施す工程と、前記レーザアニールが施された前記半導体膜上に第二の基板を接合する工程と、前記第一の基板から前記第二の基板までの積層体から前記第一の基板及び前記断熱膜を剥離する工程と、前記レーザアニールが施された前記半導体膜に薄膜デバイスを形成する工程と、
を備えた薄膜デバイス基板の製造方法。 - 前記断熱膜が空隙を有する膜である、
請求項1又は2記載の薄膜デバイス基板の製造方法。 - 前記空隙を有する膜が多孔質膜である、
請求項3記載の薄膜デバイス基板の製造方法。 - 前記空隙がエッチングによって形成されたものである、
請求項3記載の薄膜デバイス基板の製造方法。 - 前記断熱膜を第一の基板上に形成する工程は、
後工程で前記空隙が形成される一次膜を前記第一の基板上に形成する工程と、前記一次膜上に形成された膜に当該一次膜に達する多数の貫通孔を形成する工程と、これらの貫通孔からエッチャントを導入して前記一次膜に前記空隙を形成する工程とを有する、
請求項5記載の薄膜デバイス基板の製造方法。 - 前記第一の基板及び前記断熱膜を剥離する工程は、前記空隙に前記エッチャントを導入して前記断熱膜を除去する工程を有する、
請求項6記載の薄膜デバイス基板の製造方法。 - 前記第一の基板及び前記断熱膜を剥離する工程は、前記断熱膜を機械的に破断する工程を有する、
請求項1乃至7のいずれかに記載の薄膜デバイス基板の製造方法。 - 前記断熱膜が酸化シリコンからなる、
請求項1乃至8のいずれかに記載の薄膜デバイス基板の製造方法。
- 前記断熱膜上に後工程で剥離される剥離膜を形成する工程を更に備え、
前記第一の基板及び前記断熱膜を剥離する工程は、前記剥離膜を除去する工程を有する、
請求項1乃至9のいずれかに記載の薄膜デバイス基板の製造方法。 - 前記断熱膜下に後工程で剥離される剥離膜を形成する工程を更に備え、
前記第一の基板及び前記断熱膜を剥離する工程は、前記剥離膜を除去する工程と前記断熱膜を除去する工程とを有する、
請求項1乃至9のいずれかに記載の薄膜デバイス基板の製造方法。 - 前記断熱膜は、空隙を有する膜からなり、
前記剥離膜を除去する工程は、前記空隙を介してエッチャントを浸透させて当該剥離膜をエッチングする工程からなる、
請求項10又は11記載の薄膜デバイス基板の製造方法。 - 前記剥離膜がクロムからなり、前記断熱膜が多孔質酸化シリコンからなる
請求項12記載の薄膜デバイス基板の製造方法。 - 前記第一の基板及び前記断熱膜を剥離する工程は、前記断熱膜及び前記剥離膜の少なくとも一方を機械的に破断する工程を有する、
請求項10乃至13のいずれかに記載の薄膜デバイス基板の製造方法。
- 前記第一の基板及び前記断熱膜を剥離する工程は、当該剥離前に前記積層体を複数に分割する工程を有する。
請求項1乃至14のいずれかに記載の薄膜デバイス基板の製造方法。
- 前記半導体膜がシリコンからなる、
請求項1乃至15のいずれかに記載の薄膜デバイス基板の製造方法。 - 前記薄膜デバイスが薄膜トランジスタである、
請求項1乃至16のいずれかに記載の薄膜デバイス基板の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003370911A JP4507560B2 (ja) | 2003-10-30 | 2003-10-30 | 薄膜デバイス基板の製造方法 |
US10/976,846 US7256102B2 (en) | 2003-10-30 | 2004-11-01 | Manufacturing method of thin film device substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003370911A JP4507560B2 (ja) | 2003-10-30 | 2003-10-30 | 薄膜デバイス基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005136213A true JP2005136213A (ja) | 2005-05-26 |
JP4507560B2 JP4507560B2 (ja) | 2010-07-21 |
Family
ID=34543908
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003370911A Expired - Fee Related JP4507560B2 (ja) | 2003-10-30 | 2003-10-30 | 薄膜デバイス基板の製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7256102B2 (ja) |
JP (1) | JP4507560B2 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8541768B2 (en) | 2010-06-02 | 2013-09-24 | Hitachi, Ltd. | Semiconductor device having stacked structural bodies and method for manufacturing the same |
WO2013141052A1 (ja) * | 2012-03-22 | 2013-09-26 | シャープ株式会社 | 半導体装置の製造方法、半導体装置、及び表示装置 |
JPWO2017057446A1 (ja) * | 2015-10-02 | 2018-07-19 | 旭硝子株式会社 | ガラス基板、積層基板、および積層体 |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7442629B2 (en) | 2004-09-24 | 2008-10-28 | President & Fellows Of Harvard College | Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate |
US7057256B2 (en) | 2001-05-25 | 2006-06-06 | President & Fellows Of Harvard College | Silicon-based visible and near-infrared optoelectric devices |
KR100646937B1 (ko) * | 2005-08-22 | 2006-11-23 | 삼성에스디아이 주식회사 | 다결정 실리콘 박막트랜지스터 및 그 제조방법 |
JP2007134388A (ja) * | 2005-11-08 | 2007-05-31 | Sharp Corp | 窒化物系半導体素子とその製造方法 |
US7864825B2 (en) * | 2006-08-10 | 2011-01-04 | Lasertel, Inc. | Method and system for a laser diode bar array assembly |
WO2009111327A2 (en) * | 2008-02-29 | 2009-09-11 | Sionyx, Inc. | Vertically integrated light sensor and arrays |
US8058615B2 (en) * | 2008-02-29 | 2011-11-15 | Sionyx, Inc. | Wide spectral range hybrid image detector |
US9911781B2 (en) | 2009-09-17 | 2018-03-06 | Sionyx, Llc | Photosensitive imaging devices and associated methods |
KR102443836B1 (ko) * | 2009-09-17 | 2022-09-15 | 사이오닉스, 엘엘씨 | 감광성 이미징 장치 및 이와 관련된 방법 |
US9673243B2 (en) | 2009-09-17 | 2017-06-06 | Sionyx, Llc | Photosensitive imaging devices and associated methods |
US8692198B2 (en) | 2010-04-21 | 2014-04-08 | Sionyx, Inc. | Photosensitive imaging devices and associated methods |
CN103081128B (zh) | 2010-06-18 | 2016-11-02 | 西奥尼克斯公司 | 高速光敏设备及相关方法 |
US9496308B2 (en) | 2011-06-09 | 2016-11-15 | Sionyx, Llc | Process module for increasing the response of backside illuminated photosensitive imagers and associated methods |
WO2013010127A2 (en) | 2011-07-13 | 2013-01-17 | Sionyx, Inc. | Biometric imaging devices and associated methods |
US9064764B2 (en) | 2012-03-22 | 2015-06-23 | Sionyx, Inc. | Pixel isolation elements, devices, and associated methods |
KR20150130303A (ko) | 2013-02-15 | 2015-11-23 | 사이오닉스, 아이엔씨. | 안티 블루밍 특성 및 관련 방법을 가지는 높은 동적 범위의 cmos 이미지 센서 |
US9939251B2 (en) | 2013-03-15 | 2018-04-10 | Sionyx, Llc | Three dimensional imaging utilizing stacked imager devices and associated methods |
US9209345B2 (en) | 2013-06-29 | 2015-12-08 | Sionyx, Inc. | Shallow trench textured regions and associated methods |
US9583187B2 (en) * | 2015-03-28 | 2017-02-28 | Intel Corporation | Multistage set procedure for phase change memory |
US11025031B2 (en) | 2016-11-29 | 2021-06-01 | Leonardo Electronics Us Inc. | Dual junction fiber-coupled laser diode and related methods |
US11406004B2 (en) | 2018-08-13 | 2022-08-02 | Leonardo Electronics Us Inc. | Use of metal-core printed circuit board (PCB) for generation of ultra-narrow, high-current pulse driver |
DE102019121924A1 (de) | 2018-08-14 | 2020-02-20 | Lasertel, Inc. | Laserbaugruppe und zugehörige verfahren |
US11296481B2 (en) | 2019-01-09 | 2022-04-05 | Leonardo Electronics Us Inc. | Divergence reshaping array |
US11752571B1 (en) | 2019-06-07 | 2023-09-12 | Leonardo Electronics Us Inc. | Coherent beam coupler |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1197357A (ja) * | 1997-09-16 | 1999-04-09 | Tokyo University Of Agriculture And Technology | 半導体素子形成法 |
JPH11312811A (ja) * | 1998-02-25 | 1999-11-09 | Seiko Epson Corp | 薄膜デバイスの剥離方法、薄膜デバイスの転写方法、薄膜デバイス、アクティブマトリクス基板および液晶表示装置 |
JP2001119003A (ja) * | 1999-10-22 | 2001-04-27 | Toyota Central Res & Dev Lab Inc | 多結晶半導体膜の製造方法 |
JP2003204049A (ja) * | 2001-10-30 | 2003-07-18 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3364081B2 (ja) | 1995-02-16 | 2003-01-08 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JPH1126733A (ja) | 1997-07-03 | 1999-01-29 | Seiko Epson Corp | 薄膜デバイスの転写方法、薄膜デバイス、薄膜集積回路装置,アクティブマトリクス基板、液晶表示装置および電子機器 |
JP3482856B2 (ja) | 1998-01-26 | 2004-01-06 | 株式会社日立製作所 | 液晶表示装置およびその製造方法 |
JP2000091604A (ja) | 1998-09-10 | 2000-03-31 | Showa Denko Kk | 多結晶半導体膜、光電変換素子及びこれらの製造法 |
-
2003
- 2003-10-30 JP JP2003370911A patent/JP4507560B2/ja not_active Expired - Fee Related
-
2004
- 2004-11-01 US US10/976,846 patent/US7256102B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1197357A (ja) * | 1997-09-16 | 1999-04-09 | Tokyo University Of Agriculture And Technology | 半導体素子形成法 |
JPH11312811A (ja) * | 1998-02-25 | 1999-11-09 | Seiko Epson Corp | 薄膜デバイスの剥離方法、薄膜デバイスの転写方法、薄膜デバイス、アクティブマトリクス基板および液晶表示装置 |
JP2001119003A (ja) * | 1999-10-22 | 2001-04-27 | Toyota Central Res & Dev Lab Inc | 多結晶半導体膜の製造方法 |
JP2003204049A (ja) * | 2001-10-30 | 2003-07-18 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8541768B2 (en) | 2010-06-02 | 2013-09-24 | Hitachi, Ltd. | Semiconductor device having stacked structural bodies and method for manufacturing the same |
WO2013141052A1 (ja) * | 2012-03-22 | 2013-09-26 | シャープ株式会社 | 半導体装置の製造方法、半導体装置、及び表示装置 |
JPWO2017057446A1 (ja) * | 2015-10-02 | 2018-07-19 | 旭硝子株式会社 | ガラス基板、積層基板、および積層体 |
Also Published As
Publication number | Publication date |
---|---|
JP4507560B2 (ja) | 2010-07-21 |
US20050095755A1 (en) | 2005-05-05 |
US7256102B2 (en) | 2007-08-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4507560B2 (ja) | 薄膜デバイス基板の製造方法 | |
US7579222B2 (en) | Manufacturing method of thin film device substrate | |
US7605022B2 (en) | Methods of manufacturing a three-dimensional semiconductor device and semiconductor devices fabricated thereby | |
JP4540359B2 (ja) | 半導体装置およびその製造方法 | |
US8642405B2 (en) | Process for production of SOI substrate and process for production of semiconductor device | |
KR100532557B1 (ko) | 반도체 장치 및 그의 제조 방법, soi기판 및 그것을사용하는 표시 장치 및 soi기판의 제조 방법 | |
JP3116085B2 (ja) | 半導体素子形成法 | |
JP5866086B2 (ja) | 半導体装置の作製方法 | |
JP2003345267A (ja) | 表示装置及びその製造方法 | |
JP2003324188A (ja) | 大面積単結晶シリコン基板の製造方法 | |
JP2009081352A (ja) | 半導体基板の製造方法及び半導体基板 | |
KR20040057999A (ko) | 반도체 장치 및 이의 제조 방법 | |
US7772089B2 (en) | Method for manufacturing semiconductor device | |
JP4957297B2 (ja) | 半導体装置の製造方法 | |
JP2004071874A (ja) | 半導体装置製造方法および半導体装置 | |
JP2007067399A (ja) | 単結晶シリコン層の形成方法、及びこれを利用した薄膜トランジスタの製造方法 | |
JP2001144300A (ja) | 半導体装置及びその製造方法並びにシリコン薄膜の形成方法 | |
JP2005268662A (ja) | 3次元デバイスの製造方法 | |
JP2010141246A (ja) | 半導体装置の製造方法 | |
JPH1197654A (ja) | 半導体基板の製造方法 | |
JP4545449B2 (ja) | 半導体装置の製造方法 | |
JP2006324564A (ja) | 半導体装置の製造方法 | |
JP2007043192A (ja) | 結晶性半導体膜の作製方法、結晶性珪素膜の作製方法及び薄膜トランジスタの作製方法 | |
TW201005951A (en) | Thin film transistor and fabricating method of the same | |
JP2007165731A (ja) | 絶縁膜の製造方法、薄膜トランジスタの製造方法及び液晶表示デバイスの製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060911 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20091130 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20091208 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100204 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100309 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100319 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20100413 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20100426 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130514 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140514 Year of fee payment: 4 |
|
LAPS | Cancellation because of no payment of annual fees |