JP2005079424A - Package for electronic component - Google Patents

Package for electronic component Download PDF

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JP2005079424A
JP2005079424A JP2003309709A JP2003309709A JP2005079424A JP 2005079424 A JP2005079424 A JP 2005079424A JP 2003309709 A JP2003309709 A JP 2003309709A JP 2003309709 A JP2003309709 A JP 2003309709A JP 2005079424 A JP2005079424 A JP 2005079424A
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plating film
electronic component
plating
package
ceramic substrate
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Akihiro Hidaka
明弘 日高
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Sumitomo Metal SMI Electronics Device Inc
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Sumitomo Metal SMI Electronics Device Inc
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Priority to JP2003309709A priority Critical patent/JP2005079424A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

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  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly reliable and inexpensive package for electronic component that can be reduced in weight, thickness, length, and size, can prevent the occurrence of cracks in a ceramic substrate and splitting failures when single packages are split from an assemblage of many packages, and is free from the oozing out of a metallized layer. <P>SOLUTION: This package 10 for electronic component is composed of a ceramic substrate 11 having a bank 14 around a cavity 13, and, after an electronic component element 12 is mounted on the bottom of the cavity 13, the element 12 is airtightly sealed by placing a metal lid 20 on the bank 14 and joining the lid 20 to the bank 14 by seam welding. The package 10 has the metallized layer 21 on the top surface of the bank 14 of the substrate 11 and, in addition, plated coating films 26, 26a, and 26b formed by sequentially performing first Ni and Cu plating and second Ni and Au plating, first Ni and Cu plating and second Ni plating, or first Ni and Cu plating in this order on the metallized layer 21. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、キャビティ部に電子部品素子が搭載され、金属蓋体が接合されて電子部品素子が気密に封止されるためのセラミック製基体からなる電子部品用パッケージに関し、より詳細には、セラミック製基体に形成されたメタライス層とその上に形成されためっき被膜上に金属蓋体が直接シーム溶接で接合されることで電子部品素子が気密に封止されるための電子部品用パッケージに関する。   The present invention relates to an electronic component package comprising a ceramic substrate on which an electronic component element is mounted in a cavity portion and a metal lid is bonded to hermetically seal the electronic component element. The present invention relates to an electronic component package for hermetically sealing an electronic component element by joining a metal lid directly on the metallized layer formed on the substrate and a plating film formed thereon by seam welding.

近年、半導体素子、水晶振動子、圧電素子等の電子部品素子を収納させるための電子部品用パッケージは、電子部品素子を搭載させた装置、例えば、携帯電話や、パソコン等の小型化、高信頼性化等の要求に伴い、ますます軽薄短小化、高信頼性化等への対応が迫られている。これに対応するために、パッケージには、気密信頼性の高いセラミック製基体からなる電子部品用パッケージが用いられている。   In recent years, electronic component packages for accommodating electronic component elements such as semiconductor elements, crystal resonators, and piezoelectric elements have been downsized and highly reliable for devices on which electronic component elements are mounted, such as mobile phones and personal computers. In response to demands for improving the characteristics, there is an urgent need to deal with lighter, thinner, and more reliable devices. In order to cope with this, an electronic component package made of a ceramic base with high hermetic reliability is used as the package.

図4(A)に示すように、代表的な従来の電子部品用パッケージ50は、セラミック製基体51の上面の外周縁部に、KV(Fe−Ni−Co系合金、商品名「コバール」)や、42アロイ(Fe−Ni系合金)等からなるセラミックと熱膨張係数が近似するリング状の金属枠体52を接合して、例えば、中央部に半導体素子53を搭載させるためのキャビティ部54を備えるように形成されている。このセラミック製基体51を作製するためには、1又は複数枚のセラミックグリーンシートに、W(タングステン)や、Mo(モリブデン)等の高融点金属からなる導体ペーストを用いてスクリーン印刷して導体ビアや、導体配線パターン等を形成している。この導体配線パターンには、キャビティ部54の周囲の土手部56の上面となる部分に形成される金属枠体52を接合させるための接合用パターン55が含まれている。次いで、複数枚のセラミックグリーンシートの場合には、積層して積層体を形成した後、1又は積層体のセラミックグリーンシートと高融点金属を同時焼成してセラミック製基体51を作製している。そして、セラミック製基体51の外表面に露出する接合用パターン55を含む全ての導体配線パターン上にNiめっき被膜を形成した後、接合用パターン55上にAg−Cuろう等からなるろう材57を介して金属枠体52を載置し、加熱して、ろう付け接合している。そして、セラミック製基体51と金属枠体52の接合体の外部に露出する全ての金属表面にNiめっき、及びAuめっきで施されるめっき被膜58が形成されて電子部品用パッケージ50が作製されている。なお、電子部品用パッケージ50は、通常、大型のセラミックシートに多数個のパッケージを形成し、予め形成されている個片体に分割するための分割用溝に沿って最後に個片体に分割することで形成されている。   As shown in FIG. 4A, a typical conventional electronic component package 50 has KV (Fe—Ni—Co alloy, trade name “Kovar”) on the outer peripheral edge of the upper surface of a ceramic base 51. Or a ring-shaped metal frame 52 having a thermal expansion coefficient approximate to a ceramic made of 42 alloy (Fe—Ni alloy) or the like, and, for example, a cavity portion 54 for mounting the semiconductor element 53 in the center portion. Is formed. In order to produce the ceramic substrate 51, one or more ceramic green sheets are screen-printed using a conductive paste made of a refractory metal such as W (tungsten) or Mo (molybdenum) to form a conductor via. In addition, a conductor wiring pattern or the like is formed. This conductor wiring pattern includes a joining pattern 55 for joining the metal frame 52 formed on the upper surface of the bank portion 56 around the cavity portion 54. Next, in the case of a plurality of ceramic green sheets, a laminated body is formed by laminating, and then the ceramic substrate 51 is manufactured by simultaneously firing one or more laminated ceramic green sheets and a refractory metal. Then, after forming a Ni plating film on all the conductor wiring patterns including the bonding pattern 55 exposed on the outer surface of the ceramic substrate 51, a brazing material 57 made of Ag—Cu brazing or the like is formed on the bonding pattern 55. The metal frame body 52 is placed through, heated and brazed and joined. Then, a plating film 58 applied by Ni plating and Au plating is formed on all metal surfaces exposed to the outside of the joined body of the ceramic base 51 and the metal frame 52, and the electronic component package 50 is manufactured. Yes. The electronic component package 50 is usually divided into individual pieces along a dividing groove for forming a large number of packages on a large ceramic sheet and dividing them into pre-formed pieces. It is formed by doing.

図4(B)に示すように、この電子部品用パッケージ50には、キャビティ部54に、例えば、電子部品素子の一例である半導体素子53が実装され、ボンディングワイヤ59で外部と電気的に導通状態としている。そして、金属枠体52上には、金属枠体52を接合した時のろう材57より低い融点の、例えば、Au−Snろう等からなるろう材57aを介してKVや、42アロイ等からなる金属蓋体60が載置され、この金属蓋体60の外周端部コーナー部の周囲にシーム溶接機61の一対のローラーを移動させることで金属枠体52に金属蓋体60をシーム溶接接合している。これによって、半導体素子53等の電子部品素子は、電子部品用パッケージ50と金属蓋体60で気密に封止することができる。   As shown in FIG. 4B, in the electronic component package 50, for example, a semiconductor element 53, which is an example of an electronic component element, is mounted in a cavity portion 54, and is electrically connected to the outside by a bonding wire 59. State. The metal frame 52 is made of KV, 42 alloy, or the like through a brazing material 57a made of, for example, Au—Sn brazing, having a melting point lower than that of the brazing material 57 when the metal frame 52 is joined. The metal lid 60 is placed, and the pair of rollers of the seam welding machine 61 is moved around the corner portion of the outer peripheral end of the metal lid 60 to join the metal lid 60 to the metal frame 52 by seam welding. ing. As a result, electronic component elements such as the semiconductor element 53 can be hermetically sealed with the electronic component package 50 and the metal lid 60.

図5に示すように、他の従来の電子部品用パッケージ50aには、セラミック製基体51のキャビティ部54周囲である土手部56の上面にリング状の金属枠体52を排除した形態のものがある。この電子部品用パッケージ50aは、土手部56の上面に接合用パターン55を形成し、更に、この上面にNiめっき、及びAuめっきで施されるめっき被膜58を形成して作製している。そして、土手部56のめっき被膜58上には、直接、例えば、Ag−Cuろう等からなるろう材57bを介して金属蓋体60が載置され、この金属蓋体60の外周端部コーナー部の周囲にシーム溶接機61(図4(B)参照)の一対のローラーを移動させることで直接金属蓋体60をシーム溶接接合している。   As shown in FIG. 5, another conventional electronic component package 50a has a configuration in which a ring-shaped metal frame 52 is excluded from the upper surface of a bank portion 56 around a cavity portion 54 of a ceramic base 51. is there. The electronic component package 50a is formed by forming a bonding pattern 55 on the upper surface of the bank portion 56 and further forming a plating film 58 applied by Ni plating and Au plating on the upper surface. A metal lid 60 is placed directly on the plating film 58 of the bank portion 56 via a brazing material 57b made of, for example, Ag—Cu brazing or the like. The metal lid 60 is directly seam welded joined by moving a pair of rollers of a seam welder 61 (see FIG. 4B) around.

なお、従来から、電子部品用パッケージの製造方法には、セラミック製基体に高価な金属枠体を接合させないで安価で厚さの薄い小型化させたセラミックケースのメタライズ層上に、ろう材がクラッド化された蓋体を直接載置し、電子ビームでろう材を溶融させて接合する方法が開示されている(例えば、特許文献1参照)。また、セラミック製基体の土手部に金属蓋体をシーム溶接してなる電子部品装置には、セラミック製基体として、その土手部上面に10〜30μmのメタライズ層と、この上に5〜15μmのNiめっきからなるめっき被膜を設けた構造のものが提案されている(例えば、特許文献2参照)。また、セラミック製基体の土手部に金属蓋体を電気抵抗熱でろう材を溶融して接合する電子部品用パッケージには、セラミック製基体として、その土手部上面にメタライズ層と、この上にNiめっき及びAuめっきからなるめっき被膜、あるいはこれに加えて各種ろう材を接合して設けた構造のものが提案されている(例えば、特許文献3参照)。
特許第3248842号公報 特開2000−223606号公報 特開2000−236035号公報
Conventionally, a method for manufacturing a package for an electronic component includes a method in which a brazing material is clad on a metallized layer of an inexpensive and thin thin ceramic case without bonding an expensive metal frame to a ceramic substrate. A method is disclosed in which the formed lid is directly placed and the brazing material is melted and bonded by an electron beam (see, for example, Patent Document 1). Further, in an electronic component device in which a metal lid is seam welded to a bank portion of a ceramic base, a metal base layer of 10 to 30 μm is formed on the top surface of the bank as a ceramic base, and Ni of 5 to 15 μm is formed thereon. The thing of the structure which provided the plating film which consists of plating is proposed (for example, refer patent document 2). In addition, in a package for an electronic component in which a metal lid is melted and joined to a bank portion of a ceramic base by electric resistance heat, a metalized layer is formed on the top of the bank as a ceramic base, and Ni is formed thereon. A plating film made of plating and Au plating, or a structure in which various brazing materials are joined in addition to this has been proposed (see, for example, Patent Document 3).
Japanese Patent No. 3248842 JP 2000-223606 A JP 2000-236035 A

しかしながら、前述したような従来の電子部品用パッケージは、次のような問題がある。
(1)セラミック製基体のキャビティ部周囲である土手部の上面にリング状の金属枠体を接合した形態の電子部品用パッケージは、パッケージ自体の高さが大きくなり、軽薄短小化を求められている電子部品装置に用いることができなくなっている。また、KV等からなるリング状の金属枠体は、高価であるので、電子部品用パッケージのコストアップとなっている。
(2)セラミック製基体に金属枠体を取り付けた形態の電子部品用パッケージに金属蓋体をシーム溶接機で接合する時や、セラミック製基体のキャビティ部周囲である土手部の上面にリング状の金属枠体を排除した形態の電子部品用パッケージに金属蓋体をシーム溶接機で接合する時には、シーム溶接機からの加熱温度が1200℃程度となるので、この温度が溶接箇所の金属蓋体と金属枠体やセラミック製基体自体に局所的に集中し、金属蓋体が大きく熱膨張した状態で電子部品用パッケージに接合される。金属蓋体の熱膨張係数は、例え、セラミック製基体に近似したものを用いたとしても、急激な温度上昇の中では、セラミック製基体と熱膨張係数に差がでるので、接合が完了した後の冷却による金属蓋体の収縮によって歪みが発生し、セラミック製基体の底面側に椀状の撓みが発生する。これによって、セラミック製基体の底面側には、引っ張り応力が作用し、底面側からクラックが発生する場合があり、電子部品用パッケージの信頼性を低下させている。
(3)電子部品用パッケージは、セラミックグリーンシートに導体配線パターンを形成した後、この導体配線パターンの上に、電子部品用パッケージの多数個の集合体から個片体に分割するための分割用溝を形成する部分があるのと同時に、この導体配線パターンを大気から保護するためにNiめっき皮膜の厚さを5〜20μm程度必要としている。このNiめっき皮膜は、厚くなり過ぎると導体配線パターンの分割用溝の壁面に入り込んで分割用溝を狭くし、しかも、Niめっき自体の硬度が高いので、正常な分割を阻害して分割不良を発生させる場合がある。
(4)Niめっき皮膜は、薄くなり過ぎると、めっき被膜の下層のメタライズ層を大気から保護するためのカバー性に問題が発生し、メタライズ層のめっき被膜上へのしみ出しを発生させる場合がある。
本発明は、かかる事情に鑑みてなされたものであって、パッケージの軽薄短小化に対応でき、安価で、セラミック製基体のクラック発生を防止し、しかも、多数個の集合体から個片体に分割する時の分割不良を防止し、メタライズ層のしみ出しのない信頼性の高い電子部品用パッケージを提供することを目的とする。
However, the conventional electronic component package as described above has the following problems.
(1) A package for an electronic component in which a ring-shaped metal frame is joined to the upper surface of a bank portion around a cavity portion of a ceramic substrate is required to be lighter, thinner, and smaller because the height of the package itself increases. It can no longer be used for existing electronic component devices. Moreover, since the ring-shaped metal frame made of KV or the like is expensive, the cost of the electronic component package is increased.
(2) When a metal lid is joined to a package for an electronic component in a form in which a metal frame is attached to a ceramic base with a seam welder, or a ring-like shape is formed on the top of the bank around the cavity of the ceramic base. When a metal lid is joined to a package for an electronic component in a form excluding the metal frame with a seam welder, the heating temperature from the seam welder is about 1200 ° C. The metal lid body is locally concentrated on the metal frame body or the ceramic substrate itself, and the metal lid body is joined to the electronic component package in a state where the metal lid body is largely thermally expanded. Even if the thermal expansion coefficient of the metal lid is similar to that of a ceramic substrate, there is a difference between the thermal expansion coefficient of the ceramic substrate and the ceramic substrate during a rapid temperature rise. Due to the shrinkage of the metal lid due to the cooling, distortion occurs, and a bowl-like deflection occurs on the bottom side of the ceramic substrate. As a result, tensile stress acts on the bottom surface side of the ceramic substrate, and cracks may be generated from the bottom surface side, reducing the reliability of the electronic component package.
(3) The electronic component package is formed for forming a conductor wiring pattern on the ceramic green sheet and then dividing the electronic component package into a single piece from a large number of electronic component packages on the conductor wiring pattern. At the same time that there is a portion for forming a groove, the thickness of the Ni plating film is required to be about 5 to 20 μm in order to protect this conductor wiring pattern from the atmosphere. If this Ni plating film becomes too thick, it enters the wall surface of the dividing groove of the conductor wiring pattern and narrows the dividing groove. Moreover, since the Ni plating itself has a high hardness, it prevents normal division and causes poor division. May occur.
(4) If the Ni plating film becomes too thin, there may be a problem with the cover property for protecting the metallized layer under the plating film from the atmosphere, and the metallized layer may exude onto the plating film. is there.
The present invention has been made in view of such circumstances, can cope with light and thin packages, is inexpensive, prevents cracks in a ceramic substrate, and further, from a large number of aggregates to individual pieces. An object of the present invention is to provide a highly reliable electronic component package that prevents a division failure during division and does not exude a metallized layer.

前記目的に沿う本発明に係る電子部品用パッケージは、キャビティ部の周囲に土手部を有するセラミック製基体からなり、キャビティ部の底部に電子部品素子が搭載された後、土手部に金属蓋体が載置されてシーム溶接で接合され、電子部品素子が気密に封止される電子部品用パッケージにおいて、セラミック製基体の土手部上面にメタライズ層を有し、しかも、メタライズ層上に第1のNi、Cu、第2のNi、Auめっきの順番、第1のNi、Cu、第2のNiめっきの順番、又は第1のNi、Cuめっきの順番で施されるめっき被膜を有する。
ここで、電子部品用パッケージは、第1のNiめっき被膜と、第2のNiめっき被膜の厚さがそれぞれ0を超え4μm以下、Cuめっき被膜の厚さが4μm以上、しかも、第1のNiめっき被膜の厚さ、Cuめっき被膜の厚さ、及び第2のNiめっき被膜の厚さの和、又は第1のNiめっき被膜の厚さと、Cuめっき被膜の厚さの和が5μm以上有するのがよい。
An electronic component package according to the present invention that meets the above-described object comprises a ceramic base having a bank around the cavity, and after the electronic component element is mounted on the bottom of the cavity, a metal lid is formed on the bank. In an electronic component package that is placed and joined by seam welding and the electronic component element is hermetically sealed, the package has a metallized layer on the top surface of the bank of the ceramic substrate, and the first Ni is formed on the metallized layer. , Cu, second Ni, Au plating order, first Ni, Cu, second Ni plating order, or first Ni, Cu plating order.
Here, in the electronic component package, the thickness of the first Ni plating film and the second Ni plating film is more than 0 and 4 μm or less, the thickness of the Cu plating film is 4 μm or more, and the first Ni plating film The sum of the thickness of the plating film, the thickness of the Cu plating film, and the thickness of the second Ni plating film, or the sum of the thickness of the first Ni plating film and the thickness of the Cu plating film is 5 μm or more. Is good.

請求項1及びこれに従属する請求項2記載の電子部品用パッケージは、キャビティ部の周囲に土手部を有するセラミック製基体のこの土手部上面にメタライズ層を有し、しかも、メタライズ層上に第1のNi、Cu、第2のNi、Auめっきの順番、第1のNi、Cu、第2のNiめっきの順番、又は第1のNi、Cuめっきの順番で施されるめっき被膜を有するので、金属枠体を必要としないでパッケージを安価で、軽薄短小化にすることができる。また、延性に富むCuめっき被膜を用いることで、金属蓋体の収縮によるセラミック製基体の歪みを緩和でき、セラミック製基体のクラック発生を防止することができる。また、めっき被膜にAuめっき被膜を設けたとしても、金属蓋体を接合するためのろう材中に溶け込むAuとCuが合金を作ることで、Au単体よりも融点を下げることができて、金属蓋体の収縮によるセラミック製基体の歪みを緩和でき、セラミック製基体のクラック発生を防止することに作用できる。更に、Cuめっき被膜を設けることで、Niめっき被膜の厚さは薄くすることができ、硬度の高いNiめっきの分割用溝への入り込みを少なくすることで、電子部品用パッケージの多数個の集合体から個片体に分割する時の分割不良の発生を防止することができる。更に、Cuめっき被膜を用いることで、Niめっき被膜を薄くしたとしても、メタライス層の大気中へのしみ出し発生を防止することができる。   The package for electronic components according to claim 1 and claim 2 dependent thereon has a metallized layer on the upper surface of the bank portion of the ceramic substrate having a bank portion around the cavity portion, and the first metal layer is formed on the metalized layer. Because it has a plating film applied in the order of 1 Ni, Cu, 2nd Ni, Au plating, 1st Ni, Cu, 2nd Ni plating, or 1st Ni, Cu plating The package can be made inexpensive, light and thin without the need for a metal frame. In addition, by using a Cu plating film rich in ductility, the distortion of the ceramic substrate due to the shrinkage of the metal lid can be alleviated, and the occurrence of cracks in the ceramic substrate can be prevented. In addition, even if an Au plating film is provided on the plating film, the melting point can be lowered than that of Au alone by making an alloy of Au and Cu that melt into the brazing material for joining the metal lid, so that the metal The distortion of the ceramic substrate due to the shrinkage of the lid can be alleviated, and it can act to prevent the occurrence of cracks in the ceramic substrate. Furthermore, by providing a Cu plating film, the thickness of the Ni plating film can be reduced, and by reducing the penetration of the hard Ni plating into the dividing groove, a large number of packages of electronic component packages can be assembled. Occurrence of a division failure when dividing the body into individual pieces can be prevented. Furthermore, by using the Cu plating film, even if the Ni plating film is thinned, it is possible to prevent the metal rice layer from seeping into the atmosphere.

特に、請求項2記載の電子部品用パッケージは、第1のNiめっき被膜と、第2のNiめっき被膜の厚さがそれぞれ0を超え4μm以下、Cuめっき被膜の厚さが4μm以上、しかも、第1のNiめっき被膜の厚さ、Cuめっき被膜の厚さ、及び第2のNiめっき被膜の厚さの和、又は第1のNiめっき被膜の厚さと、Cuめっき被膜の厚さの和が5μm以上有するので、Niめっき被膜の厚さを薄くして金属蓋体を接合するためのろう材中に溶け込むNiの量を低減し、ろう材中のCu−Ni合金の融点を下げることができ、Auめっき被膜を設けた場合でもAu−Ni合金の融点を下げることができて、金属蓋体の収縮によるセラミック製基体の歪みを緩和でき、セラミック製基体のクラック発生を防止することができる。また、硬度の高いNiめっきの分割用溝への入り込みを少なくすることで、電子部品用パッケージの多数個の集合体から個片体に分割する時の分割不良の発生を防止することができる。また、Cuめっき被膜の厚さを厚くして金属蓋体を接合するためのろう材中に溶け込むCuの量を増加し、ろう材中のCu−Ni合金の融点を下げることができて、金属蓋体の収縮によるセラミック製基体の歪みを緩和でき、セラミック製基体のクラック発生を防止することに作用できる。更に、第1のNiめっき被膜とCuめっき被膜の厚さの和を5μm以上とすることで、メタライズ層の大気中へのしみ出し発生を防止することができる。   In particular, in the electronic component package according to claim 2, the thicknesses of the first Ni plating film and the second Ni plating film are more than 0 and 4 μm or less, respectively, and the thickness of the Cu plating film is 4 μm or more, The sum of the thickness of the first Ni plating film, the thickness of the Cu plating film, and the thickness of the second Ni plating film, or the sum of the thickness of the first Ni plating film and the thickness of the Cu plating film Since it has 5 μm or more, it is possible to reduce the amount of Ni dissolved in the brazing material for joining the metal lid by reducing the thickness of the Ni plating film, and to lower the melting point of the Cu—Ni alloy in the brazing material. Even when the Au plating film is provided, the melting point of the Au—Ni alloy can be lowered, the distortion of the ceramic substrate due to the shrinkage of the metal lid can be alleviated, and the occurrence of cracks in the ceramic substrate can be prevented. Further, by reducing the penetration of the Ni plating with high hardness into the dividing groove, it is possible to prevent the occurrence of a division failure when dividing the electronic component package from a large number of assemblies into individual pieces. In addition, by increasing the thickness of the Cu plating film, the amount of Cu dissolved in the brazing material for joining the metal lid can be increased, and the melting point of the Cu-Ni alloy in the brazing material can be lowered. The distortion of the ceramic substrate due to the shrinkage of the lid can be alleviated, and it can act to prevent the occurrence of cracks in the ceramic substrate. Furthermore, when the sum of the thicknesses of the first Ni plating film and the Cu plating film is 5 μm or more, it is possible to prevent the metallized layer from seeping into the atmosphere.

続いて、添付した図面を参照しつつ、本発明を具体化した実施するための最良の形態について説明し、本発明の理解に供する。
ここに、図1(A)、(B)はそれぞれ本発明の一実施の形態に係る電子部品用パッケージの斜視図、A−A’線拡大縦断面図、図2は同電子部品用パッケージに金属蓋体を接合する説明図、図3(A)、(B)はそれぞれ同電子部品用パッケージの変形例、他の変形例の説明図である。
Subsequently, the best mode for carrying out the present invention will be described with reference to the accompanying drawings to provide an understanding of the present invention.
1A and 1B are a perspective view of an electronic component package according to an embodiment of the present invention, an AA ′ line enlarged longitudinal sectional view, and FIG. 2 is an electronic component package, respectively. FIGS. 3A and 3B are explanatory views for joining the metal lid, and FIGS. 3A and 3B are explanatory views of a modified example and another modified example of the electronic component package, respectively.

図1(A)、(B)に示すように、本発明の一実施の形態に係る電子部品用パッケージ10は、セラミック製基体11の中央部に半導体素子や、水晶振動子等の電子部品素子12を搭載するためのキャビティ部13を有し、このキャビティ部13の周囲には、キャビティ部13に搭載される電子部品素子12を囲繞できるようにするための土手部14を有している。この電子部品用パッケージ10には、キャビティ部13の底部に電子部品素子12が載置、接合され、例えば、電子部品素子12が半導体素子からなる場合には、半導体素子と、セラミック製基体11に形成されキャビティ部13内に延設している導体配線パターン15とをボンディングワイヤ16で接続している。そして、半導体素子は、導体配線パターン15と接続しているセラミック製基体11の側壁に形成されたキャスタレーション17を介してセラミック製基体11の底面に形成されている外部接続端子18と電気的に導通状態としている。この電子部品用パッケージ10には、電子部品素子12が搭載され、ろう材19を介して金属蓋体20が接合され、電子部品素子12が気密に封止される。   As shown in FIGS. 1A and 1B, an electronic component package 10 according to an embodiment of the present invention includes a semiconductor element 11 and an electronic component element such as a crystal resonator at the center of a ceramic substrate 11. A cavity portion 13 for mounting 12 is provided, and a bank portion 14 is provided around the cavity portion 13 so that the electronic component element 12 mounted on the cavity portion 13 can be surrounded. In the electronic component package 10, an electronic component element 12 is mounted and bonded to the bottom of the cavity portion 13. For example, when the electronic component element 12 is made of a semiconductor element, the semiconductor element and the ceramic substrate 11 are attached to the electronic component element 12. The conductor wiring pattern 15 formed and extending in the cavity portion 13 is connected by a bonding wire 16. The semiconductor element is electrically connected to the external connection terminal 18 formed on the bottom surface of the ceramic substrate 11 through a castellation 17 formed on the side wall of the ceramic substrate 11 connected to the conductor wiring pattern 15. It is in a conductive state. In this electronic component package 10, an electronic component element 12 is mounted, a metal lid 20 is joined via a brazing material 19, and the electronic component element 12 is hermetically sealed.

ここで、電子部品用パッケージ10のセラミック製基体11に用いられるセラミック基材としては、アルミナ、窒化アルミニウム等があり、特に材料が限定されるものではない。例えば、セラミック基材にアルミナからなるセラミックグリーンシートを用いる場合のセラミックグリーンシートは、先ず、酸化アルミニウム粉末にマグネシア、シリカ、カルシア等の焼結助剤を適当量加えた粉末に、ジオクチルフタレート等の可塑剤と、アクリル樹脂等のバインダー、及びトルエン、キシレン、アルコール類等の溶剤を加え、十分に混練して脱泡し、粘度2000〜40000cpsのスラリーを作製している。次に、ドクターブレード法等によって所望の厚み、例えば、0.12mmのシート状にした後乾燥させ、所望の大きさの矩形状に切断して形成している。   Here, examples of the ceramic base material used for the ceramic substrate 11 of the electronic component package 10 include alumina and aluminum nitride, and the material is not particularly limited. For example, when a ceramic green sheet made of alumina is used as the ceramic base material, the ceramic green sheet is first prepared by adding an appropriate amount of a sintering aid such as magnesia, silica, calcia to an aluminum oxide powder to a powder such as dioctyl phthalate. A plasticizer, a binder such as an acrylic resin, and a solvent such as toluene, xylene, and alcohol are added, and the mixture is sufficiently kneaded and defoamed to prepare a slurry having a viscosity of 2000 to 40000 cps. Next, it is formed into a sheet having a desired thickness, for example, 0.12 mm by a doctor blade method, and then dried and cut into a rectangular shape having a desired size.

セラミック製基体11を形成するために、シート状のセラミックグリーンシートが、例えば、アルミナや、窒化アルミニウムのような高温で焼成するものが用いられる時には、導体ペーストとしてWや、Mo等の高融点金属からなるペーストが用いられる。そして、セラミックグリーンシートには、この導体ペーストを用いてスクリーン印刷が行われて、ボンディングワイヤ16を接続するための導体配線パターン15や、土手部14の上面となる部分にメタライズ層21用のパターンや、その他の所望する導体パターン、例えば、キャスタレーション17用や、外部接続端子18用等のスルーホール導体や導体パターンが形成される。次いで、複数枚を積層したセラミックグリーンシートと、乾燥後の導体ペーストは、焼成炉で同時焼成して焼成体が形成される。これにより、電子部品用パッケージ10は、焼成体からなるセラミック製基体11の土手部14上面に、メタライズ層21を有する。   In order to form the ceramic substrate 11, when a sheet-like ceramic green sheet is used which is fired at a high temperature such as alumina or aluminum nitride, a high melting point metal such as W or Mo is used as a conductive paste. A paste consisting of The ceramic green sheet is screen-printed using this conductor paste, and the conductor wiring pattern 15 for connecting the bonding wires 16 and the pattern for the metallized layer 21 on the upper surface of the bank portion 14 are used. In addition, other desired conductor patterns, for example, through-hole conductors and conductor patterns for the castellation 17 and the external connection terminals 18 are formed. Next, the ceramic green sheet having a plurality of laminated layers and the dried conductor paste are simultaneously fired in a firing furnace to form a fired body. Thus, the electronic component package 10 has the metallized layer 21 on the top surface of the bank portion 14 of the ceramic base 11 made of a fired body.

しかも、この焼成体のセラミック製基体11には、外表面に露出する全ての導体パターン上に第1のNiめっきを施こすことで、土手部14の上面となる部分に形成されたメタライズ層21や、導体配線パターン15等の上面に、第1のNiめっき被膜22が形成される。続いて、第1のNiめっき被膜22の上面には、Cuめっきが施され、Cuめっき被膜23が形成される。更に、Cuめっき被膜23の上面には、第2のNiめっきが施され、第2のNiめっき被膜24が形成される。そして、最後に、第2のNiめっき被膜24の上面には、Auめっきが施され、Auめっき被膜25が形成される。これにより、電子部品用パッケージ10は、セラミック製基体11の土手部14上面のメタライズ層21上面に、第1のNiめっき被膜22、Cuめっき被膜23、第2のNiめっき被膜24、Auめっき被膜25の順番の4層からなるめっき被膜26を有する。なお、このめっき被膜26は、土手部14上面のメタライズ層21上面に形成される以外に、導体配線パターン15や、キャスタレーション17や、外部接続端子18等の上面にも形成されるが、図示することを省略している。   In addition, the ceramic substrate 11 of the fired body is subjected to the first Ni plating on all conductor patterns exposed on the outer surface, so that the metallized layer 21 formed on the upper surface of the bank portion 14 is formed. Alternatively, the first Ni plating film 22 is formed on the upper surface of the conductor wiring pattern 15 or the like. Subsequently, Cu plating is performed on the upper surface of the first Ni plating film 22 to form a Cu plating film 23. Furthermore, the second Ni plating is performed on the upper surface of the Cu plating film 23 to form a second Ni plating film 24. Finally, Au plating is performed on the upper surface of the second Ni plating film 24 to form an Au plating film 25. As a result, the electronic component package 10 has the first Ni plating film 22, the Cu plating film 23, the second Ni plating film 24, and the Au plating film on the upper surface of the metallized layer 21 on the upper surface of the bank portion 14 of the ceramic substrate 11. It has the plating film 26 which consists of four layers of the order of 25. The plating film 26 is formed on the upper surface of the conductor wiring pattern 15, the castellation 17, the external connection terminal 18, etc. in addition to being formed on the upper surface of the metallized layer 21 on the upper surface of the bank portion 14. Is omitted.

図2に示すように、電子部品用パッケージ10には、例えば、半導体素子等の電子部品素子12が搭載され、ボンディングワイヤ16で外部と電気的に導通状態とした後、土手部14上面のメタライズ層21に形成されためっき被膜26の上面に、Ag−Cuろうや、Au−Snろう等からなるろう材19を介して、KVや、42アロイ等の熱膨張係数がセラミックと近似する金属からなる金属蓋体20が載置される。そして、金属蓋体20の外周端部コーナー部には、シーム溶接機27の一対のローラーを縦横方向に移動させて電子部品用パッケージ10にシーム溶接して接合している。この溶接接合では、接合時に金属蓋体20の接合部周辺の温度が約1200℃程度になるので、金属蓋体20は、熱膨張した状態でセラミック製基体11に接合する。接合後は、冷却と共に金属蓋体20が収縮するが、ここで発生する収縮によるセラミック製基体11の歪は、めっき被膜26の中に延性に富むCuめっき被膜23を設けているので、セラミック製基体11の歪みを緩和することができ、セラミック製基体11のクラック発生を防止することができる。   As shown in FIG. 2, for example, an electronic component element 12 such as a semiconductor element is mounted on the electronic component package 10 and is electrically connected to the outside by a bonding wire 16, and then metallized on the top surface of the bank portion 14. On the upper surface of the plating film 26 formed on the layer 21, from a metal whose thermal expansion coefficient is similar to that of ceramic, such as KV or 42 alloy, through a brazing material 19 made of Ag—Cu brazing, Au—Sn brazing, or the like. A metal lid 20 is placed. The pair of rollers of the seam welding machine 27 are moved in the vertical and horizontal directions and seam welded to the electronic component package 10 to join the outer peripheral end corner of the metal lid 20. In this welding joining, since the temperature around the joint portion of the metal lid 20 is about 1200 ° C. during joining, the metal lid 20 is joined to the ceramic substrate 11 in a thermally expanded state. After the bonding, the metal lid 20 contracts with cooling. The distortion of the ceramic substrate 11 due to the contraction generated here is because the Cu plating film 23 having a high ductility is provided in the plating film 26. The distortion of the substrate 11 can be alleviated, and the occurrence of cracks in the ceramic substrate 11 can be prevented.

図3(A)に示すように、本発明の一実施の形態に係る電子部品用パッケージ10の変形例の電子部品用パッケージ10aは、セラミック製基体11の土手部14上面のメタライズ層21上面に、第1のNiめっき被膜22、Cuめっき被膜23、第2のNiめっき被膜24の順番の3層からなるめっき被膜26aを有する。また、図3(B)に示すように、本発明の一実施の形態に係る電子部品用パッケージ10の他の変形例の電子部品用パッケージ10bは、セラミック製基体11の土手部14上面のメタライズ層21上面に、第1のNiめっき被膜22、Cuめっき被膜23の順番の2層からなるめっき被膜26bを有する。なお、このめっき被膜26a、26bは、土手部14上面のメタライズ層21上面に形成される以外に、例えば、導体配線パターン15や、キャスタレーション17や、外部接続端子18等の上面にも形成される。そして、土手部14上面のメタライズ層21上面に形成されためっき被膜26a、26b以外の導体配線パターン15や、キャスタレーション17や、外部接続端子18等に形成されためっき被膜26a、26bの上面には、土手部14上面のメタライズ層21上面に形成されためっき被膜26a、26bの表面にめっきレジストシール等を展着してめっきが施せないようにし、これ以外のめっきが施せるめっき被膜26a上にAuめっきを、めっき被膜26b上に第2のNiめっき及びAuめっきを施している。なお、これらの処置は、導体配線パターン15上のワイヤボンド性を良好にしたり、外部接続端子18上の半田接続性を良好にしたり等するためのものであって、上記の処置に限定されるものではなく、必要に応じてめっきの種類を変更したり、省略することができる。   As shown in FIG. 3A, an electronic component package 10a, which is a modification of the electronic component package 10 according to the embodiment of the present invention, is formed on the upper surface of the metallized layer 21 on the upper surface of the bank portion 14 of the ceramic substrate 11. , The first Ni plating film 22, the Cu plating film 23, and the second Ni plating film 24. Further, as shown in FIG. 3B, an electronic component package 10b according to another modification of the electronic component package 10 according to the embodiment of the present invention is metallized on the top surface of the bank portion 14 of the ceramic substrate 11. On the upper surface of the layer 21, a plating film 26 b composed of two layers in the order of the first Ni plating film 22 and the Cu plating film 23 is provided. The plating films 26a and 26b are formed not only on the upper surface of the metallized layer 21 on the upper surface of the bank 14, but also on the upper surface of the conductor wiring pattern 15, the castellation 17, the external connection terminal 18, and the like. The And on the upper surfaces of the plating films 26a, 26b formed on the conductor wiring pattern 15 other than the plating films 26a, 26b formed on the upper surface of the metallized layer 21 on the bank portion 14, the castellation 17, the external connection terminal 18, etc. The plating resist seal or the like is spread on the surface of the plating films 26a and 26b formed on the upper surface of the metallized layer 21 on the upper surface of the bank portion 14 so that the plating cannot be performed. Au plating is performed on the plating film 26b by second Ni plating and Au plating. Note that these measures are for improving the wire bondability on the conductor wiring pattern 15 and for improving the solder connectability on the external connection terminals 18 and are limited to the above-described measures. The type of plating can be changed or omitted as necessary.

電子部品用パッケージ10、10a、10bには、いずれも第1のNiめっき被膜22の上面に延性に富むCuめっき被膜23を設けているので、ろう材19を介して加熱して金属蓋体20を接合した後の金属蓋体20の収縮によるセラミック製基体11の歪みを緩和することができ、セラミック製基体11のクラック発生を防止することができる。また、電子部品用パッケージ10のように、めっき被膜26の中にAuめっき被膜25を設けた場合には、金属蓋体20を接合する時のAg−Cuろう等からなるろう材19中に溶け込むAuとCuが合金を作るので、Cuが存在しないAu単体の場合より融点を下げることができて金属蓋体20の収縮によるセラミック製基体11の歪みを緩和でき、セラミック製基体11のクラックの発生の防止に作用する。なお、電子部品用パッケージ10、10a、10bに用いられる第1のNiめっき被膜22及び/又は第2のNiめっき被膜24は、例えば、Ni−Coめっき等のようなNi合金めっきからなるNiめっき被膜であってもよい。また、Cuめっき被膜23は、Cu合金めっき被膜であってもよい。   Each of the electronic component packages 10, 10 a, 10 b is provided with a ductile Cu plating film 23 on the upper surface of the first Ni plating film 22. The distortion of the ceramic substrate 11 due to the shrinkage of the metal lid 20 after bonding can be reduced, and the generation of cracks in the ceramic substrate 11 can be prevented. When the Au plating film 25 is provided in the plating film 26 as in the electronic component package 10, it melts into the brazing material 19 made of Ag—Cu brazing or the like when the metal lid 20 is joined. Since Au and Cu form an alloy, the melting point can be lowered as compared with the case of Au alone without Cu, the distortion of the ceramic substrate 11 due to the shrinkage of the metal lid 20 can be reduced, and the occurrence of cracks in the ceramic substrate 11 Acts to prevent Note that the first Ni plating film 22 and / or the second Ni plating film 24 used in the electronic component packages 10, 10 a, and 10 b are, for example, Ni plating made of Ni alloy plating such as Ni—Co plating. It may be a film. Further, the Cu plating film 23 may be a Cu alloy plating film.

セラミック製基体11の土手部14上面のメタライズ層21上面に施される第1のNiめっき被膜22の厚さと、Cuめっき被膜23上面に施される第2のNiめっき被膜24の厚さは、それぞれ0を超えて4μm以下に形成されているのがよい。それぞれのNiめっき被膜の厚さは、4μmを超えると、多数個の集合体からなる電子部品用パッケージ10、10a、10bから個片体に分割するための分割用溝の中のメタライズ層21の壁面に、硬度の高いNiめっきが入り込んで被膜を形成するので、個片体に分割する時に分割用溝に沿っての分割ができない分割不良を発生させている。また、それぞれのNiめっき被膜の厚さは、4μm以下に薄くすることで、金属蓋体20を接合する時のろう材19中に溶け込むNiの量を低減でき、ろう材19中のCu−Ni合金の融点を下げることができて金属蓋体20の収縮によるセラミック製基体11の歪みを緩和できるので、セラミック製基体11のクラック発生を防止する方向に作用する。また、第2のNiめっき被膜24の上面にAuめっき被膜25を設けた場合でも、ろう材19中のAu−Ni合金の融点を下げることができるので、同様にセラミック製基体11のクラック発生を防止する方向に作用する。なお、メタライズ層21上面に第1のNiめっき被膜22を施すのは、メタライズ層21上面に直接Cuめっき被膜23を施した場合に、Cuめっき被膜23とメタライズ層21との密着強度が低いために発生するめっき剥がれを防止するためである。   The thickness of the first Ni plating film 22 applied to the upper surface of the metallized layer 21 on the upper surface of the bank portion 14 of the ceramic substrate 11 and the thickness of the second Ni plating film 24 applied to the upper surface of the Cu plating film 23 are as follows: It is preferable that each thickness is greater than 0 and 4 μm or less. When the thickness of each Ni plating film exceeds 4 μm, the metallized layer 21 in the dividing groove for dividing the electronic component package 10, 10 a, 10 b composed of a large number of pieces into individual pieces is formed. Since Ni coating with high hardness enters the wall surface to form a coating film, a division defect that cannot be divided along the dividing groove is generated when dividing into individual pieces. Further, by reducing the thickness of each Ni plating film to 4 μm or less, the amount of Ni dissolved in the brazing material 19 when the metal lid 20 is joined can be reduced, and the Cu—Ni in the brazing material 19 can be reduced. Since the melting point of the alloy can be lowered and the distortion of the ceramic substrate 11 due to the shrinkage of the metal lid 20 can be alleviated, it acts in the direction of preventing the occurrence of cracks in the ceramic substrate 11. Further, even when the Au plating film 25 is provided on the upper surface of the second Ni plating film 24, the melting point of the Au—Ni alloy in the brazing material 19 can be lowered. Acts in the direction to prevent. The first Ni plating film 22 is applied to the upper surface of the metallized layer 21 because the adhesion strength between the Cu plating film 23 and the metallized layer 21 is low when the Cu plating film 23 is directly applied to the upper surface of the metallized layer 21. This is to prevent the peeling of the plating generated in the film.

セラミック製基体11の土手部14上面のメタライズ層21上面に施された第1のNiめっき被膜22上面のCuめっき被膜23の厚さは、4μm以上であるのがよい。Cuめっき被膜23の厚さは、4μmを下まわると、金属蓋体20の接合後の収縮によるセラミック製基体11の歪みをCuの延性によって緩和させる効果が少なくなるので、セラミック製基体11のクラック発生を防止する効果が小さくなる。また、Cuめっき被膜23の厚さを厚くすることは、金属蓋体20を接合する時のろう材19中に溶け込むCuの量を増加できるので、ろう材19中のCu−Ni合金の融点を下げることができて金属蓋体20の収縮によるセラミック製基体11の歪みを緩和でき、セラミック製基体11のクラック発生を防止する方向に作用する。   The thickness of the Cu plating film 23 on the upper surface of the first Ni plating film 22 applied on the upper surface of the metallized layer 21 on the upper surface of the bank portion 14 of the ceramic substrate 11 is preferably 4 μm or more. If the thickness of the Cu plating film 23 is less than 4 μm, the effect of alleviating the distortion of the ceramic substrate 11 due to shrinkage after joining of the metal lid 20 due to the ductility of Cu is reduced. The effect of preventing the occurrence is reduced. Further, increasing the thickness of the Cu plating film 23 can increase the amount of Cu dissolved in the brazing material 19 when the metal lid 20 is joined, so that the melting point of the Cu—Ni alloy in the brazing material 19 is increased. It can be lowered, the distortion of the ceramic substrate 11 due to the shrinkage of the metal lid 20 can be relaxed, and it acts in the direction of preventing the ceramic substrate 11 from cracking.

メタライズ層21上面に施された第1のNiめっき被膜22と、第1のNiめっき被膜22上面に施されたCuめっき被膜23と、Cuめっき被膜23上面に施された第2のNiめっき被膜24の厚さの和、又は、メタライズ層21上面に施された第1のNiめっき被膜22と、第1のNiめっき被膜22上面に施されたCuめっき被膜23の厚さの和は、5μm以上になるように形成されているのがよい。第1のNiめっき被膜22、Cuめっき被膜23、及び第2のNiめっき被膜24の厚さの和、又は、第1のNiめっき被膜22と、Cuめっき被膜23の厚さの和は、5μmを下まわると、メタライズ層21を大気中から保護するための厚さが不足してメタライズ層21のしみ出しが発生する場合がある。   A first Ni plating film 22 applied to the upper surface of the metallized layer 21, a Cu plating film 23 applied to the upper surface of the first Ni plating film 22, and a second Ni plating film applied to the upper surface of the Cu plating film 23 The sum of the thicknesses of 24 or the sum of the thicknesses of the first Ni plating film 22 applied to the upper surface of the metallized layer 21 and the Cu plating film 23 applied to the upper surface of the first Ni plating film 22 is 5 μm. It is good to be formed as mentioned above. The sum of the thicknesses of the first Ni plating film 22, the Cu plating film 23, and the second Ni plating film 24, or the sum of the thicknesses of the first Ni plating film 22 and the Cu plating film 23 is 5 μm. Below the thickness, the thickness for protecting the metallized layer 21 from the atmosphere is insufficient, and the metallized layer 21 may ooze out.

本発明者は、セラミック基材にアルミナ、メタライズ層形成のための導体ペーストにWを用い、外形寸法が5×2mmのセラミック製基体の土手部上面のメタライズ層上面にめっき被膜のそれぞれのめっきの被膜厚さと、それぞれのめっきの種類の組み合わせを替えた実施例について、KV製の金属蓋体をAg−Cuろうでシーム溶接接合した後の、(1)セラミック製基体のクラック不良発生状況、(2)集合体の電子部品用パッケージから個片体の電子部品用パッケージに分割する時の分割不良発生状況、(3)高温高湿試験による信頼性試験実施後のめっき被膜によるメタライズ層のしみ出し不良発生状況、について確認した。併せて、従来例のめっき被膜がNiめっき被膜と、Auめっき被膜からなる電子部品用パッケージに直接金属蓋体を接合する形態のものについてもクラック不良、分割不良、及びしみ出し不良の発生状況を確認した。実施例のめっき被膜の厚さは、第1のNiめっき被膜を0.5、1、3、4、5μm、Cuめっき被膜を3、4、7μm、第2のNiめっき被膜を0.5、1、3、4、5μm、Auめっき被膜を0.6μmのものを用いた。その結果を表1に示す。   The present inventor uses alumina for the ceramic base material, W for the conductive paste for forming the metallized layer, and each plating film on the upper surface of the metallized layer on the top of the bank portion of the ceramic substrate having an outer dimension of 5 × 2 mm. (1) The crack occurrence state of the ceramic substrate after seam welding joining the KV metal lid with Ag-Cu brazing, for the examples in which the film thickness and the combination of the types of plating were changed, 2) Situation of occurrence of division failure when dividing an assembly electronic component package into an individual electronic component package, (3) Exudation of metallized layer by plating film after reliability test by high temperature and high humidity test The defect occurrence status was confirmed. At the same time, the conventional plating film has a Ni plating film and an Au plating film in which the metal lid is directly joined to the electronic component package. The occurrence of crack defects, division defects, and seepage defects is also observed. confirmed. The thickness of the plating film of the example is 0.5, 1, 3, 4, 5 μm for the first Ni plating film, 3, 4, 7 μm for the Cu plating film, 0.5 for the second Ni plating film, 1, 3, 4, 5 μm, and Au plating film of 0.6 μm was used. The results are shown in Table 1.

Figure 2005079424
Figure 2005079424

実施例の第1のNiめっき被膜、Cuめっき被膜、第2のNiめっき被膜、Auめっき被膜の順番の4層からなるめっき被膜の場合、第1のNiめっき被膜、Cuめっき被膜、第2のNiめっき被膜の順番の3層からなるめっき被膜の場合、第1のNiめっき被膜、Cuめっき被膜の順番の2層からなるめっき被膜の場合のいずれも、クラック不良の発生、分割不良の発生、しみ出し不良の発生を防止することができることが確認できた。また、この中でも、Cuめっき被膜の厚さは、4μmを下まわると、セラミック製基体のクラック不良発生について若干問題がでることが確認できた。また、第1のNiめっき被膜の厚さと、第2のNiめっき被膜の厚さのそれぞれが4μmを超えると、集合体の電子部品用パッケージから個片体の電子部品用パッケージに分割する時の分割不良発生について若干問題がでることが確認できた。更に、第1のNiめっき被膜の厚さと、Cuめっき被膜の厚さと、第2のNiめっき被膜の厚さの和、又は第1のNiめっき被膜の厚さと、Cuめっき被膜の厚さの和は、5μmを下まわると、メタライズ層のしみ出し不良発生について若干問題がでることが確認できた。従来例のNiめっき被膜と、Auめっき被膜からなる場合には、Niめっき被膜の厚さが3μm程度と薄くなると、メタライズ層のしみ出し不良発生について問題があることが確認できた。また、Niめっき被膜の厚さが15μm程度と厚くなると、集合体の電子部品用パッケージから個片体の電子部品用パッケージに分割する時の分割不良や、セラミック製基体のクラック不良が発生することが確認できた。   In the case of a plating film comprising four layers in the order of the first Ni plating film, Cu plating film, second Ni plating film, and Au plating film of the example, the first Ni plating film, the Cu plating film, the second In the case of a plating film consisting of three layers in the order of the Ni plating film, in both cases of the first Ni plating film and the plating film consisting of two layers in the order of the Cu plating film, occurrence of crack failure, occurrence of division failure, It was confirmed that the occurrence of exuding defects could be prevented. Among these, it was confirmed that when the thickness of the Cu plating film was less than 4 μm, there was a slight problem with respect to the occurrence of crack defects in the ceramic substrate. Moreover, when each of the thickness of the first Ni plating film and the thickness of the second Ni plating film exceeds 4 μm, it is necessary to divide the assembly electronic component package into the individual electronic component package. It was confirmed that there were some problems with the occurrence of division failures. Furthermore, the sum of the thickness of the first Ni plating film, the thickness of the Cu plating film, and the thickness of the second Ni plating film, or the sum of the thickness of the first Ni plating film and the thickness of the Cu plating film Was less than 5 μm, it was confirmed that there was a slight problem with respect to the occurrence of exudation failure of the metallized layer. In the case where the Ni plating film of the conventional example and the Au plating film are used, it has been confirmed that when the Ni plating film is as thin as about 3 μm, there is a problem with the occurrence of a seepage failure of the metallized layer. Further, when the thickness of the Ni plating film becomes as thick as about 15 μm, there may occur a division failure when dividing the assembly electronic component package into an individual electronic component package or a crack failure of the ceramic substrate. Was confirmed.

本発明の電子部品用パッケージは、半導体素子や、水晶振動子等の電子部品を実装させて、小型で、高信頼性が要求される、例えば、携帯電話や、ノートブック型のパソコン等の電子装置に組み込まれて用いることができる。   The electronic component package according to the present invention is mounted with an electronic component such as a semiconductor element or a crystal resonator, and is small and highly reliable. For example, an electronic component such as a mobile phone or a notebook personal computer. It can be used by being incorporated in an apparatus.

(A)、(B)はそれぞれ本発明の一実施の形態に係る電子部品用パッケージの斜視図、A−A’線拡大縦断面図である。(A), (B) is the perspective view of the package for electronic components which concerns on one embodiment of this invention, respectively, and an A-A 'line enlarged vertical sectional view. 同電子部品用パッケージに金属蓋体を接合する説明図である。It is explanatory drawing which joins a metal cover body to the package for electronic components. (A)、(B)はそれぞれ同電子部品用パッケージの変形例、他の変形例の説明図である。(A), (B) is explanatory drawing of the modification of the package for electronic components, and another modification, respectively. (A)、(B)はそれぞれ従来の電子部品用パッケージの説明図、金属製の蓋体を接合する説明図である。(A), (B) is explanatory drawing of the package for the conventional electronic components, and explanatory drawing which joins a metal cover body, respectively. 従来の他の電子部品用パッケージの説明図である。It is explanatory drawing of the other conventional package for electronic components.

符号の説明Explanation of symbols

10、10a、10b:電子部品用パッケージ、11:セラミック製基体、12:電子部品素子、13:キャビティ部、14:土手部、15:導体配線パターン、16:ボンディングワイヤ、17:キャスタレーション、18:外部接続端子、19:ろう材、20:金属蓋体、21:メタライズ層、22:第1のNiめっき被膜、23:Cuめっき被膜、24:第2のNiめっき被膜、25:Auめっき被膜、26、26a、26b:めっき被膜、27:シーム溶接機   10, 10a, 10b: Electronic component package, 11: Ceramic substrate, 12: Electronic component element, 13: Cavity, 14: Bank, 15: Conductor wiring pattern, 16: Bonding wire, 17: Castellation, 18 : External connection terminal, 19: brazing material, 20: metal lid, 21: metallized layer, 22: first Ni plating film, 23: Cu plating film, 24: second Ni plating film, 25: Au plating film , 26, 26a, 26b: plating film, 27: seam welding machine

Claims (2)

キャビティ部の周囲に土手部を有するセラミック製基体からなり、前記キャビティ部の底部に電子部品素子が搭載された後、前記土手部に金属蓋体が載置されてシーム溶接で接合され、前記電子部品素子が気密に封止される電子部品用パッケージにおいて、
前記セラミック製基体の前記土手部上面にメタライズ層を有し、しかも、該メタライズ層上に第1のNi、Cu、第2のNi、Auめっきの順番、第1のNi、Cu、第2のNiめっきの順番、又は第1のNi、Cuめっきの順番で施されるめっき被膜を有することを特徴とする電子部品用パッケージ。
It consists of a ceramic base having a bank around the cavity, and after an electronic component element is mounted on the bottom of the cavity, a metal lid is placed on the bank and joined by seam welding. In an electronic component package in which component elements are hermetically sealed,
The ceramic base has a metallized layer on the top surface of the bank, and the first Ni, Cu, second Ni, Au plating order, first Ni, Cu, second An electronic component package comprising a plating film applied in the order of Ni plating or the order of first Ni and Cu plating.
請求項1記載の電子部品用パッケージにおいて、前記第1のNiめっき被膜と、前記第2のNiめっき被膜の厚さがそれぞれ0を超え4μm以下、前記Cuめっき被膜の厚さが4μm以上、しかも、前記第1のNiめっき被膜の厚さ、前記Cuめっき被膜の厚さ、及び前記第2のNiめっき被膜の厚さの和、又は前記第1のNiめっき被膜の厚さと、前記Cuめっき被膜の厚さの和が5μm以上有することを特徴とする電子部品用パッケージ。   2. The electronic component package according to claim 1, wherein the thicknesses of the first Ni plating film and the second Ni plating film are each greater than 0 and 4 μm or less, and the thickness of the Cu plating film is 4 μm or more. , The sum of the thickness of the first Ni plating film, the thickness of the Cu plating film, and the thickness of the second Ni plating film, or the thickness of the first Ni plating film and the Cu plating film A package for electronic parts, characterized in that the sum of the thicknesses is 5 μm or more.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009200093A (en) * 2008-02-19 2009-09-03 Murata Mfg Co Ltd Hollow type electronic component
JP2012174713A (en) * 2011-02-17 2012-09-10 Kyocera Corp Electronic component housing package, and electronic equipment including the same
JP2015159139A (en) * 2014-02-21 2015-09-03 京セラ株式会社 Wiring board, electronic apparatus, and electronic module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009200093A (en) * 2008-02-19 2009-09-03 Murata Mfg Co Ltd Hollow type electronic component
JP2012174713A (en) * 2011-02-17 2012-09-10 Kyocera Corp Electronic component housing package, and electronic equipment including the same
JP2015159139A (en) * 2014-02-21 2015-09-03 京セラ株式会社 Wiring board, electronic apparatus, and electronic module

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