JP2005011926A - Airtight terminal for optical semiconductor device - Google Patents

Airtight terminal for optical semiconductor device Download PDF

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Publication number
JP2005011926A
JP2005011926A JP2003173203A JP2003173203A JP2005011926A JP 2005011926 A JP2005011926 A JP 2005011926A JP 2003173203 A JP2003173203 A JP 2003173203A JP 2003173203 A JP2003173203 A JP 2003173203A JP 2005011926 A JP2005011926 A JP 2005011926A
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JP
Japan
Prior art keywords
semiconductor device
base
optical semiconductor
heat sink
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003173203A
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Japanese (ja)
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JP4079044B2 (en
Inventor
Yoshihiro Aoki
良洋 青木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2003173203A priority Critical patent/JP4079044B2/en
Publication of JP2005011926A publication Critical patent/JP2005011926A/en
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Publication of JP4079044B2 publication Critical patent/JP4079044B2/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an airtight terminal for optical semiconductor device capable of mounting a semiconductor element having large overall dimensions without revising the design of optical characteristics while preventing the size of itself from increasing. <P>SOLUTION: The airtight terminal for optical semiconductor device is provided with an iron or iron alloy base having a through hole bonded with an insulated lead through insulating glass, and a copper or copper alloy heat sink having a part for mounting a semiconductor element on one side thereof, and the heat sink is bonded to a bottomed recess opening to the upper surface side of the base. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は光半導体装置用気密端子に関するものである。
【0002】
【従来の技術】
従来の光半導体装置用気密端子としては、半導体素子搭載面を有したヒートシンクとベースとを接触する接着面積を大きく確保することで放熱性を良くしているものがあった(例えば、特許文献1 参照)。
【0003】
図2(a)は、前記特許文献1に記載された従来の光半導体装置用気密端子を示した上面図であり、図2(b)は図2(a)のY−Y’線に沿った断面図である。
【0004】
図2(a)、(b)において、光半導体装置用気密端子101は、鉄あるいは鉄−ニッケル合金からなるベース102と、銅あるいは銅合金例えば銅−タングステン合金からなるヒートシンク103と、ベース102底面に溶接されたアースリード104と、ベース102に形成された貫通孔105に絶縁リード106が絶縁ガラス107により気密絶縁的に封着されていた。
【0005】
ヒートシンク103には半導体素子搭載面108と、絶縁リード106の逃げ溝109と、逃げ溝109の外側面110とが設けられており、半導体素子搭載面108とその両側の外側面110とが同一平面に形成されている。
【0006】
ヒートシンク103は銀ろう(図示せず。)によりベース102上面に接合されている。
【0007】
ベース102に形成された貫通孔105の両外側に広がるヒートシンク103が接合されることとなり、ベース102とヒートシンク103との接触面積を大きく確保しベース102とヒートシンク103との間の熱抵抗を大幅に低減し、半導体素子(図示せず。)の発熱を放熱していた。
【0008】
【特許文献1】
特開2000−183440号公報
【0009】
【発明が解決しようとする課題】
しかしながら、前記従来の構成では、高輝度、高波長など、さらなる出力増加に対応する外形寸法が大きな半導体素子を搭載することが困難であり、外形寸法が大きな半導体素子を搭載する場合、ヒートシンク103を上方に拡大する必要がある。この場合、ベース102上面を基準とする半導体素子の発光点が従来に比べ上方に移動することから、光半導体装置自体の光学特性を設計変更したり、光半導体装置を搭載するピックアップを設計変更する必要がある。また、光半導体装置用気密端子自体も大型化するという課題を有していた。
【0010】
本発明は、前記従来の課題を解決するもので、光学特性の設計変更を行うこと無く外形寸法が大きな半導体素子を搭載することを可能とし、且つ半導体装置用気密端子自体が大型化することを防いだ光半導体装置用気密端子を提供することを目的とする。
【0011】
【課題を解決するための手段】
前記従来の課題を解決するために、本発明の光半導体装置用気密端子は、鉄又は鉄合金よりなるベースに設けた貫通孔に絶縁ガラスを介して絶縁リードを絶縁して固着したベースと、銅又は銅合金よりなり、一方の面に半導体素子を搭載する半導体素子搭載部を形成したヒートシンクとを備え、ベース上面側に設けた開口部を有した有底凹部にヒートシンクが固着してなり、さらにベースの下面に貫通孔を外囲した突起部を形成するものである。
【0012】
本構成によって、光学特性の設計変更を行うこと無く外形寸法が大きな半導体素子を搭載することを可能とし、且つ半導体装置用気密端子自体が大型化することを防ぐことができる。
【0013】
【発明の実施の形態】
以下本発明の実施の形態について、図面を参照しながら説明する。
【0014】
(実施の形態)
本発明の実施の形態における光半導体装置用気密端子として例えば、レーザーダイオード(以下、LDと称する)用気密端子を用いて説明する。図1(a)は、本発明の実施の形態におけるLD用気密端子の上面図であり、図1(b)は図1(a)のX−X’線に沿った断面図である。
【0015】
図1(a)、(b)において、LD用気密端子1は、鉄あるいは鉄−ニッケル合金からなるベース2と、銅あるいは銅合金例えば無酸素銅からなるヒートシンク3と、ベース2底面に溶接された鉄あるいは鉄−ニッケル合金からなるアースリード4と、ベース2に形成された貫通孔5に鉄あるいは鉄−ニッケル合金からなる絶縁リード6が絶縁ガラス7により気密絶縁的に封着され、ヒートシンク3には半導体素子搭載面8が形成されている。
【0016】
ベース2にはヒートシンク3を装着するために上面に開口部を有する凹部9が設けられると共に、ベース2下面中心部から貫通孔5周縁に連続した突起部10が形成されている。凹部9には銀ろう(図示せず。)を介してヒートシンク3が接続されている。これによれば、凹部9の有底面まで半導体素子搭載面8の面積を拡大するものである。
【0017】
凹部9は搭載される半導体素子(図示せず。)寸法に合わせて深さを適宜設定すれば良い。
【0018】
また、凹部9を深く設けた場合、絶縁ガラス7を適正に封着するのに必要なベース2と絶縁ガラス7とが接する面積(以下、封着パスと称する)が減少し、気密性や絶縁性の低下などの不具合が発生することがある。しかしながら、本実施の形態によれば、ベース2下面に形成した突起部10により適正な封着パスを得ることができ、気密性や絶縁性の低下などの不具合の発生を防ぐものであり、さらに、ヒートシンク3を上方に拡大する必要がなく、気密端子が大型化することを防いでいる。このとき、封着パスは少なくとも0.8mm以上あることが望ましい。
【0019】
以上、本発明による光半導体装置用気密端子について説明したが、本発明の思想に逸脱しない限り適宜変更可能である。
【0020】
【発明の効果】
以上のように、本発明の光半導体装置用気密端子によれば、光学特性の設計変更を行うこと無く外形寸法が大きな半導体素子を搭載することを可能とする。
【0021】
半導体装置用気密端子自体が大型化することを防ぐことができる。
【図面の簡単な説明】
【図1】(a)は本発明の実施の形態における光半導体装置用気密端子の上面図
(b)は図1(a)のX−X’線に沿った断面図
【図2】(a)は従来の光半導体装置用気密端子の上面図
(b)は図2(a)のY−Y’線に沿った断面図
【符号の説明】
1 光半導体装置用気密端子
2 ベース
3 ヒートシンク
4 アースリード
5 貫通孔
6 絶縁リード
7 絶縁ガラス
8 半導体素子搭載面
9 凹部
10 突起部
101 光半導体装置用気密端子
102 ベース
103 ヒートシンク
104 アースリード
105 貫通孔
106 絶縁リード
107 絶縁ガラス
108 半導体素子搭載面
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an airtight terminal for an optical semiconductor device.
[0002]
[Prior art]
As a conventional hermetic terminal for an optical semiconductor device, there is one that improves heat dissipation by ensuring a large adhesion area for contacting a heat sink having a semiconductor element mounting surface and a base (for example, Patent Document 1). reference).
[0003]
FIG. 2A is a top view showing a conventional hermetic terminal for an optical semiconductor device described in Patent Document 1, and FIG. 2B is taken along line YY ′ in FIG. FIG.
[0004]
2A and 2B, an airtight terminal 101 for an optical semiconductor device includes a base 102 made of iron or an iron-nickel alloy, a heat sink 103 made of copper or a copper alloy such as a copper-tungsten alloy, and a bottom surface of the base 102. The insulating lead 106 is hermetically sealed by the insulating glass 107 in the ground lead 104 welded to the through hole 105 and the through hole 105 formed in the base 102.
[0005]
The heat sink 103 is provided with a semiconductor element mounting surface 108, a clearance groove 109 of the insulating lead 106, and an outer surface 110 of the clearance groove 109. The semiconductor element mounting surface 108 and the outer surfaces 110 on both sides thereof are flush with each other. Is formed.
[0006]
The heat sink 103 is joined to the upper surface of the base 102 by silver solder (not shown).
[0007]
The heat sink 103 that spreads on both outer sides of the through hole 105 formed in the base 102 is joined, so that a large contact area between the base 102 and the heat sink 103 is secured, and the thermal resistance between the base 102 and the heat sink 103 is greatly increased. The heat generated by the semiconductor element (not shown) was reduced and released.
[0008]
[Patent Document 1]
Japanese Patent Laid-Open No. 2000-183440
[Problems to be solved by the invention]
However, in the conventional configuration, it is difficult to mount a semiconductor element having a large outer dimension corresponding to a further increase in output such as high luminance and high wavelength. It is necessary to expand upward. In this case, the light emitting point of the semiconductor element relative to the upper surface of the base 102 moves upward as compared with the conventional case. Therefore, the optical characteristics of the optical semiconductor device itself are changed in design, or the pickup on which the optical semiconductor device is mounted is changed in design. There is a need. In addition, the hermetic terminal for an optical semiconductor device itself has a problem of increasing the size.
[0010]
The present invention solves the above-described conventional problems, and allows a semiconductor element having a large outer dimension to be mounted without changing the design of optical characteristics, and increases the size of a hermetic terminal for a semiconductor device itself. An object of the present invention is to provide an airtight terminal for an optical semiconductor device which is prevented.
[0011]
[Means for Solving the Problems]
In order to solve the above-described conventional problems, an airtight terminal for an optical semiconductor device of the present invention includes a base in which an insulating lead is insulated and fixed to a through hole provided in a base made of iron or an iron alloy via an insulating glass; It is made of copper or copper alloy, and includes a heat sink formed with a semiconductor element mounting portion for mounting a semiconductor element on one surface, and the heat sink is fixed to a bottomed recess having an opening provided on the upper surface side of the base, Furthermore, a projection part surrounding the through hole is formed on the lower surface of the base.
[0012]
With this configuration, it is possible to mount a semiconductor element having a large outer dimension without changing the design of optical characteristics, and it is possible to prevent the airtight terminal for a semiconductor device itself from becoming large.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0014]
(Embodiment)
For example, a laser diode (hereinafter referred to as LD) hermetic terminal will be described as the hermetic terminal for an optical semiconductor device in the embodiment of the present invention. FIG. 1A is a top view of an LD hermetic terminal according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view taken along line XX ′ in FIG.
[0015]
1 (a) and 1 (b), an LD hermetic terminal 1 is welded to a base 2 made of iron or an iron-nickel alloy, a heat sink 3 made of copper or a copper alloy such as oxygen-free copper, and a bottom surface of the base 2. An earth lead 4 made of iron or iron-nickel alloy and an insulating lead 6 made of iron or iron-nickel alloy are hermetically sealed by an insulating glass 7 in a through hole 5 formed in the base 2, and the heat sink 3. A semiconductor element mounting surface 8 is formed on the substrate.
[0016]
The base 2 is provided with a recess 9 having an opening on the upper surface for mounting the heat sink 3, and a protrusion 10 is formed from the center of the lower surface of the base 2 to the periphery of the through hole 5. The heat sink 3 is connected to the recess 9 via a silver solder (not shown). According to this, the area of the semiconductor element mounting surface 8 is expanded to the bottom surface of the recess 9.
[0017]
The depth of the recess 9 may be appropriately set according to the size of a semiconductor element (not shown) to be mounted.
[0018]
In addition, when the concave portion 9 is provided deeply, an area (hereinafter referred to as a sealing path) where the insulating glass 7 is in contact with the base 2 and the insulating glass 7 necessary for properly sealing the insulating glass 7 is reduced, and airtightness and insulation are reduced. In some cases, problems such as a decrease in performance may occur. However, according to the present embodiment, an appropriate sealing path can be obtained by the protrusion 10 formed on the lower surface of the base 2, and the occurrence of problems such as a decrease in airtightness and insulation is prevented. The heat sink 3 does not need to be expanded upward, and the airtight terminal is prevented from increasing in size. At this time, the sealing path is desirably at least 0.8 mm.
[0019]
Although the above has described the hermetic terminal for an optical semiconductor device according to the present invention, it can be appropriately changed without departing from the concept of the present invention.
[0020]
【The invention's effect】
As described above, according to the hermetic terminal for an optical semiconductor device of the present invention, a semiconductor element having a large outer dimension can be mounted without changing the design of optical characteristics.
[0021]
An increase in the size of the hermetic terminal for a semiconductor device can be prevented.
[Brief description of the drawings]
FIG. 1A is a top view of an airtight terminal for an optical semiconductor device according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view taken along line XX ′ of FIG. ) Is a top view of a conventional hermetic terminal for an optical semiconductor device, and FIG. 2B is a cross-sectional view taken along line YY ′ of FIG. 2A.
DESCRIPTION OF SYMBOLS 1 Airtight terminal 2 for optical semiconductor devices Base 3 Heat sink 4 Ground lead 5 Through hole 6 Insulating lead 7 Insulating glass 8 Semiconductor element mounting surface 9 Recess 10 Protrusion 101 Airtight terminal 102 for optical semiconductor device Base 103 Heat sink 104 Earth lead 105 Through hole 106 Insulating lead 107 Insulating glass 108 Semiconductor element mounting surface

Claims (3)

鉄又は鉄合金よりなるベースに設けた貫通孔に絶縁ガラスを介して絶縁リードを絶縁して固着したベースと、銅又は銅合金よりなり、一方の面に半導体素子を搭載する半導体素子搭載部を形成したヒートシンクとを備え、前記ベース上面側に設けた開口部を有した有底凹部に前記ヒートシンクが固着してなることを特徴とする光半導体装置用気密端子。A base in which an insulating lead is insulated and fixed via an insulating glass in a through hole provided in a base made of iron or an iron alloy, and a semiconductor element mounting portion made of copper or a copper alloy and mounting a semiconductor element on one surface An airtight terminal for an optical semiconductor device, comprising: a heat sink formed, wherein the heat sink is fixed to a bottomed recess having an opening provided on the upper surface side of the base. 前記有底凹部底面から垂直に延在した前記半導体素子搭載部が形成されたことを特徴とする請求項1記載の光半導体装置用気密端子。2. The hermetic terminal for an optical semiconductor device according to claim 1, wherein the semiconductor element mounting portion extending vertically from the bottom surface of the bottomed recess is formed. 前記ベースの下面に前記貫通孔を外囲した突起部を形成したことを特徴とする請求項1または2に記載の光半導体装置用気密端子。The hermetic terminal for an optical semiconductor device according to claim 1, wherein a protrusion that surrounds the through hole is formed on a lower surface of the base.
JP2003173203A 2003-06-18 2003-06-18 Airtight terminals for optical semiconductor devices Expired - Fee Related JP4079044B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003173203A JP4079044B2 (en) 2003-06-18 2003-06-18 Airtight terminals for optical semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003173203A JP4079044B2 (en) 2003-06-18 2003-06-18 Airtight terminals for optical semiconductor devices

Publications (2)

Publication Number Publication Date
JP2005011926A true JP2005011926A (en) 2005-01-13
JP4079044B2 JP4079044B2 (en) 2008-04-23

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008235851A (en) * 2007-02-21 2008-10-02 Shinko Electric Ind Co Ltd Stem for optical semiconductor device, and manufacturing method therefor
WO2017158816A1 (en) * 2016-03-18 2017-09-21 Necディスプレイソリューションズ株式会社 Light-emitting element, structure and method for cooling light-emitting element, and projection display device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54134585A (en) * 1978-03-31 1979-10-19 Int Standard Electric Corp Injection laser mount
JPH06204554A (en) * 1992-06-09 1994-07-22 Whitaker Corp:The Laser assembly
JP2000183440A (en) * 1998-12-21 2000-06-30 Fuji Photo Film Co Ltd Stem for semiconductor laser element and manufacture thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54134585A (en) * 1978-03-31 1979-10-19 Int Standard Electric Corp Injection laser mount
JPH06204554A (en) * 1992-06-09 1994-07-22 Whitaker Corp:The Laser assembly
JP2000183440A (en) * 1998-12-21 2000-06-30 Fuji Photo Film Co Ltd Stem for semiconductor laser element and manufacture thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008235851A (en) * 2007-02-21 2008-10-02 Shinko Electric Ind Co Ltd Stem for optical semiconductor device, and manufacturing method therefor
WO2017158816A1 (en) * 2016-03-18 2017-09-21 Necディスプレイソリューションズ株式会社 Light-emitting element, structure and method for cooling light-emitting element, and projection display device

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