JP2004534443A - 一段スイッチの構造 - Google Patents

一段スイッチの構造 Download PDF

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Publication number
JP2004534443A
JP2004534443A JP2002586593A JP2002586593A JP2004534443A JP 2004534443 A JP2004534443 A JP 2004534443A JP 2002586593 A JP2002586593 A JP 2002586593A JP 2002586593 A JP2002586593 A JP 2002586593A JP 2004534443 A JP2004534443 A JP 2004534443A
Authority
JP
Japan
Prior art keywords
data
output
input
storage unit
intermediate storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002586593A
Other languages
English (en)
Japanese (ja)
Inventor
ダリー・ウィリアム・ジェー
エドモンドソン・ジョン
プライオア・ドナルド
ウー・エフレム
ポールトン・ジョン・ダブリュ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
Velio Communications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Velio Communications Inc filed Critical Velio Communications Inc
Publication of JP2004534443A publication Critical patent/JP2004534443A/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/40—Constructional details, e.g. power supply, mechanical construction or backplane
    • H04L49/405—Physical details, e.g. power supply, mechanical construction or backplane of ATM switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Interface Circuits In Exchanges (AREA)
JP2002586593A 2001-04-27 2002-04-24 一段スイッチの構造 Pending JP2004534443A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US28725201P 2001-04-27 2001-04-27
US10/052,233 US6807186B2 (en) 2001-04-27 2002-01-17 Architectures for a single-stage grooming switch
PCT/US2002/013066 WO2002089431A1 (en) 2001-04-27 2002-04-24 Architectures for a single-stage switch

Publications (1)

Publication Number Publication Date
JP2004534443A true JP2004534443A (ja) 2004-11-11

Family

ID=26730366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002586593A Pending JP2004534443A (ja) 2001-04-27 2002-04-24 一段スイッチの構造

Country Status (8)

Country Link
US (1) US6807186B2 (enExample)
EP (1) EP1384357B1 (enExample)
JP (1) JP2004534443A (enExample)
CN (1) CN1262091C (enExample)
AT (1) ATE422769T1 (enExample)
CA (1) CA2445001C (enExample)
DE (1) DE60231112D1 (enExample)
WO (1) WO2002089431A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014502810A (ja) * 2010-12-21 2014-02-03 アルカテル−ルーセント 光トランスポートネットワークのネットワークノード

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7609729B2 (en) * 2001-06-01 2009-10-27 Fujitsu Limited System and method of multiplexing TDM and packet data
US7167480B1 (en) * 2001-06-21 2007-01-23 Lighthouse Capital Partners Iv, Lp Multi-service data transport architecture
US9048965B2 (en) * 2001-08-24 2015-06-02 Mark Henrik Sandstrom Input-controllable dynamic cross-connect
US7139291B2 (en) * 2002-04-04 2006-11-21 Bay Microsystems, Inc. Hitless reconfiguration of a switching network
US20080117068A1 (en) * 2006-11-16 2008-05-22 Mark Henrik Sandstrom Intelligent Network Alarm Status Monitoring
US9917883B2 (en) 2002-06-13 2018-03-13 Throughputer, Inc. Direct binary file transfer based network management system free of messaging, commands and data format conversions
US7305014B2 (en) * 2003-04-22 2007-12-04 David Kirk Synchronous system bus
EP1585272B1 (en) * 2004-04-05 2007-08-22 Alcatel Lucent Switching matrix for a telecommunication network element
US7623454B1 (en) * 2005-11-16 2009-11-24 Sprint Communications Company L.P. Packet-oriented cross-connect system
US7986713B2 (en) 2006-12-09 2011-07-26 Mark Henrik Sandstrom Data byte load based network byte-timeslot allocation
US8804760B2 (en) * 2008-06-12 2014-08-12 Mark Henrik Sandstrom Network data transport multiplexer bus with global and local optimization of capacity allocation
US8254378B2 (en) 2009-07-23 2012-08-28 Altera Canada Co. Strict-sense minimal spanning switch non-blocking architecture
US9825883B2 (en) * 2010-05-27 2017-11-21 Ciena Corporation Extensible time space switch systems and methods
CN112632036B (zh) * 2020-12-24 2024-04-30 深圳赛安特技术服务有限公司 一种数据交换体系的管理平台、方法及相关设备

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7005143A (enExample) 1970-04-10 1971-10-12
BE789402A (fr) 1971-10-01 1973-01-15 Western Electric Co Systeme de commutation a repartition temporelle
FR2224961B1 (enExample) 1973-04-06 1977-04-29 Voyer Paul
US4623996A (en) * 1984-10-18 1986-11-18 Mcmillen Robert J Packet switched multiple queue NXM switch node and processing method
US4967405A (en) * 1988-12-09 1990-10-30 Transwitch Corporation System for cross-connecting high speed digital SONET signals
GB2258366B (en) 1991-08-02 1995-03-29 Plessey Telecomm An ATM switching arrangement
US5583861A (en) 1994-04-28 1996-12-10 Integrated Telecom Technology ATM switching element and method having independently accessible cell memories
DE69529478T2 (de) * 1995-04-15 2003-10-09 International Business Machines Corp., Armonk Sdh/sonet-interface
SE504985C2 (sv) * 1995-05-09 1997-06-09 Ericsson Telefon Ab L M ATM-växelkärna

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014502810A (ja) * 2010-12-21 2014-02-03 アルカテル−ルーセント 光トランスポートネットワークのネットワークノード

Also Published As

Publication number Publication date
CA2445001C (en) 2011-07-19
CN1262091C (zh) 2006-06-28
CA2445001A1 (en) 2002-11-07
CN1513243A (zh) 2004-07-14
WO2002089431A1 (en) 2002-11-07
US6807186B2 (en) 2004-10-19
EP1384357A1 (en) 2004-01-28
US20020181482A1 (en) 2002-12-05
EP1384357B1 (en) 2009-02-11
ATE422769T1 (de) 2009-02-15
DE60231112D1 (enExample) 2009-03-26

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