JP2004507959A5 - - Google Patents
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- Publication number
- JP2004507959A5 JP2004507959A5 JP2002523708A JP2002523708A JP2004507959A5 JP 2004507959 A5 JP2004507959 A5 JP 2004507959A5 JP 2002523708 A JP2002523708 A JP 2002523708A JP 2002523708 A JP2002523708 A JP 2002523708A JP 2004507959 A5 JP2004507959 A5 JP 2004507959A5
- Authority
- JP
- Japan
- Prior art keywords
- devices
- impedance
- interface
- impedance matching
- predetermined
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 6
- 230000005540 biological transmission Effects 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 claims 3
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/652,031 US6417675B1 (en) | 2000-08-31 | 2000-08-31 | Receiver impedance calibration arrangements in full duplex communication systems |
| PCT/US2001/026905 WO2002019521A2 (en) | 2000-08-31 | 2001-08-29 | Receiver impedance calibration arrangements in full duplex communication systems |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004507959A JP2004507959A (ja) | 2004-03-11 |
| JP2004507959A5 true JP2004507959A5 (enExample) | 2005-02-24 |
| JP4450554B2 JP4450554B2 (ja) | 2010-04-14 |
Family
ID=24615241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002523708A Expired - Fee Related JP4450554B2 (ja) | 2000-08-31 | 2001-08-29 | 全二重通信システムにおける受信機インピーダンスの較正装置 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6417675B1 (enExample) |
| JP (1) | JP4450554B2 (enExample) |
| KR (1) | KR100518650B1 (enExample) |
| CN (1) | CN1252917C (enExample) |
| AU (1) | AU2001288490A1 (enExample) |
| TW (1) | TW533687B (enExample) |
| WO (1) | WO2002019521A2 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7035608B2 (en) * | 2001-03-16 | 2006-04-25 | Aura Communications Technology, Inc. | Methods and apparatus for tuning in an inductive system |
| JP3676736B2 (ja) * | 2002-01-17 | 2005-07-27 | Necエレクトロニクス株式会社 | データインタフェース回路 |
| US6734702B1 (en) * | 2002-11-12 | 2004-05-11 | Texas Instruments Incorporated | Impedance calibration circuit |
| US6965839B2 (en) * | 2003-04-28 | 2005-11-15 | International Business Machines Corporation | Proactive automated calibration of integrated circuit interface |
| US7652896B2 (en) * | 2004-12-29 | 2010-01-26 | Hewlett-Packard Development Company, L.P. | Component for impedance matching |
| US7656226B2 (en) * | 2006-03-31 | 2010-02-02 | Intel Corporation | Switched capacitor equalizer with offset voltage cancelling |
| US7649388B2 (en) * | 2006-03-31 | 2010-01-19 | Intel Corporation | Analog voltage recovery circuit |
| KR101046242B1 (ko) * | 2009-06-30 | 2011-07-04 | 주식회사 하이닉스반도체 | 임피던스 조정 회로 및 이를 이용한 반도체 장치 |
| TWI437828B (zh) * | 2011-02-11 | 2014-05-11 | Realtek Semiconductor Corp | 傳輸介面的阻抗與增益補償裝置與方法 |
| US9093990B2 (en) * | 2013-09-19 | 2015-07-28 | Intel Corporation | Matrix matching crosstalk reduction device and method |
| US9768780B2 (en) | 2014-05-30 | 2017-09-19 | Intel Corporation | Apparatus for providing shared reference device with metal line formed from metal layer with lower resistivity compared to other metal layers in processor |
| US9778293B1 (en) * | 2014-09-25 | 2017-10-03 | Western Digital Technologies, Inc. | Monitoring voltage levels for data storage devices |
| US9800323B2 (en) * | 2015-03-13 | 2017-10-24 | Mission Microwave Technologies, Inc. | Satellite transmitter system |
| CN106059600A (zh) * | 2016-07-29 | 2016-10-26 | 无锡信大气象传感网科技有限公司 | 一种用于大数据传输的无线数据接收器的工作方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5084637A (en) * | 1989-05-30 | 1992-01-28 | International Business Machines Corp. | Bidirectional level shifting interface circuit |
| JP2902016B2 (ja) * | 1989-11-21 | 1999-06-07 | 株式会社日立製作所 | 信号伝送方法および回路 |
| SE9400657D0 (sv) | 1994-02-25 | 1994-02-25 | Ellemtel Utvecklings Ab | En, en kontrollspänning alstrande, krets |
| US5463359A (en) * | 1994-03-21 | 1995-10-31 | Texas Instruments Incorporated | Impedance matching network for low output impedance devices |
| US5548222A (en) * | 1994-09-29 | 1996-08-20 | Forte Networks | Method and apparatus for measuring attenuation and crosstalk in data and communication channels |
| US6198292B1 (en) * | 1999-07-20 | 2001-03-06 | Agilent Technologies, Inc. | Crosstalk test unit and method of calibration |
-
2000
- 2000-08-31 US US09/652,031 patent/US6417675B1/en not_active Expired - Fee Related
-
2001
- 2001-08-29 CN CNB018150233A patent/CN1252917C/zh not_active Expired - Fee Related
- 2001-08-29 KR KR10-2003-7002714A patent/KR100518650B1/ko not_active Expired - Fee Related
- 2001-08-29 WO PCT/US2001/026905 patent/WO2002019521A2/en not_active Ceased
- 2001-08-29 JP JP2002523708A patent/JP4450554B2/ja not_active Expired - Fee Related
- 2001-08-29 AU AU2001288490A patent/AU2001288490A1/en not_active Abandoned
- 2001-08-31 TW TW090121595A patent/TW533687B/zh not_active IP Right Cessation
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